2 * ci13xxx_udc.c - MIPS USB IP core family device controller
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
53 #include <linux/delay.h>
54 #include <linux/device.h>
55 #include <linux/dmapool.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/init.h>
58 #include <linux/platform_device.h>
59 #include <linux/module.h>
60 #include <linux/interrupt.h>
62 #include <linux/irq.h>
63 #include <linux/kernel.h>
64 #include <linux/slab.h>
65 #include <linux/pm_runtime.h>
66 #include <linux/usb/ch9.h>
67 #include <linux/usb/gadget.h>
68 #include <linux/usb/otg.h>
70 #include "ci13xxx_udc.h"
72 /******************************************************************************
74 *****************************************************************************/
76 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
78 /* control endpoint description */
79 static const struct usb_endpoint_descriptor
80 ctrl_endpt_out_desc = {
81 .bLength = USB_DT_ENDPOINT_SIZE,
82 .bDescriptorType = USB_DT_ENDPOINT,
84 .bEndpointAddress = USB_DIR_OUT,
85 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
86 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
89 static const struct usb_endpoint_descriptor
90 ctrl_endpt_in_desc = {
91 .bLength = USB_DT_ENDPOINT_SIZE,
92 .bDescriptorType = USB_DT_ENDPOINT,
94 .bEndpointAddress = USB_DIR_IN,
95 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
96 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
100 static struct ci13xxx *_udc;
102 /* Interrupt statistics */
103 #define ISR_MASK 0x1F
120 * ffs_nr: find first (least significant) bit set
121 * @x: the word to search
123 * This function returns bit number (instead of position)
125 static int ffs_nr(u32 x)
132 /******************************************************************************
134 *****************************************************************************/
137 #define ABS_AHBBURST (0x0090UL)
138 #define ABS_AHBMODE (0x0098UL)
139 /* UDC register map */
140 static uintptr_t ci_regs_nolpm[] = {
141 [CAP_CAPLENGTH] = 0x000UL,
142 [CAP_HCCPARAMS] = 0x008UL,
143 [CAP_DCCPARAMS] = 0x024UL,
144 [CAP_TESTMODE] = 0x038UL,
145 [OP_USBCMD] = 0x000UL,
146 [OP_USBSTS] = 0x004UL,
147 [OP_USBINTR] = 0x008UL,
148 [OP_DEVICEADDR] = 0x014UL,
149 [OP_ENDPTLISTADDR] = 0x018UL,
150 [OP_PORTSC] = 0x044UL,
151 [OP_DEVLC] = 0x084UL,
152 [OP_USBMODE] = 0x068UL,
153 [OP_ENDPTSETUPSTAT] = 0x06CUL,
154 [OP_ENDPTPRIME] = 0x070UL,
155 [OP_ENDPTFLUSH] = 0x074UL,
156 [OP_ENDPTSTAT] = 0x078UL,
157 [OP_ENDPTCOMPLETE] = 0x07CUL,
158 [OP_ENDPTCTRL] = 0x080UL,
161 static uintptr_t ci_regs_lpm[] = {
162 [CAP_CAPLENGTH] = 0x000UL,
163 [CAP_HCCPARAMS] = 0x008UL,
164 [CAP_DCCPARAMS] = 0x024UL,
165 [CAP_TESTMODE] = 0x0FCUL,
166 [OP_USBCMD] = 0x000UL,
167 [OP_USBSTS] = 0x004UL,
168 [OP_USBINTR] = 0x008UL,
169 [OP_DEVICEADDR] = 0x014UL,
170 [OP_ENDPTLISTADDR] = 0x018UL,
171 [OP_PORTSC] = 0x044UL,
172 [OP_DEVLC] = 0x084UL,
173 [OP_USBMODE] = 0x0C8UL,
174 [OP_ENDPTSETUPSTAT] = 0x0D8UL,
175 [OP_ENDPTPRIME] = 0x0DCUL,
176 [OP_ENDPTFLUSH] = 0x0E0UL,
177 [OP_ENDPTSTAT] = 0x0E4UL,
178 [OP_ENDPTCOMPLETE] = 0x0E8UL,
179 [OP_ENDPTCTRL] = 0x0ECUL,
182 static int hw_alloc_regmap(struct ci13xxx *udc, bool is_lpm)
186 kfree(udc->hw_bank.regmap);
188 udc->hw_bank.regmap = kzalloc((OP_LAST + 1) * sizeof(void *),
190 if (!udc->hw_bank.regmap)
193 for (i = 0; i < OP_ENDPTCTRL; i++)
194 udc->hw_bank.regmap[i] =
195 (i <= CAP_LAST ? udc->hw_bank.cap : udc->hw_bank.op) +
196 (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
198 for (; i <= OP_LAST; i++)
199 udc->hw_bank.regmap[i] = udc->hw_bank.op +
200 4 * (i - OP_ENDPTCTRL) +
202 ? ci_regs_lpm[OP_ENDPTCTRL]
203 : ci_regs_nolpm[OP_ENDPTCTRL]);
209 * hw_ep_bit: calculates the bit number
210 * @num: endpoint number
211 * @dir: endpoint direction
213 * This function returns bit number
215 static inline int hw_ep_bit(int num, int dir)
217 return num + (dir ? 16 : 0);
220 static int ep_to_bit(struct ci13xxx *udc, int n)
222 int fill = 16 - udc->hw_ep_max / 2;
224 if (n >= udc->hw_ep_max / 2)
231 * hw_read: reads from a hw register
232 * @reg: register index
233 * @mask: bitfield mask
235 * This function returns register contents
237 static u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
239 return ioread32(udc->hw_bank.regmap[reg]) & mask;
243 * hw_write: writes to a hw register
244 * @reg: register index
245 * @mask: bitfield mask
248 static void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask,
252 data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask)
255 iowrite32(data, udc->hw_bank.regmap[reg]);
259 * hw_test_and_clear: tests & clears a hw register
260 * @reg: register index
261 * @mask: bitfield mask
263 * This function returns register contents
265 static u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
268 u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask;
270 iowrite32(val, udc->hw_bank.regmap[reg]);
275 * hw_test_and_write: tests & writes a hw register
276 * @reg: register index
277 * @mask: bitfield mask
280 * This function returns register contents
282 static u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
285 u32 val = hw_read(udc, reg, ~0);
287 hw_write(udc, reg, mask, data);
288 return (val & mask) >> ffs_nr(mask);
291 static int hw_device_init(struct ci13xxx *udc, void __iomem *base,
292 uintptr_t cap_offset)
296 /* bank is a module variable */
297 udc->hw_bank.abs = base;
299 udc->hw_bank.cap = udc->hw_bank.abs;
300 udc->hw_bank.cap += cap_offset;
301 udc->hw_bank.op = udc->hw_bank.cap + ioread8(udc->hw_bank.cap);
303 hw_alloc_regmap(udc, false);
304 reg = hw_read(udc, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
305 ffs_nr(HCCPARAMS_LEN);
306 udc->hw_bank.lpm = reg;
307 hw_alloc_regmap(udc, !!reg);
308 udc->hw_bank.size = udc->hw_bank.op - udc->hw_bank.abs;
309 udc->hw_bank.size += OP_LAST;
310 udc->hw_bank.size /= sizeof(u32);
312 reg = hw_read(udc, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
313 ffs_nr(DCCPARAMS_DEN);
314 udc->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
316 if (udc->hw_ep_max == 0 || udc->hw_ep_max > ENDPT_MAX)
319 /* setup lock mode ? */
321 /* ENDPTSETUPSTAT is '0' by default */
323 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
328 * hw_device_reset: resets chip (execute without interruption)
329 * @base: register base address
331 * This function returns an error code
333 static int hw_device_reset(struct ci13xxx *udc)
335 /* should flush & stop before reset */
336 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
337 hw_write(udc, OP_USBCMD, USBCMD_RS, 0);
339 hw_write(udc, OP_USBCMD, USBCMD_RST, USBCMD_RST);
340 while (hw_read(udc, OP_USBCMD, USBCMD_RST))
341 udelay(10); /* not RTOS friendly */
344 if (udc->udc_driver->notify_event)
345 udc->udc_driver->notify_event(udc,
346 CI13XXX_CONTROLLER_RESET_EVENT);
348 if (udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
349 hw_write(udc, OP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
351 /* USBMODE should be configured step by step */
352 hw_write(udc, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
353 hw_write(udc, OP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
355 hw_write(udc, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
357 if (hw_read(udc, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
358 pr_err("cannot enter in device mode");
359 pr_err("lpm = %i", udc->hw_bank.lpm);
367 * hw_device_state: enables/disables interrupts & starts/stops device (execute
368 * without interruption)
369 * @dma: 0 => disable, !0 => enable and set dma engine
371 * This function returns an error code
373 static int hw_device_state(struct ci13xxx *udc, u32 dma)
376 hw_write(udc, OP_ENDPTLISTADDR, ~0, dma);
377 /* interrupt, error, port change, reset, sleep/suspend */
378 hw_write(udc, OP_USBINTR, ~0,
379 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
380 hw_write(udc, OP_USBCMD, USBCMD_RS, USBCMD_RS);
382 hw_write(udc, OP_USBCMD, USBCMD_RS, 0);
383 hw_write(udc, OP_USBINTR, ~0, 0);
389 * hw_ep_flush: flush endpoint fifo (execute without interruption)
390 * @num: endpoint number
391 * @dir: endpoint direction
393 * This function returns an error code
395 static int hw_ep_flush(struct ci13xxx *udc, int num, int dir)
397 int n = hw_ep_bit(num, dir);
400 /* flush any pending transfer */
401 hw_write(udc, OP_ENDPTFLUSH, BIT(n), BIT(n));
402 while (hw_read(udc, OP_ENDPTFLUSH, BIT(n)))
404 } while (hw_read(udc, OP_ENDPTSTAT, BIT(n)));
410 * hw_ep_disable: disables endpoint (execute without interruption)
411 * @num: endpoint number
412 * @dir: endpoint direction
414 * This function returns an error code
416 static int hw_ep_disable(struct ci13xxx *udc, int num, int dir)
418 hw_ep_flush(udc, num, dir);
419 hw_write(udc, OP_ENDPTCTRL + num,
420 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
425 * hw_ep_enable: enables endpoint (execute without interruption)
426 * @num: endpoint number
427 * @dir: endpoint direction
428 * @type: endpoint type
430 * This function returns an error code
432 static int hw_ep_enable(struct ci13xxx *udc, int num, int dir, int type)
437 mask = ENDPTCTRL_TXT; /* type */
438 data = type << ffs_nr(mask);
440 mask |= ENDPTCTRL_TXS; /* unstall */
441 mask |= ENDPTCTRL_TXR; /* reset data toggle */
442 data |= ENDPTCTRL_TXR;
443 mask |= ENDPTCTRL_TXE; /* enable */
444 data |= ENDPTCTRL_TXE;
446 mask = ENDPTCTRL_RXT; /* type */
447 data = type << ffs_nr(mask);
449 mask |= ENDPTCTRL_RXS; /* unstall */
450 mask |= ENDPTCTRL_RXR; /* reset data toggle */
451 data |= ENDPTCTRL_RXR;
452 mask |= ENDPTCTRL_RXE; /* enable */
453 data |= ENDPTCTRL_RXE;
455 hw_write(udc, OP_ENDPTCTRL + num, mask, data);
460 * hw_ep_get_halt: return endpoint halt status
461 * @num: endpoint number
462 * @dir: endpoint direction
464 * This function returns 1 if endpoint halted
466 static int hw_ep_get_halt(struct ci13xxx *udc, int num, int dir)
468 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
470 return hw_read(udc, OP_ENDPTCTRL + num, mask) ? 1 : 0;
474 * hw_test_and_clear_setup_status: test & clear setup status (execute without
476 * @n: endpoint number
478 * This function returns setup status
480 static int hw_test_and_clear_setup_status(struct ci13xxx *udc, int n)
482 n = ep_to_bit(udc, n);
483 return hw_test_and_clear(udc, OP_ENDPTSETUPSTAT, BIT(n));
487 * hw_ep_prime: primes endpoint (execute without interruption)
488 * @num: endpoint number
489 * @dir: endpoint direction
490 * @is_ctrl: true if control endpoint
492 * This function returns an error code
494 static int hw_ep_prime(struct ci13xxx *udc, int num, int dir, int is_ctrl)
496 int n = hw_ep_bit(num, dir);
498 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
501 hw_write(udc, OP_ENDPTPRIME, BIT(n), BIT(n));
503 while (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
505 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
508 /* status shoult be tested according with manual but it doesn't work */
513 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
514 * without interruption)
515 * @num: endpoint number
516 * @dir: endpoint direction
517 * @value: true => stall, false => unstall
519 * This function returns an error code
521 static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
523 if (value != 0 && value != 1)
527 enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
528 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
529 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
531 /* data toggle - reserved for EP0 but it's in ESS */
532 hw_write(udc, reg, mask_xs|mask_xr,
533 value ? mask_xs : mask_xr);
534 } while (value != hw_ep_get_halt(udc, num, dir));
540 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
544 * This function returns an error code
546 static int hw_intr_clear(struct ci13xxx *udc, int n)
551 hw_write(udc, OP_USBINTR, BIT(n), 0);
552 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
557 * hw_intr_force: enables interrupt & forces interrupt status (execute without
561 * This function returns an error code
563 static int hw_intr_force(struct ci13xxx *udc, int n)
568 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
569 hw_write(udc, OP_USBINTR, BIT(n), BIT(n));
570 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
571 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, 0);
576 * hw_is_port_high_speed: test if port is high speed
578 * This function returns true if high speed port
580 static int hw_port_is_high_speed(struct ci13xxx *udc)
582 return udc->hw_bank.lpm ? hw_read(udc, OP_DEVLC, DEVLC_PSPD) :
583 hw_read(udc, OP_PORTSC, PORTSC_HSP);
587 * hw_port_test_get: reads port test mode value
589 * This function returns port test mode value
591 static u8 hw_port_test_get(struct ci13xxx *udc)
593 return hw_read(udc, OP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
597 * hw_port_test_set: writes port test mode (execute without interruption)
600 * This function returns an error code
602 static int hw_port_test_set(struct ci13xxx *udc, u8 mode)
604 const u8 TEST_MODE_MAX = 7;
606 if (mode > TEST_MODE_MAX)
609 hw_write(udc, OP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
614 * hw_read_intr_enable: returns interrupt enable register
616 * This function returns register data
618 static u32 hw_read_intr_enable(struct ci13xxx *udc)
620 return hw_read(udc, OP_USBINTR, ~0);
624 * hw_read_intr_status: returns interrupt status register
626 * This function returns register data
628 static u32 hw_read_intr_status(struct ci13xxx *udc)
630 return hw_read(udc, OP_USBSTS, ~0);
634 * hw_register_read: reads all device registers (execute without interruption)
635 * @buf: destination buffer
638 * This function returns number of registers read
640 static size_t hw_register_read(struct ci13xxx *udc, u32 *buf, size_t size)
644 if (size > udc->hw_bank.size)
645 size = udc->hw_bank.size;
647 for (i = 0; i < size; i++)
648 buf[i] = hw_read(udc, i * sizeof(u32), ~0);
654 * hw_register_write: writes to register
655 * @addr: register address
656 * @data: register value
658 * This function returns an error code
660 static int hw_register_write(struct ci13xxx *udc, u16 addr, u32 data)
665 if (addr >= udc->hw_bank.size)
671 hw_write(udc, addr, ~0, data);
676 * hw_test_and_clear_complete: test & clear complete status (execute without
678 * @n: endpoint number
680 * This function returns complete status
682 static int hw_test_and_clear_complete(struct ci13xxx *udc, int n)
684 n = ep_to_bit(udc, n);
685 return hw_test_and_clear(udc, OP_ENDPTCOMPLETE, BIT(n));
689 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
690 * without interruption)
692 * This function returns active interrutps
694 static u32 hw_test_and_clear_intr_active(struct ci13xxx *udc)
696 u32 reg = hw_read_intr_status(udc) & hw_read_intr_enable(udc);
698 hw_write(udc, OP_USBSTS, ~0, reg);
703 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
706 * This function returns guard value
708 static int hw_test_and_clear_setup_guard(struct ci13xxx *udc)
710 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, 0);
714 * hw_test_and_set_setup_guard: test & set setup guard (execute without
717 * This function returns guard value
719 static int hw_test_and_set_setup_guard(struct ci13xxx *udc)
721 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
725 * hw_usb_set_address: configures USB address (execute without interruption)
726 * @value: new USB address
728 * This function returns an error code
730 static int hw_usb_set_address(struct ci13xxx *udc, u8 value)
733 hw_write(udc, OP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
734 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
739 * hw_usb_reset: restart device after a bus reset (execute without
742 * This function returns an error code
744 static int hw_usb_reset(struct ci13xxx *udc)
746 hw_usb_set_address(udc, 0);
748 /* ESS flushes only at end?!? */
749 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
751 /* clear setup token semaphores */
752 hw_write(udc, OP_ENDPTSETUPSTAT, 0, 0);
754 /* clear complete status */
755 hw_write(udc, OP_ENDPTCOMPLETE, 0, 0);
757 /* wait until all bits cleared */
758 while (hw_read(udc, OP_ENDPTPRIME, ~0))
759 udelay(10); /* not RTOS friendly */
761 /* reset all endpoints ? */
763 /* reset internal status and wait for further instructions
764 no need to verify the port reset status (ESS does it) */
769 /******************************************************************************
771 *****************************************************************************/
773 * show_device: prints information about device capabilities and status
775 * Check "device.h" for details
777 static ssize_t show_device(struct device *dev, struct device_attribute *attr,
780 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
781 struct usb_gadget *gadget = &udc->gadget;
784 trace(udc->dev, "%p\n", buf);
785 if (attr == NULL || buf == NULL) {
786 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
790 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
792 n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
794 /* TODO: Scheduled for removal in 3.8. */
795 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
796 gadget_is_dualspeed(gadget));
797 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
799 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
800 gadget->is_a_peripheral);
801 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
802 gadget->b_hnp_enable);
803 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
804 gadget->a_hnp_support);
805 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
806 gadget->a_alt_hnp_support);
807 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
808 (gadget->name ? gadget->name : ""));
812 static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
815 * show_driver: prints information about attached gadget (if any)
817 * Check "device.h" for details
819 static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
822 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
823 struct usb_gadget_driver *driver = udc->driver;
826 trace(udc->dev, "%p\n", buf);
827 if (attr == NULL || buf == NULL) {
828 dev_err(dev, "[%s] EINVAL\n", __func__);
833 return scnprintf(buf, PAGE_SIZE,
834 "There is no gadget attached!\n");
836 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
837 (driver->function ? driver->function : ""));
838 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
843 static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
845 /* Maximum event message length */
846 #define DBG_DATA_MSG 64UL
848 /* Maximum event messages */
849 #define DBG_DATA_MAX 128UL
851 /* Event buffer descriptor */
853 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
854 unsigned idx; /* index */
855 unsigned tty; /* print to console? */
856 rwlock_t lck; /* lock */
860 .lck = __RW_LOCK_UNLOCKED(lck)
864 * dbg_dec: decrements debug event index
867 static void dbg_dec(unsigned *idx)
869 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
873 * dbg_inc: increments debug event index
876 static void dbg_inc(unsigned *idx)
878 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
882 * dbg_print: prints the common part of the event
883 * @addr: endpoint address
886 * @extra: extra information
888 static void dbg_print(u8 addr, const char *name, int status, const char *extra)
894 write_lock_irqsave(&dbg_data.lck, flags);
896 do_gettimeofday(&tval);
897 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
898 stamp = stamp * 1000000 + tval.tv_usec;
900 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
901 "%04X\t? %02X %-7.7s %4i ?\t%s\n",
902 stamp, addr, name, status, extra);
904 dbg_inc(&dbg_data.idx);
906 write_unlock_irqrestore(&dbg_data.lck, flags);
908 if (dbg_data.tty != 0)
909 pr_notice("%04X\t? %02X %-7.7s %4i ?\t%s\n",
910 stamp, addr, name, status, extra);
914 * dbg_done: prints a DONE event
915 * @addr: endpoint address
916 * @td: transfer descriptor
919 static void dbg_done(u8 addr, const u32 token, int status)
921 char msg[DBG_DATA_MSG];
923 scnprintf(msg, sizeof(msg), "%d %02X",
924 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
925 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
926 dbg_print(addr, "DONE", status, msg);
930 * dbg_event: prints a generic event
931 * @addr: endpoint address
935 static void dbg_event(u8 addr, const char *name, int status)
938 dbg_print(addr, name, status, "");
942 * dbg_queue: prints a QUEUE event
943 * @addr: endpoint address
947 static void dbg_queue(u8 addr, const struct usb_request *req, int status)
949 char msg[DBG_DATA_MSG];
952 scnprintf(msg, sizeof(msg),
953 "%d %d", !req->no_interrupt, req->length);
954 dbg_print(addr, "QUEUE", status, msg);
959 * dbg_setup: prints a SETUP event
960 * @addr: endpoint address
961 * @req: setup request
963 static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
965 char msg[DBG_DATA_MSG];
968 scnprintf(msg, sizeof(msg),
969 "%02X %02X %04X %04X %d", req->bRequestType,
970 req->bRequest, le16_to_cpu(req->wValue),
971 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
972 dbg_print(addr, "SETUP", 0, msg);
977 * show_events: displays the event buffer
979 * Check "device.h" for details
981 static ssize_t show_events(struct device *dev, struct device_attribute *attr,
985 unsigned i, j, n = 0;
987 trace(dev->parent, "%p\n", buf);
988 if (attr == NULL || buf == NULL) {
989 dev_err(dev->parent, "[%s] EINVAL\n", __func__);
993 read_lock_irqsave(&dbg_data.lck, flags);
996 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
997 n += strlen(dbg_data.buf[i]);
998 if (n >= PAGE_SIZE) {
999 n -= strlen(dbg_data.buf[i]);
1003 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
1004 j += scnprintf(buf + j, PAGE_SIZE - j,
1005 "%s", dbg_data.buf[i]);
1007 read_unlock_irqrestore(&dbg_data.lck, flags);
1013 * store_events: configure if events are going to be also printed to console
1015 * Check "device.h" for details
1017 static ssize_t store_events(struct device *dev, struct device_attribute *attr,
1018 const char *buf, size_t count)
1022 trace(dev->parent, "[%s] %p, %d\n", __func__, buf, count);
1023 if (attr == NULL || buf == NULL) {
1024 dev_err(dev, "[%s] EINVAL\n", __func__);
1028 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
1029 dev_err(dev, "<1|0>: enable|disable console log\n");
1034 dev_info(dev, "tty = %u", dbg_data.tty);
1039 static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
1042 * show_inters: interrupt status, enable status and historic
1044 * Check "device.h" for details
1046 static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1049 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1050 unsigned long flags;
1052 unsigned i, j, n = 0;
1054 trace(udc->dev, "%p\n", buf);
1055 if (attr == NULL || buf == NULL) {
1056 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1060 spin_lock_irqsave(&udc->lock, flags);
1062 n += scnprintf(buf + n, PAGE_SIZE - n,
1063 "status = %08x\n", hw_read_intr_status(udc));
1064 n += scnprintf(buf + n, PAGE_SIZE - n,
1065 "enable = %08x\n", hw_read_intr_enable(udc));
1067 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1068 isr_statistics.test);
1069 n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
1071 n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
1072 isr_statistics.uei);
1073 n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
1074 isr_statistics.pci);
1075 n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
1076 isr_statistics.uri);
1077 n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
1078 isr_statistics.sli);
1079 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1080 isr_statistics.none);
1081 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1082 isr_statistics.hndl.cnt);
1084 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1086 intr = isr_statistics.hndl.buf[i];
1089 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1091 if (USBi_UEI & intr)
1092 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1094 if (USBi_PCI & intr)
1095 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1097 if (USBi_URI & intr)
1098 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1100 if (USBi_SLI & intr)
1101 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1104 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1105 if (isr_statistics.hndl.buf[i])
1106 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1109 spin_unlock_irqrestore(&udc->lock, flags);
1115 * store_inters: enable & force or disable an individual interrutps
1116 * (to be used for test purposes only)
1118 * Check "device.h" for details
1120 static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1121 const char *buf, size_t count)
1123 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1124 unsigned long flags;
1127 trace(udc->dev, "%p, %d\n", buf, count);
1128 if (attr == NULL || buf == NULL) {
1129 dev_err(udc->dev, "EINVAL\n");
1133 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1134 dev_err(udc->dev, "<1|0> <bit>: enable|disable interrupt\n");
1138 spin_lock_irqsave(&udc->lock, flags);
1140 if (hw_intr_force(udc, bit))
1141 dev_err(dev, "invalid bit number\n");
1143 isr_statistics.test++;
1145 if (hw_intr_clear(udc, bit))
1146 dev_err(dev, "invalid bit number\n");
1148 spin_unlock_irqrestore(&udc->lock, flags);
1153 static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1156 * show_port_test: reads port test mode
1158 * Check "device.h" for details
1160 static ssize_t show_port_test(struct device *dev,
1161 struct device_attribute *attr, char *buf)
1163 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1164 unsigned long flags;
1167 trace(udc->dev, "%p\n", buf);
1168 if (attr == NULL || buf == NULL) {
1169 dev_err(udc->dev, "EINVAL\n");
1173 spin_lock_irqsave(&udc->lock, flags);
1174 mode = hw_port_test_get(udc);
1175 spin_unlock_irqrestore(&udc->lock, flags);
1177 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1181 * store_port_test: writes port test mode
1183 * Check "device.h" for details
1185 static ssize_t store_port_test(struct device *dev,
1186 struct device_attribute *attr,
1187 const char *buf, size_t count)
1189 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1190 unsigned long flags;
1193 trace(udc->dev, "%p, %d\n", buf, count);
1194 if (attr == NULL || buf == NULL) {
1195 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1199 if (sscanf(buf, "%u", &mode) != 1) {
1200 dev_err(udc->dev, "<mode>: set port test mode");
1204 spin_lock_irqsave(&udc->lock, flags);
1205 if (hw_port_test_set(udc, mode))
1206 dev_err(udc->dev, "invalid mode\n");
1207 spin_unlock_irqrestore(&udc->lock, flags);
1212 static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1213 show_port_test, store_port_test);
1216 * show_qheads: DMA contents of all queue heads
1218 * Check "device.h" for details
1220 static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1223 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1224 unsigned long flags;
1225 unsigned i, j, n = 0;
1227 trace(udc->dev, "%p\n", buf);
1228 if (attr == NULL || buf == NULL) {
1229 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1233 spin_lock_irqsave(&udc->lock, flags);
1234 for (i = 0; i < udc->hw_ep_max/2; i++) {
1235 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1236 struct ci13xxx_ep *mEpTx =
1237 &udc->ci13xxx_ep[i + udc->hw_ep_max/2];
1238 n += scnprintf(buf + n, PAGE_SIZE - n,
1239 "EP=%02i: RX=%08X TX=%08X\n",
1240 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
1241 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1242 n += scnprintf(buf + n, PAGE_SIZE - n,
1243 " %04X: %08X %08X\n", j,
1244 *((u32 *)mEpRx->qh.ptr + j),
1245 *((u32 *)mEpTx->qh.ptr + j));
1248 spin_unlock_irqrestore(&udc->lock, flags);
1252 static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1255 * show_registers: dumps all registers
1257 * Check "device.h" for details
1259 #define DUMP_ENTRIES 512
1260 static ssize_t show_registers(struct device *dev,
1261 struct device_attribute *attr, char *buf)
1263 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1264 unsigned long flags;
1266 unsigned i, k, n = 0;
1268 trace(udc->dev, "%p\n", buf);
1269 if (attr == NULL || buf == NULL) {
1270 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1274 dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
1276 dev_err(udc->dev, "%s: out of memory\n", __func__);
1280 spin_lock_irqsave(&udc->lock, flags);
1281 k = hw_register_read(udc, dump, DUMP_ENTRIES);
1282 spin_unlock_irqrestore(&udc->lock, flags);
1284 for (i = 0; i < k; i++) {
1285 n += scnprintf(buf + n, PAGE_SIZE - n,
1286 "reg[0x%04X] = 0x%08X\n",
1287 i * (unsigned)sizeof(u32), dump[i]);
1295 * store_registers: writes value to register address
1297 * Check "device.h" for details
1299 static ssize_t store_registers(struct device *dev,
1300 struct device_attribute *attr,
1301 const char *buf, size_t count)
1303 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1304 unsigned long addr, data, flags;
1306 trace(udc->dev, "%p, %d\n", buf, count);
1307 if (attr == NULL || buf == NULL) {
1308 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1312 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1314 "<addr> <data>: write data to register address\n");
1318 spin_lock_irqsave(&udc->lock, flags);
1319 if (hw_register_write(udc, addr, data))
1320 dev_err(udc->dev, "invalid address range\n");
1321 spin_unlock_irqrestore(&udc->lock, flags);
1326 static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1327 show_registers, store_registers);
1330 * show_requests: DMA contents of all requests currently queued (all endpts)
1332 * Check "device.h" for details
1334 static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1337 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1338 unsigned long flags;
1339 struct list_head *ptr = NULL;
1340 struct ci13xxx_req *req = NULL;
1341 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1343 trace(udc->dev, "%p\n", buf);
1344 if (attr == NULL || buf == NULL) {
1345 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1349 spin_lock_irqsave(&udc->lock, flags);
1350 for (i = 0; i < udc->hw_ep_max; i++)
1351 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1353 req = list_entry(ptr, struct ci13xxx_req, queue);
1355 n += scnprintf(buf + n, PAGE_SIZE - n,
1356 "EP=%02i: TD=%08X %s\n",
1357 i % udc->hw_ep_max/2, (u32)req->dma,
1358 ((i < udc->hw_ep_max/2) ? "RX" : "TX"));
1360 for (j = 0; j < qSize; j++)
1361 n += scnprintf(buf + n, PAGE_SIZE - n,
1363 *((u32 *)req->ptr + j));
1365 spin_unlock_irqrestore(&udc->lock, flags);
1369 static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1372 * dbg_create_files: initializes the attribute interface
1375 * This function returns an error code
1377 __maybe_unused static int dbg_create_files(struct device *dev)
1383 retval = device_create_file(dev, &dev_attr_device);
1386 retval = device_create_file(dev, &dev_attr_driver);
1389 retval = device_create_file(dev, &dev_attr_events);
1392 retval = device_create_file(dev, &dev_attr_inters);
1395 retval = device_create_file(dev, &dev_attr_port_test);
1398 retval = device_create_file(dev, &dev_attr_qheads);
1401 retval = device_create_file(dev, &dev_attr_registers);
1404 retval = device_create_file(dev, &dev_attr_requests);
1410 device_remove_file(dev, &dev_attr_registers);
1412 device_remove_file(dev, &dev_attr_qheads);
1414 device_remove_file(dev, &dev_attr_port_test);
1416 device_remove_file(dev, &dev_attr_inters);
1418 device_remove_file(dev, &dev_attr_events);
1420 device_remove_file(dev, &dev_attr_driver);
1422 device_remove_file(dev, &dev_attr_device);
1428 * dbg_remove_files: destroys the attribute interface
1431 * This function returns an error code
1433 __maybe_unused static int dbg_remove_files(struct device *dev)
1437 device_remove_file(dev, &dev_attr_requests);
1438 device_remove_file(dev, &dev_attr_registers);
1439 device_remove_file(dev, &dev_attr_qheads);
1440 device_remove_file(dev, &dev_attr_port_test);
1441 device_remove_file(dev, &dev_attr_inters);
1442 device_remove_file(dev, &dev_attr_events);
1443 device_remove_file(dev, &dev_attr_driver);
1444 device_remove_file(dev, &dev_attr_device);
1448 /******************************************************************************
1450 *****************************************************************************/
1452 * _usb_addr: calculates endpoint address from direction & number
1455 static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1457 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1461 * _hardware_queue: configures a request at hardware level
1465 * This function returns an error code
1467 static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1469 struct ci13xxx *udc = mEp->udc;
1472 unsigned length = mReq->req.length;
1474 trace(udc->dev, "%p, %p", mEp, mReq);
1476 /* don't queue twice */
1477 if (mReq->req.status == -EALREADY)
1480 mReq->req.status = -EALREADY;
1481 if (length && mReq->req.dma == DMA_ADDR_INVALID) {
1483 dma_map_single(mEp->device, mReq->req.buf,
1484 length, mEp->dir ? DMA_TO_DEVICE :
1486 if (mReq->req.dma == 0)
1492 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
1493 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
1495 if (mReq->zptr == NULL) {
1497 dma_unmap_single(mEp->device, mReq->req.dma,
1498 length, mEp->dir ? DMA_TO_DEVICE :
1500 mReq->req.dma = DMA_ADDR_INVALID;
1505 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
1506 mReq->zptr->next = TD_TERMINATE;
1507 mReq->zptr->token = TD_STATUS_ACTIVE;
1508 if (!mReq->req.no_interrupt)
1509 mReq->zptr->token |= TD_IOC;
1513 * TODO - handle requests which spawns into several TDs
1515 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1516 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
1517 mReq->ptr->token &= TD_TOTAL_BYTES;
1518 mReq->ptr->token |= TD_STATUS_ACTIVE;
1520 mReq->ptr->next = mReq->zdma;
1522 mReq->ptr->next = TD_TERMINATE;
1523 if (!mReq->req.no_interrupt)
1524 mReq->ptr->token |= TD_IOC;
1526 mReq->ptr->page[0] = mReq->req.dma;
1527 for (i = 1; i < 5; i++)
1528 mReq->ptr->page[i] =
1529 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
1531 if (!list_empty(&mEp->qh.queue)) {
1532 struct ci13xxx_req *mReqPrev;
1533 int n = hw_ep_bit(mEp->num, mEp->dir);
1536 mReqPrev = list_entry(mEp->qh.queue.prev,
1537 struct ci13xxx_req, queue);
1539 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
1541 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
1543 if (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
1546 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
1547 tmp_stat = hw_read(udc, OP_ENDPTSTAT, BIT(n));
1548 } while (!hw_read(udc, OP_USBCMD, USBCMD_ATDTW));
1549 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, 0);
1554 /* QH configuration */
1555 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1556 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
1557 mEp->qh.ptr->cap |= QH_ZLT;
1559 wmb(); /* synchronize before ep prime */
1561 ret = hw_ep_prime(udc, mEp->num, mEp->dir,
1562 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1568 * _hardware_dequeue: handles a request at hardware level
1572 * This function returns an error code
1574 static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1576 trace(mEp->udc->dev, "%p, %p", mEp, mReq);
1578 if (mReq->req.status != -EALREADY)
1581 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
1585 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
1587 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
1591 mReq->req.status = 0;
1594 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1595 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1596 mReq->req.dma = DMA_ADDR_INVALID;
1600 mReq->req.status = mReq->ptr->token & TD_STATUS;
1601 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1602 mReq->req.status = -1;
1603 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1604 mReq->req.status = -1;
1605 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1606 mReq->req.status = -1;
1608 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1609 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1610 mReq->req.actual = mReq->req.length - mReq->req.actual;
1611 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1613 return mReq->req.actual;
1617 * _ep_nuke: dequeues all endpoint requests
1620 * This function returns an error code
1621 * Caller must hold lock
1623 static int _ep_nuke(struct ci13xxx_ep *mEp)
1624 __releases(mEp->lock)
1625 __acquires(mEp->lock)
1627 trace(mEp->udc->dev, "%p", mEp);
1632 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1634 while (!list_empty(&mEp->qh.queue)) {
1636 /* pop oldest request */
1637 struct ci13xxx_req *mReq = \
1638 list_entry(mEp->qh.queue.next,
1639 struct ci13xxx_req, queue);
1640 list_del_init(&mReq->queue);
1641 mReq->req.status = -ESHUTDOWN;
1643 if (mReq->req.complete != NULL) {
1644 spin_unlock(mEp->lock);
1645 mReq->req.complete(&mEp->ep, &mReq->req);
1646 spin_lock(mEp->lock);
1653 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1656 * This function returns an error code
1658 static int _gadget_stop_activity(struct usb_gadget *gadget)
1661 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1662 unsigned long flags;
1664 trace(udc->dev, "%p", gadget);
1669 spin_lock_irqsave(&udc->lock, flags);
1670 udc->gadget.speed = USB_SPEED_UNKNOWN;
1671 udc->remote_wakeup = 0;
1673 spin_unlock_irqrestore(&udc->lock, flags);
1675 /* flush all endpoints */
1676 gadget_for_each_ep(ep, gadget) {
1677 usb_ep_fifo_flush(ep);
1679 usb_ep_fifo_flush(&udc->ep0out->ep);
1680 usb_ep_fifo_flush(&udc->ep0in->ep);
1682 udc->driver->disconnect(gadget);
1684 /* make sure to disable all endpoints */
1685 gadget_for_each_ep(ep, gadget) {
1689 if (udc->status != NULL) {
1690 usb_ep_free_request(&udc->ep0in->ep, udc->status);
1697 /******************************************************************************
1699 *****************************************************************************/
1701 * isr_reset_handler: USB reset interrupt handler
1704 * This function resets USB engine after a bus reset occurred
1706 static void isr_reset_handler(struct ci13xxx *udc)
1707 __releases(udc->lock)
1708 __acquires(udc->lock)
1712 trace(udc->dev, "%p", udc);
1714 dbg_event(0xFF, "BUS RST", 0);
1716 spin_unlock(&udc->lock);
1717 retval = _gadget_stop_activity(&udc->gadget);
1721 retval = hw_usb_reset(udc);
1725 udc->status = usb_ep_alloc_request(&udc->ep0in->ep, GFP_ATOMIC);
1726 if (udc->status == NULL)
1729 spin_lock(&udc->lock);
1733 dev_err(udc->dev, "error: %i\n", retval);
1737 * isr_get_status_complete: get_status request complete function
1739 * @req: request handled
1741 * Caller must release lock
1743 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1745 trace(NULL, "%p, %p", ep, req);
1747 if (ep == NULL || req == NULL)
1751 usb_ep_free_request(ep, req);
1755 * isr_get_status_response: get_status request response
1757 * @setup: setup request packet
1759 * This function returns an error code
1761 static int isr_get_status_response(struct ci13xxx *udc,
1762 struct usb_ctrlrequest *setup)
1763 __releases(mEp->lock)
1764 __acquires(mEp->lock)
1766 struct ci13xxx_ep *mEp = udc->ep0in;
1767 struct usb_request *req = NULL;
1768 gfp_t gfp_flags = GFP_ATOMIC;
1769 int dir, num, retval;
1771 trace(udc->dev, "%p, %p", mEp, setup);
1773 if (mEp == NULL || setup == NULL)
1776 spin_unlock(mEp->lock);
1777 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1778 spin_lock(mEp->lock);
1782 req->complete = isr_get_status_complete;
1784 req->buf = kzalloc(req->length, gfp_flags);
1785 if (req->buf == NULL) {
1790 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1791 /* Assume that device is bus powered for now. */
1792 *(u16 *)req->buf = _udc->remote_wakeup << 1;
1794 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1795 == USB_RECIP_ENDPOINT) {
1796 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1798 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1799 *(u16 *)req->buf = hw_ep_get_halt(udc, num, dir);
1801 /* else do nothing; reserved for future use */
1803 spin_unlock(mEp->lock);
1804 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1805 spin_lock(mEp->lock);
1814 spin_unlock(mEp->lock);
1815 usb_ep_free_request(&mEp->ep, req);
1816 spin_lock(mEp->lock);
1821 * isr_setup_status_complete: setup_status request complete function
1823 * @req: request handled
1825 * Caller must release lock. Put the port in test mode if test mode
1826 * feature is selected.
1829 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1831 struct ci13xxx *udc = req->context;
1832 unsigned long flags;
1834 trace(udc->dev, "%p, %p", ep, req);
1836 spin_lock_irqsave(&udc->lock, flags);
1838 hw_port_test_set(udc, udc->test_mode);
1839 spin_unlock_irqrestore(&udc->lock, flags);
1843 * isr_setup_status_phase: queues the status phase of a setup transation
1846 * This function returns an error code
1848 static int isr_setup_status_phase(struct ci13xxx *udc)
1849 __releases(mEp->lock)
1850 __acquires(mEp->lock)
1853 struct ci13xxx_ep *mEp;
1855 trace(udc->dev, "%p", udc);
1857 mEp = (udc->ep0_dir == TX) ? udc->ep0out : udc->ep0in;
1858 udc->status->context = udc;
1859 udc->status->complete = isr_setup_status_complete;
1861 spin_unlock(mEp->lock);
1862 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
1863 spin_lock(mEp->lock);
1869 * isr_tr_complete_low: transaction complete low level handler
1872 * This function returns an error code
1873 * Caller must hold lock
1875 static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1876 __releases(mEp->lock)
1877 __acquires(mEp->lock)
1879 struct ci13xxx_req *mReq, *mReqTemp;
1880 struct ci13xxx_ep *mEpTemp = mEp;
1881 int uninitialized_var(retval);
1883 trace(mEp->udc->dev, "%p", mEp);
1885 if (list_empty(&mEp->qh.queue))
1888 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
1890 retval = _hardware_dequeue(mEp, mReq);
1893 list_del_init(&mReq->queue);
1894 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1895 if (mReq->req.complete != NULL) {
1896 spin_unlock(mEp->lock);
1897 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
1899 mEpTemp = _udc->ep0in;
1900 mReq->req.complete(&mEpTemp->ep, &mReq->req);
1901 spin_lock(mEp->lock);
1905 if (retval == -EBUSY)
1908 dbg_event(_usb_addr(mEp), "DONE", retval);
1914 * isr_tr_complete_handler: transaction complete interrupt handler
1915 * @udc: UDC descriptor
1917 * This function handles traffic events
1919 static void isr_tr_complete_handler(struct ci13xxx *udc)
1920 __releases(udc->lock)
1921 __acquires(udc->lock)
1926 trace(udc->dev, "%p", udc);
1928 for (i = 0; i < udc->hw_ep_max; i++) {
1929 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1930 int type, num, dir, err = -EINVAL;
1931 struct usb_ctrlrequest req;
1933 if (mEp->ep.desc == NULL)
1934 continue; /* not configured */
1936 if (hw_test_and_clear_complete(udc, i)) {
1937 err = isr_tr_complete_low(mEp);
1938 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1939 if (err > 0) /* needs status phase */
1940 err = isr_setup_status_phase(udc);
1942 dbg_event(_usb_addr(mEp),
1944 spin_unlock(&udc->lock);
1945 if (usb_ep_set_halt(&mEp->ep))
1947 "error: ep_set_halt\n");
1948 spin_lock(&udc->lock);
1953 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1954 !hw_test_and_clear_setup_status(udc, i))
1958 dev_warn(udc->dev, "ctrl traffic at endpoint %d\n", i);
1963 * Flush data and handshake transactions of previous
1966 _ep_nuke(udc->ep0out);
1967 _ep_nuke(udc->ep0in);
1969 /* read_setup_packet */
1971 hw_test_and_set_setup_guard(udc);
1972 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
1973 } while (!hw_test_and_clear_setup_guard(udc));
1975 type = req.bRequestType;
1977 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1979 dbg_setup(_usb_addr(mEp), &req);
1981 switch (req.bRequest) {
1982 case USB_REQ_CLEAR_FEATURE:
1983 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1984 le16_to_cpu(req.wValue) ==
1985 USB_ENDPOINT_HALT) {
1986 if (req.wLength != 0)
1988 num = le16_to_cpu(req.wIndex);
1989 dir = num & USB_ENDPOINT_DIR_MASK;
1990 num &= USB_ENDPOINT_NUMBER_MASK;
1992 num += udc->hw_ep_max/2;
1993 if (!udc->ci13xxx_ep[num].wedge) {
1994 spin_unlock(&udc->lock);
1995 err = usb_ep_clear_halt(
1996 &udc->ci13xxx_ep[num].ep);
1997 spin_lock(&udc->lock);
2001 err = isr_setup_status_phase(udc);
2002 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
2003 le16_to_cpu(req.wValue) ==
2004 USB_DEVICE_REMOTE_WAKEUP) {
2005 if (req.wLength != 0)
2007 udc->remote_wakeup = 0;
2008 err = isr_setup_status_phase(udc);
2013 case USB_REQ_GET_STATUS:
2014 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
2015 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
2016 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
2018 if (le16_to_cpu(req.wLength) != 2 ||
2019 le16_to_cpu(req.wValue) != 0)
2021 err = isr_get_status_response(udc, &req);
2023 case USB_REQ_SET_ADDRESS:
2024 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
2026 if (le16_to_cpu(req.wLength) != 0 ||
2027 le16_to_cpu(req.wIndex) != 0)
2029 err = hw_usb_set_address(udc,
2030 (u8)le16_to_cpu(req.wValue));
2033 err = isr_setup_status_phase(udc);
2035 case USB_REQ_SET_FEATURE:
2036 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
2037 le16_to_cpu(req.wValue) ==
2038 USB_ENDPOINT_HALT) {
2039 if (req.wLength != 0)
2041 num = le16_to_cpu(req.wIndex);
2042 dir = num & USB_ENDPOINT_DIR_MASK;
2043 num &= USB_ENDPOINT_NUMBER_MASK;
2045 num += udc->hw_ep_max/2;
2047 spin_unlock(&udc->lock);
2048 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
2049 spin_lock(&udc->lock);
2051 isr_setup_status_phase(udc);
2052 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
2053 if (req.wLength != 0)
2055 switch (le16_to_cpu(req.wValue)) {
2056 case USB_DEVICE_REMOTE_WAKEUP:
2057 udc->remote_wakeup = 1;
2058 err = isr_setup_status_phase(udc);
2060 case USB_DEVICE_TEST_MODE:
2061 tmode = le16_to_cpu(req.wIndex) >> 8;
2068 udc->test_mode = tmode;
2069 err = isr_setup_status_phase(
2084 if (req.wLength == 0) /* no data phase */
2087 spin_unlock(&udc->lock);
2088 err = udc->driver->setup(&udc->gadget, &req);
2089 spin_lock(&udc->lock);
2094 dbg_event(_usb_addr(mEp), "ERROR", err);
2096 spin_unlock(&udc->lock);
2097 if (usb_ep_set_halt(&mEp->ep))
2098 dev_err(udc->dev, "error: ep_set_halt\n");
2099 spin_lock(&udc->lock);
2104 /******************************************************************************
2106 *****************************************************************************/
2108 * ep_enable: configure endpoint, making it usable
2110 * Check usb_ep_enable() at "usb_gadget.h" for details
2112 static int ep_enable(struct usb_ep *ep,
2113 const struct usb_endpoint_descriptor *desc)
2115 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2117 unsigned long flags;
2119 trace(mEp->udc->dev, "%p, %p", ep, desc);
2121 if (ep == NULL || desc == NULL)
2124 spin_lock_irqsave(mEp->lock, flags);
2126 /* only internal SW should enable ctrl endpts */
2128 mEp->ep.desc = desc;
2130 if (!list_empty(&mEp->qh.queue))
2131 dev_warn(mEp->udc->dev, "enabling a non-empty endpoint!\n");
2133 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
2134 mEp->num = usb_endpoint_num(desc);
2135 mEp->type = usb_endpoint_type(desc);
2137 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
2139 dbg_event(_usb_addr(mEp), "ENABLE", 0);
2141 mEp->qh.ptr->cap = 0;
2143 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2144 mEp->qh.ptr->cap |= QH_IOS;
2145 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2146 mEp->qh.ptr->cap &= ~QH_MULT;
2148 mEp->qh.ptr->cap &= ~QH_ZLT;
2151 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2152 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
2155 * Enable endpoints in the HW other than ep0 as ep0
2159 retval |= hw_ep_enable(mEp->udc, mEp->num, mEp->dir, mEp->type);
2161 spin_unlock_irqrestore(mEp->lock, flags);
2166 * ep_disable: endpoint is no longer usable
2168 * Check usb_ep_disable() at "usb_gadget.h" for details
2170 static int ep_disable(struct usb_ep *ep)
2172 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2173 int direction, retval = 0;
2174 unsigned long flags;
2176 trace(mEp->udc->dev, "%p", ep);
2180 else if (mEp->ep.desc == NULL)
2183 spin_lock_irqsave(mEp->lock, flags);
2185 /* only internal SW should disable ctrl endpts */
2187 direction = mEp->dir;
2189 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2191 retval |= _ep_nuke(mEp);
2192 retval |= hw_ep_disable(mEp->udc, mEp->num, mEp->dir);
2194 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2195 mEp->dir = (mEp->dir == TX) ? RX : TX;
2197 } while (mEp->dir != direction);
2199 mEp->ep.desc = NULL;
2201 spin_unlock_irqrestore(mEp->lock, flags);
2206 * ep_alloc_request: allocate a request object to use with this endpoint
2208 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2210 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2212 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2213 struct ci13xxx_req *mReq = NULL;
2215 trace(mEp->udc->dev, "%p, %i", ep, gfp_flags);
2220 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2222 INIT_LIST_HEAD(&mReq->queue);
2223 mReq->req.dma = DMA_ADDR_INVALID;
2225 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2227 if (mReq->ptr == NULL) {
2233 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2235 return (mReq == NULL) ? NULL : &mReq->req;
2239 * ep_free_request: frees a request object
2241 * Check usb_ep_free_request() at "usb_gadget.h" for details
2243 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2245 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2246 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2247 unsigned long flags;
2249 trace(mEp->udc->dev, "%p, %p", ep, req);
2251 if (ep == NULL || req == NULL) {
2253 } else if (!list_empty(&mReq->queue)) {
2254 dev_err(mEp->udc->dev, "freeing queued request\n");
2258 spin_lock_irqsave(mEp->lock, flags);
2261 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2264 dbg_event(_usb_addr(mEp), "FREE", 0);
2266 spin_unlock_irqrestore(mEp->lock, flags);
2270 * ep_queue: queues (submits) an I/O request to an endpoint
2272 * Check usb_ep_queue()* at usb_gadget.h" for details
2274 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2275 gfp_t __maybe_unused gfp_flags)
2277 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2278 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2280 unsigned long flags;
2282 trace(mEp->udc->dev, "%p, %p, %X", ep, req, gfp_flags);
2284 if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
2287 spin_lock_irqsave(mEp->lock, flags);
2289 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
2291 mEp = (_udc->ep0_dir == RX) ?
2292 _udc->ep0out : _udc->ep0in;
2293 if (!list_empty(&mEp->qh.queue)) {
2295 retval = -EOVERFLOW;
2296 dev_warn(mEp->udc->dev, "endpoint ctrl %X nuked\n",
2301 /* first nuke then test link, e.g. previous status has not sent */
2302 if (!list_empty(&mReq->queue)) {
2304 dev_err(mEp->udc->dev, "request already in queue\n");
2308 if (req->length > 4 * CI13XXX_PAGE_SIZE) {
2309 req->length = 4 * CI13XXX_PAGE_SIZE;
2311 dev_warn(mEp->udc->dev, "request length truncated\n");
2314 dbg_queue(_usb_addr(mEp), req, retval);
2317 mReq->req.status = -EINPROGRESS;
2318 mReq->req.actual = 0;
2320 retval = _hardware_enqueue(mEp, mReq);
2322 if (retval == -EALREADY) {
2323 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2327 list_add_tail(&mReq->queue, &mEp->qh.queue);
2330 spin_unlock_irqrestore(mEp->lock, flags);
2335 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2337 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2339 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2341 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2342 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2343 unsigned long flags;
2345 trace(mEp->udc->dev, "%p, %p", ep, req);
2347 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
2348 mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
2349 list_empty(&mEp->qh.queue))
2352 spin_lock_irqsave(mEp->lock, flags);
2354 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2356 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
2359 list_del_init(&mReq->queue);
2361 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
2362 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
2363 mReq->req.dma = DMA_ADDR_INVALID;
2366 req->status = -ECONNRESET;
2368 if (mReq->req.complete != NULL) {
2369 spin_unlock(mEp->lock);
2370 mReq->req.complete(&mEp->ep, &mReq->req);
2371 spin_lock(mEp->lock);
2374 spin_unlock_irqrestore(mEp->lock, flags);
2379 * ep_set_halt: sets the endpoint halt feature
2381 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2383 static int ep_set_halt(struct usb_ep *ep, int value)
2385 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2386 int direction, retval = 0;
2387 unsigned long flags;
2389 trace(mEp->udc->dev, "%p, %i", ep, value);
2391 if (ep == NULL || mEp->ep.desc == NULL)
2394 spin_lock_irqsave(mEp->lock, flags);
2397 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2398 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2399 !list_empty(&mEp->qh.queue)) {
2400 spin_unlock_irqrestore(mEp->lock, flags);
2405 direction = mEp->dir;
2407 dbg_event(_usb_addr(mEp), "HALT", value);
2408 retval |= hw_ep_set_halt(mEp->udc, mEp->num, mEp->dir, value);
2413 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2414 mEp->dir = (mEp->dir == TX) ? RX : TX;
2416 } while (mEp->dir != direction);
2418 spin_unlock_irqrestore(mEp->lock, flags);
2423 * ep_set_wedge: sets the halt feature and ignores clear requests
2425 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2427 static int ep_set_wedge(struct usb_ep *ep)
2429 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2430 unsigned long flags;
2432 trace(mEp->udc->dev, "%p", ep);
2434 if (ep == NULL || mEp->ep.desc == NULL)
2437 spin_lock_irqsave(mEp->lock, flags);
2439 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2442 spin_unlock_irqrestore(mEp->lock, flags);
2444 return usb_ep_set_halt(ep);
2448 * ep_fifo_flush: flushes contents of a fifo
2450 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2452 static void ep_fifo_flush(struct usb_ep *ep)
2454 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2455 unsigned long flags;
2457 trace(mEp->udc->dev, "%p", ep);
2460 dev_err(mEp->udc->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
2464 spin_lock_irqsave(mEp->lock, flags);
2466 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2467 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
2469 spin_unlock_irqrestore(mEp->lock, flags);
2473 * Endpoint-specific part of the API to the USB controller hardware
2474 * Check "usb_gadget.h" for details
2476 static const struct usb_ep_ops usb_ep_ops = {
2477 .enable = ep_enable,
2478 .disable = ep_disable,
2479 .alloc_request = ep_alloc_request,
2480 .free_request = ep_free_request,
2482 .dequeue = ep_dequeue,
2483 .set_halt = ep_set_halt,
2484 .set_wedge = ep_set_wedge,
2485 .fifo_flush = ep_fifo_flush,
2488 /******************************************************************************
2490 *****************************************************************************/
2491 static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2493 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2494 unsigned long flags;
2495 int gadget_ready = 0;
2497 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
2500 spin_lock_irqsave(&udc->lock, flags);
2501 udc->vbus_active = is_active;
2504 spin_unlock_irqrestore(&udc->lock, flags);
2508 pm_runtime_get_sync(&_gadget->dev);
2509 hw_device_reset(udc);
2510 hw_device_state(udc, udc->ep0out->qh.dma);
2512 hw_device_state(udc, 0);
2513 if (udc->udc_driver->notify_event)
2514 udc->udc_driver->notify_event(udc,
2515 CI13XXX_CONTROLLER_STOPPED_EVENT);
2516 _gadget_stop_activity(&udc->gadget);
2517 pm_runtime_put_sync(&_gadget->dev);
2524 static int ci13xxx_wakeup(struct usb_gadget *_gadget)
2526 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2527 unsigned long flags;
2530 trace(udc->dev, "");
2532 spin_lock_irqsave(&udc->lock, flags);
2533 if (!udc->remote_wakeup) {
2535 trace(udc->dev, "remote wakeup feature is not enabled\n");
2538 if (!hw_read(udc, OP_PORTSC, PORTSC_SUSP)) {
2540 trace(udc->dev, "port is not suspended\n");
2543 hw_write(udc, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
2545 spin_unlock_irqrestore(&udc->lock, flags);
2549 static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
2551 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2553 if (udc->transceiver)
2554 return usb_phy_set_power(udc->transceiver, mA);
2558 static int ci13xxx_start(struct usb_gadget_driver *driver,
2559 int (*bind)(struct usb_gadget *));
2560 static int ci13xxx_stop(struct usb_gadget_driver *driver);
2562 * Device operations part of the API to the USB controller hardware,
2563 * which don't involve endpoints (or i/o)
2564 * Check "usb_gadget.h" for details
2566 static const struct usb_gadget_ops usb_gadget_ops = {
2567 .vbus_session = ci13xxx_vbus_session,
2568 .wakeup = ci13xxx_wakeup,
2569 .vbus_draw = ci13xxx_vbus_draw,
2570 .start = ci13xxx_start,
2571 .stop = ci13xxx_stop,
2575 * ci13xxx_start: register a gadget driver
2576 * @driver: the driver being registered
2577 * @bind: the driver's bind callback
2579 * Check ci13xxx_start() at <linux/usb/gadget.h> for details.
2580 * Interrupts are enabled here.
2582 static int ci13xxx_start(struct usb_gadget_driver *driver,
2583 int (*bind)(struct usb_gadget *))
2585 struct ci13xxx *udc = _udc;
2586 unsigned long flags;
2588 int retval = -ENOMEM;
2590 trace(udc->dev, "%p", driver);
2592 if (driver == NULL ||
2594 driver->setup == NULL ||
2595 driver->disconnect == NULL)
2597 else if (udc == NULL)
2599 else if (udc->driver != NULL)
2602 /* alloc resources */
2603 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2604 sizeof(struct ci13xxx_qh),
2605 64, CI13XXX_PAGE_SIZE);
2606 if (udc->qh_pool == NULL)
2609 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2610 sizeof(struct ci13xxx_td),
2611 64, CI13XXX_PAGE_SIZE);
2612 if (udc->td_pool == NULL) {
2613 dma_pool_destroy(udc->qh_pool);
2614 udc->qh_pool = NULL;
2618 spin_lock_irqsave(&udc->lock, flags);
2620 dev_info(udc->dev, "hw_ep_max = %d\n", udc->hw_ep_max);
2622 udc->gadget.dev.driver = NULL;
2625 for (i = 0; i < udc->hw_ep_max/2; i++) {
2626 for (j = RX; j <= TX; j++) {
2627 int k = i + j * udc->hw_ep_max/2;
2628 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
2630 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
2631 (j == TX) ? "in" : "out");
2634 mEp->lock = &udc->lock;
2635 mEp->device = &udc->gadget.dev;
2636 mEp->td_pool = udc->td_pool;
2638 mEp->ep.name = mEp->name;
2639 mEp->ep.ops = &usb_ep_ops;
2640 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2642 INIT_LIST_HEAD(&mEp->qh.queue);
2643 spin_unlock_irqrestore(&udc->lock, flags);
2644 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
2646 spin_lock_irqsave(&udc->lock, flags);
2647 if (mEp->qh.ptr == NULL)
2650 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
2653 * set up shorthands for ep0 out and in endpoints,
2654 * don't add to gadget's ep_list
2665 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2671 spin_unlock_irqrestore(&udc->lock, flags);
2672 udc->ep0out->ep.desc = &ctrl_endpt_out_desc;
2673 retval = usb_ep_enable(&udc->ep0out->ep);
2677 udc->ep0in->ep.desc = &ctrl_endpt_in_desc;
2678 retval = usb_ep_enable(&udc->ep0in->ep);
2681 spin_lock_irqsave(&udc->lock, flags);
2683 udc->gadget.ep0 = &udc->ep0in->ep;
2685 driver->driver.bus = NULL;
2686 udc->gadget.dev.driver = &driver->driver;
2688 spin_unlock_irqrestore(&udc->lock, flags);
2689 retval = bind(&udc->gadget); /* MAY SLEEP */
2690 spin_lock_irqsave(&udc->lock, flags);
2693 udc->gadget.dev.driver = NULL;
2697 udc->driver = driver;
2698 pm_runtime_get_sync(&udc->gadget.dev);
2699 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2700 if (udc->vbus_active) {
2701 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
2702 hw_device_reset(udc);
2704 pm_runtime_put_sync(&udc->gadget.dev);
2709 retval = hw_device_state(udc, udc->ep0out->qh.dma);
2711 pm_runtime_put_sync(&udc->gadget.dev);
2714 spin_unlock_irqrestore(&udc->lock, flags);
2719 * ci13xxx_stop: unregister a gadget driver
2721 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2723 static int ci13xxx_stop(struct usb_gadget_driver *driver)
2725 struct ci13xxx *udc = _udc;
2726 unsigned long i, flags;
2728 trace(udc->dev, "%p", driver);
2730 if (driver == NULL ||
2731 driver->unbind == NULL ||
2732 driver->setup == NULL ||
2733 driver->disconnect == NULL ||
2734 driver != udc->driver)
2737 spin_lock_irqsave(&udc->lock, flags);
2739 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
2741 hw_device_state(udc, 0);
2742 if (udc->udc_driver->notify_event)
2743 udc->udc_driver->notify_event(udc,
2744 CI13XXX_CONTROLLER_STOPPED_EVENT);
2745 spin_unlock_irqrestore(&udc->lock, flags);
2746 _gadget_stop_activity(&udc->gadget);
2747 spin_lock_irqsave(&udc->lock, flags);
2748 pm_runtime_put(&udc->gadget.dev);
2752 spin_unlock_irqrestore(&udc->lock, flags);
2753 driver->unbind(&udc->gadget); /* MAY SLEEP */
2754 spin_lock_irqsave(&udc->lock, flags);
2756 udc->gadget.dev.driver = NULL;
2758 /* free resources */
2759 for (i = 0; i < udc->hw_ep_max; i++) {
2760 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2763 list_del_init(&mEp->ep.ep_list);
2765 if (mEp->qh.ptr != NULL)
2766 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
2769 udc->gadget.ep0 = NULL;
2772 spin_unlock_irqrestore(&udc->lock, flags);
2774 if (udc->td_pool != NULL) {
2775 dma_pool_destroy(udc->td_pool);
2776 udc->td_pool = NULL;
2778 if (udc->qh_pool != NULL) {
2779 dma_pool_destroy(udc->qh_pool);
2780 udc->qh_pool = NULL;
2786 /******************************************************************************
2788 *****************************************************************************/
2790 * udc_irq: global interrupt handler
2792 * This function returns IRQ_HANDLED if the IRQ has been handled
2793 * It locks access to registers
2795 static irqreturn_t udc_irq(int irq, void *data)
2797 struct ci13xxx *udc = _udc;
2801 trace(udc ? udc->dev : NULL, "");
2804 dev_err(udc->dev, "ENODEV");
2808 spin_lock(&udc->lock);
2810 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
2811 if (hw_read(udc, OP_USBMODE, USBMODE_CM) !=
2812 USBMODE_CM_DEVICE) {
2813 spin_unlock(&udc->lock);
2817 intr = hw_test_and_clear_intr_active(udc);
2819 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2820 isr_statistics.hndl.idx &= ISR_MASK;
2821 isr_statistics.hndl.cnt++;
2823 /* order defines priority - do NOT change it */
2824 if (USBi_URI & intr) {
2825 isr_statistics.uri++;
2826 isr_reset_handler(udc);
2828 if (USBi_PCI & intr) {
2829 isr_statistics.pci++;
2830 udc->gadget.speed = hw_port_is_high_speed(udc) ?
2831 USB_SPEED_HIGH : USB_SPEED_FULL;
2832 if (udc->suspended && udc->driver->resume) {
2833 spin_unlock(&udc->lock);
2834 udc->driver->resume(&udc->gadget);
2835 spin_lock(&udc->lock);
2839 if (USBi_UEI & intr)
2840 isr_statistics.uei++;
2841 if (USBi_UI & intr) {
2842 isr_statistics.ui++;
2843 isr_tr_complete_handler(udc);
2845 if (USBi_SLI & intr) {
2846 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
2847 udc->driver->suspend) {
2849 spin_unlock(&udc->lock);
2850 udc->driver->suspend(&udc->gadget);
2851 spin_lock(&udc->lock);
2853 isr_statistics.sli++;
2855 retval = IRQ_HANDLED;
2857 isr_statistics.none++;
2860 spin_unlock(&udc->lock);
2866 * udc_release: driver release function
2869 * Currently does nothing
2871 static void udc_release(struct device *dev)
2873 trace(dev->parent, "%p", dev);
2877 * udc_probe: parent probe must call this to initialize UDC
2878 * @dev: parent device
2879 * @regs: registers base address
2880 * @name: driver name
2882 * This function returns an error code
2883 * No interrupts active, the IRQ has not been requested yet
2884 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2886 static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2889 struct ci13xxx *udc;
2892 trace(dev, "%p, %p, %p", dev, regs, driver->name);
2894 if (dev == NULL || regs == NULL || driver == NULL ||
2895 driver->name == NULL)
2898 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2902 spin_lock_init(&udc->lock);
2904 udc->udc_driver = driver;
2906 udc->gadget.ops = &usb_gadget_ops;
2907 udc->gadget.speed = USB_SPEED_UNKNOWN;
2908 udc->gadget.max_speed = USB_SPEED_HIGH;
2909 udc->gadget.is_otg = 0;
2910 udc->gadget.name = driver->name;
2912 INIT_LIST_HEAD(&udc->gadget.ep_list);
2913 udc->gadget.ep0 = NULL;
2915 dev_set_name(&udc->gadget.dev, "gadget");
2916 udc->gadget.dev.dma_mask = dev->dma_mask;
2917 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
2918 udc->gadget.dev.parent = dev;
2919 udc->gadget.dev.release = udc_release;
2923 retval = hw_device_init(udc, regs, driver->capoffset);
2927 udc->transceiver = usb_get_transceiver();
2929 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
2930 if (udc->transceiver == NULL) {
2936 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
2937 retval = hw_device_reset(udc);
2939 goto put_transceiver;
2942 retval = device_register(&udc->gadget.dev);
2944 put_device(&udc->gadget.dev);
2945 goto put_transceiver;
2948 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2949 retval = dbg_create_files(&udc->gadget.dev);
2954 if (udc->transceiver) {
2955 retval = otg_set_peripheral(udc->transceiver->otg,
2961 retval = usb_add_gadget_udc(dev, &udc->gadget);
2965 pm_runtime_no_callbacks(&udc->gadget.dev);
2966 pm_runtime_enable(&udc->gadget.dev);
2972 if (udc->transceiver) {
2973 otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
2974 usb_put_transceiver(udc->transceiver);
2977 dev_err(dev, "error = %i\n", retval);
2979 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2980 dbg_remove_files(&udc->gadget.dev);
2983 device_unregister(&udc->gadget.dev);
2985 if (udc->transceiver)
2986 usb_put_transceiver(udc->transceiver);
2994 * udc_remove: parent remove must call this to remove UDC
2996 * No interrupts active, the IRQ has been released
2998 static void udc_remove(void)
3000 struct ci13xxx *udc = _udc;
3005 usb_del_gadget_udc(&udc->gadget);
3007 if (udc->transceiver) {
3008 otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
3009 usb_put_transceiver(udc->transceiver);
3011 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
3012 dbg_remove_files(&udc->gadget.dev);
3014 device_unregister(&udc->gadget.dev);
3016 kfree(udc->hw_bank.regmap);
3021 static int __devinit ci_udc_probe(struct platform_device *pdev)
3023 struct device *dev = &pdev->dev;
3024 struct ci13xxx_udc_driver *driver = dev->platform_data;
3025 struct resource *res;
3030 dev_err(dev, "platform data missing\n");
3034 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3036 dev_err(dev, "missing resource\n");
3040 base = devm_request_and_ioremap(dev, res);
3042 dev_err(dev, "can't request and ioremap resource\n");
3046 ret = udc_probe(driver, dev, base);
3050 _udc->irq = platform_get_irq(pdev, 0);
3051 if (_udc->irq < 0) {
3052 dev_err(dev, "missing IRQ\n");
3057 ret = request_irq(_udc->irq, udc_irq, IRQF_SHARED, driver->name, _udc);
3066 static int __devexit ci_udc_remove(struct platform_device *pdev)
3068 free_irq(_udc->irq, _udc);
3074 static struct platform_driver ci_udc_driver = {
3075 .probe = ci_udc_probe,
3076 .remove = __devexit_p(ci_udc_remove),
3082 module_platform_driver(ci_udc_driver);
3084 MODULE_ALIAS("platform:ci_udc");
3085 MODULE_ALIAS("platform:ci13xxx");
3086 MODULE_LICENSE("GPL v2");
3087 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
3088 MODULE_DESCRIPTION("ChipIdea UDC Driver");