drivers/usb/gadget/langwell_udc.c

   1 /*
   2  * Intel Langwell USB Device Controller driver
   3  * Copyright (C) 2008-2009, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  */
  19
  20
  21 /* #undef       DEBUG */
  22 /* #undef       VERBOSE */
  23
  24 #if defined(CONFIG_USB_LANGWELL_OTG)
  25 #define OTG_TRANSCEIVER
  26 #endif
  27
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/kernel.h>
  33 #include <linux/delay.h>
  34 #include <linux/ioport.h>
  35 #include <linux/sched.h>
  36 #include <linux/slab.h>
  37 #include <linux/errno.h>
  38 #include <linux/init.h>
  39 #include <linux/timer.h>
  40 #include <linux/list.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/device.h>
  44 #include <linux/usb/ch9.h>
  45 #include <linux/usb/gadget.h>
  46 #include <linux/usb/otg.h>
  47 #include <linux/pm.h>
  48 #include <linux/io.h>
  49 #include <linux/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52
  53 #include "langwell_udc.h"
  54
  55
  56 #define DRIVER_DESC             "Intel Langwell USB Device Controller driver"
  57 #define DRIVER_VERSION          "16 May 2009"
  58
  59 static const char driver_name[] = "langwell_udc";
  60 static const char driver_desc[] = DRIVER_DESC;
  61
  62
  63 /* controller device global variable */
  64 static struct langwell_udc      *the_controller;
  65
  66 /* for endpoint 0 operations */
  67 static const struct usb_endpoint_descriptor
  68 langwell_ep0_desc = {
  69         .bLength =              USB_DT_ENDPOINT_SIZE,
  70         .bDescriptorType =      USB_DT_ENDPOINT,
  71         .bEndpointAddress =     0,
  72         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  73         .wMaxPacketSize =       EP0_MAX_PKT_SIZE,
  74 };
  75
  76
  77 /*-------------------------------------------------------------------------*/
  78 /* debugging */
  79
  80 #ifdef  DEBUG
  81 #define DBG(dev, fmt, args...) \
  82         pr_debug("%s %s: " fmt , driver_name, \
  83                         pci_name(dev->pdev), ## args)
  84 #else
  85 #define DBG(dev, fmt, args...) \
  86         do { } while (0)
  87 #endif /* DEBUG */
  88
  89
  90 #ifdef  VERBOSE
  91 #define VDBG DBG
  92 #else
  93 #define VDBG(dev, fmt, args...) \
  94         do { } while (0)
  95 #endif  /* VERBOSE */
  96
  97
  98 #define ERROR(dev, fmt, args...) \
  99         pr_err("%s %s: " fmt , driver_name, \
 100                         pci_name(dev->pdev), ## args)
 101
 102 #define WARNING(dev, fmt, args...) \
 103         pr_warning("%s %s: " fmt , driver_name, \
 104                         pci_name(dev->pdev), ## args)
 105
 106 #define INFO(dev, fmt, args...) \
 107         pr_info("%s %s: " fmt , driver_name, \
 108                         pci_name(dev->pdev), ## args)
 109
 110
 111 #ifdef  VERBOSE
 112 static inline void print_all_registers(struct langwell_udc *dev)
 113 {
 114         int     i;
 115
 116         /* Capability Registers */
 117         printk(KERN_DEBUG "Capability Registers (offset: "
 118                         "0x%04x, length: 0x%08x)\n",
 119                         CAP_REG_OFFSET,
 120                         (u32)sizeof(struct langwell_cap_regs));
 121         printk(KERN_DEBUG "caplength=0x%02x\n",
 122                         readb(&dev->cap_regs->caplength));
 123         printk(KERN_DEBUG "hciversion=0x%04x\n",
 124                         readw(&dev->cap_regs->hciversion));
 125         printk(KERN_DEBUG "hcsparams=0x%08x\n",
 126                         readl(&dev->cap_regs->hcsparams));
 127         printk(KERN_DEBUG "hccparams=0x%08x\n",
 128                         readl(&dev->cap_regs->hccparams));
 129         printk(KERN_DEBUG "dciversion=0x%04x\n",
 130                         readw(&dev->cap_regs->dciversion));
 131         printk(KERN_DEBUG "dccparams=0x%08x\n",
 132                         readl(&dev->cap_regs->dccparams));
 133
 134         /* Operational Registers */
 135         printk(KERN_DEBUG "Operational Registers (offset: "
 136                         "0x%04x, length: 0x%08x)\n",
 137                         OP_REG_OFFSET,
 138                         (u32)sizeof(struct langwell_op_regs));
 139         printk(KERN_DEBUG "extsts=0x%08x\n",
 140                         readl(&dev->op_regs->extsts));
 141         printk(KERN_DEBUG "extintr=0x%08x\n",
 142                         readl(&dev->op_regs->extintr));
 143         printk(KERN_DEBUG "usbcmd=0x%08x\n",
 144                         readl(&dev->op_regs->usbcmd));
 145         printk(KERN_DEBUG "usbsts=0x%08x\n",
 146                         readl(&dev->op_regs->usbsts));
 147         printk(KERN_DEBUG "usbintr=0x%08x\n",
 148                         readl(&dev->op_regs->usbintr));
 149         printk(KERN_DEBUG "frindex=0x%08x\n",
 150                         readl(&dev->op_regs->frindex));
 151         printk(KERN_DEBUG "ctrldssegment=0x%08x\n",
 152                         readl(&dev->op_regs->ctrldssegment));
 153         printk(KERN_DEBUG "deviceaddr=0x%08x\n",
 154                         readl(&dev->op_regs->deviceaddr));
 155         printk(KERN_DEBUG "endpointlistaddr=0x%08x\n",
 156                         readl(&dev->op_regs->endpointlistaddr));
 157         printk(KERN_DEBUG "ttctrl=0x%08x\n",
 158                         readl(&dev->op_regs->ttctrl));
 159         printk(KERN_DEBUG "burstsize=0x%08x\n",
 160                         readl(&dev->op_regs->burstsize));
 161         printk(KERN_DEBUG "txfilltuning=0x%08x\n",
 162                         readl(&dev->op_regs->txfilltuning));
 163         printk(KERN_DEBUG "txttfilltuning=0x%08x\n",
 164                         readl(&dev->op_regs->txttfilltuning));
 165         printk(KERN_DEBUG "ic_usb=0x%08x\n",
 166                         readl(&dev->op_regs->ic_usb));
 167         printk(KERN_DEBUG "ulpi_viewport=0x%08x\n",
 168                         readl(&dev->op_regs->ulpi_viewport));
 169         printk(KERN_DEBUG "configflag=0x%08x\n",
 170                         readl(&dev->op_regs->configflag));
 171         printk(KERN_DEBUG "portsc1=0x%08x\n",
 172                         readl(&dev->op_regs->portsc1));
 173         printk(KERN_DEBUG "devlc=0x%08x\n",
 174                         readl(&dev->op_regs->devlc));
 175         printk(KERN_DEBUG "otgsc=0x%08x\n",
 176                         readl(&dev->op_regs->otgsc));
 177         printk(KERN_DEBUG "usbmode=0x%08x\n",
 178                         readl(&dev->op_regs->usbmode));
 179         printk(KERN_DEBUG "endptnak=0x%08x\n",
 180                         readl(&dev->op_regs->endptnak));
 181         printk(KERN_DEBUG "endptnaken=0x%08x\n",
 182                         readl(&dev->op_regs->endptnaken));
 183         printk(KERN_DEBUG "endptsetupstat=0x%08x\n",
 184                         readl(&dev->op_regs->endptsetupstat));
 185         printk(KERN_DEBUG "endptprime=0x%08x\n",
 186                         readl(&dev->op_regs->endptprime));
 187         printk(KERN_DEBUG "endptflush=0x%08x\n",
 188                         readl(&dev->op_regs->endptflush));
 189         printk(KERN_DEBUG "endptstat=0x%08x\n",
 190                         readl(&dev->op_regs->endptstat));
 191         printk(KERN_DEBUG "endptcomplete=0x%08x\n",
 192                         readl(&dev->op_regs->endptcomplete));
 193
 194         for (i = 0; i < dev->ep_max / 2; i++) {
 195                 printk(KERN_DEBUG "endptctrl[%d]=0x%08x\n",
 196                                 i, readl(&dev->op_regs->endptctrl[i]));
 197         }
 198 }
 199 #endif /* VERBOSE */
 200
 201
 202 /*-------------------------------------------------------------------------*/
 203
 204 #define DIR_STRING(bAddress)    (((bAddress) & USB_DIR_IN) ? "in" : "out")
 205
 206 #define is_in(ep)       (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir == \
 207                         USB_DIR_IN) : ((ep)->desc->bEndpointAddress \
 208                         & USB_DIR_IN) == USB_DIR_IN)
 209
 210
 211 #ifdef  DEBUG
 212 static char *type_string(u8 bmAttributes)
 213 {
 214         switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
 215         case USB_ENDPOINT_XFER_BULK:
 216                 return "bulk";
 217         case USB_ENDPOINT_XFER_ISOC:
 218                 return "iso";
 219         case USB_ENDPOINT_XFER_INT:
 220                 return "int";
 221         };
 222
 223         return "control";
 224 }
 225 #endif
 226
 227
 228 /* configure endpoint control registers */
 229 static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
 230                 unsigned char is_in, unsigned char ep_type)
 231 {
 232         struct langwell_udc     *dev;
 233         u32                     endptctrl;
 234
 235         dev = ep->dev;
 236         VDBG(dev, "---> %s()\n", __func__);
 237
 238         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 239         if (is_in) {    /* TX */
 240                 if (ep_num)
 241                         endptctrl |= EPCTRL_TXR;
 242                 endptctrl |= EPCTRL_TXE;
 243                 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
 244         } else {        /* RX */
 245                 if (ep_num)
 246                         endptctrl |= EPCTRL_RXR;
 247                 endptctrl |= EPCTRL_RXE;
 248                 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
 249         }
 250
 251         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 252
 253         VDBG(dev, "<--- %s()\n", __func__);
 254 }
 255
 256
 257 /* reset ep0 dQH and endptctrl */
 258 static void ep0_reset(struct langwell_udc *dev)
 259 {
 260         struct langwell_ep      *ep;
 261         int                     i;
 262
 263         VDBG(dev, "---> %s()\n", __func__);
 264
 265         /* ep0 in and out */
 266         for (i = 0; i < 2; i++) {
 267                 ep = &dev->ep[i];
 268                 ep->dev = dev;
 269
 270                 /* ep0 dQH */
 271                 ep->dqh = &dev->ep_dqh[i];
 272
 273                 /* configure ep0 endpoint capabilities in dQH */
 274                 ep->dqh->dqh_ios = 1;
 275                 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
 276
 277                 /* FIXME: enable ep0-in HW zero length termination select */
 278                 if (is_in(ep))
 279                         ep->dqh->dqh_zlt = 0;
 280                 ep->dqh->dqh_mult = 0;
 281
 282                 /* configure ep0 control registers */
 283                 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
 284         }
 285
 286         VDBG(dev, "<--- %s()\n", __func__);
 287 }
 288
 289
 290 /*-------------------------------------------------------------------------*/
 291
 292 /* endpoints operations */
 293
 294 /* configure endpoint, making it usable */
 295 static int langwell_ep_enable(struct usb_ep *_ep,
 296                 const struct usb_endpoint_descriptor *desc)
 297 {
 298         struct langwell_udc     *dev;
 299         struct langwell_ep      *ep;
 300         u16                     max = 0;
 301         unsigned long           flags;
 302         int                     retval = 0;
 303         unsigned char           zlt, ios = 0, mult = 0;
 304
 305         ep = container_of(_ep, struct langwell_ep, ep);
 306         dev = ep->dev;
 307         VDBG(dev, "---> %s()\n", __func__);
 308
 309         if (!_ep || !desc || ep->desc
 310                         || desc->bDescriptorType != USB_DT_ENDPOINT)
 311                 return -EINVAL;
 312
 313         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
 314                 return -ESHUTDOWN;
 315
 316         max = le16_to_cpu(desc->wMaxPacketSize);
 317
 318         /*
 319          * disable HW zero length termination select
 320          * driver handles zero length packet through req->req.zero
 321          */
 322         zlt = 1;
 323
 324         /*
 325          * sanity check type, direction, address, and then
 326          * initialize the endpoint capabilities fields in dQH
 327          */
 328         switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
 329         case USB_ENDPOINT_XFER_CONTROL:
 330                 ios = 1;
 331                 break;
 332         case USB_ENDPOINT_XFER_BULK:
 333                 if ((dev->gadget.speed == USB_SPEED_HIGH
 334                                         && max != 512)
 335                                 || (dev->gadget.speed == USB_SPEED_FULL
 336                                         && max > 64)) {
 337                         goto done;
 338                 }
 339                 break;
 340         case USB_ENDPOINT_XFER_INT:
 341                 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
 342                         goto done;
 343
 344                 switch (dev->gadget.speed) {
 345                 case USB_SPEED_HIGH:
 346                         if (max <= 1024)
 347                                 break;
 348                 case USB_SPEED_FULL:
 349                         if (max <= 64)
 350                                 break;
 351                 default:
 352                         if (max <= 8)
 353                                 break;
 354                         goto done;
 355                 }
 356                 break;
 357         case USB_ENDPOINT_XFER_ISOC:
 358                 if (strstr(ep->ep.name, "-bulk")
 359                                 || strstr(ep->ep.name, "-int"))
 360                         goto done;
 361
 362                 switch (dev->gadget.speed) {
 363                 case USB_SPEED_HIGH:
 364                         if (max <= 1024)
 365                                 break;
 366                 case USB_SPEED_FULL:
 367                         if (max <= 1023)
 368                                 break;
 369                 default:
 370                         goto done;
 371                 }
 372                 /*
 373                  * FIXME:
 374                  * calculate transactions needed for high bandwidth iso
 375                  */
 376                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 377                 max = max & 0x8ff;      /* bit 0~10 */
 378                 /* 3 transactions at most */
 379                 if (mult > 3)
 380                         goto done;
 381                 break;
 382         default:
 383                 goto done;
 384         }
 385
 386         spin_lock_irqsave(&dev->lock, flags);
 387
 388         /* configure endpoint capabilities in dQH */
 389         ep->dqh->dqh_ios = ios;
 390         ep->dqh->dqh_mpl = cpu_to_le16(max);
 391         ep->dqh->dqh_zlt = zlt;
 392         ep->dqh->dqh_mult = mult;
 393
 394         ep->ep.maxpacket = max;
 395         ep->desc = desc;
 396         ep->stopped = 0;
 397         ep->ep_num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 398
 399         /* ep_type */
 400         ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
 401
 402         /* configure endpoint control registers */
 403         ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
 404
 405         DBG(dev, "enabled %s (ep%d%s-%s), max %04x\n",
 406                         _ep->name,
 407                         ep->ep_num,
 408                         DIR_STRING(desc->bEndpointAddress),
 409                         type_string(desc->bmAttributes),
 410                         max);
 411
 412         spin_unlock_irqrestore(&dev->lock, flags);
 413 done:
 414         VDBG(dev, "<--- %s()\n", __func__);
 415         return retval;
 416 }
 417
 418
 419 /*-------------------------------------------------------------------------*/
 420
 421 /* retire a request */
 422 static void done(struct langwell_ep *ep, struct langwell_request *req,
 423                 int status)
 424 {
 425         struct langwell_udc     *dev = ep->dev;
 426         unsigned                stopped = ep->stopped;
 427         struct langwell_dtd     *curr_dtd, *next_dtd;
 428         int                     i;
 429
 430         VDBG(dev, "---> %s()\n", __func__);
 431
 432         /* remove the req from ep->queue */
 433         list_del_init(&req->queue);
 434
 435         if (req->req.status == -EINPROGRESS)
 436                 req->req.status = status;
 437         else
 438                 status = req->req.status;
 439
 440         /* free dTD for the request */
 441         next_dtd = req->head;
 442         for (i = 0; i < req->dtd_count; i++) {
 443                 curr_dtd = next_dtd;
 444                 if (i != req->dtd_count - 1)
 445                         next_dtd = curr_dtd->next_dtd_virt;
 446                 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
 447         }
 448
 449         if (req->mapped) {
 450                 dma_unmap_single(&dev->pdev->dev, req->req.dma, req->req.length,
 451                         is_in(ep) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 452                 req->req.dma = DMA_ADDR_INVALID;
 453                 req->mapped = 0;
 454         } else
 455                 dma_sync_single_for_cpu(&dev->pdev->dev, req->req.dma,
 456                                 req->req.length,
 457                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 458
 459         if (status != -ESHUTDOWN)
 460                 DBG(dev, "complete %s, req %p, stat %d, len %u/%u\n",
 461                         ep->ep.name, &req->req, status,
 462                         req->req.actual, req->req.length);
 463
 464         /* don't modify queue heads during completion callback */
 465         ep->stopped = 1;
 466
 467         spin_unlock(&dev->lock);
 468         /* complete routine from gadget driver */
 469         if (req->req.complete)
 470                 req->req.complete(&ep->ep, &req->req);
 471
 472         spin_lock(&dev->lock);
 473         ep->stopped = stopped;
 474
 475         VDBG(dev, "<--- %s()\n", __func__);
 476 }
 477
 478
 479 static void langwell_ep_fifo_flush(struct usb_ep *_ep);
 480
 481 /* delete all endpoint requests, called with spinlock held */
 482 static void nuke(struct langwell_ep *ep, int status)
 483 {
 484         /* called with spinlock held */
 485         ep->stopped = 1;
 486
 487         /* endpoint fifo flush */
 488         if (&ep->ep && ep->desc)
 489                 langwell_ep_fifo_flush(&ep->ep);
 490
 491         while (!list_empty(&ep->queue)) {
 492                 struct langwell_request *req = NULL;
 493                 req = list_entry(ep->queue.next, struct langwell_request,
 494                                 queue);
 495                 done(ep, req, status);
 496         }
 497 }
 498
 499
 500 /*-------------------------------------------------------------------------*/
 501
 502 /* endpoint is no longer usable */
 503 static int langwell_ep_disable(struct usb_ep *_ep)
 504 {
 505         struct langwell_ep      *ep;
 506         unsigned long           flags;
 507         struct langwell_udc     *dev;
 508         int                     ep_num;
 509         u32                     endptctrl;
 510
 511         ep = container_of(_ep, struct langwell_ep, ep);
 512         dev = ep->dev;
 513         VDBG(dev, "---> %s()\n", __func__);
 514
 515         if (!_ep || !ep->desc)
 516                 return -EINVAL;
 517
 518         spin_lock_irqsave(&dev->lock, flags);
 519
 520         /* disable endpoint control register */
 521         ep_num = ep->ep_num;
 522         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 523         if (is_in(ep))
 524                 endptctrl &= ~EPCTRL_TXE;
 525         else
 526                 endptctrl &= ~EPCTRL_RXE;
 527         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 528
 529         /* nuke all pending requests (does flush) */
 530         nuke(ep, -ESHUTDOWN);
 531
 532         ep->desc = NULL;
 533         ep->stopped = 1;
 534
 535         spin_unlock_irqrestore(&dev->lock, flags);
 536
 537         DBG(dev, "disabled %s\n", _ep->name);
 538         VDBG(dev, "<--- %s()\n", __func__);
 539
 540         return 0;
 541 }
 542
 543
 544 /* allocate a request object to use with this endpoint */
 545 static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
 546                 gfp_t gfp_flags)
 547 {
 548         struct langwell_ep      *ep;
 549         struct langwell_udc     *dev;
 550         struct langwell_request *req = NULL;
 551
 552         if (!_ep)
 553                 return NULL;
 554
 555         ep = container_of(_ep, struct langwell_ep, ep);
 556         dev = ep->dev;
 557         VDBG(dev, "---> %s()\n", __func__);
 558
 559         req = kzalloc(sizeof(*req), gfp_flags);
 560         if (!req)
 561                 return NULL;
 562
 563         req->req.dma = DMA_ADDR_INVALID;
 564         INIT_LIST_HEAD(&req->queue);
 565
 566         VDBG(dev, "alloc request for %s\n", _ep->name);
 567         VDBG(dev, "<--- %s()\n", __func__);
 568         return &req->req;
 569 }
 570
 571
 572 /* free a request object */
 573 static void langwell_free_request(struct usb_ep *_ep,
 574                 struct usb_request *_req)
 575 {
 576         struct langwell_ep      *ep;
 577         struct langwell_udc     *dev;
 578         struct langwell_request *req = NULL;
 579
 580         ep = container_of(_ep, struct langwell_ep, ep);
 581         dev = ep->dev;
 582         VDBG(dev, "---> %s()\n", __func__);
 583
 584         if (!_ep || !_req)
 585                 return;
 586
 587         req = container_of(_req, struct langwell_request, req);
 588         WARN_ON(!list_empty(&req->queue));
 589
 590         if (_req)
 591                 kfree(req);
 592
 593         VDBG(dev, "free request for %s\n", _ep->name);
 594         VDBG(dev, "<--- %s()\n", __func__);
 595 }
 596
 597
 598 /*-------------------------------------------------------------------------*/
 599
 600 /* queue dTD and PRIME endpoint */
 601 static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
 602 {
 603         u32                     bit_mask, usbcmd, endptstat, dtd_dma;
 604         u8                      dtd_status;
 605         int                     i;
 606         struct langwell_dqh     *dqh;
 607         struct langwell_udc     *dev;
 608
 609         dev = ep->dev;
 610         VDBG(dev, "---> %s()\n", __func__);
 611
 612         i = ep->ep_num * 2 + is_in(ep);
 613         dqh = &dev->ep_dqh[i];
 614
 615         if (ep->ep_num)
 616                 VDBG(dev, "%s\n", ep->name);
 617         else
 618                 /* ep0 */
 619                 VDBG(dev, "%s-%s\n", ep->name, is_in(ep) ? "in" : "out");
 620
 621         VDBG(dev, "ep_dqh[%d] addr: 0x%08x\n", i, (u32)&(dev->ep_dqh[i]));
 622
 623         bit_mask = is_in(ep) ?
 624                 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
 625
 626         VDBG(dev, "bit_mask = 0x%08x\n", bit_mask);
 627
 628         /* check if the pipe is empty */
 629         if (!(list_empty(&ep->queue))) {
 630                 /* add dTD to the end of linked list */
 631                 struct langwell_request *lastreq;
 632                 lastreq = list_entry(ep->queue.prev,
 633                                 struct langwell_request, queue);
 634
 635                 lastreq->tail->dtd_next =
 636                         cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
 637
 638                 /* read prime bit, if 1 goto out */
 639                 if (readl(&dev->op_regs->endptprime) & bit_mask)
 640                         goto out;
 641
 642                 do {
 643                         /* set ATDTW bit in USBCMD */
 644                         usbcmd = readl(&dev->op_regs->usbcmd);
 645                         writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
 646
 647                         /* read correct status bit */
 648                         endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
 649
 650                 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
 651
 652                 /* write ATDTW bit to 0 */
 653                 usbcmd = readl(&dev->op_regs->usbcmd);
 654                 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
 655
 656                 if (endptstat)
 657                         goto out;
 658         }
 659
 660         /* write dQH next pointer and terminate bit to 0 */
 661         dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
 662         dqh->dtd_next = cpu_to_le32(dtd_dma);
 663
 664         /* clear active and halt bit */
 665         dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
 666         dqh->dtd_status &= dtd_status;
 667         VDBG(dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
 668
 669         /* write 1 to endptprime register to PRIME endpoint */
 670         bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
 671         VDBG(dev, "endprime bit_mask = 0x%08x\n", bit_mask);
 672         writel(bit_mask, &dev->op_regs->endptprime);
 673 out:
 674         VDBG(dev, "<--- %s()\n", __func__);
 675         return 0;
 676 }
 677
 678
 679 /* fill in the dTD structure to build a transfer descriptor */
 680 static struct langwell_dtd *build_dtd(struct langwell_request *req,
 681                 unsigned *length, dma_addr_t *dma, int *is_last)
 682 {
 683         u32                      buf_ptr;
 684         struct langwell_dtd     *dtd;
 685         struct langwell_udc     *dev;
 686         int                     i;
 687
 688         dev = req->ep->dev;
 689         VDBG(dev, "---> %s()\n", __func__);
 690
 691         /* the maximum transfer length, up to 16k bytes */
 692         *length = min(req->req.length - req->req.actual,
 693                         (unsigned)DTD_MAX_TRANSFER_LENGTH);
 694
 695         /* create dTD dma_pool resource */
 696         dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
 697         if (dtd == NULL)
 698                 return dtd;
 699         dtd->dtd_dma = *dma;
 700
 701         /* initialize buffer page pointers */
 702         buf_ptr = (u32)(req->req.dma + req->req.actual);
 703         for (i = 0; i < 5; i++)
 704                 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
 705
 706         req->req.actual += *length;
 707
 708         /* fill in total bytes with transfer size */
 709         dtd->dtd_total = cpu_to_le16(*length);
 710         VDBG(dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
 711
 712         /* set is_last flag if req->req.zero is set or not */
 713         if (req->req.zero) {
 714                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 715                         *is_last = 1;
 716                 else
 717                         *is_last = 0;
 718         } else if (req->req.length == req->req.actual) {
 719                 *is_last = 1;
 720         } else
 721                 *is_last = 0;
 722
 723         if (*is_last == 0)
 724                 VDBG(dev, "multi-dtd request!\n");
 725
 726         /* set interrupt on complete bit for the last dTD */
 727         if (*is_last && !req->req.no_interrupt)
 728                 dtd->dtd_ioc = 1;
 729
 730         /* set multiplier override 0 for non-ISO and non-TX endpoint */
 731         dtd->dtd_multo = 0;
 732
 733         /* set the active bit of status field to 1 */
 734         dtd->dtd_status = DTD_STS_ACTIVE;
 735         VDBG(dev, "dtd->dtd_status = 0x%02x\n", dtd->dtd_status);
 736
 737         VDBG(dev, "length = %d, dma addr= 0x%08x\n", *length, (int)*dma);
 738         VDBG(dev, "<--- %s()\n", __func__);
 739         return dtd;
 740 }
 741
 742
 743 /* generate dTD linked list for a request */
 744 static int req_to_dtd(struct langwell_request *req)
 745 {
 746         unsigned                count;
 747         int                     is_last, is_first = 1;
 748         struct langwell_dtd     *dtd, *last_dtd = NULL;
 749         struct langwell_udc     *dev;
 750         dma_addr_t              dma;
 751
 752         dev = req->ep->dev;
 753         VDBG(dev, "---> %s()\n", __func__);
 754         do {
 755                 dtd = build_dtd(req, &count, &dma, &is_last);
 756                 if (dtd == NULL)
 757                         return -ENOMEM;
 758
 759                 if (is_first) {
 760                         is_first = 0;
 761                         req->head = dtd;
 762                 } else {
 763                         last_dtd->dtd_next = cpu_to_le32(dma);
 764                         last_dtd->next_dtd_virt = dtd;
 765                 }
 766                 last_dtd = dtd;
 767                 req->dtd_count++;
 768         } while (!is_last);
 769
 770         /* set terminate bit to 1 for the last dTD */
 771         dtd->dtd_next = DTD_TERM;
 772
 773         req->tail = dtd;
 774
 775         VDBG(dev, "<--- %s()\n", __func__);
 776         return 0;
 777 }
 778
 779 /*-------------------------------------------------------------------------*/
 780
 781 /* queue (submits) an I/O requests to an endpoint */
 782 static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
 783                 gfp_t gfp_flags)
 784 {
 785         struct langwell_request *req;
 786         struct langwell_ep      *ep;
 787         struct langwell_udc     *dev;
 788         unsigned long           flags;
 789         int                     is_iso = 0, zlflag = 0;
 790
 791         /* always require a cpu-view buffer */
 792         req = container_of(_req, struct langwell_request, req);
 793         ep = container_of(_ep, struct langwell_ep, ep);
 794
 795         if (!_req || !_req->complete || !_req->buf
 796                         || !list_empty(&req->queue)) {
 797                 return -EINVAL;
 798         }
 799
 800         if (unlikely(!_ep || !ep->desc))
 801                 return -EINVAL;
 802
 803         dev = ep->dev;
 804         req->ep = ep;
 805         VDBG(dev, "---> %s()\n", __func__);
 806
 807         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 808                 if (req->req.length > ep->ep.maxpacket)
 809                         return -EMSGSIZE;
 810                 is_iso = 1;
 811         }
 812
 813         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
 814                 return -ESHUTDOWN;
 815
 816         /* set up dma mapping in case the caller didn't */
 817         if (_req->dma == DMA_ADDR_INVALID) {
 818                 /* WORKAROUND: WARN_ON(size == 0) */
 819                 if (_req->length == 0) {
 820                         VDBG(dev, "req->length: 0->1\n");
 821                         zlflag = 1;
 822                         _req->length++;
 823                 }
 824
 825                 _req->dma = dma_map_single(&dev->pdev->dev,
 826                                 _req->buf, _req->length,
 827                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 828                 if (zlflag && (_req->length == 1)) {
 829                         VDBG(dev, "req->length: 1->0\n");
 830                         zlflag = 0;
 831                         _req->length = 0;
 832                 }
 833
 834                 req->mapped = 1;
 835                 VDBG(dev, "req->mapped = 1\n");
 836         } else {
 837                 dma_sync_single_for_device(&dev->pdev->dev,
 838                                 _req->dma, _req->length,
 839                                 is_in(ep) ?  DMA_TO_DEVICE : DMA_FROM_DEVICE);
 840                 req->mapped = 0;
 841                 VDBG(dev, "req->mapped = 0\n");
 842         }
 843
 844         DBG(dev, "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
 845                         _ep->name,
 846                         _req, _req->length, _req->buf, _req->dma);
 847
 848         _req->status = -EINPROGRESS;
 849         _req->actual = 0;
 850         req->dtd_count = 0;
 851
 852         spin_lock_irqsave(&dev->lock, flags);
 853
 854         /* build and put dTDs to endpoint queue */
 855         if (!req_to_dtd(req)) {
 856                 queue_dtd(ep, req);
 857         } else {
 858                 spin_unlock_irqrestore(&dev->lock, flags);
 859                 return -ENOMEM;
 860         }
 861
 862         /* update ep0 state */
 863         if (ep->ep_num == 0)
 864                 dev->ep0_state = DATA_STATE_XMIT;
 865
 866         if (likely(req != NULL)) {
 867                 list_add_tail(&req->queue, &ep->queue);
 868                 VDBG(dev, "list_add_tail() \n");
 869         }
 870
 871         spin_unlock_irqrestore(&dev->lock, flags);
 872
 873         VDBG(dev, "<--- %s()\n", __func__);
 874         return 0;
 875 }
 876
 877
 878 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
 879 static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 880 {
 881         struct langwell_ep      *ep;
 882         struct langwell_udc     *dev;
 883         struct langwell_request *req;
 884         unsigned long           flags;
 885         int                     stopped, ep_num, retval = 0;
 886         u32                     endptctrl;
 887
 888         ep = container_of(_ep, struct langwell_ep, ep);
 889         dev = ep->dev;
 890         VDBG(dev, "---> %s()\n", __func__);
 891
 892         if (!_ep || !ep->desc || !_req)
 893                 return -EINVAL;
 894
 895         if (!dev->driver)
 896                 return -ESHUTDOWN;
 897
 898         spin_lock_irqsave(&dev->lock, flags);
 899         stopped = ep->stopped;
 900
 901         /* quiesce dma while we patch the queue */
 902         ep->stopped = 1;
 903         ep_num = ep->ep_num;
 904
 905         /* disable endpoint control register */
 906         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 907         if (is_in(ep))
 908                 endptctrl &= ~EPCTRL_TXE;
 909         else
 910                 endptctrl &= ~EPCTRL_RXE;
 911         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 912
 913         /* make sure it's still queued on this endpoint */
 914         list_for_each_entry(req, &ep->queue, queue) {
 915                 if (&req->req == _req)
 916                         break;
 917         }
 918
 919         if (&req->req != _req) {
 920                 retval = -EINVAL;
 921                 goto done;
 922         }
 923
 924         /* queue head may be partially complete. */
 925         if (ep->queue.next == &req->queue) {
 926                 DBG(dev, "unlink (%s) dma\n", _ep->name);
 927                 _req->status = -ECONNRESET;
 928                 langwell_ep_fifo_flush(&ep->ep);
 929
 930                 /* not the last request in endpoint queue */
 931                 if (likely(ep->queue.next == &req->queue)) {
 932                         struct langwell_dqh     *dqh;
 933                         struct langwell_request *next_req;
 934
 935                         dqh = ep->dqh;
 936                         next_req = list_entry(req->queue.next,
 937                                         struct langwell_request, queue);
 938
 939                         /* point the dQH to the first dTD of next request */
 940                         writel((u32) next_req->head, &dqh->dqh_current);
 941                 }
 942         } else {
 943                 struct langwell_request *prev_req;
 944
 945                 prev_req = list_entry(req->queue.prev,
 946                                 struct langwell_request, queue);
 947                 writel(readl(&req->tail->dtd_next),
 948                                 &prev_req->tail->dtd_next);
 949         }
 950
 951         done(ep, req, -ECONNRESET);
 952
 953 done:
 954         /* enable endpoint again */
 955         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 956         if (is_in(ep))
 957                 endptctrl |= EPCTRL_TXE;
 958         else
 959                 endptctrl |= EPCTRL_RXE;
 960         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 961
 962         ep->stopped = stopped;
 963         spin_unlock_irqrestore(&dev->lock, flags);
 964
 965         VDBG(dev, "<--- %s()\n", __func__);
 966         return retval;
 967 }
 968
 969
 970 /*-------------------------------------------------------------------------*/
 971
 972 /* endpoint set/clear halt */
 973 static void ep_set_halt(struct langwell_ep *ep, int value)
 974 {
 975         u32                     endptctrl = 0;
 976         int                     ep_num;
 977         struct langwell_udc     *dev = ep->dev;
 978         VDBG(dev, "---> %s()\n", __func__);
 979
 980         ep_num = ep->ep_num;
 981         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 982
 983         /* value: 1 - set halt, 0 - clear halt */
 984         if (value) {
 985                 /* set the stall bit */
 986                 if (is_in(ep))
 987                         endptctrl |= EPCTRL_TXS;
 988                 else
 989                         endptctrl |= EPCTRL_RXS;
 990         } else {
 991                 /* clear the stall bit and reset data toggle */
 992                 if (is_in(ep)) {
 993                         endptctrl &= ~EPCTRL_TXS;
 994                         endptctrl |= EPCTRL_TXR;
 995                 } else {
 996                         endptctrl &= ~EPCTRL_RXS;
 997                         endptctrl |= EPCTRL_RXR;
 998                 }
 999         }
1000
1001         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
1002
1003         VDBG(dev, "<--- %s()\n", __func__);
1004 }
1005
1006
1007 /* set the endpoint halt feature */
1008 static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
1009 {
1010         struct langwell_ep      *ep;
1011         struct langwell_udc     *dev;
1012         unsigned long           flags;
1013         int                     retval = 0;
1014
1015         ep = container_of(_ep, struct langwell_ep, ep);
1016         dev = ep->dev;
1017
1018         VDBG(dev, "---> %s()\n", __func__);
1019
1020         if (!_ep || !ep->desc)
1021                 return -EINVAL;
1022
1023         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1024                 return -ESHUTDOWN;
1025
1026         if (ep->desc && (ep->desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
1027                         == USB_ENDPOINT_XFER_ISOC)
1028                 return  -EOPNOTSUPP;
1029
1030         spin_lock_irqsave(&dev->lock, flags);
1031
1032         /*
1033          * attempt to halt IN ep will fail if any transfer requests
1034          * are still queue
1035          */
1036         if (!list_empty(&ep->queue) && is_in(ep) && value) {
1037                 /* IN endpoint FIFO holds bytes */
1038                 DBG(dev, "%s FIFO holds bytes\n", _ep->name);
1039                 retval = -EAGAIN;
1040                 goto done;
1041         }
1042
1043         /* endpoint set/clear halt */
1044         if (ep->ep_num) {
1045                 ep_set_halt(ep, value);
1046         } else { /* endpoint 0 */
1047                 dev->ep0_state = WAIT_FOR_SETUP;
1048                 dev->ep0_dir = USB_DIR_OUT;
1049         }
1050 done:
1051         spin_unlock_irqrestore(&dev->lock, flags);
1052         DBG(dev, "%s %s halt\n", _ep->name, value ? "set" : "clear");
1053         VDBG(dev, "<--- %s()\n", __func__);
1054         return retval;
1055 }
1056
1057
1058 /* set the halt feature and ignores clear requests */
1059 static int langwell_ep_set_wedge(struct usb_ep *_ep)
1060 {
1061         struct langwell_ep      *ep;
1062         struct langwell_udc     *dev;
1063
1064         ep = container_of(_ep, struct langwell_ep, ep);
1065         dev = ep->dev;
1066
1067         VDBG(dev, "---> %s()\n", __func__);
1068
1069         if (!_ep || !ep->desc)
1070                 return -EINVAL;
1071
1072         VDBG(dev, "<--- %s()\n", __func__);
1073         return usb_ep_set_halt(_ep);
1074 }
1075
1076
1077 /* flush contents of a fifo */
1078 static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1079 {
1080         struct langwell_ep      *ep;
1081         struct langwell_udc     *dev;
1082         u32                     flush_bit;
1083         unsigned long           timeout;
1084
1085         ep = container_of(_ep, struct langwell_ep, ep);
1086         dev = ep->dev;
1087
1088         VDBG(dev, "---> %s()\n", __func__);
1089
1090         if (!_ep || !ep->desc) {
1091                 VDBG(dev, "ep or ep->desc is NULL\n");
1092                 VDBG(dev, "<--- %s()\n", __func__);
1093                 return;
1094         }
1095
1096         VDBG(dev, "%s-%s fifo flush\n", _ep->name, is_in(ep) ? "in" : "out");
1097
1098         /* flush endpoint buffer */
1099         if (ep->ep_num == 0)
1100                 flush_bit = (1 << 16) | 1;
1101         else if (is_in(ep))
1102                 flush_bit = 1 << (ep->ep_num + 16);     /* TX */
1103         else
1104                 flush_bit = 1 << ep->ep_num;            /* RX */
1105
1106         /* wait until flush complete */
1107         timeout = jiffies + FLUSH_TIMEOUT;
1108         do {
1109                 writel(flush_bit, &dev->op_regs->endptflush);
1110                 while (readl(&dev->op_regs->endptflush)) {
1111                         if (time_after(jiffies, timeout)) {
1112                                 ERROR(dev, "ep flush timeout\n");
1113                                 goto done;
1114                         }
1115                         cpu_relax();
1116                 }
1117         } while (readl(&dev->op_regs->endptstat) & flush_bit);
1118 done:
1119         VDBG(dev, "<--- %s()\n", __func__);
1120 }
1121
1122
1123 /* endpoints operations structure */
1124 static const struct usb_ep_ops langwell_ep_ops = {
1125
1126         /* configure endpoint, making it usable */
1127         .enable         = langwell_ep_enable,
1128
1129         /* endpoint is no longer usable */
1130         .disable        = langwell_ep_disable,
1131
1132         /* allocate a request object to use with this endpoint */
1133         .alloc_request  = langwell_alloc_request,
1134
1135         /* free a request object */
1136         .free_request   = langwell_free_request,
1137
1138         /* queue (submits) an I/O requests to an endpoint */
1139         .queue          = langwell_ep_queue,
1140
1141         /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1142         .dequeue        = langwell_ep_dequeue,
1143
1144         /* set the endpoint halt feature */
1145         .set_halt       = langwell_ep_set_halt,
1146
1147         /* set the halt feature and ignores clear requests */
1148         .set_wedge      = langwell_ep_set_wedge,
1149
1150         /* flush contents of a fifo */
1151         .fifo_flush     = langwell_ep_fifo_flush,
1152 };
1153
1154
1155 /*-------------------------------------------------------------------------*/
1156
1157 /* device controller usb_gadget_ops structure */
1158
1159 /* returns the current frame number */
1160 static int langwell_get_frame(struct usb_gadget *_gadget)
1161 {
1162         struct langwell_udc     *dev;
1163         u16                     retval;
1164
1165         if (!_gadget)
1166                 return -ENODEV;
1167
1168         dev = container_of(_gadget, struct langwell_udc, gadget);
1169         VDBG(dev, "---> %s()\n", __func__);
1170
1171         retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1172
1173         VDBG(dev, "<--- %s()\n", __func__);
1174         return retval;
1175 }
1176
1177
1178 /* tries to wake up the host connected to this gadget */
1179 static int langwell_wakeup(struct usb_gadget *_gadget)
1180 {
1181         struct langwell_udc     *dev;
1182         u32                     portsc1, devlc;
1183         unsigned long           flags;
1184
1185         if (!_gadget)
1186                 return 0;
1187
1188         dev = container_of(_gadget, struct langwell_udc, gadget);
1189         VDBG(dev, "---> %s()\n", __func__);
1190
1191         /* Remote Wakeup feature not enabled by host */
1192         if (!dev->remote_wakeup)
1193                 return -ENOTSUPP;
1194
1195         spin_lock_irqsave(&dev->lock, flags);
1196
1197         portsc1 = readl(&dev->op_regs->portsc1);
1198         if (!(portsc1 & PORTS_SUSP)) {
1199                 spin_unlock_irqrestore(&dev->lock, flags);
1200                 return 0;
1201         }
1202
1203         /* LPM L1 to L0, remote wakeup */
1204         if (dev->lpm && dev->lpm_state == LPM_L1) {
1205                 portsc1 |= PORTS_SLP;
1206                 writel(portsc1, &dev->op_regs->portsc1);
1207         }
1208
1209         /* force port resume */
1210         if (dev->usb_state == USB_STATE_SUSPENDED) {
1211                 portsc1 |= PORTS_FPR;
1212                 writel(portsc1, &dev->op_regs->portsc1);
1213         }
1214
1215         /* exit PHY low power suspend */
1216         devlc = readl(&dev->op_regs->devlc);
1217         VDBG(dev, "devlc = 0x%08x\n", devlc);
1218         devlc &= ~LPM_PHCD;
1219         writel(devlc, &dev->op_regs->devlc);
1220
1221         spin_unlock_irqrestore(&dev->lock, flags);
1222
1223         VDBG(dev, "<--- %s()\n", __func__);
1224         return 0;
1225 }
1226
1227
1228 /* notify controller that VBUS is powered or not */
1229 static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1230 {
1231         struct langwell_udc     *dev;
1232         unsigned long           flags;
1233         u32                     usbcmd;
1234
1235         if (!_gadget)
1236                 return -ENODEV;
1237
1238         dev = container_of(_gadget, struct langwell_udc, gadget);
1239         VDBG(dev, "---> %s()\n", __func__);
1240
1241         spin_lock_irqsave(&dev->lock, flags);
1242         VDBG(dev, "VBUS status: %s\n", is_active ? "on" : "off");
1243
1244         dev->vbus_active = (is_active != 0);
1245         if (dev->driver && dev->softconnected && dev->vbus_active) {
1246                 usbcmd = readl(&dev->op_regs->usbcmd);
1247                 usbcmd |= CMD_RUNSTOP;
1248                 writel(usbcmd, &dev->op_regs->usbcmd);
1249         } else {
1250                 usbcmd = readl(&dev->op_regs->usbcmd);
1251                 usbcmd &= ~CMD_RUNSTOP;
1252                 writel(usbcmd, &dev->op_regs->usbcmd);
1253         }
1254
1255         spin_unlock_irqrestore(&dev->lock, flags);
1256
1257         VDBG(dev, "<--- %s()\n", __func__);
1258         return 0;
1259 }
1260
1261
1262 /* constrain controller's VBUS power usage */
1263 static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1264 {
1265         struct langwell_udc     *dev;
1266
1267         if (!_gadget)
1268                 return -ENODEV;
1269
1270         dev = container_of(_gadget, struct langwell_udc, gadget);
1271         VDBG(dev, "---> %s()\n", __func__);
1272
1273         if (dev->transceiver) {
1274                 VDBG(dev, "otg_set_power\n");
1275                 VDBG(dev, "<--- %s()\n", __func__);
1276                 return otg_set_power(dev->transceiver, mA);
1277         }
1278
1279         VDBG(dev, "<--- %s()\n", __func__);
1280         return -ENOTSUPP;
1281 }
1282
1283
1284 /* D+ pullup, software-controlled connect/disconnect to USB host */
1285 static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1286 {
1287         struct langwell_udc     *dev;
1288         u32                     usbcmd;
1289         unsigned long           flags;
1290
1291         if (!_gadget)
1292                 return -ENODEV;
1293
1294         dev = container_of(_gadget, struct langwell_udc, gadget);
1295
1296         VDBG(dev, "---> %s()\n", __func__);
1297
1298         spin_lock_irqsave(&dev->lock, flags);
1299         dev->softconnected = (is_on != 0);
1300
1301         if (dev->driver && dev->softconnected && dev->vbus_active) {
1302                 usbcmd = readl(&dev->op_regs->usbcmd);
1303                 usbcmd |= CMD_RUNSTOP;
1304                 writel(usbcmd, &dev->op_regs->usbcmd);
1305         } else {
1306                 usbcmd = readl(&dev->op_regs->usbcmd);
1307                 usbcmd &= ~CMD_RUNSTOP;
1308                 writel(usbcmd, &dev->op_regs->usbcmd);
1309         }
1310         spin_unlock_irqrestore(&dev->lock, flags);
1311
1312         VDBG(dev, "<--- %s()\n", __func__);
1313         return 0;
1314 }
1315
1316
1317 /* device controller usb_gadget_ops structure */
1318 static const struct usb_gadget_ops langwell_ops = {
1319
1320         /* returns the current frame number */
1321         .get_frame      = langwell_get_frame,
1322
1323         /* tries to wake up the host connected to this gadget */
1324         .wakeup         = langwell_wakeup,
1325
1326         /* set the device selfpowered feature, always selfpowered */
1327         /* .set_selfpowered = langwell_set_selfpowered, */
1328
1329         /* notify controller that VBUS is powered or not */
1330         .vbus_session   = langwell_vbus_session,
1331
1332         /* constrain controller's VBUS power usage */
1333         .vbus_draw      = langwell_vbus_draw,
1334
1335         /* D+ pullup, software-controlled connect/disconnect to USB host */
1336         .pullup         = langwell_pullup,
1337 };
1338
1339
1340 /*-------------------------------------------------------------------------*/
1341
1342 /* device controller operations */
1343
1344 /* reset device controller */
1345 static int langwell_udc_reset(struct langwell_udc *dev)
1346 {
1347         u32             usbcmd, usbmode, devlc, endpointlistaddr;
1348         unsigned long   timeout;
1349
1350         if (!dev)
1351                 return -EINVAL;
1352
1353         DBG(dev, "---> %s()\n", __func__);
1354
1355         /* set controller to stop state */
1356         usbcmd = readl(&dev->op_regs->usbcmd);
1357         usbcmd &= ~CMD_RUNSTOP;
1358         writel(usbcmd, &dev->op_regs->usbcmd);
1359
1360         /* reset device controller */
1361         usbcmd = readl(&dev->op_regs->usbcmd);
1362         usbcmd |= CMD_RST;
1363         writel(usbcmd, &dev->op_regs->usbcmd);
1364
1365         /* wait for reset to complete */
1366         timeout = jiffies + RESET_TIMEOUT;
1367         while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1368                 if (time_after(jiffies, timeout)) {
1369                         ERROR(dev, "device reset timeout\n");
1370                         return -ETIMEDOUT;
1371                 }
1372                 cpu_relax();
1373         }
1374
1375         /* set controller to device mode */
1376         usbmode = readl(&dev->op_regs->usbmode);
1377         usbmode |= MODE_DEVICE;
1378
1379         /* turn setup lockout off, require setup tripwire in usbcmd */
1380         usbmode |= MODE_SLOM;
1381
1382         writel(usbmode, &dev->op_regs->usbmode);
1383         usbmode = readl(&dev->op_regs->usbmode);
1384         VDBG(dev, "usbmode=0x%08x\n", usbmode);
1385
1386         /* Write-Clear setup status */
1387         writel(0, &dev->op_regs->usbsts);
1388
1389         /* if support USB LPM, ACK all LPM token */
1390         if (dev->lpm) {
1391                 devlc = readl(&dev->op_regs->devlc);
1392                 devlc &= ~LPM_STL;      /* don't STALL LPM token */
1393                 devlc &= ~LPM_NYT_ACK;  /* ACK LPM token */
1394                 writel(devlc, &dev->op_regs->devlc);
1395         }
1396
1397         /* fill endpointlistaddr register */
1398         endpointlistaddr = dev->ep_dqh_dma;
1399         endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1400         writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1401
1402         VDBG(dev, "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1403                         dev->ep_dqh, endpointlistaddr,
1404                         readl(&dev->op_regs->endpointlistaddr));
1405         DBG(dev, "<--- %s()\n", __func__);
1406         return 0;
1407 }
1408
1409
1410 /* reinitialize device controller endpoints */
1411 static int eps_reinit(struct langwell_udc *dev)
1412 {
1413         struct langwell_ep      *ep;
1414         char                    name[14];
1415         int                     i;
1416
1417         VDBG(dev, "---> %s()\n", __func__);
1418
1419         /* initialize ep0 */
1420         ep = &dev->ep[0];
1421         ep->dev = dev;
1422         strncpy(ep->name, "ep0", sizeof(ep->name));
1423         ep->ep.name = ep->name;
1424         ep->ep.ops = &langwell_ep_ops;
1425         ep->stopped = 0;
1426         ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1427         ep->ep_num = 0;
1428         ep->desc = &langwell_ep0_desc;
1429         INIT_LIST_HEAD(&ep->queue);
1430
1431         ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1432
1433         /* initialize other endpoints */
1434         for (i = 2; i < dev->ep_max; i++) {
1435                 ep = &dev->ep[i];
1436                 if (i % 2)
1437                         snprintf(name, sizeof(name), "ep%din", i / 2);
1438                 else
1439                         snprintf(name, sizeof(name), "ep%dout", i / 2);
1440                 ep->dev = dev;
1441                 strncpy(ep->name, name, sizeof(ep->name));
1442                 ep->ep.name = ep->name;
1443
1444                 ep->ep.ops = &langwell_ep_ops;
1445                 ep->stopped = 0;
1446                 ep->ep.maxpacket = (unsigned short) ~0;
1447                 ep->ep_num = i / 2;
1448
1449                 INIT_LIST_HEAD(&ep->queue);
1450                 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1451
1452                 ep->dqh = &dev->ep_dqh[i];
1453         }
1454
1455         VDBG(dev, "<--- %s()\n", __func__);
1456         return 0;
1457 }
1458
1459
1460 /* enable interrupt and set controller to run state */
1461 static void langwell_udc_start(struct langwell_udc *dev)
1462 {
1463         u32     usbintr, usbcmd;
1464         DBG(dev, "---> %s()\n", __func__);
1465
1466         /* enable interrupts */
1467         usbintr = INTR_ULPIE    /* ULPI */
1468                 | INTR_SLE      /* suspend */
1469                 /* | INTR_SRE   SOF received */
1470                 | INTR_URE      /* USB reset */
1471                 | INTR_AAE      /* async advance */
1472                 | INTR_SEE      /* system error */
1473                 | INTR_FRE      /* frame list rollover */
1474                 | INTR_PCE      /* port change detect */
1475                 | INTR_UEE      /* USB error interrupt */
1476                 | INTR_UE;      /* USB interrupt */
1477         writel(usbintr, &dev->op_regs->usbintr);
1478
1479         /* clear stopped bit */
1480         dev->stopped = 0;
1481
1482         /* set controller to run */
1483         usbcmd = readl(&dev->op_regs->usbcmd);
1484         usbcmd |= CMD_RUNSTOP;
1485         writel(usbcmd, &dev->op_regs->usbcmd);
1486
1487         DBG(dev, "<--- %s()\n", __func__);
1488 }
1489
1490
1491 /* disable interrupt and set controller to stop state */
1492 static void langwell_udc_stop(struct langwell_udc *dev)
1493 {
1494         u32     usbcmd;
1495
1496         DBG(dev, "---> %s()\n", __func__);
1497
1498         /* disable all interrupts */
1499         writel(0, &dev->op_regs->usbintr);
1500
1501         /* set stopped bit */
1502         dev->stopped = 1;
1503
1504         /* set controller to stop state */
1505         usbcmd = readl(&dev->op_regs->usbcmd);
1506         usbcmd &= ~CMD_RUNSTOP;
1507         writel(usbcmd, &dev->op_regs->usbcmd);
1508
1509         DBG(dev, "<--- %s()\n", __func__);
1510 }
1511
1512
1513 /* stop all USB activities */
1514 static void stop_activity(struct langwell_udc *dev,
1515                 struct usb_gadget_driver *driver)
1516 {
1517         struct langwell_ep      *ep;
1518         DBG(dev, "---> %s()\n", __func__);
1519
1520         nuke(&dev->ep[0], -ESHUTDOWN);
1521
1522         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1523                 nuke(ep, -ESHUTDOWN);
1524         }
1525
1526         /* report disconnect; the driver is already quiesced */
1527         if (driver) {
1528                 spin_unlock(&dev->lock);
1529                 driver->disconnect(&dev->gadget);
1530                 spin_lock(&dev->lock);
1531         }
1532
1533         DBG(dev, "<--- %s()\n", __func__);
1534 }
1535
1536
1537 /*-------------------------------------------------------------------------*/
1538
1539 /* device "function" sysfs attribute file */
1540 static ssize_t show_function(struct device *_dev,
1541                 struct device_attribute *attr, char *buf)
1542 {
1543         struct langwell_udc     *dev = the_controller;
1544
1545         if (!dev->driver || !dev->driver->function
1546                         || strlen(dev->driver->function) > PAGE_SIZE)
1547                 return 0;
1548
1549         return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1550 }
1551 static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1552
1553
1554 /* device "langwell_udc" sysfs attribute file */
1555 static ssize_t show_langwell_udc(struct device *_dev,
1556                 struct device_attribute *attr, char *buf)
1557 {
1558         struct langwell_udc     *dev = the_controller;
1559         struct langwell_request *req;
1560         struct langwell_ep      *ep = NULL;
1561         char                    *next;
1562         unsigned                size;
1563         unsigned                t;
1564         unsigned                i;
1565         unsigned long           flags;
1566         u32                     tmp_reg;
1567
1568         next = buf;
1569         size = PAGE_SIZE;
1570         spin_lock_irqsave(&dev->lock, flags);
1571
1572         /* driver basic information */
1573         t = scnprintf(next, size,
1574                         DRIVER_DESC "\n"
1575                         "%s version: %s\n"
1576                         "Gadget driver: %s\n\n",
1577                         driver_name, DRIVER_VERSION,
1578                         dev->driver ? dev->driver->driver.name : "(none)");
1579         size -= t;
1580         next += t;
1581
1582         /* device registers */
1583         tmp_reg = readl(&dev->op_regs->usbcmd);
1584         t = scnprintf(next, size,
1585                         "USBCMD reg:\n"
1586                         "SetupTW: %d\n"
1587                         "Run/Stop: %s\n\n",
1588                         (tmp_reg & CMD_SUTW) ? 1 : 0,
1589                         (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1590         size -= t;
1591         next += t;
1592
1593         tmp_reg = readl(&dev->op_regs->usbsts);
1594         t = scnprintf(next, size,
1595                         "USB Status Reg:\n"
1596                         "Device Suspend: %d\n"
1597                         "Reset Received: %d\n"
1598                         "System Error: %s\n"
1599                         "USB Error Interrupt: %s\n\n",
1600                         (tmp_reg & STS_SLI) ? 1 : 0,
1601                         (tmp_reg & STS_URI) ? 1 : 0,
1602                         (tmp_reg & STS_SEI) ? "Error" : "No error",
1603                         (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1604         size -= t;
1605         next += t;
1606
1607         tmp_reg = readl(&dev->op_regs->usbintr);
1608         t = scnprintf(next, size,
1609                         "USB Intrrupt Enable Reg:\n"
1610                         "Sleep Enable: %d\n"
1611                         "SOF Received Enable: %d\n"
1612                         "Reset Enable: %d\n"
1613                         "System Error Enable: %d\n"
1614                         "Port Change Dectected Enable: %d\n"
1615                         "USB Error Intr Enable: %d\n"
1616                         "USB Intr Enable: %d\n\n",
1617                         (tmp_reg & INTR_SLE) ? 1 : 0,
1618                         (tmp_reg & INTR_SRE) ? 1 : 0,
1619                         (tmp_reg & INTR_URE) ? 1 : 0,
1620                         (tmp_reg & INTR_SEE) ? 1 : 0,
1621                         (tmp_reg & INTR_PCE) ? 1 : 0,
1622                         (tmp_reg & INTR_UEE) ? 1 : 0,
1623                         (tmp_reg & INTR_UE) ? 1 : 0);
1624         size -= t;
1625         next += t;
1626
1627         tmp_reg = readl(&dev->op_regs->frindex);
1628         t = scnprintf(next, size,
1629                         "USB Frame Index Reg:\n"
1630                         "Frame Number is 0x%08x\n\n",
1631                         (tmp_reg & FRINDEX_MASK));
1632         size -= t;
1633         next += t;
1634
1635         tmp_reg = readl(&dev->op_regs->deviceaddr);
1636         t = scnprintf(next, size,
1637                         "USB Device Address Reg:\n"
1638                         "Device Addr is 0x%x\n\n",
1639                         USBADR(tmp_reg));
1640         size -= t;
1641         next += t;
1642
1643         tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1644         t = scnprintf(next, size,
1645                         "USB Endpoint List Address Reg:\n"
1646                         "Endpoint List Pointer is 0x%x\n\n",
1647                         EPBASE(tmp_reg));
1648         size -= t;
1649         next += t;
1650
1651         tmp_reg = readl(&dev->op_regs->portsc1);
1652         t = scnprintf(next, size,
1653                 "USB Port Status & Control Reg:\n"
1654                 "Port Reset: %s\n"
1655                 "Port Suspend Mode: %s\n"
1656                 "Over-current Change: %s\n"
1657                 "Port Enable/Disable Change: %s\n"
1658                 "Port Enabled/Disabled: %s\n"
1659                 "Current Connect Status: %s\n\n",
1660                 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1661                 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1662                 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1663                 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1664                 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1665                 (tmp_reg & PORTS_CCS) ?  "Attached" : "Not Attached");
1666         size -= t;
1667         next += t;
1668
1669         tmp_reg = readl(&dev->op_regs->devlc);
1670         t = scnprintf(next, size,
1671                 "Device LPM Control Reg:\n"
1672                 "Parallel Transceiver : %d\n"
1673                 "Serial Transceiver : %d\n"
1674                 "Port Speed: %s\n"
1675                 "Port Force Full Speed Connenct: %s\n"
1676                 "PHY Low Power Suspend Clock Disable: %s\n"
1677                 "BmAttributes: %d\n\n",
1678                 LPM_PTS(tmp_reg),
1679                 (tmp_reg & LPM_STS) ? 1 : 0,
1680                 ({
1681                         char    *s;
1682                         switch (LPM_PSPD(tmp_reg)) {
1683                         case LPM_SPEED_FULL:
1684                                 s = "Full Speed"; break;
1685                         case LPM_SPEED_LOW:
1686                                 s = "Low Speed"; break;
1687                         case LPM_SPEED_HIGH:
1688                                 s = "High Speed"; break;
1689                         default:
1690                                 s = "Unknown Speed"; break;
1691                         }
1692                         s;
1693                 }),
1694                 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1695                 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1696                 LPM_BA(tmp_reg));
1697         size -= t;
1698         next += t;
1699
1700         tmp_reg = readl(&dev->op_regs->usbmode);
1701         t = scnprintf(next, size,
1702                         "USB Mode Reg:\n"
1703                         "Controller Mode is : %s\n\n", ({
1704                                 char *s;
1705                                 switch (MODE_CM(tmp_reg)) {
1706                                 case MODE_IDLE:
1707                                         s = "Idle"; break;
1708                                 case MODE_DEVICE:
1709                                         s = "Device Controller"; break;
1710                                 case MODE_HOST:
1711                                         s = "Host Controller"; break;
1712                                 default:
1713                                         s = "None"; break;
1714                                 }
1715                                 s;
1716                         }));
1717         size -= t;
1718         next += t;
1719
1720         tmp_reg = readl(&dev->op_regs->endptsetupstat);
1721         t = scnprintf(next, size,
1722                         "Endpoint Setup Status Reg:\n"
1723                         "SETUP on ep 0x%04x\n\n",
1724                         tmp_reg & SETUPSTAT_MASK);
1725         size -= t;
1726         next += t;
1727
1728         for (i = 0; i < dev->ep_max / 2; i++) {
1729                 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1730                 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1731                                 i, tmp_reg);
1732                 size -= t;
1733                 next += t;
1734         }
1735         tmp_reg = readl(&dev->op_regs->endptprime);
1736         t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1737         size -= t;
1738         next += t;
1739
1740         /* langwell_udc, langwell_ep, langwell_request structure information */
1741         ep = &dev->ep[0];
1742         t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1743                         ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1744         size -= t;
1745         next += t;
1746
1747         if (list_empty(&ep->queue)) {
1748                 t = scnprintf(next, size, "its req queue is empty\n\n");
1749                 size -= t;
1750                 next += t;
1751         } else {
1752                 list_for_each_entry(req, &ep->queue, queue) {
1753                         t = scnprintf(next, size,
1754                                 "req %p actual 0x%x length 0x%x  buf %p\n",
1755                                 &req->req, req->req.actual,
1756                                 req->req.length, req->req.buf);
1757                         size -= t;
1758                         next += t;
1759                 }
1760         }
1761         /* other gadget->eplist ep */
1762         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1763                 if (ep->desc) {
1764                         t = scnprintf(next, size,
1765                                         "\n%s MaxPacketSize: 0x%x, "
1766                                         "ep_num: %d\n",
1767                                         ep->ep.name, ep->ep.maxpacket,
1768                                         ep->ep_num);
1769                         size -= t;
1770                         next += t;
1771
1772                         if (list_empty(&ep->queue)) {
1773                                 t = scnprintf(next, size,
1774                                                 "its req queue is empty\n\n");
1775                                 size -= t;
1776                                 next += t;
1777                         } else {
1778                                 list_for_each_entry(req, &ep->queue, queue) {
1779                                         t = scnprintf(next, size,
1780                                                 "req %p actual 0x%x length "
1781                                                 "0x%x  buf %p\n",
1782                                                 &req->req, req->req.actual,
1783                                                 req->req.length, req->req.buf);
1784                                         size -= t;
1785                                         next += t;
1786                                 }
1787                         }
1788                 }
1789         }
1790
1791         spin_unlock_irqrestore(&dev->lock, flags);
1792         return PAGE_SIZE - size;
1793 }
1794 static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1795
1796
1797 /*-------------------------------------------------------------------------*/
1798
1799 /*
1800  * when a driver is successfully registered, it will receive
1801  * control requests including set_configuration(), which enables
1802  * non-control requests.  then usb traffic follows until a
1803  * disconnect is reported.  then a host may connect again, or
1804  * the driver might get unbound.
1805  */
1806
1807 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1808 {
1809         struct langwell_udc     *dev = the_controller;
1810         unsigned long           flags;
1811         int                     retval;
1812
1813         if (!dev)
1814                 return -ENODEV;
1815
1816         DBG(dev, "---> %s()\n", __func__);
1817
1818         if (dev->driver)
1819                 return -EBUSY;
1820
1821         spin_lock_irqsave(&dev->lock, flags);
1822
1823         /* hook up the driver ... */
1824         driver->driver.bus = NULL;
1825         dev->driver = driver;
1826         dev->gadget.dev.driver = &driver->driver;
1827
1828         spin_unlock_irqrestore(&dev->lock, flags);
1829
1830         retval = driver->bind(&dev->gadget);
1831         if (retval) {
1832                 DBG(dev, "bind to driver %s --> %d\n",
1833                                 driver->driver.name, retval);
1834                 dev->driver = NULL;
1835                 dev->gadget.dev.driver = NULL;
1836                 return retval;
1837         }
1838
1839         retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1840         if (retval)
1841                 goto err_unbind;
1842
1843         dev->usb_state = USB_STATE_ATTACHED;
1844         dev->ep0_state = WAIT_FOR_SETUP;
1845         dev->ep0_dir = USB_DIR_OUT;
1846
1847         /* enable interrupt and set controller to run state */
1848         if (dev->got_irq)
1849                 langwell_udc_start(dev);
1850
1851         VDBG(dev, "After langwell_udc_start(), print all registers:\n");
1852 #ifdef  VERBOSE
1853         print_all_registers(dev);
1854 #endif
1855
1856         INFO(dev, "register driver: %s\n", driver->driver.name);
1857         VDBG(dev, "<--- %s()\n", __func__);
1858         return 0;
1859
1860 err_unbind:
1861         driver->unbind(&dev->gadget);
1862         dev->gadget.dev.driver = NULL;
1863         dev->driver = NULL;
1864
1865         DBG(dev, "<--- %s()\n", __func__);
1866         return retval;
1867 }
1868 EXPORT_SYMBOL(usb_gadget_register_driver);
1869
1870
1871 /* unregister gadget driver */
1872 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1873 {
1874         struct langwell_udc     *dev = the_controller;
1875         unsigned long           flags;
1876
1877         if (!dev)
1878                 return -ENODEV;
1879
1880         DBG(dev, "---> %s()\n", __func__);
1881
1882         if (unlikely(!driver || !driver->bind || !driver->unbind))
1883                 return -EINVAL;
1884
1885         /* unbind OTG transceiver */
1886         if (dev->transceiver)
1887                 (void)otg_set_peripheral(dev->transceiver, 0);
1888
1889         /* disable interrupt and set controller to stop state */
1890         langwell_udc_stop(dev);
1891
1892         dev->usb_state = USB_STATE_ATTACHED;
1893         dev->ep0_state = WAIT_FOR_SETUP;
1894         dev->ep0_dir = USB_DIR_OUT;
1895
1896         spin_lock_irqsave(&dev->lock, flags);
1897
1898         /* stop all usb activities */
1899         dev->gadget.speed = USB_SPEED_UNKNOWN;
1900         stop_activity(dev, driver);
1901         spin_unlock_irqrestore(&dev->lock, flags);
1902
1903         /* unbind gadget driver */
1904         driver->unbind(&dev->gadget);
1905         dev->gadget.dev.driver = NULL;
1906         dev->driver = NULL;
1907
1908         device_remove_file(&dev->pdev->dev, &dev_attr_function);
1909
1910         INFO(dev, "unregistered driver '%s'\n", driver->driver.name);
1911         DBG(dev, "<--- %s()\n", __func__);
1912         return 0;
1913 }
1914 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1915
1916
1917 /*-------------------------------------------------------------------------*/
1918
1919 /*
1920  * setup tripwire is used as a semaphore to ensure that the setup data
1921  * payload is extracted from a dQH without being corrupted
1922  */
1923 static void setup_tripwire(struct langwell_udc *dev)
1924 {
1925         u32                     usbcmd,
1926                                 endptsetupstat;
1927         unsigned long           timeout;
1928         struct langwell_dqh     *dqh;
1929
1930         VDBG(dev, "---> %s()\n", __func__);
1931
1932         /* ep0 OUT dQH */
1933         dqh = &dev->ep_dqh[EP_DIR_OUT];
1934
1935         /* Write-Clear endptsetupstat */
1936         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1937         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1938
1939         /* wait until endptsetupstat is cleared */
1940         timeout = jiffies + SETUPSTAT_TIMEOUT;
1941         while (readl(&dev->op_regs->endptsetupstat)) {
1942                 if (time_after(jiffies, timeout)) {
1943                         ERROR(dev, "setup_tripwire timeout\n");
1944                         break;
1945                 }
1946                 cpu_relax();
1947         }
1948
1949         /* while a hazard exists when setup packet arrives */
1950         do {
1951                 /* set setup tripwire bit */
1952                 usbcmd = readl(&dev->op_regs->usbcmd);
1953                 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1954
1955                 /* copy the setup packet to local buffer */
1956                 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
1957         } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
1958
1959         /* Write-Clear setup tripwire bit */
1960         usbcmd = readl(&dev->op_regs->usbcmd);
1961         writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
1962
1963         VDBG(dev, "<--- %s()\n", __func__);
1964 }
1965
1966
1967 /* protocol ep0 stall, will automatically be cleared on new transaction */
1968 static void ep0_stall(struct langwell_udc *dev)
1969 {
1970         u32     endptctrl;
1971
1972         VDBG(dev, "---> %s()\n", __func__);
1973
1974         /* set TX and RX to stall */
1975         endptctrl = readl(&dev->op_regs->endptctrl[0]);
1976         endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
1977         writel(endptctrl, &dev->op_regs->endptctrl[0]);
1978
1979         /* update ep0 state */
1980         dev->ep0_state = WAIT_FOR_SETUP;
1981         dev->ep0_dir = USB_DIR_OUT;
1982
1983         VDBG(dev, "<--- %s()\n", __func__);
1984 }
1985
1986
1987 /* PRIME a status phase for ep0 */
1988 static int prime_status_phase(struct langwell_udc *dev, int dir)
1989 {
1990         struct langwell_request *req;
1991         struct langwell_ep      *ep;
1992         int                     status = 0;
1993
1994         VDBG(dev, "---> %s()\n", __func__);
1995
1996         if (dir == EP_DIR_IN)
1997                 dev->ep0_dir = USB_DIR_IN;
1998         else
1999                 dev->ep0_dir = USB_DIR_OUT;
2000
2001         ep = &dev->ep[0];
2002         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2003
2004         req = dev->status_req;
2005
2006         req->ep = ep;
2007         req->req.length = 0;
2008         req->req.status = -EINPROGRESS;
2009         req->req.actual = 0;
2010         req->req.complete = NULL;
2011         req->dtd_count = 0;
2012
2013         if (!req_to_dtd(req))
2014                 status = queue_dtd(ep, req);
2015         else
2016                 return -ENOMEM;
2017
2018         if (status)
2019                 ERROR(dev, "can't queue ep0 status request\n");
2020
2021         list_add_tail(&req->queue, &ep->queue);
2022
2023         VDBG(dev, "<--- %s()\n", __func__);
2024         return status;
2025 }
2026
2027
2028 /* SET_ADDRESS request routine */
2029 static void set_address(struct langwell_udc *dev, u16 value,
2030                 u16 index, u16 length)
2031 {
2032         VDBG(dev, "---> %s()\n", __func__);
2033
2034         /* save the new address to device struct */
2035         dev->dev_addr = (u8) value;
2036         VDBG(dev, "dev->dev_addr = %d\n", dev->dev_addr);
2037
2038         /* update usb state */
2039         dev->usb_state = USB_STATE_ADDRESS;
2040
2041         /* STATUS phase */
2042         if (prime_status_phase(dev, EP_DIR_IN))
2043                 ep0_stall(dev);
2044
2045         VDBG(dev, "<--- %s()\n", __func__);
2046 }
2047
2048
2049 /* return endpoint by windex */
2050 static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2051                 u16 wIndex)
2052 {
2053         struct langwell_ep              *ep;
2054         VDBG(dev, "---> %s()\n", __func__);
2055
2056         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2057                 return &dev->ep[0];
2058
2059         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2060                 u8      bEndpointAddress;
2061                 if (!ep->desc)
2062                         continue;
2063
2064                 bEndpointAddress = ep->desc->bEndpointAddress;
2065                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2066                         continue;
2067
2068                 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2069                         == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2070                         return ep;
2071         }
2072
2073         VDBG(dev, "<--- %s()\n", __func__);
2074         return NULL;
2075 }
2076
2077
2078 /* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2079 static int ep_is_stall(struct langwell_ep *ep)
2080 {
2081         struct langwell_udc     *dev = ep->dev;
2082         u32                     endptctrl;
2083         int                     retval;
2084
2085         VDBG(dev, "---> %s()\n", __func__);
2086
2087         endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2088         if (is_in(ep))
2089                 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2090         else
2091                 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2092
2093         VDBG(dev, "<--- %s()\n", __func__);
2094         return retval;
2095 }
2096
2097
2098 /* GET_STATUS request routine */
2099 static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2100                 u16 index, u16 length)
2101 {
2102         struct langwell_request *req;
2103         struct langwell_ep      *ep;
2104         u16     status_data = 0;        /* 16 bits cpu view status data */
2105         int     status = 0;
2106
2107         VDBG(dev, "---> %s()\n", __func__);
2108
2109         ep = &dev->ep[0];
2110
2111         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2112                 /* get device status */
2113                 status_data = 1 << USB_DEVICE_SELF_POWERED;
2114                 status_data |= dev->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
2115         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2116                 /* get interface status */
2117                 status_data = 0;
2118         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2119                 /* get endpoint status */
2120                 struct langwell_ep      *epn;
2121                 epn = get_ep_by_windex(dev, index);
2122                 /* stall if endpoint doesn't exist */
2123                 if (!epn)
2124                         goto stall;
2125
2126                 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2127         }
2128
2129         dev->ep0_dir = USB_DIR_IN;
2130
2131         /* borrow the per device status_req */
2132         req = dev->status_req;
2133
2134         /* fill in the reqest structure */
2135         *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2136         req->ep = ep;
2137         req->req.length = 2;
2138         req->req.status = -EINPROGRESS;
2139         req->req.actual = 0;
2140         req->req.complete = NULL;
2141         req->dtd_count = 0;
2142
2143         /* prime the data phase */
2144         if (!req_to_dtd(req))
2145                 status = queue_dtd(ep, req);
2146         else                    /* no mem */
2147                 goto stall;
2148
2149         if (status) {
2150                 ERROR(dev, "response error on GET_STATUS request\n");
2151                 goto stall;
2152         }
2153
2154         list_add_tail(&req->queue, &ep->queue);
2155         dev->ep0_state = DATA_STATE_XMIT;
2156
2157         VDBG(dev, "<--- %s()\n", __func__);
2158         return;
2159 stall:
2160         ep0_stall(dev);
2161         VDBG(dev, "<--- %s()\n", __func__);
2162 }
2163
2164
2165 /* setup packet interrupt handler */
2166 static void handle_setup_packet(struct langwell_udc *dev,
2167                 struct usb_ctrlrequest *setup)
2168 {
2169         u16     wValue = le16_to_cpu(setup->wValue);
2170         u16     wIndex = le16_to_cpu(setup->wIndex);
2171         u16     wLength = le16_to_cpu(setup->wLength);
2172
2173         VDBG(dev, "---> %s()\n", __func__);
2174
2175         /* ep0 fifo flush */
2176         nuke(&dev->ep[0], -ESHUTDOWN);
2177
2178         DBG(dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2179                         setup->bRequestType, setup->bRequest,
2180                         wValue, wIndex, wLength);
2181
2182         /* RNDIS gadget delegate */
2183         if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2184                 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2185                 goto delegate;
2186         }
2187
2188         /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2189         if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2190                 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2191                 goto delegate;
2192         }
2193
2194         /* We process some stardard setup requests here */
2195         switch (setup->bRequest) {
2196         case USB_REQ_GET_STATUS:
2197                 DBG(dev, "SETUP: USB_REQ_GET_STATUS\n");
2198                 /* get status, DATA and STATUS phase */
2199                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2200                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
2201                         break;
2202                 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2203                 goto end;
2204
2205         case USB_REQ_SET_ADDRESS:
2206                 DBG(dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2207                 /* STATUS phase */
2208                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2209                                                 | USB_RECIP_DEVICE))
2210                         break;
2211                 set_address(dev, wValue, wIndex, wLength);
2212                 goto end;
2213
2214         case USB_REQ_CLEAR_FEATURE:
2215         case USB_REQ_SET_FEATURE:
2216                 /* STATUS phase */
2217         {
2218                 int rc = -EOPNOTSUPP;
2219                 if (setup->bRequest == USB_REQ_SET_FEATURE)
2220                         DBG(dev, "SETUP: USB_REQ_SET_FEATURE\n");
2221                 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2222                         DBG(dev, "SETUP: USB_REQ_CLEAR_FEATURE\n");
2223
2224                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2225                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2226                         struct langwell_ep      *epn;
2227                         epn = get_ep_by_windex(dev, wIndex);
2228                         /* stall if endpoint doesn't exist */
2229                         if (!epn) {
2230                                 ep0_stall(dev);
2231                                 goto end;
2232                         }
2233
2234                         if (wValue != 0 || wLength != 0
2235                                         || epn->ep_num > dev->ep_max)
2236                                 break;
2237
2238                         spin_unlock(&dev->lock);
2239                         rc = langwell_ep_set_halt(&epn->ep,
2240                                         (setup->bRequest == USB_REQ_SET_FEATURE)
2241                                                 ? 1 : 0);
2242                         spin_lock(&dev->lock);
2243
2244                 } else if ((setup->bRequestType & (USB_RECIP_MASK
2245                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2246                                 | USB_TYPE_STANDARD)) {
2247                         if (!gadget_is_otg(&dev->gadget))
2248                                 break;
2249                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
2250                                 dev->gadget.b_hnp_enable = 1;
2251 #ifdef  OTG_TRANSCEIVER
2252                                 if (!dev->lotg->otg.default_a)
2253                                         dev->lotg->hsm.b_hnp_enable = 1;
2254 #endif
2255                         } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2256                                 dev->gadget.a_hnp_support = 1;
2257                         else if (setup->bRequest ==
2258                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
2259                                 dev->gadget.a_alt_hnp_support = 1;
2260                         else
2261                                 break;
2262                         rc = 0;
2263                 } else
2264                         break;
2265
2266                 if (rc == 0) {
2267                         if (prime_status_phase(dev, EP_DIR_IN))
2268                                 ep0_stall(dev);
2269                 }
2270                 goto end;
2271         }
2272
2273         case USB_REQ_GET_DESCRIPTOR:
2274                 DBG(dev, "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2275                 goto delegate;
2276
2277         case USB_REQ_SET_DESCRIPTOR:
2278                 DBG(dev, "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2279                 goto delegate;
2280
2281         case USB_REQ_GET_CONFIGURATION:
2282                 DBG(dev, "SETUP: USB_REQ_GET_CONFIGURATION\n");
2283                 goto delegate;
2284
2285         case USB_REQ_SET_CONFIGURATION:
2286                 DBG(dev, "SETUP: USB_REQ_SET_CONFIGURATION\n");
2287                 goto delegate;
2288
2289         case USB_REQ_GET_INTERFACE:
2290                 DBG(dev, "SETUP: USB_REQ_GET_INTERFACE\n");
2291                 goto delegate;
2292
2293         case USB_REQ_SET_INTERFACE:
2294                 DBG(dev, "SETUP: USB_REQ_SET_INTERFACE\n");
2295                 goto delegate;
2296
2297         case USB_REQ_SYNCH_FRAME:
2298                 DBG(dev, "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2299                 goto delegate;
2300
2301         default:
2302                 /* delegate USB standard requests to the gadget driver */
2303                 goto delegate;
2304 delegate:
2305                 /* USB requests handled by gadget */
2306                 if (wLength) {
2307                         /* DATA phase from gadget, STATUS phase from udc */
2308                         dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2309                                         ?  USB_DIR_IN : USB_DIR_OUT;
2310                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2311                                         dev->ep0_dir, wLength);
2312                         spin_unlock(&dev->lock);
2313                         if (dev->driver->setup(&dev->gadget,
2314                                         &dev->local_setup_buff) < 0)
2315                                 ep0_stall(dev);
2316                         spin_lock(&dev->lock);
2317                         dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2318                                         ?  DATA_STATE_XMIT : DATA_STATE_RECV;
2319                 } else {
2320                         /* no DATA phase, IN STATUS phase from gadget */
2321                         dev->ep0_dir = USB_DIR_IN;
2322                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2323                                         dev->ep0_dir, wLength);
2324                         spin_unlock(&dev->lock);
2325                         if (dev->driver->setup(&dev->gadget,
2326                                         &dev->local_setup_buff) < 0)
2327                                 ep0_stall(dev);
2328                         spin_lock(&dev->lock);
2329                         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2330                 }
2331                 break;
2332         }
2333 end:
2334         VDBG(dev, "<--- %s()\n", __func__);
2335         return;
2336 }
2337
2338
2339 /* transfer completion, process endpoint request and free the completed dTDs
2340  * for this request
2341  */
2342 static int process_ep_req(struct langwell_udc *dev, int index,
2343                 struct langwell_request *curr_req)
2344 {
2345         struct langwell_dtd     *curr_dtd;
2346         struct langwell_dqh     *curr_dqh;
2347         int                     td_complete, actual, remaining_length;
2348         int                     i, dir;
2349         u8                      dtd_status = 0;
2350         int                     retval = 0;
2351
2352         curr_dqh = &dev->ep_dqh[index];
2353         dir = index % 2;
2354
2355         curr_dtd = curr_req->head;
2356         td_complete = 0;
2357         actual = curr_req->req.length;
2358
2359         VDBG(dev, "---> %s()\n", __func__);
2360
2361         for (i = 0; i < curr_req->dtd_count; i++) {
2362                 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2363                 actual -= remaining_length;
2364
2365                 /* command execution states by dTD */
2366                 dtd_status = curr_dtd->dtd_status;
2367
2368                 if (!dtd_status) {
2369                         /* transfers completed successfully */
2370                         if (!remaining_length) {
2371                                 td_complete++;
2372                                 VDBG(dev, "dTD transmitted successfully\n");
2373                         } else {
2374                                 if (dir) {
2375                                         VDBG(dev, "TX dTD remains data\n");
2376                                         retval = -EPROTO;
2377                                         break;
2378
2379                                 } else {
2380                                         td_complete++;
2381                                         break;
2382                                 }
2383                         }
2384                 } else {
2385                         /* transfers completed with errors */
2386                         if (dtd_status & DTD_STS_ACTIVE) {
2387                                 DBG(dev, "request not completed\n");
2388                                 retval = 1;
2389                                 return retval;
2390                         } else if (dtd_status & DTD_STS_HALTED) {
2391                                 ERROR(dev, "dTD error %08x dQH[%d]\n",
2392                                                 dtd_status, index);
2393                                 /* clear the errors and halt condition */
2394                                 curr_dqh->dtd_status = 0;
2395                                 retval = -EPIPE;
2396                                 break;
2397                         } else if (dtd_status & DTD_STS_DBE) {
2398                                 DBG(dev, "data buffer (overflow) error\n");
2399                                 retval = -EPROTO;
2400                                 break;
2401                         } else if (dtd_status & DTD_STS_TRE) {
2402                                 DBG(dev, "transaction(ISO) error\n");
2403                                 retval = -EILSEQ;
2404                                 break;
2405                         } else
2406                                 ERROR(dev, "unknown error (0x%x)!\n",
2407                                                 dtd_status);
2408                 }
2409
2410                 if (i != curr_req->dtd_count - 1)
2411                         curr_dtd = (struct langwell_dtd *)
2412                                 curr_dtd->next_dtd_virt;
2413         }
2414
2415         if (retval)
2416                 return retval;
2417
2418         curr_req->req.actual = actual;
2419
2420         VDBG(dev, "<--- %s()\n", __func__);
2421         return 0;
2422 }
2423
2424
2425 /* complete DATA or STATUS phase of ep0 prime status phase if needed */
2426 static void ep0_req_complete(struct langwell_udc *dev,
2427                 struct langwell_ep *ep0, struct langwell_request *req)
2428 {
2429         u32     new_addr;
2430         VDBG(dev, "---> %s()\n", __func__);
2431
2432         if (dev->usb_state == USB_STATE_ADDRESS) {
2433                 /* set the new address */
2434                 new_addr = (u32)dev->dev_addr;
2435                 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2436
2437                 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2438                 VDBG(dev, "new_addr = %d\n", new_addr);
2439         }
2440
2441         done(ep0, req, 0);
2442
2443         switch (dev->ep0_state) {
2444         case DATA_STATE_XMIT:
2445                 /* receive status phase */
2446                 if (prime_status_phase(dev, EP_DIR_OUT))
2447                         ep0_stall(dev);
2448                 break;
2449         case DATA_STATE_RECV:
2450                 /* send status phase */
2451                 if (prime_status_phase(dev, EP_DIR_IN))
2452                         ep0_stall(dev);
2453                 break;
2454         case WAIT_FOR_OUT_STATUS:
2455                 dev->ep0_state = WAIT_FOR_SETUP;
2456                 break;
2457         case WAIT_FOR_SETUP:
2458                 ERROR(dev, "unexpect ep0 packets\n");
2459                 break;
2460         default:
2461                 ep0_stall(dev);
2462                 break;
2463         }
2464
2465         VDBG(dev, "<--- %s()\n", __func__);
2466 }
2467
2468
2469 /* USB transfer completion interrupt */
2470 static void handle_trans_complete(struct langwell_udc *dev)
2471 {
2472         u32                     complete_bits;
2473         int                     i, ep_num, dir, bit_mask, status;
2474         struct langwell_ep      *epn;
2475         struct langwell_request *curr_req, *temp_req;
2476
2477         VDBG(dev, "---> %s()\n", __func__);
2478
2479         complete_bits = readl(&dev->op_regs->endptcomplete);
2480         VDBG(dev, "endptcomplete register: 0x%08x\n", complete_bits);
2481
2482         /* Write-Clear the bits in endptcomplete register */
2483         writel(complete_bits, &dev->op_regs->endptcomplete);
2484
2485         if (!complete_bits) {
2486                 DBG(dev, "complete_bits = 0\n");
2487                 goto done;
2488         }
2489
2490         for (i = 0; i < dev->ep_max; i++) {
2491                 ep_num = i / 2;
2492                 dir = i % 2;
2493
2494                 bit_mask = 1 << (ep_num + 16 * dir);
2495
2496                 if (!(complete_bits & bit_mask))
2497                         continue;
2498
2499                 /* ep0 */
2500                 if (i == 1)
2501                         epn = &dev->ep[0];
2502                 else
2503                         epn = &dev->ep[i];
2504
2505                 if (epn->name == NULL) {
2506                         WARNING(dev, "invalid endpoint\n");
2507                         continue;
2508                 }
2509
2510                 if (i < 2)
2511                         /* ep0 in and out */
2512                         DBG(dev, "%s-%s transfer completed\n",
2513                                         epn->name,
2514                                         is_in(epn) ? "in" : "out");
2515                 else
2516                         DBG(dev, "%s transfer completed\n", epn->name);
2517
2518                 /* process the req queue until an uncomplete request */
2519                 list_for_each_entry_safe(curr_req, temp_req,
2520                                 &epn->queue, queue) {
2521                         status = process_ep_req(dev, i, curr_req);
2522                         VDBG(dev, "%s req status: %d\n", epn->name, status);
2523
2524                         if (status)
2525                                 break;
2526
2527                         /* write back status to req */
2528                         curr_req->req.status = status;
2529
2530                         /* ep0 request completion */
2531                         if (ep_num == 0) {
2532                                 ep0_req_complete(dev, epn, curr_req);
2533                                 break;
2534                         } else {
2535                                 done(epn, curr_req, status);
2536                         }
2537                 }
2538         }
2539 done:
2540         VDBG(dev, "<--- %s()\n", __func__);
2541         return;
2542 }
2543
2544
2545 /* port change detect interrupt handler */
2546 static void handle_port_change(struct langwell_udc *dev)
2547 {
2548         u32     portsc1, devlc;
2549         u32     speed;
2550
2551         VDBG(dev, "---> %s()\n", __func__);
2552
2553         if (dev->bus_reset)
2554                 dev->bus_reset = 0;
2555
2556         portsc1 = readl(&dev->op_regs->portsc1);
2557         devlc = readl(&dev->op_regs->devlc);
2558         VDBG(dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2559                         portsc1, devlc);
2560
2561         /* bus reset is finished */
2562         if (!(portsc1 & PORTS_PR)) {
2563                 /* get the speed */
2564                 speed = LPM_PSPD(devlc);
2565                 switch (speed) {
2566                 case LPM_SPEED_HIGH:
2567                         dev->gadget.speed = USB_SPEED_HIGH;
2568                         break;
2569                 case LPM_SPEED_FULL:
2570                         dev->gadget.speed = USB_SPEED_FULL;
2571                         break;
2572                 case LPM_SPEED_LOW:
2573                         dev->gadget.speed = USB_SPEED_LOW;
2574                         break;
2575                 default:
2576                         dev->gadget.speed = USB_SPEED_UNKNOWN;
2577                         break;
2578                 }
2579                 VDBG(dev, "speed = %d, dev->gadget.speed = %d\n",
2580                                 speed, dev->gadget.speed);
2581         }
2582
2583         /* LPM L0 to L1 */
2584         if (dev->lpm && dev->lpm_state == LPM_L0)
2585                 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2586                                 INFO(dev, "LPM L0 to L1\n");
2587                                 dev->lpm_state = LPM_L1;
2588                 }
2589
2590         /* LPM L1 to L0, force resume or remote wakeup finished */
2591         if (dev->lpm && dev->lpm_state == LPM_L1)
2592                 if (!(portsc1 & PORTS_SUSP)) {
2593                         if (portsc1 & PORTS_SLP)
2594                                 INFO(dev, "LPM L1 to L0, force resume\n");
2595                         else
2596                                 INFO(dev, "LPM L1 to L0, remote wakeup\n");
2597
2598                         dev->lpm_state = LPM_L0;
2599                 }
2600
2601         /* update USB state */
2602         if (!dev->resume_state)
2603                 dev->usb_state = USB_STATE_DEFAULT;
2604
2605         VDBG(dev, "<--- %s()\n", __func__);
2606 }
2607
2608
2609 /* USB reset interrupt handler */
2610 static void handle_usb_reset(struct langwell_udc *dev)
2611 {
2612         u32             deviceaddr,
2613                         endptsetupstat,
2614                         endptcomplete;
2615         unsigned long   timeout;
2616
2617         VDBG(dev, "---> %s()\n", __func__);
2618
2619         /* Write-Clear the device address */
2620         deviceaddr = readl(&dev->op_regs->deviceaddr);
2621         writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2622
2623         dev->dev_addr = 0;
2624
2625         /* clear usb state */
2626         dev->resume_state = 0;
2627
2628         /* LPM L1 to L0, reset */
2629         if (dev->lpm)
2630                 dev->lpm_state = LPM_L0;
2631
2632         dev->ep0_dir = USB_DIR_OUT;
2633         dev->ep0_state = WAIT_FOR_SETUP;
2634         dev->remote_wakeup = 0;         /* default to 0 on reset */
2635         dev->gadget.b_hnp_enable = 0;
2636         dev->gadget.a_hnp_support = 0;
2637         dev->gadget.a_alt_hnp_support = 0;
2638
2639         /* Write-Clear all the setup token semaphores */
2640         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2641         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2642
2643         /* Write-Clear all the endpoint complete status bits */
2644         endptcomplete = readl(&dev->op_regs->endptcomplete);
2645         writel(endptcomplete, &dev->op_regs->endptcomplete);
2646
2647         /* wait until all endptprime bits cleared */
2648         timeout = jiffies + PRIME_TIMEOUT;
2649         while (readl(&dev->op_regs->endptprime)) {
2650                 if (time_after(jiffies, timeout)) {
2651                         ERROR(dev, "USB reset timeout\n");
2652                         break;
2653                 }
2654                 cpu_relax();
2655         }
2656
2657         /* write 1s to endptflush register to clear any primed buffers */
2658         writel((u32) ~0, &dev->op_regs->endptflush);
2659
2660         if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2661                 VDBG(dev, "USB bus reset\n");
2662                 /* bus is reseting */
2663                 dev->bus_reset = 1;
2664
2665                 /* reset all the queues, stop all USB activities */
2666                 stop_activity(dev, dev->driver);
2667                 dev->usb_state = USB_STATE_DEFAULT;
2668         } else {
2669                 VDBG(dev, "device controller reset\n");
2670                 /* controller reset */
2671                 langwell_udc_reset(dev);
2672
2673                 /* reset all the queues, stop all USB activities */
2674                 stop_activity(dev, dev->driver);
2675
2676                 /* reset ep0 dQH and endptctrl */
2677                 ep0_reset(dev);
2678
2679                 /* enable interrupt and set controller to run state */
2680                 langwell_udc_start(dev);
2681
2682                 dev->usb_state = USB_STATE_ATTACHED;
2683         }
2684
2685 #ifdef  OTG_TRANSCEIVER
2686         /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
2687         if (!dev->lotg->otg.default_a)
2688                 dev->lotg->hsm.b_hnp_enable = 0;
2689 #endif
2690
2691         VDBG(dev, "<--- %s()\n", __func__);
2692 }
2693
2694
2695 /* USB bus suspend/resume interrupt */
2696 static void handle_bus_suspend(struct langwell_udc *dev)
2697 {
2698         u32             devlc;
2699         DBG(dev, "---> %s()\n", __func__);
2700
2701         dev->resume_state = dev->usb_state;
2702         dev->usb_state = USB_STATE_SUSPENDED;
2703
2704 #ifdef  OTG_TRANSCEIVER
2705         if (dev->lotg->otg.default_a) {
2706                 if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
2707                         dev->lotg->hsm.b_bus_suspend = 1;
2708                         /* notify transceiver the state changes */
2709                         if (spin_trylock(&dev->lotg->wq_lock)) {
2710                                 langwell_update_transceiver();
2711                                 spin_unlock(&dev->lotg->wq_lock);
2712                         }
2713                 }
2714                 dev->lotg->hsm.b_bus_suspend_vld++;
2715         } else {
2716                 if (!dev->lotg->hsm.a_bus_suspend) {
2717                         dev->lotg->hsm.a_bus_suspend = 1;
2718                         /* notify transceiver the state changes */
2719                         if (spin_trylock(&dev->lotg->wq_lock)) {
2720                                 langwell_update_transceiver();
2721                                 spin_unlock(&dev->lotg->wq_lock);
2722                         }
2723                 }
2724         }
2725 #endif
2726
2727         /* report suspend to the driver */
2728         if (dev->driver) {
2729                 if (dev->driver->suspend) {
2730                         spin_unlock(&dev->lock);
2731                         dev->driver->suspend(&dev->gadget);
2732                         spin_lock(&dev->lock);
2733                         DBG(dev, "suspend %s\n", dev->driver->driver.name);
2734                 }
2735         }
2736
2737         /* enter PHY low power suspend */
2738         devlc = readl(&dev->op_regs->devlc);
2739         VDBG(dev, "devlc = 0x%08x\n", devlc);
2740         devlc |= LPM_PHCD;
2741         writel(devlc, &dev->op_regs->devlc);
2742
2743         DBG(dev, "<--- %s()\n", __func__);
2744 }
2745
2746
2747 static void handle_bus_resume(struct langwell_udc *dev)
2748 {
2749         u32             devlc;
2750         DBG(dev, "---> %s()\n", __func__);
2751
2752         dev->usb_state = dev->resume_state;
2753         dev->resume_state = 0;
2754
2755         /* exit PHY low power suspend */
2756         devlc = readl(&dev->op_regs->devlc);
2757         VDBG(dev, "devlc = 0x%08x\n", devlc);
2758         devlc &= ~LPM_PHCD;
2759         writel(devlc, &dev->op_regs->devlc);
2760
2761 #ifdef  OTG_TRANSCEIVER
2762         if (dev->lotg->otg.default_a == 0)
2763                 dev->lotg->hsm.a_bus_suspend = 0;
2764 #endif
2765
2766         /* report resume to the driver */
2767         if (dev->driver) {
2768                 if (dev->driver->resume) {
2769                         spin_unlock(&dev->lock);
2770                         dev->driver->resume(&dev->gadget);
2771                         spin_lock(&dev->lock);
2772                         DBG(dev, "resume %s\n", dev->driver->driver.name);
2773                 }
2774         }
2775
2776         DBG(dev, "<--- %s()\n", __func__);
2777 }
2778
2779
2780 /* USB device controller interrupt handler */
2781 static irqreturn_t langwell_irq(int irq, void *_dev)
2782 {
2783         struct langwell_udc     *dev = _dev;
2784         u32                     usbsts,
2785                                 usbintr,
2786                                 irq_sts,
2787                                 portsc1;
2788
2789         VDBG(dev, "---> %s()\n", __func__);
2790
2791         if (dev->stopped) {
2792                 VDBG(dev, "handle IRQ_NONE\n");
2793                 VDBG(dev, "<--- %s()\n", __func__);
2794                 return IRQ_NONE;
2795         }
2796
2797         spin_lock(&dev->lock);
2798
2799         /* USB status */
2800         usbsts = readl(&dev->op_regs->usbsts);
2801
2802         /* USB interrupt enable */
2803         usbintr = readl(&dev->op_regs->usbintr);
2804
2805         irq_sts = usbsts & usbintr;
2806         VDBG(dev, "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2807                         usbsts, usbintr, irq_sts);
2808
2809         if (!irq_sts) {
2810                 VDBG(dev, "handle IRQ_NONE\n");
2811                 VDBG(dev, "<--- %s()\n", __func__);
2812                 spin_unlock(&dev->lock);
2813                 return IRQ_NONE;
2814         }
2815
2816         /* Write-Clear interrupt status bits */
2817         writel(irq_sts, &dev->op_regs->usbsts);
2818
2819         /* resume from suspend */
2820         portsc1 = readl(&dev->op_regs->portsc1);
2821         if (dev->usb_state == USB_STATE_SUSPENDED)
2822                 if (!(portsc1 & PORTS_SUSP))
2823                         handle_bus_resume(dev);
2824
2825         /* USB interrupt */
2826         if (irq_sts & STS_UI) {
2827                 VDBG(dev, "USB interrupt\n");
2828
2829                 /* setup packet received from ep0 */
2830                 if (readl(&dev->op_regs->endptsetupstat)
2831                                 & EP0SETUPSTAT_MASK) {
2832                         VDBG(dev, "USB SETUP packet received interrupt\n");
2833                         /* setup tripwire semaphone */
2834                         setup_tripwire(dev);
2835                         handle_setup_packet(dev, &dev->local_setup_buff);
2836                 }
2837
2838                 /* USB transfer completion */
2839                 if (readl(&dev->op_regs->endptcomplete)) {
2840                         VDBG(dev, "USB transfer completion interrupt\n");
2841                         handle_trans_complete(dev);
2842                 }
2843         }
2844
2845         /* SOF received interrupt (for ISO transfer) */
2846         if (irq_sts & STS_SRI) {
2847                 /* FIXME */
2848                 /* VDBG(dev, "SOF received interrupt\n"); */
2849         }
2850
2851         /* port change detect interrupt */
2852         if (irq_sts & STS_PCI) {
2853                 VDBG(dev, "port change detect interrupt\n");
2854                 handle_port_change(dev);
2855         }
2856
2857         /* suspend interrrupt */
2858         if (irq_sts & STS_SLI) {
2859                 VDBG(dev, "suspend interrupt\n");
2860                 handle_bus_suspend(dev);
2861         }
2862
2863         /* USB reset interrupt */
2864         if (irq_sts & STS_URI) {
2865                 VDBG(dev, "USB reset interrupt\n");
2866                 handle_usb_reset(dev);
2867         }
2868
2869         /* USB error or system error interrupt */
2870         if (irq_sts & (STS_UEI | STS_SEI)) {
2871                 /* FIXME */
2872                 WARNING(dev, "error IRQ, irq_sts: %x\n", irq_sts);
2873         }
2874
2875         spin_unlock(&dev->lock);
2876
2877         VDBG(dev, "<--- %s()\n", __func__);
2878         return IRQ_HANDLED;
2879 }
2880
2881
2882 /*-------------------------------------------------------------------------*/
2883
2884 /* release device structure */
2885 static void gadget_release(struct device *_dev)
2886 {
2887         struct langwell_udc     *dev = the_controller;
2888
2889         DBG(dev, "---> %s()\n", __func__);
2890
2891         complete(dev->done);
2892
2893         DBG(dev, "<--- %s()\n", __func__);
2894         kfree(dev);
2895 }
2896
2897
2898 /* tear down the binding between this driver and the pci device */
2899 static void langwell_udc_remove(struct pci_dev *pdev)
2900 {
2901         struct langwell_udc     *dev = the_controller;
2902
2903         DECLARE_COMPLETION(done);
2904
2905         BUG_ON(dev->driver);
2906         DBG(dev, "---> %s()\n", __func__);
2907
2908         dev->done = &done;
2909
2910         /* free memory allocated in probe */
2911         if (dev->dtd_pool)
2912                 dma_pool_destroy(dev->dtd_pool);
2913
2914         if (dev->status_req) {
2915                 kfree(dev->status_req->req.buf);
2916                 kfree(dev->status_req);
2917         }
2918
2919         if (dev->ep_dqh)
2920                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
2921                         dev->ep_dqh, dev->ep_dqh_dma);
2922
2923         kfree(dev->ep);
2924
2925         /* diable IRQ handler */
2926         if (dev->got_irq)
2927                 free_irq(pdev->irq, dev);
2928
2929 #ifndef OTG_TRANSCEIVER
2930         if (dev->cap_regs)
2931                 iounmap(dev->cap_regs);
2932
2933         if (dev->region)
2934                 release_mem_region(pci_resource_start(pdev, 0),
2935                                 pci_resource_len(pdev, 0));
2936
2937         if (dev->enabled)
2938                 pci_disable_device(pdev);
2939 #else
2940         if (dev->transceiver) {
2941                 otg_put_transceiver(dev->transceiver);
2942                 dev->transceiver = NULL;
2943                 dev->lotg = NULL;
2944         }
2945 #endif
2946
2947         dev->cap_regs = NULL;
2948
2949         INFO(dev, "unbind\n");
2950         DBG(dev, "<--- %s()\n", __func__);
2951
2952         device_unregister(&dev->gadget.dev);
2953         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
2954
2955 #ifndef OTG_TRANSCEIVER
2956         pci_set_drvdata(pdev, NULL);
2957 #endif
2958
2959         /* free dev, wait for the release() finished */
2960         wait_for_completion(&done);
2961
2962         the_controller = NULL;
2963 }
2964
2965
2966 /*
2967  * wrap this driver around the specified device, but
2968  * don't respond over USB until a gadget driver binds to us.
2969  */
2970 static int langwell_udc_probe(struct pci_dev *pdev,
2971                 const struct pci_device_id *id)
2972 {
2973         struct langwell_udc     *dev;
2974 #ifndef OTG_TRANSCEIVER
2975         unsigned long           resource, len;
2976 #endif
2977         void                    __iomem *base = NULL;
2978         size_t                  size;
2979         int                     retval;
2980
2981         if (the_controller) {
2982                 dev_warn(&pdev->dev, "ignoring\n");
2983                 return -EBUSY;
2984         }
2985
2986         /* alloc, and start init */
2987         dev = kzalloc(sizeof *dev, GFP_KERNEL);
2988         if (dev == NULL) {
2989                 retval = -ENOMEM;
2990                 goto error;
2991         }
2992
2993         /* initialize device spinlock */
2994         spin_lock_init(&dev->lock);
2995
2996         dev->pdev = pdev;
2997         DBG(dev, "---> %s()\n", __func__);
2998
2999 #ifdef  OTG_TRANSCEIVER
3000         /* PCI device is already enabled by otg_transceiver driver */
3001         dev->enabled = 1;
3002
3003         /* mem region and register base */
3004         dev->region = 1;
3005         dev->transceiver = otg_get_transceiver();
3006         dev->lotg = otg_to_langwell(dev->transceiver);
3007         base = dev->lotg->regs;
3008 #else
3009         pci_set_drvdata(pdev, dev);
3010
3011         /* now all the pci goodies ... */
3012         if (pci_enable_device(pdev) < 0) {
3013                 retval = -ENODEV;
3014                 goto error;
3015         }
3016         dev->enabled = 1;
3017
3018         /* control register: BAR 0 */
3019         resource = pci_resource_start(pdev, 0);
3020         len = pci_resource_len(pdev, 0);
3021         if (!request_mem_region(resource, len, driver_name)) {
3022                 ERROR(dev, "controller already in use\n");
3023                 retval = -EBUSY;
3024                 goto error;
3025         }
3026         dev->region = 1;
3027
3028         base = ioremap_nocache(resource, len);
3029 #endif
3030         if (base == NULL) {
3031                 ERROR(dev, "can't map memory\n");
3032                 retval = -EFAULT;
3033                 goto error;
3034         }
3035
3036         dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3037         VDBG(dev, "dev->cap_regs: %p\n", dev->cap_regs);
3038         dev->op_regs = (struct langwell_op_regs __iomem *)
3039                 (base + OP_REG_OFFSET);
3040         VDBG(dev, "dev->op_regs: %p\n", dev->op_regs);
3041
3042         /* irq setup after old hardware is cleaned up */
3043         if (!pdev->irq) {
3044                 ERROR(dev, "No IRQ. Check PCI setup!\n");
3045                 retval = -ENODEV;
3046                 goto error;
3047         }
3048
3049 #ifndef OTG_TRANSCEIVER
3050         INFO(dev, "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3051                         pdev->irq, resource, len, base);
3052         /* enables bus-mastering for device dev */
3053         pci_set_master(pdev);
3054
3055         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3056                                 driver_name, dev) != 0) {
3057                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3058                 retval = -EBUSY;
3059                 goto error;
3060         }
3061         dev->got_irq = 1;
3062 #endif
3063
3064         /* set stopped bit */
3065         dev->stopped = 1;
3066
3067         /* capabilities and endpoint number */
3068         dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3069         dev->dciversion = readw(&dev->cap_regs->dciversion);
3070         dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3071         VDBG(dev, "dev->lpm: %d\n", dev->lpm);
3072         VDBG(dev, "dev->dciversion: 0x%04x\n", dev->dciversion);
3073         VDBG(dev, "dccparams: 0x%08x\n", readl(&dev->cap_regs->dccparams));
3074         VDBG(dev, "dev->devcap: %d\n", dev->devcap);
3075         if (!dev->devcap) {
3076                 ERROR(dev, "can't support device mode\n");
3077                 retval = -ENODEV;
3078                 goto error;
3079         }
3080
3081         /* a pair of endpoints (out/in) for each address */
3082         dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3083         VDBG(dev, "dev->ep_max: %d\n", dev->ep_max);
3084
3085         /* allocate endpoints memory */
3086         dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3087                         GFP_KERNEL);
3088         if (!dev->ep) {
3089                 ERROR(dev, "allocate endpoints memory failed\n");
3090                 retval = -ENOMEM;
3091                 goto error;
3092         }
3093
3094         /* allocate device dQH memory */
3095         size = dev->ep_max * sizeof(struct langwell_dqh);
3096         VDBG(dev, "orig size = %d\n", size);
3097         if (size < DQH_ALIGNMENT)
3098                 size = DQH_ALIGNMENT;
3099         else if ((size % DQH_ALIGNMENT) != 0) {
3100                 size += DQH_ALIGNMENT + 1;
3101                 size &= ~(DQH_ALIGNMENT - 1);
3102         }
3103         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3104                                         &dev->ep_dqh_dma, GFP_KERNEL);
3105         if (!dev->ep_dqh) {
3106                 ERROR(dev, "allocate dQH memory failed\n");
3107                 retval = -ENOMEM;
3108                 goto error;
3109         }
3110         dev->ep_dqh_size = size;
3111         VDBG(dev, "ep_dqh_size = %d\n", dev->ep_dqh_size);
3112
3113         /* initialize ep0 status request structure */
3114         dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3115         if (!dev->status_req) {
3116                 ERROR(dev, "allocate status_req memory failed\n");
3117                 retval = -ENOMEM;
3118                 goto error;
3119         }
3120         INIT_LIST_HEAD(&dev->status_req->queue);
3121
3122         /* allocate a small amount of memory to get valid address */
3123         dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3124         dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3125
3126         dev->resume_state = USB_STATE_NOTATTACHED;
3127         dev->usb_state = USB_STATE_POWERED;
3128         dev->ep0_dir = USB_DIR_OUT;
3129         dev->remote_wakeup = 0; /* default to 0 on reset */
3130
3131 #ifndef OTG_TRANSCEIVER
3132         /* reset device controller */
3133         langwell_udc_reset(dev);
3134 #endif
3135
3136         /* initialize gadget structure */
3137         dev->gadget.ops = &langwell_ops;        /* usb_gadget_ops */
3138         dev->gadget.ep0 = &dev->ep[0].ep;       /* gadget ep0 */
3139         INIT_LIST_HEAD(&dev->gadget.ep_list);   /* ep_list */
3140         dev->gadget.speed = USB_SPEED_UNKNOWN;  /* speed */
3141         dev->gadget.is_dualspeed = 1;           /* support dual speed */
3142 #ifdef  OTG_TRANSCEIVER
3143         dev->gadget.is_otg = 1;                 /* support otg mode */
3144 #endif
3145
3146         /* the "gadget" abstracts/virtualizes the controller */
3147         dev_set_name(&dev->gadget.dev, "gadget");
3148         dev->gadget.dev.parent = &pdev->dev;
3149         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3150         dev->gadget.dev.release = gadget_release;
3151         dev->gadget.name = driver_name;         /* gadget name */
3152
3153         /* controller endpoints reinit */
3154         eps_reinit(dev);
3155
3156 #ifndef OTG_TRANSCEIVER
3157         /* reset ep0 dQH and endptctrl */
3158         ep0_reset(dev);
3159 #endif
3160
3161         /* create dTD dma_pool resource */
3162         dev->dtd_pool = dma_pool_create("langwell_dtd",
3163                         &dev->pdev->dev,
3164                         sizeof(struct langwell_dtd),
3165                         DTD_ALIGNMENT,
3166                         DMA_BOUNDARY);
3167
3168         if (!dev->dtd_pool) {
3169                 retval = -ENOMEM;
3170                 goto error;
3171         }
3172
3173         /* done */
3174         INFO(dev, "%s\n", driver_desc);
3175         INFO(dev, "irq %d, pci mem %p\n", pdev->irq, base);
3176         INFO(dev, "Driver version: " DRIVER_VERSION "\n");
3177         INFO(dev, "Support (max) %d endpoints\n", dev->ep_max);
3178         INFO(dev, "Device interface version: 0x%04x\n", dev->dciversion);
3179         INFO(dev, "Controller mode: %s\n", dev->devcap ? "Device" : "Host");
3180         INFO(dev, "Support USB LPM: %s\n", dev->lpm ? "Yes" : "No");
3181
3182         VDBG(dev, "After langwell_udc_probe(), print all registers:\n");
3183 #ifdef  VERBOSE
3184         print_all_registers(dev);
3185 #endif
3186
3187         the_controller = dev;
3188
3189         retval = device_register(&dev->gadget.dev);
3190         if (retval)
3191                 goto error;
3192
3193         retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3194         if (retval)
3195                 goto error;
3196
3197         VDBG(dev, "<--- %s()\n", __func__);
3198         return 0;
3199
3200 error:
3201         if (dev) {
3202                 DBG(dev, "<--- %s()\n", __func__);
3203                 langwell_udc_remove(pdev);
3204         }
3205
3206         return retval;
3207 }
3208
3209
3210 /* device controller suspend */
3211 static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3212 {
3213         struct langwell_udc     *dev = the_controller;
3214         u32                     devlc;
3215
3216         DBG(dev, "---> %s()\n", __func__);
3217
3218         /* disable interrupt and set controller to stop state */
3219         langwell_udc_stop(dev);
3220
3221         /* diable IRQ handler */
3222         if (dev->got_irq)
3223                 free_irq(pdev->irq, dev);
3224         dev->got_irq = 0;
3225
3226
3227         /* save PCI state */
3228         pci_save_state(pdev);
3229
3230         /* set device power state */
3231         pci_set_power_state(pdev, PCI_D3hot);
3232
3233         /* enter PHY low power suspend */
3234         devlc = readl(&dev->op_regs->devlc);
3235         VDBG(dev, "devlc = 0x%08x\n", devlc);
3236         devlc |= LPM_PHCD;
3237         writel(devlc, &dev->op_regs->devlc);
3238
3239         DBG(dev, "<--- %s()\n", __func__);
3240         return 0;
3241 }
3242
3243
3244 /* device controller resume */
3245 static int langwell_udc_resume(struct pci_dev *pdev)
3246 {
3247         struct langwell_udc     *dev = the_controller;
3248         u32                     devlc;
3249
3250         DBG(dev, "---> %s()\n", __func__);
3251
3252         /* exit PHY low power suspend */
3253         devlc = readl(&dev->op_regs->devlc);
3254         VDBG(dev, "devlc = 0x%08x\n", devlc);
3255         devlc &= ~LPM_PHCD;
3256         writel(devlc, &dev->op_regs->devlc);
3257
3258         /* set device D0 power state */
3259         pci_set_power_state(pdev, PCI_D0);
3260
3261         /* restore PCI state */
3262         pci_restore_state(pdev);
3263
3264         /* enable IRQ handler */
3265         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED, driver_name, dev)
3266                         != 0) {
3267                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3268                 return -1;
3269         }
3270         dev->got_irq = 1;
3271
3272         /* reset and start controller to run state */
3273         if (dev->stopped) {
3274                 /* reset device controller */
3275                 langwell_udc_reset(dev);
3276
3277                 /* reset ep0 dQH and endptctrl */
3278                 ep0_reset(dev);
3279
3280                 /* start device if gadget is loaded */
3281                 if (dev->driver)
3282                         langwell_udc_start(dev);
3283         }
3284
3285         /* reset USB status */
3286         dev->usb_state = USB_STATE_ATTACHED;
3287         dev->ep0_state = WAIT_FOR_SETUP;
3288         dev->ep0_dir = USB_DIR_OUT;
3289
3290         DBG(dev, "<--- %s()\n", __func__);
3291         return 0;
3292 }
3293
3294
3295 /* pci driver shutdown */
3296 static void langwell_udc_shutdown(struct pci_dev *pdev)
3297 {
3298         struct langwell_udc     *dev = the_controller;
3299         u32                     usbmode;
3300
3301         DBG(dev, "---> %s()\n", __func__);
3302
3303         /* reset controller mode to IDLE */
3304         usbmode = readl(&dev->op_regs->usbmode);
3305         DBG(dev, "usbmode = 0x%08x\n", usbmode);
3306         usbmode &= (~3 | MODE_IDLE);
3307         writel(usbmode, &dev->op_regs->usbmode);
3308
3309         DBG(dev, "<--- %s()\n", __func__);
3310 }
3311
3312 /*-------------------------------------------------------------------------*/
3313
3314 static const struct pci_device_id pci_ids[] = { {
3315         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3316         .class_mask =   ~0,
3317         .vendor =       0x8086,
3318         .device =       0x0811,
3319         .subvendor =    PCI_ANY_ID,
3320         .subdevice =    PCI_ANY_ID,
3321 }, { /* end: all zeroes */ }
3322 };
3323
3324
3325 MODULE_DEVICE_TABLE(pci, pci_ids);
3326
3327
3328 static struct pci_driver langwell_pci_driver = {
3329         .name =         (char *) driver_name,
3330         .id_table =     pci_ids,
3331
3332         .probe =        langwell_udc_probe,
3333         .remove =       langwell_udc_remove,
3334
3335         /* device controller suspend/resume */
3336         .suspend =      langwell_udc_suspend,
3337         .resume =       langwell_udc_resume,
3338
3339         .shutdown =     langwell_udc_shutdown,
3340 };
3341
3342
3343 MODULE_DESCRIPTION(DRIVER_DESC);
3344 MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3345 MODULE_VERSION(DRIVER_VERSION);
3346 MODULE_LICENSE("GPL");
3347
3348
3349 static int __init init(void)
3350 {
3351 #ifdef  OTG_TRANSCEIVER
3352         return langwell_register_peripheral(&langwell_pci_driver);
3353 #else
3354         return pci_register_driver(&langwell_pci_driver);
3355 #endif
3356 }
3357 module_init(init);
3358
3359
3360 static void __exit cleanup(void)
3361 {
3362 #ifdef  OTG_TRANSCEIVER
3363         return langwell_unregister_peripheral(&langwell_pci_driver);
3364 #else
3365         pci_unregister_driver(&langwell_pci_driver);
3366 #endif
3367 }
3368 module_exit(cleanup);
3369