2 * NetChip 2280 high/full speed USB device controller.
3 * Unlike many such controllers, this one talks PCI.
7 * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
8 * Copyright (C) 2003 David Brownell
9 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
17 #include <linux/usb/net2280.h>
18 #include <linux/usb/usb338x.h>
20 /*-------------------------------------------------------------------------*/
24 /* indexed registers [11.10] are accessed indirectly
25 * caller must own the device lock.
28 static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
30 writel(index, ®s->idxaddr);
31 /* NOTE: synchs device/cpu memory views */
32 return readl(®s->idxdata);
36 set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
38 writel(index, ®s->idxaddr);
39 writel(value, ®s->idxdata);
40 /* posted, may not be visible yet */
43 #endif /* __KERNEL__ */
45 #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
47 #define PLX_LEGACY BIT(0)
48 #define PLX_2280 BIT(1)
49 #define PLX_SUPERSPEED BIT(2)
52 #define RETRY_COUNTER 16
53 #define FORCE_PCI_SERR 11
54 #define FORCE_PCI_INTERRUPT 10
55 #define FORCE_USB_INTERRUPT 9
56 #define FORCE_CPU_INTERRUPT 8
57 #define ILLEGAL_BYTE_ENABLES 5
59 #define FORCE_RECEIVE_ERROR 2
60 #define FORCE_TRANSMIT_CRC_ERROR 0
61 #define REG_FRAME 0x02 /* from last sof */
62 #define REG_CHIPREV 0x03 /* in bcd */
63 #define REG_HS_NAK_RATE 0x0a /* NAK per N uframes */
65 #define CHIPREV_1 0x0100
66 #define CHIPREV_1A 0x0110
69 #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS 200
70 #define DEFECT_7374_PROCESSOR_WAIT_TIME 10
72 /* ep0 max packet size */
73 #define EP0_SS_MAX_PACKET_SIZE 0x200
74 #define EP0_HS_MAX_PACKET_SIZE 0x40
77 /*-------------------------------------------------------------------------*/
79 /* [8.3] for scatter/gather i/o
80 * use struct net2280_dma_regs bitfields
84 __le32 dmaaddr; /* the buffer */
85 __le32 dmadesc; /* next dma descriptor */
89 /*-------------------------------------------------------------------------*/
91 /* DRIVER DATA STRUCTURES and UTILITIES */
95 struct net2280_ep_regs __iomem *cfg;
96 struct net2280_ep_regs __iomem *regs;
97 struct net2280_dma_regs __iomem *dma;
98 struct net2280_dma *dummy;
99 struct usb338x_fifo_regs __iomem *fiforegs;
100 dma_addr_t td_dma; /* of dummy */
104 /* analogous to a host-side qh */
105 struct list_head queue;
106 const struct usb_endpoint_descriptor *desc;
109 in_fifo_validate : 1,
118 static inline void allow_status(struct net2280_ep *ep)
121 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
122 BIT(CLEAR_NAK_OUT_PACKETS) |
123 BIT(CLEAR_NAK_OUT_PACKETS_MODE),
128 static inline void allow_status_338x(struct net2280_ep *ep)
131 * Control Status Phase Handshake was set by the chip when the setup
132 * packet arrived. While set, the chip automatically NAKs the host's
133 * Status Phase tokens.
135 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
139 /* TD 9.9 Halt Endpoint test. TD 9.22 set feature test. */
143 struct net2280_request {
144 struct usb_request req;
145 struct net2280_dma *td;
147 struct list_head queue;
153 /* each pci device provides one gadget, several endpoints */
154 struct usb_gadget gadget;
156 struct net2280_ep ep[9];
157 struct usb_gadget_driver *driver;
158 unsigned enabled : 1,
172 kernel_ulong_t quirks;
175 /* pci state used to access those endpoints */
176 struct pci_dev *pdev;
177 struct net2280_regs __iomem *regs;
178 struct net2280_usb_regs __iomem *usb;
179 struct usb338x_usb_ext_regs __iomem *usb_ext;
180 struct net2280_pci_regs __iomem *pci;
181 struct net2280_dma_regs __iomem *dma;
182 struct net2280_dep_regs __iomem *dep;
183 struct net2280_ep_regs __iomem *epregs;
184 struct usb338x_fifo_regs __iomem *fiforegs;
185 struct usb338x_ll_regs __iomem *llregs;
186 struct usb338x_ll_lfps_regs __iomem *ll_lfps_regs;
187 struct usb338x_ll_tsn_regs __iomem *ll_tsn_regs;
188 struct usb338x_ll_chi_regs __iomem *ll_chicken_reg;
189 struct usb338x_pl_regs __iomem *plregs;
191 struct pci_pool *requests;
195 static inline void set_halt(struct net2280_ep *ep)
197 /* ep0 and bulk/intr endpoints */
198 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
199 /* set NAK_OUT for erratum 0114 */
200 ((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
201 BIT(SET_ENDPOINT_HALT),
205 static inline void clear_halt(struct net2280_ep *ep)
207 /* ep0 and bulk/intr endpoints */
208 writel(BIT(CLEAR_ENDPOINT_HALT) |
209 BIT(CLEAR_ENDPOINT_TOGGLE) |
211 * unless the gadget driver left a short packet in the
212 * fifo, this reverses the erratum 0114 workaround.
214 ((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
219 * FSM value for Defect 7374 (U1U2 Test) is managed in
220 * chip's SCRATCH register:
222 #define DEFECT7374_FSM_FIELD 28
224 /* Waiting for Control Read:
225 * - A transition to this state indicates a fresh USB connection,
226 * before the first Setup Packet. The connection speed is not
227 * known. Firmware is waiting for the first Control Read.
228 * - Starting state: This state can be thought of as the FSM's typical
230 * - Tip: Upon the first SS Control Read the FSM never
231 * returns to this state.
233 #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
235 /* Non-SS Control Read:
236 * - A transition to this state indicates detection of the first HS
237 * or FS Control Read.
238 * - Tip: Upon the first SS Control Read the FSM never
239 * returns to this state.
241 #define DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
244 * - A transition to this state indicates detection of the
245 * first SS Control Read.
246 * - This state indicates workaround completion. Workarounds no longer
247 * need to be applied (as long as the chip remains powered up).
248 * - Tip: Once in this state the FSM state does not change (until
249 * the chip's power is lost and restored).
250 * - This can be thought of as the final state of the FSM;
251 * the FSM 'locks-up' in this state until the chip loses power.
253 #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
257 static inline void net2280_led_init(struct net2280 *dev)
259 /* LED3 (green) is on during USB activity. note erratum 0113. */
260 writel(BIT(GPIO3_LED_SELECT) |
261 BIT(GPIO3_OUTPUT_ENABLE) |
262 BIT(GPIO2_OUTPUT_ENABLE) |
263 BIT(GPIO1_OUTPUT_ENABLE) |
264 BIT(GPIO0_OUTPUT_ENABLE),
265 &dev->regs->gpioctl);
268 /* indicate speed with bi-color LED 0/1 */
270 void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
272 u32 val = readl(&dev->regs->gpioctl);
274 case USB_SPEED_SUPER: /* green + red */
275 val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
277 case USB_SPEED_HIGH: /* green */
278 val &= ~BIT(GPIO0_DATA);
279 val |= BIT(GPIO1_DATA);
281 case USB_SPEED_FULL: /* red */
282 val &= ~BIT(GPIO1_DATA);
283 val |= BIT(GPIO0_DATA);
285 default: /* (off/black) */
286 val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
289 writel(val, &dev->regs->gpioctl);
292 /* indicate power with LED 2 */
293 static inline void net2280_led_active(struct net2280 *dev, int is_active)
295 u32 val = readl(&dev->regs->gpioctl);
297 /* FIXME this LED never seems to turn on.*/
302 writel(val, &dev->regs->gpioctl);
305 static inline void net2280_led_shutdown(struct net2280 *dev)
307 /* turn off all four GPIO*_DATA bits */
308 writel(readl(&dev->regs->gpioctl) & ~0x0f,
309 &dev->regs->gpioctl);
314 #define net2280_led_init(dev) do { } while (0)
315 #define net2280_led_speed(dev, speed) do { } while (0)
316 #define net2280_led_shutdown(dev) do { } while (0)
320 /*-------------------------------------------------------------------------*/
322 #define ep_dbg(ndev, fmt, args...) \
323 dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
325 #define ep_vdbg(ndev, fmt, args...) \
326 dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
328 #define ep_info(ndev, fmt, args...) \
329 dev_info((&((ndev)->pdev->dev)), fmt, ##args)
331 #define ep_warn(ndev, fmt, args...) \
332 dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
334 #define ep_err(ndev, fmt, args...) \
335 dev_err((&((ndev)->pdev->dev)), fmt, ##args)
337 /*-------------------------------------------------------------------------*/
339 static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
341 if (ep->dev->pdev->vendor == 0x17cc)
342 writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
344 u32 tmp = readl(&ep->cfg->ep_cfg) &
345 (~(0x07 << EP_FIFO_BYTE_COUNT));
346 writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
350 static inline void start_out_naking(struct net2280_ep *ep)
352 /* NOTE: hardware races lurk here, and PING protocol issues */
353 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
354 /* synch with device */
355 readl(&ep->regs->ep_rsp);
358 static inline void stop_out_naking(struct net2280_ep *ep)
362 tmp = readl(&ep->regs->ep_stat);
363 if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
364 writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
368 static inline void set_max_speed(struct net2280_ep *ep, u32 max)
371 static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
372 0x50, 0x20, 0x70, 0x40, 0x90 };
374 if (ep->dev->enhanced_mode)
375 reg = ep_enhanced[ep->num];
377 reg = (ep->num + 1) * 0x10;
378 if (ep->dev->gadget.speed != USB_SPEED_HIGH)
382 set_idx_reg(ep->dev->regs, reg, max);
385 #endif /* __KERNEL__ */