2 * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 * Copyright (C) 2004-2005 David Brownell
7 * OMAP2 & DMA support by Kyungmin Park <kyungmin.park@samsung.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/ioport.h>
21 #include <linux/types.h>
22 #include <linux/errno.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/timer.h>
26 #include <linux/list.h>
27 #include <linux/interrupt.h>
28 #include <linux/proc_fs.h>
30 #include <linux/moduleparam.h>
31 #include <linux/platform_device.h>
32 #include <linux/usb/ch9.h>
33 #include <linux/usb/gadget.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/clk.h>
37 #include <linux/err.h>
38 #include <linux/prefetch.h>
41 #include <asm/byteorder.h>
43 #include <asm/unaligned.h>
44 #include <asm/mach-types.h>
46 #include <linux/omap-dma.h>
54 /* bulk DMA seems to be behaving for both IN and OUT */
60 #define DRIVER_DESC "OMAP UDC driver"
61 #define DRIVER_VERSION "4 October 2004"
63 #define OMAP_DMA_USB_W2FC_TX0 29
64 #define OMAP_DMA_USB_W2FC_RX0 26
67 * The OMAP UDC needs _very_ early endpoint setup: before enabling the
68 * D+ pullup to allow enumeration. That's too early for the gadget
69 * framework to use from usb_endpoint_enable(), which happens after
70 * enumeration as part of activating an interface. (But if we add an
71 * optional new "UDC not yet running" state to the gadget driver model,
72 * even just during driver binding, the endpoint autoconfig logic is the
73 * natural spot to manufacture new endpoints.)
75 * So instead of using endpoint enable calls to control the hardware setup,
76 * this driver defines a "fifo mode" parameter. It's used during driver
77 * initialization to choose among a set of pre-defined endpoint configs.
78 * See omap_udc_setup() for available modes, or to add others. That code
79 * lives in an init section, so use this driver as a module if you need
80 * to change the fifo mode after the kernel boots.
82 * Gadget drivers normally ignore endpoints they don't care about, and
83 * won't include them in configuration descriptors. That means only
84 * misbehaving hosts would even notice they exist.
87 static unsigned fifo_mode = 3;
89 static unsigned fifo_mode;
92 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
93 * boot parameter "omap_udc:fifo_mode=42"
95 module_param(fifo_mode, uint, 0);
96 MODULE_PARM_DESC(fifo_mode, "endpoint configuration");
99 static bool use_dma = 1;
101 /* "modprobe omap_udc use_dma=y", or else as a kernel
102 * boot parameter "omap_udc:use_dma=y"
104 module_param(use_dma, bool, 0);
105 MODULE_PARM_DESC(use_dma, "enable/disable DMA");
108 /* save a bit of code */
110 #endif /* !USE_DMA */
113 static const char driver_name[] = "omap_udc";
114 static const char driver_desc[] = DRIVER_DESC;
116 /*-------------------------------------------------------------------------*/
118 /* there's a notion of "current endpoint" for modifying endpoint
119 * state, and PIO access to its FIFO.
122 static void use_ep(struct omap_ep *ep, u16 select)
124 u16 num = ep->bEndpointAddress & 0x0f;
126 if (ep->bEndpointAddress & USB_DIR_IN)
128 omap_writew(num | select, UDC_EP_NUM);
129 /* when select, MUST deselect later !! */
132 static inline void deselect_ep(void)
136 w = omap_readw(UDC_EP_NUM);
138 omap_writew(w, UDC_EP_NUM);
139 /* 6 wait states before TX will happen */
142 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
144 /*-------------------------------------------------------------------------*/
146 static int omap_ep_enable(struct usb_ep *_ep,
147 const struct usb_endpoint_descriptor *desc)
149 struct omap_ep *ep = container_of(_ep, struct omap_ep, ep);
150 struct omap_udc *udc;
154 /* catch various bogus parameters */
156 || desc->bDescriptorType != USB_DT_ENDPOINT
157 || ep->bEndpointAddress != desc->bEndpointAddress
158 || ep->maxpacket < usb_endpoint_maxp(desc)) {
159 DBG("%s, bad ep or descriptor\n", __func__);
162 maxp = usb_endpoint_maxp(desc);
163 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
164 && maxp != ep->maxpacket)
165 || usb_endpoint_maxp(desc) > ep->maxpacket
166 || !desc->wMaxPacketSize) {
167 DBG("%s, bad %s maxpacket\n", __func__, _ep->name);
172 if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
173 && desc->bInterval != 1)) {
174 /* hardware wants period = 1; USB allows 2^(Interval-1) */
175 DBG("%s, unsupported ISO period %dms\n", _ep->name,
176 1 << (desc->bInterval - 1));
180 if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
181 DBG("%s, ISO nyet\n", _ep->name);
186 /* xfer types must match, except that interrupt ~= bulk */
187 if (ep->bmAttributes != desc->bmAttributes
188 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
189 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
190 DBG("%s, %s type mismatch\n", __func__, _ep->name);
195 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
196 DBG("%s, bogus device state\n", __func__);
200 spin_lock_irqsave(&udc->lock, flags);
205 ep->ep.maxpacket = maxp;
207 /* set endpoint to initial state */
211 use_ep(ep, UDC_EP_SEL);
212 omap_writew(udc->clr_halt, UDC_CTRL);
216 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
217 list_add(&ep->iso, &udc->iso);
219 /* maybe assign a DMA channel to this endpoint */
220 if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
221 /* FIXME ISO can dma, but prefers first channel */
222 dma_channel_claim(ep, 0);
224 /* PIO OUT may RX packets */
225 if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
227 && !(ep->bEndpointAddress & USB_DIR_IN)) {
228 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
229 ep->ackwait = 1 + ep->double_buf;
232 spin_unlock_irqrestore(&udc->lock, flags);
233 VDBG("%s enabled\n", _ep->name);
237 static void nuke(struct omap_ep *, int status);
239 static int omap_ep_disable(struct usb_ep *_ep)
241 struct omap_ep *ep = container_of(_ep, struct omap_ep, ep);
244 if (!_ep || !ep->ep.desc) {
245 DBG("%s, %s not enabled\n", __func__,
246 _ep ? ep->ep.name : NULL);
250 spin_lock_irqsave(&ep->udc->lock, flags);
252 nuke(ep, -ESHUTDOWN);
253 ep->ep.maxpacket = ep->maxpacket;
255 omap_writew(UDC_SET_HALT, UDC_CTRL);
256 list_del_init(&ep->iso);
257 del_timer(&ep->timer);
259 spin_unlock_irqrestore(&ep->udc->lock, flags);
261 VDBG("%s disabled\n", _ep->name);
265 /*-------------------------------------------------------------------------*/
267 static struct usb_request *
268 omap_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
270 struct omap_req *req;
272 req = kzalloc(sizeof(*req), gfp_flags);
276 INIT_LIST_HEAD(&req->queue);
282 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
284 struct omap_req *req = container_of(_req, struct omap_req, req);
289 /*-------------------------------------------------------------------------*/
292 done(struct omap_ep *ep, struct omap_req *req, int status)
294 struct omap_udc *udc = ep->udc;
295 unsigned stopped = ep->stopped;
297 list_del_init(&req->queue);
299 if (req->req.status == -EINPROGRESS)
300 req->req.status = status;
302 status = req->req.status;
304 if (use_dma && ep->has_dma)
305 usb_gadget_unmap_request(&udc->gadget, &req->req,
306 (ep->bEndpointAddress & USB_DIR_IN));
309 if (status && status != -ESHUTDOWN)
311 VDBG("complete %s req %p stat %d len %u/%u\n",
312 ep->ep.name, &req->req, status,
313 req->req.actual, req->req.length);
315 /* don't modify queue heads during completion callback */
317 spin_unlock(&ep->udc->lock);
318 usb_gadget_giveback_request(&ep->ep, &req->req);
319 spin_lock(&ep->udc->lock);
320 ep->stopped = stopped;
323 /*-------------------------------------------------------------------------*/
325 #define UDC_FIFO_FULL (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
326 #define UDC_FIFO_UNWRITABLE (UDC_EP_HALTED | UDC_FIFO_FULL)
328 #define FIFO_EMPTY (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
329 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
332 write_packet(u8 *buf, struct omap_req *req, unsigned max)
337 len = min(req->req.length - req->req.actual, max);
338 req->req.actual += len;
341 if (likely((((int)buf) & 1) == 0)) {
344 omap_writew(*wp++, UDC_DATA);
350 omap_writeb(*buf++, UDC_DATA);
354 /* FIXME change r/w fifo calling convention */
357 /* return: 0 = still running, 1 = completed, negative = errno */
358 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
365 buf = req->req.buf + req->req.actual;
368 /* PIO-IN isn't double buffered except for iso */
369 ep_stat = omap_readw(UDC_STAT_FLG);
370 if (ep_stat & UDC_FIFO_UNWRITABLE)
373 count = ep->ep.maxpacket;
374 count = write_packet(buf, req, count);
375 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
378 /* last packet is often short (sometimes a zlp) */
379 if (count != ep->ep.maxpacket)
381 else if (req->req.length == req->req.actual
387 /* NOTE: requests complete when all IN data is in a
388 * FIFO (or sometimes later, if a zlp was needed).
389 * Use usb_ep_fifo_status() where needed.
397 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
402 len = min(req->req.length - req->req.actual, avail);
403 req->req.actual += len;
406 if (likely((((int)buf) & 1) == 0)) {
409 *wp++ = omap_readw(UDC_DATA);
415 *buf++ = omap_readb(UDC_DATA);
419 /* return: 0 = still running, 1 = queue empty, negative = errno */
420 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
423 unsigned count, avail;
426 buf = req->req.buf + req->req.actual;
430 u16 ep_stat = omap_readw(UDC_STAT_FLG);
433 if (ep_stat & FIFO_EMPTY) {
438 if (ep_stat & UDC_EP_HALTED)
441 if (ep_stat & UDC_FIFO_FULL)
442 avail = ep->ep.maxpacket;
444 avail = omap_readw(UDC_RXFSTAT);
445 ep->fnf = ep->double_buf;
447 count = read_packet(buf, req, avail);
449 /* partial packet reads may not be errors */
450 if (count < ep->ep.maxpacket) {
452 /* overflowed this request? flush extra data */
453 if (count != avail) {
454 req->req.status = -EOVERFLOW;
457 omap_readw(UDC_DATA);
459 } else if (req->req.length == req->req.actual)
464 if (!ep->bEndpointAddress)
473 /*-------------------------------------------------------------------------*/
475 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
479 /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
480 * the last transfer's bytecount by more than a FIFO's worth.
482 if (cpu_is_omap15xx())
485 end = omap_get_dma_src_pos(ep->lch);
486 if (end == ep->dma_counter)
489 end |= start & (0xffff << 16);
495 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
499 end = omap_get_dma_dst_pos(ep->lch);
500 if (end == ep->dma_counter)
503 end |= start & (0xffff << 16);
504 if (cpu_is_omap15xx())
512 /* Each USB transfer request using DMA maps to one or more DMA transfers.
513 * When DMA completion isn't request completion, the UDC continues with
514 * the next DMA transfer for that USB transfer.
517 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
520 unsigned length = req->req.length - req->req.actual;
521 const int sync_mode = cpu_is_omap15xx()
522 ? OMAP_DMA_SYNC_FRAME
523 : OMAP_DMA_SYNC_ELEMENT;
526 /* measure length in either bytes or packets */
527 if ((cpu_is_omap16xx() && length <= UDC_TXN_TSC)
528 || (cpu_is_omap15xx() && length < ep->maxpacket)) {
529 txdma_ctrl = UDC_TXN_EOT | length;
530 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
531 length, 1, sync_mode, dma_trigger, 0);
533 length = min(length / ep->maxpacket,
534 (unsigned) UDC_TXN_TSC + 1);
536 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
537 ep->ep.maxpacket >> 1, length, sync_mode,
539 length *= ep->maxpacket;
541 omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
542 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
545 omap_start_dma(ep->lch);
546 ep->dma_counter = omap_get_dma_src_pos(ep->lch);
547 w = omap_readw(UDC_DMA_IRQ_EN);
548 w |= UDC_TX_DONE_IE(ep->dma_channel);
549 omap_writew(w, UDC_DMA_IRQ_EN);
550 omap_writew(UDC_TXN_START | txdma_ctrl, UDC_TXDMA(ep->dma_channel));
551 req->dma_bytes = length;
554 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
559 req->req.actual += req->dma_bytes;
561 /* return if this request needs to send data or zlp */
562 if (req->req.actual < req->req.length)
565 && req->dma_bytes != 0
566 && (req->req.actual % ep->maxpacket) == 0)
569 req->req.actual += dma_src_len(ep, req->req.dma
573 omap_stop_dma(ep->lch);
574 w = omap_readw(UDC_DMA_IRQ_EN);
575 w &= ~UDC_TX_DONE_IE(ep->dma_channel);
576 omap_writew(w, UDC_DMA_IRQ_EN);
577 done(ep, req, status);
580 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
582 unsigned packets = req->req.length - req->req.actual;
586 /* set up this DMA transfer, enable the fifo, start */
587 packets /= ep->ep.maxpacket;
588 packets = min(packets, (unsigned)UDC_RXN_TC + 1);
589 req->dma_bytes = packets * ep->ep.maxpacket;
590 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
591 ep->ep.maxpacket >> 1, packets,
592 OMAP_DMA_SYNC_ELEMENT,
594 omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
595 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
597 ep->dma_counter = omap_get_dma_dst_pos(ep->lch);
599 omap_writew(UDC_RXN_STOP | (packets - 1), UDC_RXDMA(ep->dma_channel));
600 w = omap_readw(UDC_DMA_IRQ_EN);
601 w |= UDC_RX_EOT_IE(ep->dma_channel);
602 omap_writew(w, UDC_DMA_IRQ_EN);
603 omap_writew(ep->bEndpointAddress & 0xf, UDC_EP_NUM);
604 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
606 omap_start_dma(ep->lch);
610 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
615 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
616 count = dma_dest_len(ep, req->req.dma + req->req.actual);
617 count += req->req.actual;
620 if (count <= req->req.length)
621 req->req.actual = count;
623 if (count != req->dma_bytes || status)
624 omap_stop_dma(ep->lch);
626 /* if this wasn't short, request may need another transfer */
627 else if (req->req.actual < req->req.length)
631 w = omap_readw(UDC_DMA_IRQ_EN);
632 w &= ~UDC_RX_EOT_IE(ep->dma_channel);
633 omap_writew(w, UDC_DMA_IRQ_EN);
634 done(ep, req, status);
637 static void dma_irq(struct omap_udc *udc, u16 irq_src)
639 u16 dman_stat = omap_readw(UDC_DMAN_STAT);
641 struct omap_req *req;
643 /* IN dma: tx to host */
644 if (irq_src & UDC_TXN_DONE) {
645 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
647 /* can see TXN_DONE after dma abort */
648 if (!list_empty(&ep->queue)) {
649 req = container_of(ep->queue.next,
650 struct omap_req, queue);
651 finish_in_dma(ep, req, 0);
653 omap_writew(UDC_TXN_DONE, UDC_IRQ_SRC);
655 if (!list_empty(&ep->queue)) {
656 req = container_of(ep->queue.next,
657 struct omap_req, queue);
658 next_in_dma(ep, req);
662 /* OUT dma: rx from host */
663 if (irq_src & UDC_RXN_EOT) {
664 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
666 /* can see RXN_EOT after dma abort */
667 if (!list_empty(&ep->queue)) {
668 req = container_of(ep->queue.next,
669 struct omap_req, queue);
670 finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
672 omap_writew(UDC_RXN_EOT, UDC_IRQ_SRC);
674 if (!list_empty(&ep->queue)) {
675 req = container_of(ep->queue.next,
676 struct omap_req, queue);
677 next_out_dma(ep, req);
681 if (irq_src & UDC_RXN_CNT) {
682 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
684 /* omap15xx does this unasked... */
685 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
686 omap_writew(UDC_RXN_CNT, UDC_IRQ_SRC);
690 static void dma_error(int lch, u16 ch_status, void *data)
692 struct omap_ep *ep = data;
694 /* if ch_status & OMAP_DMA_DROP_IRQ ... */
695 /* if ch_status & OMAP1_DMA_TOUT_IRQ ... */
696 ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
698 /* complete current transfer ... */
701 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
704 int status, restart, is_in;
707 is_in = ep->bEndpointAddress & USB_DIR_IN;
709 reg = omap_readw(UDC_TXDMA_CFG);
711 reg = omap_readw(UDC_RXDMA_CFG);
712 reg |= UDC_DMA_REQ; /* "pulse" activated */
716 if (channel == 0 || channel > 3) {
717 if ((reg & 0x0f00) == 0)
719 else if ((reg & 0x00f0) == 0)
721 else if ((reg & 0x000f) == 0) /* preferred for ISO */
728 reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
729 ep->dma_channel = channel;
732 dma_channel = OMAP_DMA_USB_W2FC_TX0 - 1 + channel;
733 status = omap_request_dma(dma_channel,
734 ep->ep.name, dma_error, ep, &ep->lch);
736 omap_writew(reg, UDC_TXDMA_CFG);
738 omap_set_dma_src_burst_mode(ep->lch,
739 OMAP_DMA_DATA_BURST_4);
740 omap_set_dma_src_data_pack(ep->lch, 1);
742 omap_set_dma_dest_params(ep->lch,
744 OMAP_DMA_AMODE_CONSTANT,
749 dma_channel = OMAP_DMA_USB_W2FC_RX0 - 1 + channel;
750 status = omap_request_dma(dma_channel,
751 ep->ep.name, dma_error, ep, &ep->lch);
753 omap_writew(reg, UDC_RXDMA_CFG);
755 omap_set_dma_src_params(ep->lch,
757 OMAP_DMA_AMODE_CONSTANT,
761 omap_set_dma_dest_burst_mode(ep->lch,
762 OMAP_DMA_DATA_BURST_4);
763 omap_set_dma_dest_data_pack(ep->lch, 1);
770 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
772 /* channel type P: hw synch (fifo) */
773 if (!cpu_is_omap15xx())
774 omap_set_dma_channel_mode(ep->lch, OMAP_DMA_LCH_P);
778 /* restart any queue, even if the claim failed */
779 restart = !ep->stopped && !list_empty(&ep->queue);
782 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
783 restart ? " (restart)" : "");
785 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
787 ep->dma_channel - 1, ep->lch,
788 restart ? " (restart)" : "");
791 struct omap_req *req;
792 req = container_of(ep->queue.next, struct omap_req, queue);
794 (is_in ? next_in_dma : next_out_dma)(ep, req);
796 use_ep(ep, UDC_EP_SEL);
797 (is_in ? write_fifo : read_fifo)(ep, req);
800 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
801 ep->ackwait = 1 + ep->double_buf;
803 /* IN: 6 wait states before it'll tx */
808 static void dma_channel_release(struct omap_ep *ep)
810 int shift = 4 * (ep->dma_channel - 1);
811 u16 mask = 0x0f << shift;
812 struct omap_req *req;
815 /* abort any active usb transfer request */
816 if (!list_empty(&ep->queue))
817 req = container_of(ep->queue.next, struct omap_req, queue);
821 active = omap_get_dma_active_status(ep->lch);
823 DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
824 active ? "active" : "idle",
825 (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
826 ep->dma_channel - 1, req);
828 /* NOTE: re-setting RX_REQ/TX_REQ because of a chip bug (before
829 * OMAP 1710 ES2.0) where reading the DMA_CFG can clear them.
832 /* wait till current packet DMA finishes, and fifo empties */
833 if (ep->bEndpointAddress & USB_DIR_IN) {
834 omap_writew((omap_readw(UDC_TXDMA_CFG) & ~mask) | UDC_DMA_REQ,
838 finish_in_dma(ep, req, -ECONNRESET);
840 /* clear FIFO; hosts probably won't empty it */
841 use_ep(ep, UDC_EP_SEL);
842 omap_writew(UDC_CLR_EP, UDC_CTRL);
845 while (omap_readw(UDC_TXDMA_CFG) & mask)
848 omap_writew((omap_readw(UDC_RXDMA_CFG) & ~mask) | UDC_DMA_REQ,
851 /* dma empties the fifo */
852 while (omap_readw(UDC_RXDMA_CFG) & mask)
855 finish_out_dma(ep, req, -ECONNRESET, 0);
857 omap_free_dma(ep->lch);
860 /* has_dma still set, till endpoint is fully quiesced */
864 /*-------------------------------------------------------------------------*/
867 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
869 struct omap_ep *ep = container_of(_ep, struct omap_ep, ep);
870 struct omap_req *req = container_of(_req, struct omap_req, req);
871 struct omap_udc *udc;
875 /* catch various bogus parameters */
876 if (!_req || !req->req.complete || !req->req.buf
877 || !list_empty(&req->queue)) {
878 DBG("%s, bad params\n", __func__);
881 if (!_ep || (!ep->ep.desc && ep->bEndpointAddress)) {
882 DBG("%s, bad ep\n", __func__);
885 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
886 if (req->req.length > ep->ep.maxpacket)
891 /* this isn't bogus, but OMAP DMA isn't the only hardware to
892 * have a hard time with partial packet reads... reject it.
896 && ep->bEndpointAddress != 0
897 && (ep->bEndpointAddress & USB_DIR_IN) == 0
898 && (req->req.length % ep->ep.maxpacket) != 0) {
899 DBG("%s, no partial packet OUT reads\n", __func__);
904 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
907 if (use_dma && ep->has_dma)
908 usb_gadget_map_request(&udc->gadget, &req->req,
909 (ep->bEndpointAddress & USB_DIR_IN));
911 VDBG("%s queue req %p, len %d buf %p\n",
912 ep->ep.name, _req, _req->length, _req->buf);
914 spin_lock_irqsave(&udc->lock, flags);
916 req->req.status = -EINPROGRESS;
919 /* maybe kickstart non-iso i/o queues */
923 w = omap_readw(UDC_IRQ_EN);
925 omap_writew(w, UDC_IRQ_EN);
926 } else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
929 if (ep->bEndpointAddress == 0) {
930 if (!udc->ep0_pending || !list_empty(&ep->queue)) {
931 spin_unlock_irqrestore(&udc->lock, flags);
935 /* empty DATA stage? */
937 if (!req->req.length) {
939 /* chip became CONFIGURED or ADDRESSED
940 * earlier; drivers may already have queued
941 * requests to non-control endpoints
943 if (udc->ep0_set_config) {
944 u16 irq_en = omap_readw(UDC_IRQ_EN);
946 irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
947 if (!udc->ep0_reset_config)
948 irq_en |= UDC_EPN_RX_IE
950 omap_writew(irq_en, UDC_IRQ_EN);
953 /* STATUS for zero length DATA stages is
954 * always an IN ... even for IN transfers,
955 * a weird case which seem to stall OMAP.
957 omap_writew(UDC_EP_SEL | UDC_EP_DIR,
959 omap_writew(UDC_CLR_EP, UDC_CTRL);
960 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
961 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
964 udc->ep0_pending = 0;
968 /* non-empty DATA stage */
970 omap_writew(UDC_EP_SEL | UDC_EP_DIR,
975 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
978 is_in = ep->bEndpointAddress & USB_DIR_IN;
980 use_ep(ep, UDC_EP_SEL);
981 /* if ISO: SOF IRQs must be enabled/disabled! */
985 (is_in ? next_in_dma : next_out_dma)(ep, req);
987 if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
991 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
992 ep->ackwait = 1 + ep->double_buf;
994 /* IN: 6 wait states before it'll tx */
999 /* irq handler advances the queue */
1001 list_add_tail(&req->queue, &ep->queue);
1002 spin_unlock_irqrestore(&udc->lock, flags);
1007 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1009 struct omap_ep *ep = container_of(_ep, struct omap_ep, ep);
1010 struct omap_req *req;
1011 unsigned long flags;
1016 spin_lock_irqsave(&ep->udc->lock, flags);
1018 /* make sure it's actually queued on this endpoint */
1019 list_for_each_entry(req, &ep->queue, queue) {
1020 if (&req->req == _req)
1023 if (&req->req != _req) {
1024 spin_unlock_irqrestore(&ep->udc->lock, flags);
1028 if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1029 int channel = ep->dma_channel;
1031 /* releasing the channel cancels the request,
1032 * reclaiming the channel restarts the queue
1034 dma_channel_release(ep);
1035 dma_channel_claim(ep, channel);
1037 done(ep, req, -ECONNRESET);
1038 spin_unlock_irqrestore(&ep->udc->lock, flags);
1042 /*-------------------------------------------------------------------------*/
1044 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1046 struct omap_ep *ep = container_of(_ep, struct omap_ep, ep);
1047 unsigned long flags;
1048 int status = -EOPNOTSUPP;
1050 spin_lock_irqsave(&ep->udc->lock, flags);
1052 /* just use protocol stalls for ep0; real halts are annoying */
1053 if (ep->bEndpointAddress == 0) {
1054 if (!ep->udc->ep0_pending)
1057 if (ep->udc->ep0_set_config) {
1058 WARNING("error changing config?\n");
1059 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1061 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1062 ep->udc->ep0_pending = 0;
1067 /* otherwise, all active non-ISO endpoints can halt */
1068 } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->ep.desc) {
1070 /* IN endpoints must already be idle */
1071 if ((ep->bEndpointAddress & USB_DIR_IN)
1072 && !list_empty(&ep->queue)) {
1080 if (use_dma && ep->dma_channel
1081 && !list_empty(&ep->queue)) {
1082 channel = ep->dma_channel;
1083 dma_channel_release(ep);
1087 use_ep(ep, UDC_EP_SEL);
1088 if (omap_readw(UDC_STAT_FLG) & UDC_NON_ISO_FIFO_EMPTY) {
1089 omap_writew(UDC_SET_HALT, UDC_CTRL);
1096 dma_channel_claim(ep, channel);
1099 omap_writew(ep->udc->clr_halt, UDC_CTRL);
1101 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1102 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1103 ep->ackwait = 1 + ep->double_buf;
1108 VDBG("%s %s halt stat %d\n", ep->ep.name,
1109 value ? "set" : "clear", status);
1111 spin_unlock_irqrestore(&ep->udc->lock, flags);
1115 static struct usb_ep_ops omap_ep_ops = {
1116 .enable = omap_ep_enable,
1117 .disable = omap_ep_disable,
1119 .alloc_request = omap_alloc_request,
1120 .free_request = omap_free_request,
1122 .queue = omap_ep_queue,
1123 .dequeue = omap_ep_dequeue,
1125 .set_halt = omap_ep_set_halt,
1126 /* fifo_status ... report bytes in fifo */
1127 /* fifo_flush ... flush fifo */
1130 /*-------------------------------------------------------------------------*/
1132 static int omap_get_frame(struct usb_gadget *gadget)
1134 u16 sof = omap_readw(UDC_SOF);
1135 return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1138 static int omap_wakeup(struct usb_gadget *gadget)
1140 struct omap_udc *udc;
1141 unsigned long flags;
1142 int retval = -EHOSTUNREACH;
1144 udc = container_of(gadget, struct omap_udc, gadget);
1146 spin_lock_irqsave(&udc->lock, flags);
1147 if (udc->devstat & UDC_SUS) {
1148 /* NOTE: OTG spec erratum says that OTG devices may
1149 * issue wakeups without host enable.
1151 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1152 DBG("remote wakeup...\n");
1153 omap_writew(UDC_RMT_WKP, UDC_SYSCON2);
1157 /* NOTE: non-OTG systems may use SRP TOO... */
1158 } else if (!(udc->devstat & UDC_ATT)) {
1159 if (!IS_ERR_OR_NULL(udc->transceiver))
1160 retval = otg_start_srp(udc->transceiver->otg);
1162 spin_unlock_irqrestore(&udc->lock, flags);
1168 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1170 struct omap_udc *udc;
1171 unsigned long flags;
1174 gadget->is_selfpowered = (is_selfpowered != 0);
1175 udc = container_of(gadget, struct omap_udc, gadget);
1176 spin_lock_irqsave(&udc->lock, flags);
1177 syscon1 = omap_readw(UDC_SYSCON1);
1179 syscon1 |= UDC_SELF_PWR;
1181 syscon1 &= ~UDC_SELF_PWR;
1182 omap_writew(syscon1, UDC_SYSCON1);
1183 spin_unlock_irqrestore(&udc->lock, flags);
1188 static int can_pullup(struct omap_udc *udc)
1190 return udc->driver && udc->softconnect && udc->vbus_active;
1193 static void pullup_enable(struct omap_udc *udc)
1197 w = omap_readw(UDC_SYSCON1);
1199 omap_writew(w, UDC_SYSCON1);
1200 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) {
1203 l = omap_readl(OTG_CTRL);
1205 omap_writel(l, OTG_CTRL);
1207 omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN);
1210 static void pullup_disable(struct omap_udc *udc)
1214 if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) {
1217 l = omap_readl(OTG_CTRL);
1219 omap_writel(l, OTG_CTRL);
1221 omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN);
1222 w = omap_readw(UDC_SYSCON1);
1223 w &= ~UDC_PULLUP_EN;
1224 omap_writew(w, UDC_SYSCON1);
1227 static struct omap_udc *udc;
1229 static void omap_udc_enable_clock(int enable)
1231 if (udc == NULL || udc->dc_clk == NULL || udc->hhc_clk == NULL)
1235 clk_enable(udc->dc_clk);
1236 clk_enable(udc->hhc_clk);
1239 clk_disable(udc->hhc_clk);
1240 clk_disable(udc->dc_clk);
1245 * Called by whatever detects VBUS sessions: external transceiver
1246 * driver, or maybe GPIO0 VBUS IRQ. May request 48 MHz clock.
1248 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1250 struct omap_udc *udc;
1251 unsigned long flags;
1254 udc = container_of(gadget, struct omap_udc, gadget);
1255 spin_lock_irqsave(&udc->lock, flags);
1256 VDBG("VBUS %s\n", is_active ? "on" : "off");
1257 udc->vbus_active = (is_active != 0);
1258 if (cpu_is_omap15xx()) {
1259 /* "software" detect, ignored if !VBUS_MODE_1510 */
1260 l = omap_readl(FUNC_MUX_CTRL_0);
1262 l |= VBUS_CTRL_1510;
1264 l &= ~VBUS_CTRL_1510;
1265 omap_writel(l, FUNC_MUX_CTRL_0);
1267 if (udc->dc_clk != NULL && is_active) {
1268 if (!udc->clk_requested) {
1269 omap_udc_enable_clock(1);
1270 udc->clk_requested = 1;
1273 if (can_pullup(udc))
1276 pullup_disable(udc);
1277 if (udc->dc_clk != NULL && !is_active) {
1278 if (udc->clk_requested) {
1279 omap_udc_enable_clock(0);
1280 udc->clk_requested = 0;
1283 spin_unlock_irqrestore(&udc->lock, flags);
1287 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1289 struct omap_udc *udc;
1291 udc = container_of(gadget, struct omap_udc, gadget);
1292 if (!IS_ERR_OR_NULL(udc->transceiver))
1293 return usb_phy_set_power(udc->transceiver, mA);
1297 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1299 struct omap_udc *udc;
1300 unsigned long flags;
1302 udc = container_of(gadget, struct omap_udc, gadget);
1303 spin_lock_irqsave(&udc->lock, flags);
1304 udc->softconnect = (is_on != 0);
1305 if (can_pullup(udc))
1308 pullup_disable(udc);
1309 spin_unlock_irqrestore(&udc->lock, flags);
1313 static int omap_udc_start(struct usb_gadget *g,
1314 struct usb_gadget_driver *driver);
1315 static int omap_udc_stop(struct usb_gadget *g);
1317 static const struct usb_gadget_ops omap_gadget_ops = {
1318 .get_frame = omap_get_frame,
1319 .wakeup = omap_wakeup,
1320 .set_selfpowered = omap_set_selfpowered,
1321 .vbus_session = omap_vbus_session,
1322 .vbus_draw = omap_vbus_draw,
1323 .pullup = omap_pullup,
1324 .udc_start = omap_udc_start,
1325 .udc_stop = omap_udc_stop,
1328 /*-------------------------------------------------------------------------*/
1330 /* dequeue ALL requests; caller holds udc->lock */
1331 static void nuke(struct omap_ep *ep, int status)
1333 struct omap_req *req;
1337 if (use_dma && ep->dma_channel)
1338 dma_channel_release(ep);
1341 omap_writew(UDC_CLR_EP, UDC_CTRL);
1342 if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1343 omap_writew(UDC_SET_HALT, UDC_CTRL);
1345 while (!list_empty(&ep->queue)) {
1346 req = list_entry(ep->queue.next, struct omap_req, queue);
1347 done(ep, req, status);
1351 /* caller holds udc->lock */
1352 static void udc_quiesce(struct omap_udc *udc)
1356 udc->gadget.speed = USB_SPEED_UNKNOWN;
1357 nuke(&udc->ep[0], -ESHUTDOWN);
1358 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list)
1359 nuke(ep, -ESHUTDOWN);
1362 /*-------------------------------------------------------------------------*/
1364 static void update_otg(struct omap_udc *udc)
1368 if (!gadget_is_otg(&udc->gadget))
1371 if (omap_readl(OTG_CTRL) & OTG_ID)
1372 devstat = omap_readw(UDC_DEVSTAT);
1376 udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1377 udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1378 udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1380 /* Enable HNP early, avoiding races on suspend irq path.
1381 * ASSUMES OTG state machine B_BUS_REQ input is true.
1383 if (udc->gadget.b_hnp_enable) {
1386 l = omap_readl(OTG_CTRL);
1387 l |= OTG_B_HNPEN | OTG_B_BUSREQ;
1389 omap_writel(l, OTG_CTRL);
1393 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1395 struct omap_ep *ep0 = &udc->ep[0];
1396 struct omap_req *req = NULL;
1400 /* Clear any pending requests and then scrub any rx/tx state
1401 * before starting to handle the SETUP request.
1403 if (irq_src & UDC_SETUP) {
1404 u16 ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1408 omap_writew(ack, UDC_IRQ_SRC);
1409 irq_src = UDC_SETUP;
1413 /* IN/OUT packets mean we're in the DATA or STATUS stage.
1414 * This driver uses only uses protocol stalls (ep0 never halts),
1415 * and if we got this far the gadget driver already had a
1416 * chance to stall. Tries to be forgiving of host oddities.
1418 * NOTE: the last chance gadget drivers have to stall control
1419 * requests is during their request completion callback.
1421 if (!list_empty(&ep0->queue))
1422 req = container_of(ep0->queue.next, struct omap_req, queue);
1424 /* IN == TX to host */
1425 if (irq_src & UDC_EP0_TX) {
1428 omap_writew(UDC_EP0_TX, UDC_IRQ_SRC);
1429 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1430 stat = omap_readw(UDC_STAT_FLG);
1431 if (stat & UDC_ACK) {
1433 /* write next IN packet from response,
1434 * or set up the status stage.
1437 stat = write_fifo(ep0, req);
1438 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1439 if (!req && udc->ep0_pending) {
1440 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
1441 omap_writew(UDC_CLR_EP, UDC_CTRL);
1442 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1443 omap_writew(0, UDC_EP_NUM);
1444 udc->ep0_pending = 0;
1445 } /* else: 6 wait states before it'll tx */
1447 /* ack status stage of OUT transfer */
1448 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1453 } else if (stat & UDC_STALL) {
1454 omap_writew(UDC_CLR_HALT, UDC_CTRL);
1455 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1457 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1461 /* OUT == RX from host */
1462 if (irq_src & UDC_EP0_RX) {
1465 omap_writew(UDC_EP0_RX, UDC_IRQ_SRC);
1466 omap_writew(UDC_EP_SEL, UDC_EP_NUM);
1467 stat = omap_readw(UDC_STAT_FLG);
1468 if (stat & UDC_ACK) {
1471 /* read next OUT packet of request, maybe
1472 * reactiviting the fifo; stall on errors.
1474 stat = read_fifo(ep0, req);
1475 if (!req || stat < 0) {
1476 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1477 udc->ep0_pending = 0;
1479 } else if (stat == 0)
1480 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1481 omap_writew(0, UDC_EP_NUM);
1483 /* activate status stage */
1486 /* that may have STALLed ep0... */
1487 omap_writew(UDC_EP_SEL | UDC_EP_DIR,
1489 omap_writew(UDC_CLR_EP, UDC_CTRL);
1490 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1491 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1492 udc->ep0_pending = 0;
1495 /* ack status stage of IN transfer */
1496 omap_writew(0, UDC_EP_NUM);
1500 } else if (stat & UDC_STALL) {
1501 omap_writew(UDC_CLR_HALT, UDC_CTRL);
1502 omap_writew(0, UDC_EP_NUM);
1504 omap_writew(0, UDC_EP_NUM);
1508 /* SETUP starts all control transfers */
1509 if (irq_src & UDC_SETUP) {
1512 struct usb_ctrlrequest r;
1514 int status = -EINVAL;
1517 /* read the (latest) SETUP message */
1519 omap_writew(UDC_SETUP_SEL, UDC_EP_NUM);
1520 /* two bytes at a time */
1521 u.word[0] = omap_readw(UDC_DATA);
1522 u.word[1] = omap_readw(UDC_DATA);
1523 u.word[2] = omap_readw(UDC_DATA);
1524 u.word[3] = omap_readw(UDC_DATA);
1525 omap_writew(0, UDC_EP_NUM);
1526 } while (omap_readw(UDC_IRQ_SRC) & UDC_SETUP);
1528 #define w_value le16_to_cpu(u.r.wValue)
1529 #define w_index le16_to_cpu(u.r.wIndex)
1530 #define w_length le16_to_cpu(u.r.wLength)
1532 /* Delegate almost all control requests to the gadget driver,
1533 * except for a handful of ch9 status/feature requests that
1534 * hardware doesn't autodecode _and_ the gadget API hides.
1536 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1537 udc->ep0_set_config = 0;
1538 udc->ep0_pending = 1;
1541 switch (u.r.bRequest) {
1542 case USB_REQ_SET_CONFIGURATION:
1543 /* udc needs to know when ep != 0 is valid */
1544 if (u.r.bRequestType != USB_RECIP_DEVICE)
1548 udc->ep0_set_config = 1;
1549 udc->ep0_reset_config = (w_value == 0);
1550 VDBG("set config %d\n", w_value);
1552 /* update udc NOW since gadget driver may start
1553 * queueing requests immediately; clear config
1554 * later if it fails the request.
1556 if (udc->ep0_reset_config)
1557 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1559 omap_writew(UDC_DEV_CFG, UDC_SYSCON2);
1562 case USB_REQ_CLEAR_FEATURE:
1563 /* clear endpoint halt */
1564 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1566 if (w_value != USB_ENDPOINT_HALT
1569 ep = &udc->ep[w_index & 0xf];
1571 if (w_index & USB_DIR_IN)
1573 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1577 omap_writew(udc->clr_halt, UDC_CTRL);
1579 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1580 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1581 ep->ackwait = 1 + ep->double_buf;
1583 /* NOTE: assumes the host behaves sanely,
1584 * only clearing real halts. Else we may
1585 * need to kill pending transfers and then
1586 * restart the queue... very messy for DMA!
1589 VDBG("%s halt cleared by host\n", ep->name);
1590 goto ep0out_status_stage;
1591 case USB_REQ_SET_FEATURE:
1592 /* set endpoint halt */
1593 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1595 if (w_value != USB_ENDPOINT_HALT
1598 ep = &udc->ep[w_index & 0xf];
1599 if (w_index & USB_DIR_IN)
1601 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1602 || ep == ep0 || !ep->ep.desc)
1604 if (use_dma && ep->has_dma) {
1605 /* this has rude side-effects (aborts) and
1606 * can't really work if DMA-IN is active
1608 DBG("%s host set_halt, NYET\n", ep->name);
1612 /* can't halt if fifo isn't empty... */
1613 omap_writew(UDC_CLR_EP, UDC_CTRL);
1614 omap_writew(UDC_SET_HALT, UDC_CTRL);
1615 VDBG("%s halted by host\n", ep->name);
1616 ep0out_status_stage:
1618 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1619 omap_writew(UDC_CLR_EP, UDC_CTRL);
1620 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1621 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1622 udc->ep0_pending = 0;
1624 case USB_REQ_GET_STATUS:
1625 /* USB_ENDPOINT_HALT status? */
1626 if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
1629 /* ep0 never stalls */
1630 if (!(w_index & 0xf))
1633 /* only active endpoints count */
1634 ep = &udc->ep[w_index & 0xf];
1635 if (w_index & USB_DIR_IN)
1640 /* iso never stalls */
1641 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
1644 /* FIXME don't assume non-halted endpoints!! */
1645 ERR("%s status, can't report\n", ep->ep.name);
1649 /* return interface status. if we were pedantic,
1650 * we'd detect non-existent interfaces, and stall.
1652 if (u.r.bRequestType
1653 != (USB_DIR_IN|USB_RECIP_INTERFACE))
1657 /* return two zero bytes */
1658 omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM);
1659 omap_writew(0, UDC_DATA);
1660 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1661 omap_writew(UDC_EP_DIR, UDC_EP_NUM);
1663 VDBG("GET_STATUS, interface %d\n", w_index);
1664 /* next, status stage */
1668 /* activate the ep0out fifo right away */
1669 if (!udc->ep0_in && w_length) {
1670 omap_writew(0, UDC_EP_NUM);
1671 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1674 /* gadget drivers see class/vendor specific requests,
1675 * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1678 VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1679 u.r.bRequestType, u.r.bRequest,
1680 w_value, w_index, w_length);
1686 /* The gadget driver may return an error here,
1687 * causing an immediate protocol stall.
1689 * Else it must issue a response, either queueing a
1690 * response buffer for the DATA stage, or halting ep0
1691 * (causing a protocol stall, not a real halt). A
1692 * zero length buffer means no DATA stage.
1694 * It's fine to issue that response after the setup()
1695 * call returns, and this IRQ was handled.
1698 spin_unlock(&udc->lock);
1699 status = udc->driver->setup(&udc->gadget, &u.r);
1700 spin_lock(&udc->lock);
1706 VDBG("req %02x.%02x protocol STALL; stat %d\n",
1707 u.r.bRequestType, u.r.bRequest, status);
1708 if (udc->ep0_set_config) {
1709 if (udc->ep0_reset_config)
1710 WARNING("error resetting config?\n");
1712 omap_writew(UDC_CLR_CFG, UDC_SYSCON2);
1714 omap_writew(UDC_STALL_CMD, UDC_SYSCON2);
1715 udc->ep0_pending = 0;
1720 /*-------------------------------------------------------------------------*/
1722 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1724 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1726 u16 devstat, change;
1728 devstat = omap_readw(UDC_DEVSTAT);
1729 change = devstat ^ udc->devstat;
1730 udc->devstat = devstat;
1732 if (change & (UDC_USB_RESET|UDC_ATT)) {
1735 if (change & UDC_ATT) {
1736 /* driver for any external transceiver will
1737 * have called omap_vbus_session() already
1739 if (devstat & UDC_ATT) {
1740 udc->gadget.speed = USB_SPEED_FULL;
1742 if (IS_ERR_OR_NULL(udc->transceiver))
1744 /* if (driver->connect) call it */
1745 } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1746 udc->gadget.speed = USB_SPEED_UNKNOWN;
1747 if (IS_ERR_OR_NULL(udc->transceiver))
1748 pullup_disable(udc);
1749 DBG("disconnect, gadget %s\n",
1750 udc->driver->driver.name);
1751 if (udc->driver->disconnect) {
1752 spin_unlock(&udc->lock);
1753 udc->driver->disconnect(&udc->gadget);
1754 spin_lock(&udc->lock);
1760 if (change & UDC_USB_RESET) {
1761 if (devstat & UDC_USB_RESET) {
1764 udc->gadget.speed = USB_SPEED_FULL;
1765 INFO("USB reset done, gadget %s\n",
1766 udc->driver->driver.name);
1767 /* ep0 traffic is legal from now on */
1768 omap_writew(UDC_DS_CHG_IE | UDC_EP0_IE,
1771 change &= ~UDC_USB_RESET;
1774 if (change & UDC_SUS) {
1775 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1776 /* FIXME tell isp1301 to suspend/resume (?) */
1777 if (devstat & UDC_SUS) {
1780 /* HNP could be under way already */
1781 if (udc->gadget.speed == USB_SPEED_FULL
1782 && udc->driver->suspend) {
1783 spin_unlock(&udc->lock);
1784 udc->driver->suspend(&udc->gadget);
1785 spin_lock(&udc->lock);
1787 if (!IS_ERR_OR_NULL(udc->transceiver))
1788 usb_phy_set_suspend(
1789 udc->transceiver, 1);
1792 if (!IS_ERR_OR_NULL(udc->transceiver))
1793 usb_phy_set_suspend(
1794 udc->transceiver, 0);
1795 if (udc->gadget.speed == USB_SPEED_FULL
1796 && udc->driver->resume) {
1797 spin_unlock(&udc->lock);
1798 udc->driver->resume(&udc->gadget);
1799 spin_lock(&udc->lock);
1805 if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1807 change &= ~OTG_FLAGS;
1810 change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1812 VDBG("devstat %03x, ignore change %03x\n",
1815 omap_writew(UDC_DS_CHG, UDC_IRQ_SRC);
1818 static irqreturn_t omap_udc_irq(int irq, void *_udc)
1820 struct omap_udc *udc = _udc;
1822 irqreturn_t status = IRQ_NONE;
1823 unsigned long flags;
1825 spin_lock_irqsave(&udc->lock, flags);
1826 irq_src = omap_readw(UDC_IRQ_SRC);
1828 /* Device state change (usb ch9 stuff) */
1829 if (irq_src & UDC_DS_CHG) {
1830 devstate_irq(_udc, irq_src);
1831 status = IRQ_HANDLED;
1832 irq_src &= ~UDC_DS_CHG;
1835 /* EP0 control transfers */
1836 if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1837 ep0_irq(_udc, irq_src);
1838 status = IRQ_HANDLED;
1839 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1842 /* DMA transfer completion */
1843 if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1844 dma_irq(_udc, irq_src);
1845 status = IRQ_HANDLED;
1846 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1849 irq_src &= ~(UDC_IRQ_SOF | UDC_EPN_TX|UDC_EPN_RX);
1851 DBG("udc_irq, unhandled %03x\n", irq_src);
1852 spin_unlock_irqrestore(&udc->lock, flags);
1857 /* workaround for seemingly-lost IRQs for RX ACKs... */
1858 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1859 #define HALF_FULL(f) (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1861 static void pio_out_timer(unsigned long _ep)
1863 struct omap_ep *ep = (void *) _ep;
1864 unsigned long flags;
1867 spin_lock_irqsave(&ep->udc->lock, flags);
1868 if (!list_empty(&ep->queue) && ep->ackwait) {
1869 use_ep(ep, UDC_EP_SEL);
1870 stat_flg = omap_readw(UDC_STAT_FLG);
1872 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1873 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1874 struct omap_req *req;
1876 VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1877 req = container_of(ep->queue.next,
1878 struct omap_req, queue);
1879 (void) read_fifo(ep, req);
1880 omap_writew(ep->bEndpointAddress, UDC_EP_NUM);
1881 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1882 ep->ackwait = 1 + ep->double_buf;
1886 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1887 spin_unlock_irqrestore(&ep->udc->lock, flags);
1890 static irqreturn_t omap_udc_pio_irq(int irq, void *_dev)
1892 u16 epn_stat, irq_src;
1893 irqreturn_t status = IRQ_NONE;
1896 struct omap_udc *udc = _dev;
1897 struct omap_req *req;
1898 unsigned long flags;
1900 spin_lock_irqsave(&udc->lock, flags);
1901 epn_stat = omap_readw(UDC_EPN_STAT);
1902 irq_src = omap_readw(UDC_IRQ_SRC);
1904 /* handle OUT first, to avoid some wasteful NAKs */
1905 if (irq_src & UDC_EPN_RX) {
1906 epnum = (epn_stat >> 8) & 0x0f;
1907 omap_writew(UDC_EPN_RX, UDC_IRQ_SRC);
1908 status = IRQ_HANDLED;
1909 ep = &udc->ep[epnum];
1912 omap_writew(epnum | UDC_EP_SEL, UDC_EP_NUM);
1914 if (omap_readw(UDC_STAT_FLG) & UDC_ACK) {
1916 if (!list_empty(&ep->queue)) {
1918 req = container_of(ep->queue.next,
1919 struct omap_req, queue);
1920 stat = read_fifo(ep, req);
1921 if (!ep->double_buf)
1925 /* min 6 clock delay before clearing EP_SEL ... */
1926 epn_stat = omap_readw(UDC_EPN_STAT);
1927 epn_stat = omap_readw(UDC_EPN_STAT);
1928 omap_writew(epnum, UDC_EP_NUM);
1930 /* enabling fifo _after_ clearing ACK, contrary to docs,
1931 * reduces lossage; timer still needed though (sigh).
1934 omap_writew(UDC_SET_FIFO_EN, UDC_CTRL);
1935 ep->ackwait = 1 + ep->double_buf;
1937 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1940 /* then IN transfers */
1941 else if (irq_src & UDC_EPN_TX) {
1942 epnum = epn_stat & 0x0f;
1943 omap_writew(UDC_EPN_TX, UDC_IRQ_SRC);
1944 status = IRQ_HANDLED;
1945 ep = &udc->ep[16 + epnum];
1948 omap_writew(epnum | UDC_EP_DIR | UDC_EP_SEL, UDC_EP_NUM);
1949 if (omap_readw(UDC_STAT_FLG) & UDC_ACK) {
1951 if (!list_empty(&ep->queue)) {
1952 req = container_of(ep->queue.next,
1953 struct omap_req, queue);
1954 (void) write_fifo(ep, req);
1957 /* min 6 clock delay before clearing EP_SEL ... */
1958 epn_stat = omap_readw(UDC_EPN_STAT);
1959 epn_stat = omap_readw(UDC_EPN_STAT);
1960 omap_writew(epnum | UDC_EP_DIR, UDC_EP_NUM);
1961 /* then 6 clocks before it'd tx */
1964 spin_unlock_irqrestore(&udc->lock, flags);
1969 static irqreturn_t omap_udc_iso_irq(int irq, void *_dev)
1971 struct omap_udc *udc = _dev;
1974 unsigned long flags;
1976 spin_lock_irqsave(&udc->lock, flags);
1978 /* handle all non-DMA ISO transfers */
1979 list_for_each_entry(ep, &udc->iso, iso) {
1981 struct omap_req *req;
1983 if (ep->has_dma || list_empty(&ep->queue))
1985 req = list_entry(ep->queue.next, struct omap_req, queue);
1987 use_ep(ep, UDC_EP_SEL);
1988 stat = omap_readw(UDC_STAT_FLG);
1990 /* NOTE: like the other controller drivers, this isn't
1991 * currently reporting lost or damaged frames.
1993 if (ep->bEndpointAddress & USB_DIR_IN) {
1994 if (stat & UDC_MISS_IN)
1995 /* done(ep, req, -EPROTO) */;
1997 write_fifo(ep, req);
2001 if (stat & UDC_NO_RXPACKET)
2002 status = -EREMOTEIO;
2003 else if (stat & UDC_ISO_ERR)
2005 else if (stat & UDC_DATA_FLUSH)
2009 /* done(ep, req, status) */;
2014 /* 6 wait states before next EP */
2017 if (!list_empty(&ep->queue))
2023 w = omap_readw(UDC_IRQ_EN);
2025 omap_writew(w, UDC_IRQ_EN);
2027 omap_writew(UDC_IRQ_SOF, UDC_IRQ_SRC);
2029 spin_unlock_irqrestore(&udc->lock, flags);
2034 /*-------------------------------------------------------------------------*/
2036 static inline int machine_without_vbus_sense(void)
2038 return machine_is_omap_innovator()
2039 || machine_is_omap_osk()
2041 /* No known omap7xx boards with vbus sense */
2042 || cpu_is_omap7xx();
2045 static int omap_udc_start(struct usb_gadget *g,
2046 struct usb_gadget_driver *driver)
2048 int status = -ENODEV;
2050 unsigned long flags;
2053 spin_lock_irqsave(&udc->lock, flags);
2055 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2057 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2060 omap_writew(UDC_SET_HALT, UDC_CTRL);
2062 udc->ep0_pending = 0;
2063 udc->ep[0].irqs = 0;
2064 udc->softconnect = 1;
2066 /* hook up the driver */
2067 driver->driver.bus = NULL;
2068 udc->driver = driver;
2069 spin_unlock_irqrestore(&udc->lock, flags);
2071 if (udc->dc_clk != NULL)
2072 omap_udc_enable_clock(1);
2074 omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC);
2076 /* connect to bus through transceiver */
2077 if (!IS_ERR_OR_NULL(udc->transceiver)) {
2078 status = otg_set_peripheral(udc->transceiver->otg,
2081 ERR("can't bind to transceiver\n");
2086 if (can_pullup(udc))
2089 pullup_disable(udc);
2092 /* boards that don't have VBUS sensing can't autogate 48MHz;
2093 * can't enter deep sleep while a gadget driver is active.
2095 if (machine_without_vbus_sense())
2096 omap_vbus_session(&udc->gadget, 1);
2099 if (udc->dc_clk != NULL)
2100 omap_udc_enable_clock(0);
2105 static int omap_udc_stop(struct usb_gadget *g)
2107 unsigned long flags;
2108 int status = -ENODEV;
2110 if (udc->dc_clk != NULL)
2111 omap_udc_enable_clock(1);
2113 if (machine_without_vbus_sense())
2114 omap_vbus_session(&udc->gadget, 0);
2116 if (!IS_ERR_OR_NULL(udc->transceiver))
2117 (void) otg_set_peripheral(udc->transceiver->otg, NULL);
2119 pullup_disable(udc);
2121 spin_lock_irqsave(&udc->lock, flags);
2123 spin_unlock_irqrestore(&udc->lock, flags);
2127 if (udc->dc_clk != NULL)
2128 omap_udc_enable_clock(0);
2133 /*-------------------------------------------------------------------------*/
2135 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2137 #include <linux/seq_file.h>
2139 static const char proc_filename[] = "driver/udc";
2141 #define FOURBITS "%s%s%s%s"
2142 #define EIGHTBITS "%s%s%s%s%s%s%s%s"
2144 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2147 struct omap_req *req;
2152 if (use_dma && ep->has_dma)
2153 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2154 (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2155 ep->dma_channel - 1, ep->lch);
2159 stat_flg = omap_readw(UDC_STAT_FLG);
2161 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2163 ep->double_buf ? "dbuf " : "",
2165 switch (ep->ackwait) {
2180 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2181 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2182 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2183 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2184 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2185 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2186 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2187 (stat_flg & UDC_STALL) ? "STALL " : "",
2188 (stat_flg & UDC_NAK) ? "NAK " : "",
2189 (stat_flg & UDC_ACK) ? "ACK " : "",
2190 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2191 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2192 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2194 if (list_empty(&ep->queue))
2195 seq_printf(s, "\t(queue empty)\n");
2197 list_for_each_entry(req, &ep->queue, queue) {
2198 unsigned length = req->req.actual;
2200 if (use_dma && buf[0]) {
2201 length += ((ep->bEndpointAddress & USB_DIR_IN)
2202 ? dma_src_len : dma_dest_len)
2203 (ep, req->req.dma + length);
2206 seq_printf(s, "\treq %p len %d/%d buf %p\n",
2208 req->req.length, req->req.buf);
2212 static char *trx_mode(unsigned m, int enabled)
2216 return enabled ? "*6wire" : "unused";
2228 static int proc_otg_show(struct seq_file *s)
2232 char *ctrl_name = "(UNKNOWN)";
2234 tmp = omap_readl(OTG_REV);
2235 ctrl_name = "tranceiver_ctrl";
2236 trans = omap_readw(USB_TRANSCEIVER_CTRL);
2237 seq_printf(s, "\nOTG rev %d.%d, %s %05x\n",
2238 tmp >> 4, tmp & 0xf, ctrl_name, trans);
2239 tmp = omap_readw(OTG_SYSCON_1);
2240 seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2242 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2243 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2244 (USB0_TRX_MODE(tmp) == 0 && !cpu_is_omap1710())
2246 : trx_mode(USB0_TRX_MODE(tmp), 1),
2247 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2248 (tmp & HST_IDLE_EN) ? " !host" : "",
2249 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2250 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2251 tmp = omap_readl(OTG_SYSCON_2);
2252 seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2253 " b_ase_brst=%d hmc=%d\n", tmp,
2254 (tmp & OTG_EN) ? " otg_en" : "",
2255 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2256 /* much more SRP stuff */
2257 (tmp & SRP_DATA) ? " srp_data" : "",
2258 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2259 (tmp & OTG_PADEN) ? " otg_paden" : "",
2260 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2261 (tmp & UHOST_EN) ? " uhost_en" : "",
2262 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2263 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2266 tmp = omap_readl(OTG_CTRL);
2267 seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2268 (tmp & OTG_ASESSVLD) ? " asess" : "",
2269 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2270 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2271 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2272 (tmp & OTG_ID) ? " id" : "",
2273 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2274 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2275 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2276 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2277 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2278 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2279 (tmp & OTG_PULLDOWN) ? " down" : "",
2280 (tmp & OTG_PULLUP) ? " up" : "",
2281 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2282 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2283 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2284 (tmp & OTG_PU_ID) ? " pu_id" : ""
2286 tmp = omap_readw(OTG_IRQ_EN);
2287 seq_printf(s, "otg_irq_en %04x" "\n", tmp);
2288 tmp = omap_readw(OTG_IRQ_SRC);
2289 seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2290 tmp = omap_readw(OTG_OUTCTRL);
2291 seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2292 tmp = omap_readw(OTG_TEST);
2293 seq_printf(s, "otg_test %04x" "\n", tmp);
2297 static int proc_udc_show(struct seq_file *s, void *_)
2301 unsigned long flags;
2303 spin_lock_irqsave(&udc->lock, flags);
2305 seq_printf(s, "%s, version: " DRIVER_VERSION
2311 use_dma ? " (dma)" : "");
2313 tmp = omap_readw(UDC_REV) & 0xff;
2315 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2316 "hmc %d, transceiver %s\n",
2317 tmp >> 4, tmp & 0xf,
2319 udc->driver ? udc->driver->driver.name : "(none)",
2322 ? udc->transceiver->label
2323 : (cpu_is_omap1710()
2324 ? "external" : "(none)"));
2325 seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2326 omap_readw(ULPD_CLOCK_CTRL),
2327 omap_readw(ULPD_SOFT_REQ),
2328 omap_readw(ULPD_STATUS_REQ));
2330 /* OTG controller registers */
2331 if (!cpu_is_omap15xx())
2334 tmp = omap_readw(UDC_SYSCON1);
2335 seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp,
2336 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2337 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2338 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2339 (tmp & UDC_NAK_EN) ? " nak" : "",
2340 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2341 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2342 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2343 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2344 /* syscon2 is write-only */
2346 /* UDC controller registers */
2347 if (!(tmp & UDC_PULLUP_EN)) {
2348 seq_printf(s, "(suspended)\n");
2349 spin_unlock_irqrestore(&udc->lock, flags);
2353 tmp = omap_readw(UDC_DEVSTAT);
2354 seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp,
2355 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2356 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2357 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2358 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2359 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2360 (tmp & UDC_SUS) ? " SUS" : "",
2361 (tmp & UDC_CFG) ? " CFG" : "",
2362 (tmp & UDC_ADD) ? " ADD" : "",
2363 (tmp & UDC_DEF) ? " DEF" : "",
2364 (tmp & UDC_ATT) ? " ATT" : "");
2365 seq_printf(s, "sof %04x\n", omap_readw(UDC_SOF));
2366 tmp = omap_readw(UDC_IRQ_EN);
2367 seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp,
2368 (tmp & UDC_SOF_IE) ? " sof" : "",
2369 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2370 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2371 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2372 (tmp & UDC_EP0_IE) ? " ep0" : "");
2373 tmp = omap_readw(UDC_IRQ_SRC);
2374 seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp,
2375 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2376 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2377 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2378 (tmp & UDC_IRQ_SOF) ? " sof" : "",
2379 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2380 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2381 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2382 (tmp & UDC_SETUP) ? " setup" : "",
2383 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2384 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2388 tmp = omap_readw(UDC_DMA_IRQ_EN);
2389 seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp,
2390 (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2391 (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2392 (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2394 (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2395 (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2396 (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2398 (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2399 (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2400 (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2402 tmp = omap_readw(UDC_RXDMA_CFG);
2403 seq_printf(s, "rxdma_cfg %04x\n", tmp);
2405 for (i = 0; i < 3; i++) {
2406 if ((tmp & (0x0f << (i * 4))) == 0)
2408 seq_printf(s, "rxdma[%d] %04x\n", i,
2409 omap_readw(UDC_RXDMA(i + 1)));
2412 tmp = omap_readw(UDC_TXDMA_CFG);
2413 seq_printf(s, "txdma_cfg %04x\n", tmp);
2415 for (i = 0; i < 3; i++) {
2416 if (!(tmp & (0x0f << (i * 4))))
2418 seq_printf(s, "txdma[%d] %04x\n", i,
2419 omap_readw(UDC_TXDMA(i + 1)));
2424 tmp = omap_readw(UDC_DEVSTAT);
2425 if (tmp & UDC_ATT) {
2426 proc_ep_show(s, &udc->ep[0]);
2427 if (tmp & UDC_ADD) {
2428 list_for_each_entry(ep, &udc->gadget.ep_list,
2431 proc_ep_show(s, ep);
2435 spin_unlock_irqrestore(&udc->lock, flags);
2439 static int proc_udc_open(struct inode *inode, struct file *file)
2441 return single_open(file, proc_udc_show, NULL);
2444 static const struct file_operations proc_ops = {
2445 .owner = THIS_MODULE,
2446 .open = proc_udc_open,
2448 .llseek = seq_lseek,
2449 .release = single_release,
2452 static void create_proc_file(void)
2454 proc_create(proc_filename, 0, NULL, &proc_ops);
2457 static void remove_proc_file(void)
2459 remove_proc_entry(proc_filename, NULL);
2464 static inline void create_proc_file(void) {}
2465 static inline void remove_proc_file(void) {}
2469 /*-------------------------------------------------------------------------*/
2471 /* Before this controller can enumerate, we need to pick an endpoint
2472 * configuration, or "fifo_mode" That involves allocating 2KB of packet
2473 * buffer space among the endpoints we'll be operating.
2475 * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when
2476 * UDC_SYSCON_1.CFG_LOCK is set can now work. We won't use that
2477 * capability yet though.
2480 omap_ep_setup(char *name, u8 addr, u8 type,
2481 unsigned buf, unsigned maxp, int dbuf)
2486 /* OUT endpoints first, then IN */
2487 ep = &udc->ep[addr & 0xf];
2488 if (addr & USB_DIR_IN)
2491 /* in case of ep init table bugs */
2492 BUG_ON(ep->name[0]);
2494 /* chip setup ... bit values are same for IN, OUT */
2495 if (type == USB_ENDPOINT_XFER_ISOC) {
2521 epn_rxtx |= UDC_EPN_RX_ISO;
2524 /* double-buffering "not supported" on 15xx,
2525 * and ignored for PIO-IN on newer chips
2526 * (for more reliable behavior)
2528 if (!use_dma || cpu_is_omap15xx())
2548 epn_rxtx |= UDC_EPN_RX_DB;
2549 init_timer(&ep->timer);
2550 ep->timer.function = pio_out_timer;
2551 ep->timer.data = (unsigned long) ep;
2554 epn_rxtx |= UDC_EPN_RX_VALID;
2556 epn_rxtx |= buf >> 3;
2558 DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2559 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2561 if (addr & USB_DIR_IN)
2562 omap_writew(epn_rxtx, UDC_EP_TX(addr & 0xf));
2564 omap_writew(epn_rxtx, UDC_EP_RX(addr));
2566 /* next endpoint's buffer starts after this one's */
2572 /* set up driver data structures */
2573 BUG_ON(strlen(name) >= sizeof ep->name);
2574 strlcpy(ep->name, name, sizeof ep->name);
2575 INIT_LIST_HEAD(&ep->queue);
2576 INIT_LIST_HEAD(&ep->iso);
2577 ep->bEndpointAddress = addr;
2578 ep->bmAttributes = type;
2579 ep->double_buf = dbuf;
2582 ep->ep.name = ep->name;
2583 ep->ep.ops = &omap_ep_ops;
2584 ep->maxpacket = maxp;
2585 usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket);
2586 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2591 static void omap_udc_release(struct device *dev)
2593 complete(udc->done);
2599 omap_udc_setup(struct platform_device *odev, struct usb_phy *xceiv)
2603 /* abolish any previous hardware state */
2604 omap_writew(0, UDC_SYSCON1);
2605 omap_writew(0, UDC_IRQ_EN);
2606 omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC);
2607 omap_writew(0, UDC_DMA_IRQ_EN);
2608 omap_writew(0, UDC_RXDMA_CFG);
2609 omap_writew(0, UDC_TXDMA_CFG);
2611 /* UDC_PULLUP_EN gates the chip clock */
2612 /* OTG_SYSCON_1 |= DEV_IDLE_EN; */
2614 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
2618 spin_lock_init(&udc->lock);
2620 udc->gadget.ops = &omap_gadget_ops;
2621 udc->gadget.ep0 = &udc->ep[0].ep;
2622 INIT_LIST_HEAD(&udc->gadget.ep_list);
2623 INIT_LIST_HEAD(&udc->iso);
2624 udc->gadget.speed = USB_SPEED_UNKNOWN;
2625 udc->gadget.max_speed = USB_SPEED_FULL;
2626 udc->gadget.name = driver_name;
2627 udc->transceiver = xceiv;
2629 /* ep0 is special; put it right after the SETUP buffer */
2630 buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2631 8 /* after SETUP */, 64 /* maxpacket */, 0);
2632 list_del_init(&udc->ep[0].ep.ep_list);
2634 /* initially disable all non-ep0 endpoints */
2635 for (tmp = 1; tmp < 15; tmp++) {
2636 omap_writew(0, UDC_EP_RX(tmp));
2637 omap_writew(0, UDC_EP_TX(tmp));
2640 #define OMAP_BULK_EP(name, addr) \
2641 buf = omap_ep_setup(name "-bulk", addr, \
2642 USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2643 #define OMAP_INT_EP(name, addr, maxp) \
2644 buf = omap_ep_setup(name "-int", addr, \
2645 USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2646 #define OMAP_ISO_EP(name, addr, maxp) \
2647 buf = omap_ep_setup(name "-iso", addr, \
2648 USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2650 switch (fifo_mode) {
2652 OMAP_BULK_EP("ep1in", USB_DIR_IN | 1);
2653 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2654 OMAP_INT_EP("ep3in", USB_DIR_IN | 3, 16);
2657 OMAP_BULK_EP("ep1in", USB_DIR_IN | 1);
2658 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2659 OMAP_INT_EP("ep9in", USB_DIR_IN | 9, 16);
2661 OMAP_BULK_EP("ep3in", USB_DIR_IN | 3);
2662 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2663 OMAP_INT_EP("ep10in", USB_DIR_IN | 10, 16);
2665 OMAP_BULK_EP("ep5in", USB_DIR_IN | 5);
2666 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2667 OMAP_INT_EP("ep11in", USB_DIR_IN | 11, 16);
2669 OMAP_BULK_EP("ep6in", USB_DIR_IN | 6);
2670 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2671 OMAP_INT_EP("ep12in", USB_DIR_IN | 12, 16);
2673 OMAP_BULK_EP("ep7in", USB_DIR_IN | 7);
2674 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2675 OMAP_INT_EP("ep13in", USB_DIR_IN | 13, 16);
2676 OMAP_INT_EP("ep13out", USB_DIR_OUT | 13, 16);
2678 OMAP_BULK_EP("ep8in", USB_DIR_IN | 8);
2679 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2680 OMAP_INT_EP("ep14in", USB_DIR_IN | 14, 16);
2681 OMAP_INT_EP("ep14out", USB_DIR_OUT | 14, 16);
2683 OMAP_BULK_EP("ep15in", USB_DIR_IN | 15);
2684 OMAP_BULK_EP("ep15out", USB_DIR_OUT | 15);
2689 case 2: /* mixed iso/bulk */
2690 OMAP_ISO_EP("ep1in", USB_DIR_IN | 1, 256);
2691 OMAP_ISO_EP("ep2out", USB_DIR_OUT | 2, 256);
2692 OMAP_ISO_EP("ep3in", USB_DIR_IN | 3, 128);
2693 OMAP_ISO_EP("ep4out", USB_DIR_OUT | 4, 128);
2695 OMAP_INT_EP("ep5in", USB_DIR_IN | 5, 16);
2697 OMAP_BULK_EP("ep6in", USB_DIR_IN | 6);
2698 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2699 OMAP_INT_EP("ep8in", USB_DIR_IN | 8, 16);
2701 case 3: /* mixed bulk/iso */
2702 OMAP_BULK_EP("ep1in", USB_DIR_IN | 1);
2703 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2704 OMAP_INT_EP("ep3in", USB_DIR_IN | 3, 16);
2706 OMAP_BULK_EP("ep4in", USB_DIR_IN | 4);
2707 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2708 OMAP_INT_EP("ep6in", USB_DIR_IN | 6, 16);
2710 OMAP_ISO_EP("ep7in", USB_DIR_IN | 7, 256);
2711 OMAP_ISO_EP("ep8out", USB_DIR_OUT | 8, 256);
2712 OMAP_INT_EP("ep9in", USB_DIR_IN | 9, 16);
2716 /* add more modes as needed */
2719 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2722 omap_writew(UDC_CFG_LOCK|UDC_SELF_PWR, UDC_SYSCON1);
2723 INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2727 static int omap_udc_probe(struct platform_device *pdev)
2729 int status = -ENODEV;
2731 struct usb_phy *xceiv = NULL;
2732 const char *type = NULL;
2733 struct omap_usb_config *config = dev_get_platdata(&pdev->dev);
2734 struct clk *dc_clk = NULL;
2735 struct clk *hhc_clk = NULL;
2737 if (cpu_is_omap7xx())
2740 /* NOTE: "knows" the order of the resources! */
2741 if (!request_mem_region(pdev->resource[0].start,
2742 pdev->resource[0].end - pdev->resource[0].start + 1,
2744 DBG("request_mem_region failed\n");
2748 if (cpu_is_omap16xx()) {
2749 dc_clk = clk_get(&pdev->dev, "usb_dc_ck");
2750 hhc_clk = clk_get(&pdev->dev, "usb_hhc_ck");
2751 BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
2752 /* can't use omap_udc_enable_clock yet */
2754 clk_enable(hhc_clk);
2758 if (cpu_is_omap7xx()) {
2759 dc_clk = clk_get(&pdev->dev, "usb_dc_ck");
2760 hhc_clk = clk_get(&pdev->dev, "l3_ocpi_ck");
2761 BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
2762 /* can't use omap_udc_enable_clock yet */
2764 clk_enable(hhc_clk);
2768 INFO("OMAP UDC rev %d.%d%s\n",
2769 omap_readw(UDC_REV) >> 4, omap_readw(UDC_REV) & 0xf,
2770 config->otg ? ", Mini-AB" : "");
2772 /* use the mode given to us by board init code */
2773 if (cpu_is_omap15xx()) {
2777 if (machine_without_vbus_sense()) {
2778 /* just set up software VBUS detect, and then
2779 * later rig it so we always report VBUS.
2780 * FIXME without really sensing VBUS, we can't
2781 * know when to turn PULLUP_EN on/off; and that
2782 * means we always "need" the 48MHz clock.
2784 u32 tmp = omap_readl(FUNC_MUX_CTRL_0);
2785 tmp &= ~VBUS_CTRL_1510;
2786 omap_writel(tmp, FUNC_MUX_CTRL_0);
2787 tmp |= VBUS_MODE_1510;
2788 tmp &= ~VBUS_CTRL_1510;
2789 omap_writel(tmp, FUNC_MUX_CTRL_0);
2792 /* The transceiver may package some GPIO logic or handle
2793 * loopback and/or transceiverless setup; if we find one,
2794 * use it. Except for OTG, we don't _need_ to talk to one;
2795 * but not having one probably means no VBUS detection.
2797 xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
2798 if (!IS_ERR_OR_NULL(xceiv))
2799 type = xceiv->label;
2800 else if (config->otg) {
2801 DBG("OTG requires external transceiver!\n");
2808 case 0: /* POWERUP DEFAULT == 0 */
2812 if (!cpu_is_omap1710()) {
2813 type = "integrated";
2822 if (IS_ERR_OR_NULL(xceiv)) {
2823 DBG("external transceiver not registered!\n");
2827 case 21: /* internal loopback */
2830 case 14: /* transceiverless */
2831 if (cpu_is_omap1710())
2841 ERR("unrecognized UDC HMC mode %d\n", hmc);
2846 INFO("hmc mode %d, %s transceiver\n", hmc, type);
2848 /* a "gadget" abstracts/virtualizes the controller */
2849 status = omap_udc_setup(pdev, xceiv);
2854 /* "udc" is now valid */
2855 pullup_disable(udc);
2856 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2857 udc->gadget.is_otg = (config->otg != 0);
2860 /* starting with omap1710 es2.0, clear toggle is a separate bit */
2861 if (omap_readw(UDC_REV) >= 0x61)
2862 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE;
2864 udc->clr_halt = UDC_RESET_EP;
2866 /* USB general purpose IRQ: ep0, state changes, dma, etc */
2867 status = request_irq(pdev->resource[1].start, omap_udc_irq,
2868 0, driver_name, udc);
2870 ERR("can't get irq %d, err %d\n",
2871 (int) pdev->resource[1].start, status);
2875 /* USB "non-iso" IRQ (PIO for all but ep0) */
2876 status = request_irq(pdev->resource[2].start, omap_udc_pio_irq,
2877 0, "omap_udc pio", udc);
2879 ERR("can't get irq %d, err %d\n",
2880 (int) pdev->resource[2].start, status);
2884 status = request_irq(pdev->resource[3].start, omap_udc_iso_irq,
2885 0, "omap_udc iso", udc);
2887 ERR("can't get irq %d, err %d\n",
2888 (int) pdev->resource[3].start, status);
2892 if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
2893 udc->dc_clk = dc_clk;
2894 udc->hhc_clk = hhc_clk;
2895 clk_disable(hhc_clk);
2896 clk_disable(dc_clk);
2900 status = usb_add_gadget_udc_release(&pdev->dev, &udc->gadget,
2912 free_irq(pdev->resource[2].start, udc);
2916 free_irq(pdev->resource[1].start, udc);
2923 if (!IS_ERR_OR_NULL(xceiv))
2926 if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
2927 clk_disable(hhc_clk);
2928 clk_disable(dc_clk);
2933 release_mem_region(pdev->resource[0].start,
2934 pdev->resource[0].end - pdev->resource[0].start + 1);
2939 static int omap_udc_remove(struct platform_device *pdev)
2941 DECLARE_COMPLETION_ONSTACK(done);
2946 usb_del_gadget_udc(&udc->gadget);
2952 pullup_disable(udc);
2953 if (!IS_ERR_OR_NULL(udc->transceiver)) {
2954 usb_put_phy(udc->transceiver);
2955 udc->transceiver = NULL;
2957 omap_writew(0, UDC_SYSCON1);
2962 free_irq(pdev->resource[3].start, udc);
2964 free_irq(pdev->resource[2].start, udc);
2965 free_irq(pdev->resource[1].start, udc);
2968 if (udc->clk_requested)
2969 omap_udc_enable_clock(0);
2970 clk_put(udc->hhc_clk);
2971 clk_put(udc->dc_clk);
2974 release_mem_region(pdev->resource[0].start,
2975 pdev->resource[0].end - pdev->resource[0].start + 1);
2977 wait_for_completion(&done);
2982 /* suspend/resume/wakeup from sysfs (echo > power/state) or when the
2983 * system is forced into deep sleep
2985 * REVISIT we should probably reject suspend requests when there's a host
2986 * session active, rather than disconnecting, at least on boards that can
2987 * report VBUS irqs (UDC_DEVSTAT.UDC_ATT). And in any case, we need to
2988 * make host resumes and VBUS detection trigger OMAP wakeup events; that
2989 * may involve talking to an external transceiver (e.g. isp1301).
2992 static int omap_udc_suspend(struct platform_device *dev, pm_message_t message)
2996 devstat = omap_readw(UDC_DEVSTAT);
2998 /* we're requesting 48 MHz clock if the pullup is enabled
2999 * (== we're attached to the host) and we're not suspended,
3000 * which would prevent entry to deep sleep...
3002 if ((devstat & UDC_ATT) != 0 && (devstat & UDC_SUS) == 0) {
3003 WARNING("session active; suspend requires disconnect\n");
3004 omap_pullup(&udc->gadget, 0);
3010 static int omap_udc_resume(struct platform_device *dev)
3012 DBG("resume + wakeup/SRP\n");
3013 omap_pullup(&udc->gadget, 1);
3015 /* maybe the host would enumerate us if we nudged it */
3017 return omap_wakeup(&udc->gadget);
3020 /*-------------------------------------------------------------------------*/
3022 static struct platform_driver udc_driver = {
3023 .probe = omap_udc_probe,
3024 .remove = omap_udc_remove,
3025 .suspend = omap_udc_suspend,
3026 .resume = omap_udc_resume,
3028 .name = (char *) driver_name,
3032 module_platform_driver(udc_driver);
3034 MODULE_DESCRIPTION(DRIVER_DESC);
3035 MODULE_LICENSE("GPL");
3036 MODULE_ALIAS("platform:omap_udc");