2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012,2015 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/delay.h>
31 #include <linux/err.h>
32 #include <linux/usb.h>
33 #include <linux/usb/ehci_def.h>
34 #include <linux/usb/hcd.h>
35 #include <linux/usb/otg.h>
36 #include <linux/platform_device.h>
37 #include <linux/fsl_devices.h>
42 #define DRIVER_DESC "Freescale EHCI Host controller driver"
43 #define DRV_NAME "ehci-fsl"
45 static struct hc_driver __read_mostly fsl_ehci_hc_driver;
47 /* configure so an HC device and id are always provided */
48 /* always called with process context; sleeping is OK */
51 * fsl_ehci_drv_probe - initialize FSL-based HCDs
52 * @pdev: USB Host Controller being probed
53 * Context: !in_interrupt()
55 * Allocates basic resources for this USB host controller.
58 static int fsl_ehci_drv_probe(struct platform_device *pdev)
60 struct fsl_usb2_platform_data *pdata;
66 pr_debug("initializing FSL-SOC USB Controller\n");
68 /* Need platform data for setup */
69 pdata = dev_get_platdata(&pdev->dev);
72 "No platform data for %s.\n", dev_name(&pdev->dev));
77 * This is a host mode driver, verify that we're supposed to be
80 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
81 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
82 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
84 "Non Host Mode configured for %s. Wrong driver linked.\n",
85 dev_name(&pdev->dev));
89 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
92 "Found HC with no IRQ. Check %s setup!\n",
93 dev_name(&pdev->dev));
98 hcd = usb_create_hcd(&fsl_ehci_hc_driver, &pdev->dev,
99 dev_name(&pdev->dev));
105 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
106 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
107 if (IS_ERR(hcd->regs)) {
108 retval = PTR_ERR(hcd->regs);
112 hcd->rsrc_start = res->start;
113 hcd->rsrc_len = resource_size(res);
115 pdata->regs = hcd->regs;
117 if (pdata->power_budget)
118 hcd->power_budget = pdata->power_budget;
121 * do platform specific init: check the clock, grab/config pins, etc.
123 if (pdata->init && pdata->init(pdev)) {
128 /* Enable USB controller, 83xx or 8536 */
129 if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
130 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
133 * Enable UTMI phy and program PTS field in UTMI mode before asserting
134 * controller reset for USB Controller version 2.5
136 if (pdata->has_fsl_erratum_a007792) {
137 writel_be(CTRL_UTMI_PHY_EN, hcd->regs + FSL_SOC_USB_CTRL);
138 writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1);
141 /* Don't need to set host mode here. It will be done by tdi_reset() */
143 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
146 device_wakeup_enable(hcd->self.controller);
148 #ifdef CONFIG_USB_OTG
149 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
150 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
152 hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
153 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
154 hcd, ehci, hcd->usb_phy);
156 if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
157 retval = otg_set_host(hcd->usb_phy->otg,
158 &ehci_to_hcd(ehci)->self);
160 usb_put_phy(hcd->usb_phy);
164 dev_err(&pdev->dev, "can't find phy\n");
175 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
181 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
182 enum fsl_usb2_phy_modes phy_mode,
183 unsigned int port_offset)
186 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
187 void __iomem *non_ehci = hcd->regs;
188 struct device *dev = hcd->self.controller;
189 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
191 if (pdata->controller_ver < 0) {
192 dev_warn(hcd->self.controller, "Could not get controller version\n");
196 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
197 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
200 case FSL_USB2_PHY_ULPI:
201 if (pdata->have_sysif_regs && pdata->controller_ver) {
202 /* controller version 1.6 or above */
203 clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
204 setbits32(non_ehci + FSL_SOC_USB_CTRL,
205 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
207 portsc |= PORT_PTS_ULPI;
209 case FSL_USB2_PHY_SERIAL:
210 portsc |= PORT_PTS_SERIAL;
212 case FSL_USB2_PHY_UTMI_WIDE:
213 portsc |= PORT_PTS_PTW;
215 case FSL_USB2_PHY_UTMI:
216 case FSL_USB2_PHY_UTMI_DUAL:
217 if (pdata->have_sysif_regs && pdata->controller_ver) {
218 /* controller version 1.6 or above */
219 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
220 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
221 become stable - 10ms*/
223 /* enable UTMI PHY */
224 if (pdata->have_sysif_regs)
225 setbits32(non_ehci + FSL_SOC_USB_CTRL,
227 portsc |= PORT_PTS_UTMI;
229 case FSL_USB2_PHY_NONE:
233 if (pdata->have_sysif_regs &&
234 pdata->controller_ver > FSL_USB_VER_1_6 &&
235 (phy_mode == FSL_USB2_PHY_ULPI)) {
236 /* check PHY_CLK_VALID to get phy clk valid */
237 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
238 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
239 in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
240 dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
245 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
247 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
248 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
253 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
255 struct usb_hcd *hcd = ehci_to_hcd(ehci);
256 struct fsl_usb2_platform_data *pdata;
257 void __iomem *non_ehci = hcd->regs;
259 pdata = dev_get_platdata(hcd->self.controller);
261 if (pdata->have_sysif_regs) {
263 * Turn on cache snooping hardware, since some PowerPC platforms
264 * wholly rely on hardware to deal with cache coherent
267 /* Setup Snooping for all the 4GB space */
268 /* SNOOP1 starts from 0x0, size 2G */
269 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
270 /* SNOOP2 starts from 0x80000000, size 2G */
271 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
274 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
275 (pdata->operating_mode == FSL_USB2_DR_OTG))
276 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
279 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
280 unsigned int chip, rev, svr;
282 svr = mfspr(SPRN_SVR);
284 rev = (svr >> 4) & 0xf;
286 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
287 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
288 ehci->has_fsl_port_bug = 1;
290 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
291 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
294 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
295 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
299 if (pdata->have_sysif_regs) {
300 #ifdef CONFIG_FSL_SOC_BOOKE
301 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
302 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
304 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
305 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
307 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
313 /* called after powerup, by probe or system-pm "wakeup" */
314 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
316 if (ehci_fsl_usb_setup(ehci))
322 /* called during probe() after chip reset completes */
323 static int ehci_fsl_setup(struct usb_hcd *hcd)
325 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
327 struct fsl_usb2_platform_data *pdata;
330 dev = hcd->self.controller;
331 pdata = dev_get_platdata(hcd->self.controller);
332 ehci->big_endian_desc = pdata->big_endian_desc;
333 ehci->big_endian_mmio = pdata->big_endian_mmio;
335 /* EHCI registers start at offset 0x100 */
336 ehci->caps = hcd->regs + 0x100;
338 #ifdef CONFIG_PPC_83xx
340 * Deal with MPC834X that need port power to be cycled after the power
341 * fault condition is removed. Otherwise the state machine does not
342 * reflect PORTSC[CSC] correctly.
344 ehci->need_oc_pp_cycle = 1;
349 retval = ehci_setup(hcd);
353 if (of_device_is_compatible(dev->parent->of_node,
354 "fsl,mpc5121-usb2-dr")) {
356 * set SBUSCFG:AHBBRST so that control msgs don't
357 * fail when doing heavy PATA writes.
359 ehci_writel(ehci, SBUSCFG_INCR8,
360 hcd->regs + FSL_SOC_USB_SBUSCFG);
363 retval = ehci_fsl_reinit(ehci);
368 struct ehci_hcd ehci;
371 /* Saved USB PHY settings, need to restore after deep sleep. */
378 #ifdef CONFIG_PPC_MPC512x
379 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
381 struct usb_hcd *hcd = dev_get_drvdata(dev);
382 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
383 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
386 #ifdef CONFIG_DYNAMIC_DEBUG
387 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
388 mode &= USBMODE_CM_MASK;
389 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
391 dev_dbg(dev, "suspend=%d already_suspended=%d "
392 "mode=%d usbcmd %08x\n", pdata->suspended,
393 pdata->already_suspended, mode, tmp);
397 * If the controller is already suspended, then this must be a
398 * PM suspend. Remember this fact, so that we will leave the
399 * controller suspended at PM resume time.
401 if (pdata->suspended) {
402 dev_dbg(dev, "already suspended, leaving early\n");
403 pdata->already_suspended = 1;
407 dev_dbg(dev, "suspending...\n");
409 ehci->rh_state = EHCI_RH_SUSPENDED;
410 dev->power.power_state = PMSG_SUSPEND;
412 /* ignore non-host interrupts */
413 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
415 /* stop the controller */
416 tmp = ehci_readl(ehci, &ehci->regs->command);
418 ehci_writel(ehci, tmp, &ehci->regs->command);
420 /* save EHCI registers */
421 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
422 pdata->pm_command &= ~CMD_RUN;
423 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
424 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
425 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
426 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
427 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
428 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
429 pdata->pm_configured_flag =
430 ehci_readl(ehci, &ehci->regs->configured_flag);
431 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
432 pdata->pm_usbgenctrl = ehci_readl(ehci,
433 hcd->regs + FSL_SOC_USB_USBGENCTRL);
435 /* clear the W1C bits */
436 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
438 pdata->suspended = 1;
440 /* clear PP to cut power to the port */
441 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
443 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
448 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
450 struct usb_hcd *hcd = dev_get_drvdata(dev);
451 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
452 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
455 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
456 pdata->suspended, pdata->already_suspended);
459 * If the controller was already suspended at suspend time,
460 * then don't resume it now.
462 if (pdata->already_suspended) {
463 dev_dbg(dev, "already suspended, leaving early\n");
464 pdata->already_suspended = 0;
468 if (!pdata->suspended) {
469 dev_dbg(dev, "not suspended, leaving early\n");
473 pdata->suspended = 0;
475 dev_dbg(dev, "resuming...\n");
478 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
479 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
481 ehci_writel(ehci, pdata->pm_usbgenctrl,
482 hcd->regs + FSL_SOC_USB_USBGENCTRL);
483 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
484 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
486 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
488 /* restore EHCI registers */
489 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
490 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
491 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
492 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
493 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
494 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
495 ehci_writel(ehci, pdata->pm_configured_flag,
496 &ehci->regs->configured_flag);
497 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
499 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
500 ehci->rh_state = EHCI_RH_RUNNING;
501 dev->power.power_state = PMSG_ON;
503 tmp = ehci_readl(ehci, &ehci->regs->command);
505 ehci_writel(ehci, tmp, &ehci->regs->command);
507 usb_hcd_resume_root_hub(hcd);
512 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
517 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
521 #endif /* CONFIG_PPC_MPC512x */
523 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
525 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
527 return container_of(ehci, struct ehci_fsl, ehci);
530 static int ehci_fsl_drv_suspend(struct device *dev)
532 struct usb_hcd *hcd = dev_get_drvdata(dev);
533 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
534 void __iomem *non_ehci = hcd->regs;
536 if (of_device_is_compatible(dev->parent->of_node,
537 "fsl,mpc5121-usb2-dr")) {
538 return ehci_fsl_mpc512x_drv_suspend(dev);
541 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
542 device_may_wakeup(dev));
543 if (!fsl_deep_sleep())
546 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
550 static int ehci_fsl_drv_resume(struct device *dev)
552 struct usb_hcd *hcd = dev_get_drvdata(dev);
553 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
554 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
555 void __iomem *non_ehci = hcd->regs;
557 if (of_device_is_compatible(dev->parent->of_node,
558 "fsl,mpc5121-usb2-dr")) {
559 return ehci_fsl_mpc512x_drv_resume(dev);
562 ehci_prepare_ports_for_controller_resume(ehci);
563 if (!fsl_deep_sleep())
566 usb_root_hub_lost_power(hcd->self.root_hub);
568 /* Restore USB PHY settings and enable the controller. */
569 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
572 ehci_fsl_reinit(ehci);
577 static int ehci_fsl_drv_restore(struct device *dev)
579 struct usb_hcd *hcd = dev_get_drvdata(dev);
581 usb_root_hub_lost_power(hcd->self.root_hub);
585 static struct dev_pm_ops ehci_fsl_pm_ops = {
586 .suspend = ehci_fsl_drv_suspend,
587 .resume = ehci_fsl_drv_resume,
588 .restore = ehci_fsl_drv_restore,
591 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
593 #define EHCI_FSL_PM_OPS NULL
594 #endif /* CONFIG_PM */
596 #ifdef CONFIG_USB_OTG
597 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
599 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
607 /* start port reset before HNP protocol time out */
608 status = readl(&ehci->regs->port_status[port]);
609 if (!(status & PORT_CONNECT))
612 /* hub_wq will finish the reset later */
613 if (ehci_is_TDI(ehci)) {
615 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
616 &ehci->regs->port_status[port]);
618 writel(PORT_RESET, &ehci->regs->port_status[port]);
624 #define ehci_start_port_reset NULL
625 #endif /* CONFIG_USB_OTG */
627 static struct ehci_driver_overrides ehci_fsl_overrides __initdata = {
628 .extra_priv_size = sizeof(struct ehci_fsl),
629 .reset = ehci_fsl_setup,
633 * fsl_ehci_drv_remove - shutdown processing for FSL-based HCDs
634 * @dev: USB Host Controller being removed
635 * Context: !in_interrupt()
637 * Reverses the effect of usb_hcd_fsl_probe().
641 static int fsl_ehci_drv_remove(struct platform_device *pdev)
643 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
644 struct usb_hcd *hcd = platform_get_drvdata(pdev);
646 if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
647 otg_set_host(hcd->usb_phy->otg, NULL);
648 usb_put_phy(hcd->usb_phy);
654 * do platform specific un-initialization:
655 * release iomux pins, disable clock, etc.
664 static struct platform_driver ehci_fsl_driver = {
665 .probe = fsl_ehci_drv_probe,
666 .remove = fsl_ehci_drv_remove,
667 .shutdown = usb_hcd_platform_shutdown,
670 .pm = EHCI_FSL_PM_OPS,
674 static int __init ehci_fsl_init(void)
679 pr_info(DRV_NAME ": " DRIVER_DESC "\n");
681 ehci_init_driver(&fsl_ehci_hc_driver, &ehci_fsl_overrides);
683 fsl_ehci_hc_driver.product_desc =
684 "Freescale On-Chip EHCI Host Controller";
685 fsl_ehci_hc_driver.start_port_reset = ehci_start_port_reset;
688 return platform_driver_register(&ehci_fsl_driver);
690 module_init(ehci_fsl_init);
692 static void __exit ehci_fsl_cleanup(void)
694 platform_driver_unregister(&ehci_fsl_driver);
696 module_exit(ehci_fsl_cleanup);
698 MODULE_DESCRIPTION(DRIVER_DESC);
699 MODULE_LICENSE("GPL");
700 MODULE_ALIAS("platform:" DRV_NAME);