2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/usb.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
30 * Allocates a generic ring segment from the ring pool, sets the dma address,
31 * initializes the segment to zero, and sets the private next pointer to NULL.
34 * "All components of all Command and Transfer TRBs shall be initialized to '0'"
36 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flags)
38 struct xhci_segment *seg;
41 seg = kzalloc(sizeof *seg, flags);
44 xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg);
46 seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
51 xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n",
52 seg->trbs, (unsigned long long)dma);
54 memset(seg->trbs, 0, SEGMENT_SIZE);
61 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
66 xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n",
67 seg->trbs, (unsigned long long)seg->dma);
68 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
71 xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg);
76 * Make the prev segment point to the next segment.
78 * Change the last TRB in the prev segment to be a Link TRB which points to the
79 * DMA address of the next segment. The caller needs to set any Link TRB
80 * related flags, such as End TRB, Toggle Cycle, and no snoop.
82 static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
83 struct xhci_segment *next, bool link_trbs)
91 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma;
93 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
94 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control;
95 val &= ~TRB_TYPE_BITMASK;
96 val |= TRB_TYPE(TRB_LINK);
97 /* Always set the chain bit with 0.95 hardware */
98 if (xhci_link_trb_quirk(xhci))
100 prev->trbs[TRBS_PER_SEGMENT-1].link.control = val;
102 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
103 (unsigned long long)prev->dma,
104 (unsigned long long)next->dma);
107 /* XXX: Do we need the hcd structure in all these functions? */
108 void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
110 struct xhci_segment *seg;
111 struct xhci_segment *first_seg;
113 if (!ring || !ring->first_seg)
115 first_seg = ring->first_seg;
116 seg = first_seg->next;
117 xhci_dbg(xhci, "Freeing ring at %p\n", ring);
118 while (seg != first_seg) {
119 struct xhci_segment *next = seg->next;
120 xhci_segment_free(xhci, seg);
123 xhci_segment_free(xhci, first_seg);
124 ring->first_seg = NULL;
129 * Create a new ring with zero or more segments.
131 * Link each segment together into a ring.
132 * Set the end flag and the cycle toggle bit on the last segment.
133 * See section 4.9.1 and figures 15 and 16.
135 static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
136 unsigned int num_segs, bool link_trbs, gfp_t flags)
138 struct xhci_ring *ring;
139 struct xhci_segment *prev;
141 ring = kzalloc(sizeof *(ring), flags);
142 xhci_dbg(xhci, "Allocating ring at %p\n", ring);
146 INIT_LIST_HEAD(&ring->td_list);
150 ring->first_seg = xhci_segment_alloc(xhci, flags);
151 if (!ring->first_seg)
155 prev = ring->first_seg;
156 while (num_segs > 0) {
157 struct xhci_segment *next;
159 next = xhci_segment_alloc(xhci, flags);
162 xhci_link_segments(xhci, prev, next, link_trbs);
167 xhci_link_segments(xhci, prev, ring->first_seg, link_trbs);
170 /* See section 4.9.2.1 and 6.4.4.1 */
171 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE);
172 xhci_dbg(xhci, "Wrote link toggle flag to"
173 " segment %p (virtual), 0x%llx (DMA)\n",
174 prev, (unsigned long long)prev->dma);
176 /* The ring is empty, so the enqueue pointer == dequeue pointer */
177 ring->enqueue = ring->first_seg->trbs;
178 ring->enq_seg = ring->first_seg;
179 ring->dequeue = ring->enqueue;
180 ring->deq_seg = ring->first_seg;
181 /* The ring is initialized to 0. The producer must write 1 to the cycle
182 * bit to handover ownership of the TRB, so PCS = 1. The consumer must
183 * compare CCS to the cycle bit to check ownership, so CCS = 1.
185 ring->cycle_state = 1;
190 xhci_ring_free(xhci, ring);
194 #define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
196 struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
197 int type, gfp_t flags)
199 struct xhci_container_ctx *ctx = kzalloc(sizeof(*ctx), flags);
203 BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
205 ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
206 if (type == XHCI_CTX_TYPE_INPUT)
207 ctx->size += CTX_SIZE(xhci->hcc_params);
209 ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
210 memset(ctx->bytes, 0, ctx->size);
214 void xhci_free_container_ctx(struct xhci_hcd *xhci,
215 struct xhci_container_ctx *ctx)
217 dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
221 struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
222 struct xhci_container_ctx *ctx)
224 BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
225 return (struct xhci_input_control_ctx *)ctx->bytes;
228 struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
229 struct xhci_container_ctx *ctx)
231 if (ctx->type == XHCI_CTX_TYPE_DEVICE)
232 return (struct xhci_slot_ctx *)ctx->bytes;
234 return (struct xhci_slot_ctx *)
235 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
238 struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
239 struct xhci_container_ctx *ctx,
240 unsigned int ep_index)
242 /* increment ep index by offset of start of ep ctx array */
244 if (ctx->type == XHCI_CTX_TYPE_INPUT)
247 return (struct xhci_ep_ctx *)
248 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
251 /* All the xhci_tds in the ring's TD list should be freed at this point */
252 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
254 struct xhci_virt_device *dev;
257 /* Slot ID 0 is reserved */
258 if (slot_id == 0 || !xhci->devs[slot_id])
261 dev = xhci->devs[slot_id];
262 xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
266 for (i = 0; i < 31; ++i)
267 if (dev->eps[i].ring)
268 xhci_ring_free(xhci, dev->eps[i].ring);
271 xhci_free_container_ctx(xhci, dev->in_ctx);
273 xhci_free_container_ctx(xhci, dev->out_ctx);
275 kfree(xhci->devs[slot_id]);
276 xhci->devs[slot_id] = 0;
279 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
280 struct usb_device *udev, gfp_t flags)
282 struct xhci_virt_device *dev;
285 /* Slot ID 0 is reserved */
286 if (slot_id == 0 || xhci->devs[slot_id]) {
287 xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
291 xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);
292 if (!xhci->devs[slot_id])
294 dev = xhci->devs[slot_id];
296 /* Allocate the (output) device context that will be used in the HC. */
297 dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
301 xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
302 (unsigned long long)dev->out_ctx->dma);
304 /* Allocate the (input) device context for address device command */
305 dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
309 xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
310 (unsigned long long)dev->in_ctx->dma);
312 /* Initialize the cancellation list for each endpoint */
313 for (i = 0; i < 31; i++)
314 INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);
316 /* Allocate endpoint 0 ring */
317 dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags);
318 if (!dev->eps[0].ring)
321 init_completion(&dev->cmd_completion);
323 /* Point to output device context in dcbaa. */
324 xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;
325 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
327 &xhci->dcbaa->dev_context_ptrs[slot_id],
328 (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);
332 xhci_free_virt_device(xhci, slot_id);
336 /* Setup an xHCI virtual device for a Set Address command */
337 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
339 struct xhci_virt_device *dev;
340 struct xhci_ep_ctx *ep0_ctx;
341 struct usb_device *top_dev;
342 struct xhci_slot_ctx *slot_ctx;
343 struct xhci_input_control_ctx *ctrl_ctx;
345 dev = xhci->devs[udev->slot_id];
346 /* Slot ID 0 is reserved */
347 if (udev->slot_id == 0 || !dev) {
348 xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
352 ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
353 ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);
354 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
356 /* 2) New slot context and endpoint 0 context are valid*/
357 ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
359 /* 3) Only the control endpoint is valid - one endpoint context */
360 slot_ctx->dev_info |= LAST_CTX(1);
362 switch (udev->speed) {
363 case USB_SPEED_SUPER:
364 slot_ctx->dev_info |= (u32) udev->route;
365 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS;
368 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS;
371 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS;
374 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS;
376 case USB_SPEED_VARIABLE:
377 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
381 /* Speed was set earlier, this shouldn't happen. */
384 /* Find the root hub port this device is under */
385 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
386 top_dev = top_dev->parent)
387 /* Found device below root hub */;
388 slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum);
389 xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum);
391 /* Is this a LS/FS device under a HS hub? */
393 * FIXME: I don't think this is right, where does the TT info for the
394 * roothub or parent hub come from?
396 if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) &&
398 slot_ctx->tt_info = udev->tt->hub->slot_id;
399 slot_ctx->tt_info |= udev->ttport << 8;
401 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
402 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
404 /* Step 4 - ring already allocated */
406 ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP);
408 * XXX: Not sure about wireless USB devices.
410 switch (udev->speed) {
411 case USB_SPEED_SUPER:
412 ep0_ctx->ep_info2 |= MAX_PACKET(512);
415 /* USB core guesses at a 64-byte max packet first for FS devices */
417 ep0_ctx->ep_info2 |= MAX_PACKET(64);
420 ep0_ctx->ep_info2 |= MAX_PACKET(8);
422 case USB_SPEED_VARIABLE:
423 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
430 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
431 ep0_ctx->ep_info2 |= MAX_BURST(0);
432 ep0_ctx->ep_info2 |= ERROR_COUNT(3);
435 dev->eps[0].ring->first_seg->dma;
436 ep0_ctx->deq |= dev->eps[0].ring->cycle_state;
438 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
443 /* Return the polling or NAK interval.
445 * The polling interval is expressed in "microframes". If xHCI's Interval field
446 * is set to N, it will service the endpoint every 2^(Interval)*125us.
448 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
451 static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
452 struct usb_host_endpoint *ep)
454 unsigned int interval = 0;
456 switch (udev->speed) {
459 if (usb_endpoint_xfer_control(&ep->desc) ||
460 usb_endpoint_xfer_bulk(&ep->desc))
461 interval = ep->desc.bInterval;
462 /* Fall through - SS and HS isoc/int have same decoding */
463 case USB_SPEED_SUPER:
464 if (usb_endpoint_xfer_int(&ep->desc) ||
465 usb_endpoint_xfer_isoc(&ep->desc)) {
466 if (ep->desc.bInterval == 0)
469 interval = ep->desc.bInterval - 1;
472 if (interval != ep->desc.bInterval + 1)
473 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
474 ep->desc.bEndpointAddress, 1 << interval);
477 /* Convert bInterval (in 1-255 frames) to microframes and round down to
478 * nearest power of 2.
482 if (usb_endpoint_xfer_int(&ep->desc) ||
483 usb_endpoint_xfer_isoc(&ep->desc)) {
484 interval = fls(8*ep->desc.bInterval) - 1;
489 if ((1 << interval) != 8*ep->desc.bInterval)
490 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
491 ep->desc.bEndpointAddress, 1 << interval);
497 return EP_INTERVAL(interval);
500 static inline u32 xhci_get_endpoint_type(struct usb_device *udev,
501 struct usb_host_endpoint *ep)
506 in = usb_endpoint_dir_in(&ep->desc);
507 if (usb_endpoint_xfer_control(&ep->desc)) {
508 type = EP_TYPE(CTRL_EP);
509 } else if (usb_endpoint_xfer_bulk(&ep->desc)) {
511 type = EP_TYPE(BULK_IN_EP);
513 type = EP_TYPE(BULK_OUT_EP);
514 } else if (usb_endpoint_xfer_isoc(&ep->desc)) {
516 type = EP_TYPE(ISOC_IN_EP);
518 type = EP_TYPE(ISOC_OUT_EP);
519 } else if (usb_endpoint_xfer_int(&ep->desc)) {
521 type = EP_TYPE(INT_IN_EP);
523 type = EP_TYPE(INT_OUT_EP);
530 int xhci_endpoint_init(struct xhci_hcd *xhci,
531 struct xhci_virt_device *virt_dev,
532 struct usb_device *udev,
533 struct usb_host_endpoint *ep,
536 unsigned int ep_index;
537 struct xhci_ep_ctx *ep_ctx;
538 struct xhci_ring *ep_ring;
539 unsigned int max_packet;
540 unsigned int max_burst;
542 ep_index = xhci_get_endpoint_index(&ep->desc);
543 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
545 /* Set up the endpoint ring */
546 virt_dev->eps[ep_index].new_ring =
547 xhci_ring_alloc(xhci, 1, true, mem_flags);
548 if (!virt_dev->eps[ep_index].new_ring)
550 ep_ring = virt_dev->eps[ep_index].new_ring;
551 ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state;
553 ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep);
555 /* FIXME dig Mult and streams info out of ep companion desc */
557 /* Allow 3 retries for everything but isoc;
558 * error count = 0 means infinite retries.
560 if (!usb_endpoint_xfer_isoc(&ep->desc))
561 ep_ctx->ep_info2 = ERROR_COUNT(3);
563 ep_ctx->ep_info2 = ERROR_COUNT(1);
565 ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep);
567 /* Set the max packet size and max burst */
568 switch (udev->speed) {
569 case USB_SPEED_SUPER:
570 max_packet = ep->desc.wMaxPacketSize;
571 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
572 /* dig out max burst from ep companion desc */
573 if (!ep->ss_ep_comp) {
574 xhci_warn(xhci, "WARN no SS endpoint companion descriptor.\n");
577 max_packet = ep->ss_ep_comp->desc.bMaxBurst;
579 ep_ctx->ep_info2 |= MAX_BURST(max_packet);
582 /* bits 11:12 specify the number of additional transaction
583 * opportunities per microframe (USB 2.0, section 9.6.6)
585 if (usb_endpoint_xfer_isoc(&ep->desc) ||
586 usb_endpoint_xfer_int(&ep->desc)) {
587 max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11;
588 ep_ctx->ep_info2 |= MAX_BURST(max_burst);
593 max_packet = ep->desc.wMaxPacketSize & 0x3ff;
594 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
599 /* FIXME Debug endpoint context */
603 void xhci_endpoint_zero(struct xhci_hcd *xhci,
604 struct xhci_virt_device *virt_dev,
605 struct usb_host_endpoint *ep)
607 unsigned int ep_index;
608 struct xhci_ep_ctx *ep_ctx;
610 ep_index = xhci_get_endpoint_index(&ep->desc);
611 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
614 ep_ctx->ep_info2 = 0;
617 /* Don't free the endpoint ring until the set interface or configuration
622 /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
623 * Useful when you want to change one particular aspect of the endpoint and then
624 * issue a configure endpoint command.
626 void xhci_endpoint_copy(struct xhci_hcd *xhci,
627 struct xhci_virt_device *vdev, unsigned int ep_index)
629 struct xhci_ep_ctx *out_ep_ctx;
630 struct xhci_ep_ctx *in_ep_ctx;
632 out_ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
633 in_ep_ctx = xhci_get_ep_ctx(xhci, vdev->in_ctx, ep_index);
635 in_ep_ctx->ep_info = out_ep_ctx->ep_info;
636 in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
637 in_ep_ctx->deq = out_ep_ctx->deq;
638 in_ep_ctx->tx_info = out_ep_ctx->tx_info;
641 /* Copy output xhci_slot_ctx to the input xhci_slot_ctx.
642 * Useful when you want to change one particular aspect of the endpoint and then
643 * issue a configure endpoint command. Only the context entries field matters,
644 * but we'll copy the whole thing anyway.
646 void xhci_slot_copy(struct xhci_hcd *xhci, struct xhci_virt_device *vdev)
648 struct xhci_slot_ctx *in_slot_ctx;
649 struct xhci_slot_ctx *out_slot_ctx;
651 in_slot_ctx = xhci_get_slot_ctx(xhci, vdev->in_ctx);
652 out_slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
654 in_slot_ctx->dev_info = out_slot_ctx->dev_info;
655 in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
656 in_slot_ctx->tt_info = out_slot_ctx->tt_info;
657 in_slot_ctx->dev_state = out_slot_ctx->dev_state;
660 /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
661 static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
664 struct device *dev = xhci_to_hcd(xhci)->self.controller;
665 int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
667 xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
672 xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
673 if (!xhci->scratchpad)
676 xhci->scratchpad->sp_array =
677 pci_alloc_consistent(to_pci_dev(dev),
678 num_sp * sizeof(u64),
679 &xhci->scratchpad->sp_dma);
680 if (!xhci->scratchpad->sp_array)
683 xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
684 if (!xhci->scratchpad->sp_buffers)
687 xhci->scratchpad->sp_dma_buffers =
688 kzalloc(sizeof(dma_addr_t) * num_sp, flags);
690 if (!xhci->scratchpad->sp_dma_buffers)
693 xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma;
694 for (i = 0; i < num_sp; i++) {
696 void *buf = pci_alloc_consistent(to_pci_dev(dev),
697 xhci->page_size, &dma);
701 xhci->scratchpad->sp_array[i] = dma;
702 xhci->scratchpad->sp_buffers[i] = buf;
703 xhci->scratchpad->sp_dma_buffers[i] = dma;
709 for (i = i - 1; i >= 0; i--) {
710 pci_free_consistent(to_pci_dev(dev), xhci->page_size,
711 xhci->scratchpad->sp_buffers[i],
712 xhci->scratchpad->sp_dma_buffers[i]);
714 kfree(xhci->scratchpad->sp_dma_buffers);
717 kfree(xhci->scratchpad->sp_buffers);
720 pci_free_consistent(to_pci_dev(dev), num_sp * sizeof(u64),
721 xhci->scratchpad->sp_array,
722 xhci->scratchpad->sp_dma);
725 kfree(xhci->scratchpad);
726 xhci->scratchpad = NULL;
732 static void scratchpad_free(struct xhci_hcd *xhci)
736 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
738 if (!xhci->scratchpad)
741 num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
743 for (i = 0; i < num_sp; i++) {
744 pci_free_consistent(pdev, xhci->page_size,
745 xhci->scratchpad->sp_buffers[i],
746 xhci->scratchpad->sp_dma_buffers[i]);
748 kfree(xhci->scratchpad->sp_dma_buffers);
749 kfree(xhci->scratchpad->sp_buffers);
750 pci_free_consistent(pdev, num_sp * sizeof(u64),
751 xhci->scratchpad->sp_array,
752 xhci->scratchpad->sp_dma);
753 kfree(xhci->scratchpad);
754 xhci->scratchpad = NULL;
757 void xhci_mem_cleanup(struct xhci_hcd *xhci)
759 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
763 /* Free the Event Ring Segment Table and the actual Event Ring */
764 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
765 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
766 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
767 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
768 if (xhci->erst.entries)
769 pci_free_consistent(pdev, size,
770 xhci->erst.entries, xhci->erst.erst_dma_addr);
771 xhci->erst.entries = NULL;
772 xhci_dbg(xhci, "Freed ERST\n");
773 if (xhci->event_ring)
774 xhci_ring_free(xhci, xhci->event_ring);
775 xhci->event_ring = NULL;
776 xhci_dbg(xhci, "Freed event ring\n");
778 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
780 xhci_ring_free(xhci, xhci->cmd_ring);
781 xhci->cmd_ring = NULL;
782 xhci_dbg(xhci, "Freed command ring\n");
784 for (i = 1; i < MAX_HC_SLOTS; ++i)
785 xhci_free_virt_device(xhci, i);
787 if (xhci->segment_pool)
788 dma_pool_destroy(xhci->segment_pool);
789 xhci->segment_pool = NULL;
790 xhci_dbg(xhci, "Freed segment pool\n");
792 if (xhci->device_pool)
793 dma_pool_destroy(xhci->device_pool);
794 xhci->device_pool = NULL;
795 xhci_dbg(xhci, "Freed device context pool\n");
797 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
799 pci_free_consistent(pdev, sizeof(*xhci->dcbaa),
800 xhci->dcbaa, xhci->dcbaa->dma);
804 xhci->page_shift = 0;
805 scratchpad_free(xhci);
808 int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
811 struct device *dev = xhci_to_hcd(xhci)->self.controller;
812 unsigned int val, val2;
814 struct xhci_segment *seg;
818 page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
819 xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size);
820 for (i = 0; i < 16; i++) {
821 if ((0x1 & page_size) != 0)
823 page_size = page_size >> 1;
826 xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024);
828 xhci_warn(xhci, "WARN: no supported page size\n");
829 /* Use 4K pages, since that's common and the minimum the HC supports */
830 xhci->page_shift = 12;
831 xhci->page_size = 1 << xhci->page_shift;
832 xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024);
835 * Program the Number of Device Slots Enabled field in the CONFIG
836 * register with the max value of slots the HC can handle.
838 val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));
839 xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n",
841 val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);
842 val |= (val2 & ~HCS_SLOTS_MASK);
843 xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n",
845 xhci_writel(xhci, val, &xhci->op_regs->config_reg);
848 * Section 5.4.8 - doorbell array must be
849 * "physically contiguous and 64-byte (cache line) aligned".
851 xhci->dcbaa = pci_alloc_consistent(to_pci_dev(dev),
852 sizeof(*xhci->dcbaa), &dma);
855 memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
856 xhci->dcbaa->dma = dma;
857 xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
858 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
859 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
862 * Initialize the ring segment pool. The ring must be a contiguous
863 * structure comprised of TRBs. The TRBs must be 16 byte aligned,
864 * however, the command ring segment needs 64-byte aligned segments,
865 * so we pick the greater alignment need.
867 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
868 SEGMENT_SIZE, 64, xhci->page_size);
870 /* See Table 46 and Note on Figure 55 */
871 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
872 2112, 64, xhci->page_size);
873 if (!xhci->segment_pool || !xhci->device_pool)
876 /* Set up the command ring to have one segments for now. */
877 xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags);
880 xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring);
881 xhci_dbg(xhci, "First segment DMA is 0x%llx\n",
882 (unsigned long long)xhci->cmd_ring->first_seg->dma);
884 /* Set the address in the Command Ring Control register */
885 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
886 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
887 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
888 xhci->cmd_ring->cycle_state;
889 xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
890 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
891 xhci_dbg_cmd_ptrs(xhci);
893 val = xhci_readl(xhci, &xhci->cap_regs->db_off);
895 xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
896 " from cap regs base addr\n", val);
897 xhci->dba = (void *) xhci->cap_regs + val;
899 xhci_print_run_regs(xhci);
900 /* Set ir_set to interrupt register set 0 */
901 xhci->ir_set = (void *) xhci->run_regs->ir_set;
904 * Event ring setup: Allocate a normal ring, but also setup
905 * the event ring segment table (ERST). Section 4.9.3.
907 xhci_dbg(xhci, "// Allocating event ring\n");
908 xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags);
909 if (!xhci->event_ring)
912 xhci->erst.entries = pci_alloc_consistent(to_pci_dev(dev),
913 sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma);
914 if (!xhci->erst.entries)
916 xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n",
917 (unsigned long long)dma);
919 memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
920 xhci->erst.num_entries = ERST_NUM_SEGS;
921 xhci->erst.erst_dma_addr = dma;
922 xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n",
923 xhci->erst.num_entries,
925 (unsigned long long)xhci->erst.erst_dma_addr);
927 /* set ring base address and size for each segment table entry */
928 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
929 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
930 entry->seg_addr = seg->dma;
931 entry->seg_size = TRBS_PER_SEGMENT;
936 /* set ERST count with the number of entries in the segment table */
937 val = xhci_readl(xhci, &xhci->ir_set->erst_size);
938 val &= ERST_SIZE_MASK;
939 val |= ERST_NUM_SEGS;
940 xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n",
942 xhci_writel(xhci, val, &xhci->ir_set->erst_size);
944 xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n");
945 /* set the segment table base address */
946 xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
947 (unsigned long long)xhci->erst.erst_dma_addr);
948 val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
949 val_64 &= ERST_PTR_MASK;
950 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
951 xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
953 /* Set the event ring dequeue address */
954 xhci_set_hc_event_deq(xhci);
955 xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
956 xhci_print_ir_set(xhci, xhci->ir_set, 0);
959 * XXX: Might need to set the Interrupter Moderation Register to
960 * something other than the default (~1ms minimum between interrupts).
961 * See section 5.5.1.2.
963 init_completion(&xhci->addr_dev);
964 for (i = 0; i < MAX_HC_SLOTS; ++i)
967 if (scratchpad_alloc(xhci, flags))
973 xhci_warn(xhci, "Couldn't initialize memory\n");
974 xhci_mem_cleanup(xhci);