2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
70 #include "xhci-trace.h"
72 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
73 struct xhci_virt_device *virt_dev,
74 struct xhci_event_cmd *event);
77 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
80 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
83 unsigned long segment_offset;
85 if (!seg || !trb || trb < seg->trbs)
88 segment_offset = trb - seg->trbs;
89 if (segment_offset > TRBS_PER_SEGMENT)
91 return seg->dma + (segment_offset * sizeof(*trb));
94 /* Does this link TRB point to the first segment in a ring,
95 * or was the previous TRB the last TRB on the last segment in the ERST?
97 static bool last_trb_on_last_seg(struct xhci_hcd *xhci, struct xhci_ring *ring,
98 struct xhci_segment *seg, union xhci_trb *trb)
100 if (ring == xhci->event_ring)
101 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
102 (seg->next == xhci->event_ring->first_seg);
104 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
107 /* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
108 * segment? I.e. would the updated event TRB pointer step off the end of the
111 static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
112 struct xhci_segment *seg, union xhci_trb *trb)
114 if (ring == xhci->event_ring)
115 return trb == &seg->trbs[TRBS_PER_SEGMENT];
117 return TRB_TYPE_LINK_LE32(trb->link.control);
120 static int enqueue_is_link_trb(struct xhci_ring *ring)
122 struct xhci_link_trb *link = &ring->enqueue->link;
123 return TRB_TYPE_LINK_LE32(link->control);
126 union xhci_trb *xhci_find_next_enqueue(struct xhci_ring *ring)
128 /* Enqueue pointer can be left pointing to the link TRB,
129 * we must handle that
131 if (TRB_TYPE_LINK_LE32(ring->enqueue->link.control))
132 return ring->enq_seg->next->trbs;
133 return ring->enqueue;
136 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
137 * TRB is in a new segment. This does not skip over link TRBs, and it does not
138 * effect the ring dequeue or enqueue pointers.
140 static void next_trb(struct xhci_hcd *xhci,
141 struct xhci_ring *ring,
142 struct xhci_segment **seg,
143 union xhci_trb **trb)
145 if (last_trb(xhci, ring, *seg, *trb)) {
147 *trb = ((*seg)->trbs);
154 * See Cycle bit rules. SW is the consumer for the event ring only.
155 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
157 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
159 unsigned long long addr;
164 * If this is not event ring, and the dequeue pointer
165 * is not on a link TRB, there is one more usable TRB
167 if (ring->type != TYPE_EVENT &&
168 !last_trb(xhci, ring, ring->deq_seg, ring->dequeue))
169 ring->num_trbs_free++;
173 * Update the dequeue pointer further if that was a link TRB or
174 * we're at the end of an event ring segment (which doesn't have
177 if (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) {
178 if (ring->type == TYPE_EVENT &&
179 last_trb_on_last_seg(xhci, ring,
180 ring->deq_seg, ring->dequeue)) {
181 ring->cycle_state = (ring->cycle_state ? 0 : 1);
183 ring->deq_seg = ring->deq_seg->next;
184 ring->dequeue = ring->deq_seg->trbs;
188 } while (last_trb(xhci, ring, ring->deq_seg, ring->dequeue));
190 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
194 * See Cycle bit rules. SW is the consumer for the event ring only.
195 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
197 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
198 * chain bit is set), then set the chain bit in all the following link TRBs.
199 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
200 * have their chain bit cleared (so that each Link TRB is a separate TD).
202 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
203 * set, but other sections talk about dealing with the chain bit set. This was
204 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
205 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
207 * @more_trbs_coming: Will you enqueue more TRBs before calling
208 * prepare_transfer()?
210 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
211 bool more_trbs_coming)
214 union xhci_trb *next;
215 unsigned long long addr;
217 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
218 /* If this is not event ring, there is one less usable TRB */
219 if (ring->type != TYPE_EVENT &&
220 !last_trb(xhci, ring, ring->enq_seg, ring->enqueue))
221 ring->num_trbs_free--;
222 next = ++(ring->enqueue);
225 /* Update the dequeue pointer further if that was a link TRB or we're at
226 * the end of an event ring segment (which doesn't have link TRBS)
228 while (last_trb(xhci, ring, ring->enq_seg, next)) {
229 if (ring->type != TYPE_EVENT) {
231 * If the caller doesn't plan on enqueueing more
232 * TDs before ringing the doorbell, then we
233 * don't want to give the link TRB to the
234 * hardware just yet. We'll give the link TRB
235 * back in prepare_ring() just before we enqueue
236 * the TD at the top of the ring.
238 if (!chain && !more_trbs_coming)
241 /* If we're not dealing with 0.95 hardware or
242 * isoc rings on AMD 0.96 host,
243 * carry over the chain bit of the previous TRB
244 * (which may mean the chain bit is cleared).
246 if (!(ring->type == TYPE_ISOC &&
247 (xhci->quirks & XHCI_AMD_0x96_HOST))
248 && !xhci_link_trb_quirk(xhci)) {
249 next->link.control &=
250 cpu_to_le32(~TRB_CHAIN);
251 next->link.control |=
254 /* Give this link TRB to the hardware */
256 next->link.control ^= cpu_to_le32(TRB_CYCLE);
258 /* Toggle the cycle bit after the last ring segment. */
259 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
260 ring->cycle_state = (ring->cycle_state ? 0 : 1);
263 ring->enq_seg = ring->enq_seg->next;
264 ring->enqueue = ring->enq_seg->trbs;
265 next = ring->enqueue;
267 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
271 * Check to see if there's room to enqueue num_trbs on the ring and make sure
272 * enqueue pointer will not advance into dequeue segment. See rules above.
274 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
275 unsigned int num_trbs)
277 int num_trbs_in_deq_seg;
279 if (ring->num_trbs_free < num_trbs)
282 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
283 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
284 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
291 /* Ring the host controller doorbell after placing a command on the ring */
292 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
294 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
297 xhci_dbg(xhci, "// Ding dong!\n");
298 xhci_writel(xhci, DB_VALUE_HOST, &xhci->dba->doorbell[0]);
299 /* Flush PCI posted writes */
300 xhci_readl(xhci, &xhci->dba->doorbell[0]);
303 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
308 xhci_dbg(xhci, "Abort command ring\n");
310 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING)) {
311 xhci_dbg(xhci, "The command ring isn't running, "
312 "Have the command ring been stopped?\n");
316 temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
317 if (!(temp_64 & CMD_RING_RUNNING)) {
318 xhci_dbg(xhci, "Command ring had been stopped\n");
321 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
322 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
323 &xhci->op_regs->cmd_ring);
325 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
326 * time the completion od all xHCI commands, including
327 * the Command Abort operation. If software doesn't see
328 * CRR negated in a timely manner (e.g. longer than 5
329 * seconds), then it should assume that the there are
330 * larger problems with the xHC and assert HCRST.
332 ret = xhci_handshake(xhci, &xhci->op_regs->cmd_ring,
333 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
335 xhci_err(xhci, "Stopped the command ring failed, "
336 "maybe the host is dead\n");
337 xhci->xhc_state |= XHCI_STATE_DYING;
346 static int xhci_queue_cd(struct xhci_hcd *xhci,
347 struct xhci_command *command,
348 union xhci_trb *cmd_trb)
351 cd = kzalloc(sizeof(struct xhci_cd), GFP_ATOMIC);
354 INIT_LIST_HEAD(&cd->cancel_cmd_list);
356 cd->command = command;
357 cd->cmd_trb = cmd_trb;
358 list_add_tail(&cd->cancel_cmd_list, &xhci->cancel_cmd_list);
364 * Cancel the command which has issue.
366 * Some commands may hang due to waiting for acknowledgement from
367 * usb device. It is outside of the xHC's ability to control and
368 * will cause the command ring is blocked. When it occurs software
369 * should intervene to recover the command ring.
370 * See Section 4.6.1.1 and 4.6.1.2
372 int xhci_cancel_cmd(struct xhci_hcd *xhci, struct xhci_command *command,
373 union xhci_trb *cmd_trb)
378 spin_lock_irqsave(&xhci->lock, flags);
380 if (xhci->xhc_state & XHCI_STATE_DYING) {
381 xhci_warn(xhci, "Abort the command ring,"
382 " but the xHCI is dead.\n");
387 /* queue the cmd desriptor to cancel_cmd_list */
388 retval = xhci_queue_cd(xhci, command, cmd_trb);
390 xhci_warn(xhci, "Queuing command descriptor failed.\n");
394 /* abort command ring */
395 retval = xhci_abort_cmd_ring(xhci);
397 xhci_err(xhci, "Abort command ring failed\n");
398 if (unlikely(retval == -ESHUTDOWN)) {
399 spin_unlock_irqrestore(&xhci->lock, flags);
400 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
401 xhci_dbg(xhci, "xHCI host controller is dead.\n");
407 spin_unlock_irqrestore(&xhci->lock, flags);
411 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
412 unsigned int slot_id,
413 unsigned int ep_index,
414 unsigned int stream_id)
416 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
417 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
418 unsigned int ep_state = ep->ep_state;
420 /* Don't ring the doorbell for this endpoint if there are pending
421 * cancellations because we don't want to interrupt processing.
422 * We don't want to restart any stream rings if there's a set dequeue
423 * pointer command pending because the device can choose to start any
424 * stream once the endpoint is on the HW schedule.
425 * FIXME - check all the stream rings for pending cancellations.
427 if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
428 (ep_state & EP_HALTED))
430 xhci_writel(xhci, DB_VALUE(ep_index, stream_id), db_addr);
431 /* The CPU has better things to do at this point than wait for a
432 * write-posting flush. It'll get there soon enough.
436 /* Ring the doorbell for any rings with pending URBs */
437 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
438 unsigned int slot_id,
439 unsigned int ep_index)
441 unsigned int stream_id;
442 struct xhci_virt_ep *ep;
444 ep = &xhci->devs[slot_id]->eps[ep_index];
446 /* A ring has pending URBs if its TD list is not empty */
447 if (!(ep->ep_state & EP_HAS_STREAMS)) {
448 if (ep->ring && !(list_empty(&ep->ring->td_list)))
449 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
453 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
455 struct xhci_stream_info *stream_info = ep->stream_info;
456 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
457 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
463 * Find the segment that trb is in. Start searching in start_seg.
464 * If we must move past a segment that has a link TRB with a toggle cycle state
465 * bit set, then we will toggle the value pointed at by cycle_state.
467 static struct xhci_segment *find_trb_seg(
468 struct xhci_segment *start_seg,
469 union xhci_trb *trb, int *cycle_state)
471 struct xhci_segment *cur_seg = start_seg;
472 struct xhci_generic_trb *generic_trb;
474 while (cur_seg->trbs > trb ||
475 &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) {
476 generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic;
477 if (generic_trb->field[3] & cpu_to_le32(LINK_TOGGLE))
479 cur_seg = cur_seg->next;
480 if (cur_seg == start_seg)
481 /* Looped over the entire list. Oops! */
488 static struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
489 unsigned int slot_id, unsigned int ep_index,
490 unsigned int stream_id)
492 struct xhci_virt_ep *ep;
494 ep = &xhci->devs[slot_id]->eps[ep_index];
495 /* Common case: no streams */
496 if (!(ep->ep_state & EP_HAS_STREAMS))
499 if (stream_id == 0) {
501 "WARN: Slot ID %u, ep index %u has streams, "
502 "but URB has no stream ID.\n",
507 if (stream_id < ep->stream_info->num_streams)
508 return ep->stream_info->stream_rings[stream_id];
511 "WARN: Slot ID %u, ep index %u has "
512 "stream IDs 1 to %u allocated, "
513 "but stream ID %u is requested.\n",
515 ep->stream_info->num_streams - 1,
520 /* Get the right ring for the given URB.
521 * If the endpoint supports streams, boundary check the URB's stream ID.
522 * If the endpoint doesn't support streams, return the singular endpoint ring.
524 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
527 return xhci_triad_to_transfer_ring(xhci, urb->dev->slot_id,
528 xhci_get_endpoint_index(&urb->ep->desc), urb->stream_id);
532 * Move the xHC's endpoint ring dequeue pointer past cur_td.
533 * Record the new state of the xHC's endpoint ring dequeue segment,
534 * dequeue pointer, and new consumer cycle state in state.
535 * Update our internal representation of the ring's dequeue pointer.
537 * We do this in three jumps:
538 * - First we update our new ring state to be the same as when the xHC stopped.
539 * - Then we traverse the ring to find the segment that contains
540 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
541 * any link TRBs with the toggle cycle bit set.
542 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
543 * if we've moved it past a link TRB with the toggle cycle bit set.
545 * Some of the uses of xhci_generic_trb are grotty, but if they're done
546 * with correct __le32 accesses they should work fine. Only users of this are
549 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
550 unsigned int slot_id, unsigned int ep_index,
551 unsigned int stream_id, struct xhci_td *cur_td,
552 struct xhci_dequeue_state *state)
554 struct xhci_virt_device *dev = xhci->devs[slot_id];
555 struct xhci_ring *ep_ring;
556 struct xhci_generic_trb *trb;
557 struct xhci_ep_ctx *ep_ctx;
560 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
561 ep_index, stream_id);
563 xhci_warn(xhci, "WARN can't find new dequeue state "
564 "for invalid stream ID %u.\n",
568 state->new_cycle_state = 0;
569 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
570 "Finding segment containing stopped TRB.");
571 state->new_deq_seg = find_trb_seg(cur_td->start_seg,
572 dev->eps[ep_index].stopped_trb,
573 &state->new_cycle_state);
574 if (!state->new_deq_seg) {
579 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
580 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
581 "Finding endpoint context");
582 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
583 state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq);
585 state->new_deq_ptr = cur_td->last_trb;
586 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
587 "Finding segment containing last TRB in TD.");
588 state->new_deq_seg = find_trb_seg(state->new_deq_seg,
590 &state->new_cycle_state);
591 if (!state->new_deq_seg) {
596 trb = &state->new_deq_ptr->generic;
597 if (TRB_TYPE_LINK_LE32(trb->field[3]) &&
598 (trb->field[3] & cpu_to_le32(LINK_TOGGLE)))
599 state->new_cycle_state ^= 0x1;
600 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
603 * If there is only one segment in a ring, find_trb_seg()'s while loop
604 * will not run, and it will return before it has a chance to see if it
605 * needs to toggle the cycle bit. It can't tell if the stalled transfer
606 * ended just before the link TRB on a one-segment ring, or if the TD
607 * wrapped around the top of the ring, because it doesn't have the TD in
608 * question. Look for the one-segment case where stalled TRB's address
609 * is greater than the new dequeue pointer address.
611 if (ep_ring->first_seg == ep_ring->first_seg->next &&
612 state->new_deq_ptr < dev->eps[ep_index].stopped_trb)
613 state->new_cycle_state ^= 0x1;
614 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
615 "Cycle state = 0x%x", state->new_cycle_state);
617 /* Don't update the ring cycle state for the producer (us). */
618 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
619 "New dequeue segment = %p (virtual)",
621 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
622 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
623 "New dequeue pointer = 0x%llx (DMA)",
624 (unsigned long long) addr);
627 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
628 * (The last TRB actually points to the ring enqueue pointer, which is not part
629 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
631 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
632 struct xhci_td *cur_td, bool flip_cycle)
634 struct xhci_segment *cur_seg;
635 union xhci_trb *cur_trb;
637 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
639 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
640 if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
641 /* Unchain any chained Link TRBs, but
642 * leave the pointers intact.
644 cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
645 /* Flip the cycle bit (link TRBs can't be the first
649 cur_trb->generic.field[3] ^=
650 cpu_to_le32(TRB_CYCLE);
651 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
652 "Cancel (unchain) link TRB");
653 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
654 "Address = %p (0x%llx dma); "
655 "in seg %p (0x%llx dma)",
657 (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
659 (unsigned long long)cur_seg->dma);
661 cur_trb->generic.field[0] = 0;
662 cur_trb->generic.field[1] = 0;
663 cur_trb->generic.field[2] = 0;
664 /* Preserve only the cycle bit of this TRB */
665 cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
666 /* Flip the cycle bit except on the first or last TRB */
667 if (flip_cycle && cur_trb != cur_td->first_trb &&
668 cur_trb != cur_td->last_trb)
669 cur_trb->generic.field[3] ^=
670 cpu_to_le32(TRB_CYCLE);
671 cur_trb->generic.field[3] |= cpu_to_le32(
672 TRB_TYPE(TRB_TR_NOOP));
673 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
674 "TRB to noop at offset 0x%llx",
676 xhci_trb_virt_to_dma(cur_seg, cur_trb));
678 if (cur_trb == cur_td->last_trb)
683 static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
684 unsigned int ep_index, unsigned int stream_id,
685 struct xhci_segment *deq_seg,
686 union xhci_trb *deq_ptr, u32 cycle_state);
688 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
689 unsigned int slot_id, unsigned int ep_index,
690 unsigned int stream_id,
691 struct xhci_dequeue_state *deq_state)
693 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
695 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
696 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), "
697 "new deq ptr = %p (0x%llx dma), new cycle = %u",
698 deq_state->new_deq_seg,
699 (unsigned long long)deq_state->new_deq_seg->dma,
700 deq_state->new_deq_ptr,
701 (unsigned long long)xhci_trb_virt_to_dma(deq_state->new_deq_seg, deq_state->new_deq_ptr),
702 deq_state->new_cycle_state);
703 queue_set_tr_deq(xhci, slot_id, ep_index, stream_id,
704 deq_state->new_deq_seg,
705 deq_state->new_deq_ptr,
706 (u32) deq_state->new_cycle_state);
707 /* Stop the TD queueing code from ringing the doorbell until
708 * this command completes. The HC won't set the dequeue pointer
709 * if the ring is running, and ringing the doorbell starts the
712 ep->ep_state |= SET_DEQ_PENDING;
715 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
716 struct xhci_virt_ep *ep)
718 ep->ep_state &= ~EP_HALT_PENDING;
719 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the
720 * timer is running on another CPU, we don't decrement stop_cmds_pending
721 * (since we didn't successfully stop the watchdog timer).
723 if (del_timer(&ep->stop_cmd_timer))
724 ep->stop_cmds_pending--;
727 /* Must be called with xhci->lock held in interrupt context */
728 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
729 struct xhci_td *cur_td, int status)
733 struct urb_priv *urb_priv;
736 urb_priv = urb->hcpriv;
738 hcd = bus_to_hcd(urb->dev->bus);
740 /* Only giveback urb when this is the last td in urb */
741 if (urb_priv->td_cnt == urb_priv->length) {
742 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
743 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
744 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
745 if (xhci->quirks & XHCI_AMD_PLL_FIX)
746 usb_amd_quirk_pll_enable();
749 usb_hcd_unlink_urb_from_ep(hcd, urb);
751 spin_unlock(&xhci->lock);
752 usb_hcd_giveback_urb(hcd, urb, status);
753 xhci_urb_free_priv(xhci, urb_priv);
754 spin_lock(&xhci->lock);
759 * When we get a command completion for a Stop Endpoint Command, we need to
760 * unlink any cancelled TDs from the ring. There are two ways to do that:
762 * 1. If the HW was in the middle of processing the TD that needs to be
763 * cancelled, then we must move the ring's dequeue pointer past the last TRB
764 * in the TD with a Set Dequeue Pointer Command.
765 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
766 * bit cleared) so that the HW will skip over them.
768 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci,
769 union xhci_trb *trb, struct xhci_event_cmd *event)
771 unsigned int slot_id;
772 unsigned int ep_index;
773 struct xhci_virt_device *virt_dev;
774 struct xhci_ring *ep_ring;
775 struct xhci_virt_ep *ep;
776 struct list_head *entry;
777 struct xhci_td *cur_td = NULL;
778 struct xhci_td *last_unlinked_td;
780 struct xhci_dequeue_state deq_state;
782 if (unlikely(TRB_TO_SUSPEND_PORT(
783 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])))) {
784 slot_id = TRB_TO_SLOT_ID(
785 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]));
786 virt_dev = xhci->devs[slot_id];
788 handle_cmd_in_cmd_wait_list(xhci, virt_dev,
791 xhci_warn(xhci, "Stop endpoint command "
792 "completion for disabled slot %u\n",
797 memset(&deq_state, 0, sizeof(deq_state));
798 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
799 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
800 ep = &xhci->devs[slot_id]->eps[ep_index];
802 if (list_empty(&ep->cancelled_td_list)) {
803 xhci_stop_watchdog_timer_in_irq(xhci, ep);
804 ep->stopped_td = NULL;
805 ep->stopped_trb = NULL;
806 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
810 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
811 * We have the xHCI lock, so nothing can modify this list until we drop
812 * it. We're also in the event handler, so we can't get re-interrupted
813 * if another Stop Endpoint command completes
815 list_for_each(entry, &ep->cancelled_td_list) {
816 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
817 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
818 "Removing canceled TD starting at 0x%llx (dma).",
819 (unsigned long long)xhci_trb_virt_to_dma(
820 cur_td->start_seg, cur_td->first_trb));
821 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
823 /* This shouldn't happen unless a driver is mucking
824 * with the stream ID after submission. This will
825 * leave the TD on the hardware ring, and the hardware
826 * will try to execute it, and may access a buffer
827 * that has already been freed. In the best case, the
828 * hardware will execute it, and the event handler will
829 * ignore the completion event for that TD, since it was
830 * removed from the td_list for that endpoint. In
831 * short, don't muck with the stream ID after
834 xhci_warn(xhci, "WARN Cancelled URB %p "
835 "has invalid stream ID %u.\n",
837 cur_td->urb->stream_id);
838 goto remove_finished_td;
841 * If we stopped on the TD we need to cancel, then we have to
842 * move the xHC endpoint ring dequeue pointer past this TD.
844 if (cur_td == ep->stopped_td)
845 xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
846 cur_td->urb->stream_id,
849 td_to_noop(xhci, ep_ring, cur_td, false);
852 * The event handler won't see a completion for this TD anymore,
853 * so remove it from the endpoint ring's TD list. Keep it in
854 * the cancelled TD list for URB completion later.
856 list_del_init(&cur_td->td_list);
858 last_unlinked_td = cur_td;
859 xhci_stop_watchdog_timer_in_irq(xhci, ep);
861 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
862 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
863 xhci_queue_new_dequeue_state(xhci,
865 ep->stopped_td->urb->stream_id,
867 xhci_ring_cmd_db(xhci);
869 /* Otherwise ring the doorbell(s) to restart queued transfers */
870 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
873 /* Clear stopped_td and stopped_trb if endpoint is not halted */
874 if (!(ep->ep_state & EP_HALTED)) {
875 ep->stopped_td = NULL;
876 ep->stopped_trb = NULL;
880 * Drop the lock and complete the URBs in the cancelled TD list.
881 * New TDs to be cancelled might be added to the end of the list before
882 * we can complete all the URBs for the TDs we already unlinked.
883 * So stop when we've completed the URB for the last TD we unlinked.
886 cur_td = list_entry(ep->cancelled_td_list.next,
887 struct xhci_td, cancelled_td_list);
888 list_del_init(&cur_td->cancelled_td_list);
890 /* Clean up the cancelled URB */
891 /* Doesn't matter what we pass for status, since the core will
892 * just overwrite it (because the URB has been unlinked).
894 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
896 /* Stop processing the cancelled list if the watchdog timer is
899 if (xhci->xhc_state & XHCI_STATE_DYING)
901 } while (cur_td != last_unlinked_td);
903 /* Return to the event handler with xhci->lock re-acquired */
906 /* Watchdog timer function for when a stop endpoint command fails to complete.
907 * In this case, we assume the host controller is broken or dying or dead. The
908 * host may still be completing some other events, so we have to be careful to
909 * let the event ring handler and the URB dequeueing/enqueueing functions know
910 * through xhci->state.
912 * The timer may also fire if the host takes a very long time to respond to the
913 * command, and the stop endpoint command completion handler cannot delete the
914 * timer before the timer function is called. Another endpoint cancellation may
915 * sneak in before the timer function can grab the lock, and that may queue
916 * another stop endpoint command and add the timer back. So we cannot use a
917 * simple flag to say whether there is a pending stop endpoint command for a
918 * particular endpoint.
920 * Instead we use a combination of that flag and a counter for the number of
921 * pending stop endpoint commands. If the timer is the tail end of the last
922 * stop endpoint command, and the endpoint's command is still pending, we assume
925 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
927 struct xhci_hcd *xhci;
928 struct xhci_virt_ep *ep;
929 struct xhci_virt_ep *temp_ep;
930 struct xhci_ring *ring;
931 struct xhci_td *cur_td;
935 ep = (struct xhci_virt_ep *) arg;
938 spin_lock_irqsave(&xhci->lock, flags);
940 ep->stop_cmds_pending--;
941 if (xhci->xhc_state & XHCI_STATE_DYING) {
942 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
943 "Stop EP timer ran, but another timer marked "
944 "xHCI as DYING, exiting.");
945 spin_unlock_irqrestore(&xhci->lock, flags);
948 if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
949 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
950 "Stop EP timer ran, but no command pending, "
952 spin_unlock_irqrestore(&xhci->lock, flags);
956 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
957 xhci_warn(xhci, "Assuming host is dying, halting host.\n");
958 /* Oops, HC is dead or dying or at least not responding to the stop
961 xhci->xhc_state |= XHCI_STATE_DYING;
962 /* Disable interrupts from the host controller and start halting it */
964 spin_unlock_irqrestore(&xhci->lock, flags);
966 ret = xhci_halt(xhci);
968 spin_lock_irqsave(&xhci->lock, flags);
970 /* This is bad; the host is not responding to commands and it's
971 * not allowing itself to be halted. At least interrupts are
972 * disabled. If we call usb_hc_died(), it will attempt to
973 * disconnect all device drivers under this host. Those
974 * disconnect() methods will wait for all URBs to be unlinked,
975 * so we must complete them.
977 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
978 xhci_warn(xhci, "Completing active URBs anyway.\n");
979 /* We could turn all TDs on the rings to no-ops. This won't
980 * help if the host has cached part of the ring, and is slow if
981 * we want to preserve the cycle bit. Skip it and hope the host
982 * doesn't touch the memory.
985 for (i = 0; i < MAX_HC_SLOTS; i++) {
988 for (j = 0; j < 31; j++) {
989 temp_ep = &xhci->devs[i]->eps[j];
990 ring = temp_ep->ring;
993 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
994 "Killing URBs for slot ID %u, "
995 "ep index %u", i, j);
996 while (!list_empty(&ring->td_list)) {
997 cur_td = list_first_entry(&ring->td_list,
1000 list_del_init(&cur_td->td_list);
1001 if (!list_empty(&cur_td->cancelled_td_list))
1002 list_del_init(&cur_td->cancelled_td_list);
1003 xhci_giveback_urb_in_irq(xhci, cur_td,
1006 while (!list_empty(&temp_ep->cancelled_td_list)) {
1007 cur_td = list_first_entry(
1008 &temp_ep->cancelled_td_list,
1011 list_del_init(&cur_td->cancelled_td_list);
1012 xhci_giveback_urb_in_irq(xhci, cur_td,
1017 spin_unlock_irqrestore(&xhci->lock, flags);
1018 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1019 "Calling usb_hc_died()");
1020 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1021 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1022 "xHCI host controller is dead.");
1026 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
1027 struct xhci_virt_device *dev,
1028 struct xhci_ring *ep_ring,
1029 unsigned int ep_index)
1031 union xhci_trb *dequeue_temp;
1032 int num_trbs_free_temp;
1033 bool revert = false;
1035 num_trbs_free_temp = ep_ring->num_trbs_free;
1036 dequeue_temp = ep_ring->dequeue;
1038 /* If we get two back-to-back stalls, and the first stalled transfer
1039 * ends just before a link TRB, the dequeue pointer will be left on
1040 * the link TRB by the code in the while loop. So we have to update
1041 * the dequeue pointer one segment further, or we'll jump off
1042 * the segment into la-la-land.
1044 if (last_trb(xhci, ep_ring, ep_ring->deq_seg, ep_ring->dequeue)) {
1045 ep_ring->deq_seg = ep_ring->deq_seg->next;
1046 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1049 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
1050 /* We have more usable TRBs */
1051 ep_ring->num_trbs_free++;
1053 if (last_trb(xhci, ep_ring, ep_ring->deq_seg,
1054 ep_ring->dequeue)) {
1055 if (ep_ring->dequeue ==
1056 dev->eps[ep_index].queued_deq_ptr)
1058 ep_ring->deq_seg = ep_ring->deq_seg->next;
1059 ep_ring->dequeue = ep_ring->deq_seg->trbs;
1061 if (ep_ring->dequeue == dequeue_temp) {
1068 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
1069 ep_ring->num_trbs_free = num_trbs_free_temp;
1074 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1075 * we need to clear the set deq pending flag in the endpoint ring state, so that
1076 * the TD queueing code can ring the doorbell again. We also need to ring the
1077 * endpoint doorbell to restart the ring, but only if there aren't more
1078 * cancellations pending.
1080 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci,
1081 struct xhci_event_cmd *event, union xhci_trb *trb)
1083 unsigned int slot_id;
1084 unsigned int ep_index;
1085 unsigned int stream_id;
1086 struct xhci_ring *ep_ring;
1087 struct xhci_virt_device *dev;
1088 struct xhci_ep_ctx *ep_ctx;
1089 struct xhci_slot_ctx *slot_ctx;
1091 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1092 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1093 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1094 dev = xhci->devs[slot_id];
1096 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1098 xhci_warn(xhci, "WARN Set TR deq ptr command for "
1099 "freed stream ID %u\n",
1101 /* XXX: Harmless??? */
1102 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1106 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1107 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1109 if (GET_COMP_CODE(le32_to_cpu(event->status)) != COMP_SUCCESS) {
1110 unsigned int ep_state;
1111 unsigned int slot_state;
1113 switch (GET_COMP_CODE(le32_to_cpu(event->status))) {
1115 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because "
1116 "of stream ID configuration\n");
1118 case COMP_CTX_STATE:
1119 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due "
1120 "to incorrect slot or ep state.\n");
1121 ep_state = le32_to_cpu(ep_ctx->ep_info);
1122 ep_state &= EP_STATE_MASK;
1123 slot_state = le32_to_cpu(slot_ctx->dev_state);
1124 slot_state = GET_SLOT_STATE(slot_state);
1125 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1126 "Slot state = %u, EP state = %u",
1127 slot_state, ep_state);
1130 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because "
1131 "slot %u was not enabled.\n", slot_id);
1134 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown "
1135 "completion code of %u.\n",
1136 GET_COMP_CODE(le32_to_cpu(event->status)));
1139 /* OK what do we do now? The endpoint state is hosed, and we
1140 * should never get to this point if the synchronization between
1141 * queueing, and endpoint state are correct. This might happen
1142 * if the device gets disconnected after we've finished
1143 * cancelling URBs, which might not be an error...
1146 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1147 "Successful Set TR Deq Ptr cmd, deq = @%08llx",
1148 le64_to_cpu(ep_ctx->deq));
1149 if (xhci_trb_virt_to_dma(dev->eps[ep_index].queued_deq_seg,
1150 dev->eps[ep_index].queued_deq_ptr) ==
1151 (le64_to_cpu(ep_ctx->deq) & ~(EP_CTX_CYCLE_MASK))) {
1152 /* Update the ring's dequeue segment and dequeue pointer
1153 * to reflect the new position.
1155 update_ring_for_set_deq_completion(xhci, dev,
1158 xhci_warn(xhci, "Mismatch between completed Set TR Deq "
1159 "Ptr command & xHCI internal state.\n");
1160 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1161 dev->eps[ep_index].queued_deq_seg,
1162 dev->eps[ep_index].queued_deq_ptr);
1166 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1167 dev->eps[ep_index].queued_deq_seg = NULL;
1168 dev->eps[ep_index].queued_deq_ptr = NULL;
1169 /* Restart any rings with pending URBs */
1170 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1173 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci,
1174 struct xhci_event_cmd *event, union xhci_trb *trb)
1177 unsigned int ep_index;
1179 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(trb->generic.field[3]));
1180 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1181 /* This command will only fail if the endpoint wasn't halted,
1182 * but we don't care.
1184 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1185 "Ignoring reset ep completion code of %u",
1186 GET_COMP_CODE(le32_to_cpu(event->status)));
1188 /* HW with the reset endpoint quirk needs to have a configure endpoint
1189 * command complete before the endpoint can be used. Queue that here
1190 * because the HW can't handle two commands being queued in a row.
1192 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1193 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1194 "Queueing configure endpoint command");
1195 xhci_queue_configure_endpoint(xhci,
1196 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1198 xhci_ring_cmd_db(xhci);
1200 /* Clear our internal halted state and restart the ring(s) */
1201 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1202 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1206 /* Complete the command and detele it from the devcie's command queue.
1208 static void xhci_complete_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1209 struct xhci_command *command, u32 status)
1211 command->status = status;
1212 list_del(&command->cmd_list);
1213 if (command->completion)
1214 complete(command->completion);
1216 xhci_free_command(xhci, command);
1220 /* Check to see if a command in the device's command queue matches this one.
1221 * Signal the completion or free the command, and return 1. Return 0 if the
1222 * completed command isn't at the head of the command list.
1224 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd *xhci,
1225 struct xhci_virt_device *virt_dev,
1226 struct xhci_event_cmd *event)
1228 struct xhci_command *command;
1230 if (list_empty(&virt_dev->cmd_list))
1233 command = list_entry(virt_dev->cmd_list.next,
1234 struct xhci_command, cmd_list);
1235 if (xhci->cmd_ring->dequeue != command->command_trb)
1238 xhci_complete_cmd_in_cmd_wait_list(xhci, command,
1239 GET_COMP_CODE(le32_to_cpu(event->status)));
1244 * Finding the command trb need to be cancelled and modifying it to
1245 * NO OP command. And if the command is in device's command wait
1246 * list, finishing and freeing it.
1248 * If we can't find the command trb, we think it had already been
1251 static void xhci_cmd_to_noop(struct xhci_hcd *xhci, struct xhci_cd *cur_cd)
1253 struct xhci_segment *cur_seg;
1254 union xhci_trb *cmd_trb;
1257 if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1260 /* find the current segment of command ring */
1261 cur_seg = find_trb_seg(xhci->cmd_ring->first_seg,
1262 xhci->cmd_ring->dequeue, &cycle_state);
1265 xhci_warn(xhci, "Command ring mismatch, dequeue = %p %llx (dma)\n",
1266 xhci->cmd_ring->dequeue,
1267 (unsigned long long)
1268 xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1269 xhci->cmd_ring->dequeue));
1270 xhci_debug_ring(xhci, xhci->cmd_ring);
1271 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
1275 /* find the command trb matched by cd from command ring */
1276 for (cmd_trb = xhci->cmd_ring->dequeue;
1277 cmd_trb != xhci->cmd_ring->enqueue;
1278 next_trb(xhci, xhci->cmd_ring, &cur_seg, &cmd_trb)) {
1279 /* If the trb is link trb, continue */
1280 if (TRB_TYPE_LINK_LE32(cmd_trb->generic.field[3]))
1283 if (cur_cd->cmd_trb == cmd_trb) {
1285 /* If the command in device's command list, we should
1286 * finish it and free the command structure.
1288 if (cur_cd->command)
1289 xhci_complete_cmd_in_cmd_wait_list(xhci,
1290 cur_cd->command, COMP_CMD_STOP);
1292 /* get cycle state from the origin command trb */
1293 cycle_state = le32_to_cpu(cmd_trb->generic.field[3])
1296 /* modify the command trb to NO OP command */
1297 cmd_trb->generic.field[0] = 0;
1298 cmd_trb->generic.field[1] = 0;
1299 cmd_trb->generic.field[2] = 0;
1300 cmd_trb->generic.field[3] = cpu_to_le32(
1301 TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
1307 static void xhci_cancel_cmd_in_cd_list(struct xhci_hcd *xhci)
1309 struct xhci_cd *cur_cd, *next_cd;
1311 if (list_empty(&xhci->cancel_cmd_list))
1314 list_for_each_entry_safe(cur_cd, next_cd,
1315 &xhci->cancel_cmd_list, cancel_cmd_list) {
1316 xhci_cmd_to_noop(xhci, cur_cd);
1317 list_del(&cur_cd->cancel_cmd_list);
1323 * traversing the cancel_cmd_list. If the command descriptor according
1324 * to cmd_trb is found, the function free it and return 1, otherwise
1327 static int xhci_search_cmd_trb_in_cd_list(struct xhci_hcd *xhci,
1328 union xhci_trb *cmd_trb)
1330 struct xhci_cd *cur_cd, *next_cd;
1332 if (list_empty(&xhci->cancel_cmd_list))
1335 list_for_each_entry_safe(cur_cd, next_cd,
1336 &xhci->cancel_cmd_list, cancel_cmd_list) {
1337 if (cur_cd->cmd_trb == cmd_trb) {
1338 if (cur_cd->command)
1339 xhci_complete_cmd_in_cmd_wait_list(xhci,
1340 cur_cd->command, COMP_CMD_STOP);
1341 list_del(&cur_cd->cancel_cmd_list);
1351 * If the cmd_trb_comp_code is COMP_CMD_ABORT, we just check whether the
1352 * trb pointed by the command ring dequeue pointer is the trb we want to
1353 * cancel or not. And if the cmd_trb_comp_code is COMP_CMD_STOP, we will
1354 * traverse the cancel_cmd_list to trun the all of the commands according
1355 * to command descriptor to NO-OP trb.
1357 static int handle_stopped_cmd_ring(struct xhci_hcd *xhci,
1358 int cmd_trb_comp_code)
1360 int cur_trb_is_good = 0;
1362 /* Searching the cmd trb pointed by the command ring dequeue
1363 * pointer in command descriptor list. If it is found, free it.
1365 cur_trb_is_good = xhci_search_cmd_trb_in_cd_list(xhci,
1366 xhci->cmd_ring->dequeue);
1368 if (cmd_trb_comp_code == COMP_CMD_ABORT)
1369 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1370 else if (cmd_trb_comp_code == COMP_CMD_STOP) {
1371 /* traversing the cancel_cmd_list and canceling
1372 * the command according to command descriptor
1374 xhci_cancel_cmd_in_cd_list(xhci);
1376 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
1378 * ring command ring doorbell again to restart the
1381 if (xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue)
1382 xhci_ring_cmd_db(xhci);
1384 return cur_trb_is_good;
1387 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1390 if (cmd_comp_code == COMP_SUCCESS)
1391 xhci->slot_id = slot_id;
1394 complete(&xhci->addr_dev);
1397 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1399 struct xhci_virt_device *virt_dev;
1401 virt_dev = xhci->devs[slot_id];
1404 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1405 /* Delete default control endpoint resources */
1406 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1407 xhci_free_virt_device(xhci, slot_id);
1410 static void xhci_handle_cmd_addr_dev(struct xhci_hcd *xhci, int slot_id,
1413 xhci->devs[slot_id]->cmd_status = cmd_comp_code;
1414 complete(&xhci->addr_dev);
1417 static void handle_cmd_completion(struct xhci_hcd *xhci,
1418 struct xhci_event_cmd *event)
1420 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1422 dma_addr_t cmd_dequeue_dma;
1423 struct xhci_input_control_ctx *ctrl_ctx;
1424 struct xhci_virt_device *virt_dev;
1425 unsigned int ep_index;
1426 struct xhci_ring *ep_ring;
1427 unsigned int ep_state;
1429 cmd_dma = le64_to_cpu(event->cmd_trb);
1430 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1431 xhci->cmd_ring->dequeue);
1432 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
1433 if (cmd_dequeue_dma == 0) {
1434 xhci->error_bitmask |= 1 << 4;
1437 /* Does the DMA address match our internal dequeue pointer address? */
1438 if (cmd_dma != (u64) cmd_dequeue_dma) {
1439 xhci->error_bitmask |= 1 << 5;
1443 trace_xhci_cmd_completion(&xhci->cmd_ring->dequeue->generic,
1444 (struct xhci_generic_trb *) event);
1446 if ((GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_ABORT) ||
1447 (GET_COMP_CODE(le32_to_cpu(event->status)) == COMP_CMD_STOP)) {
1448 /* If the return value is 0, we think the trb pointed by
1449 * command ring dequeue pointer is a good trb. The good
1450 * trb means we don't want to cancel the trb, but it have
1451 * been stopped by host. So we should handle it normally.
1452 * Otherwise, driver should invoke inc_deq() and return.
1454 if (handle_stopped_cmd_ring(xhci,
1455 GET_COMP_CODE(le32_to_cpu(event->status)))) {
1456 inc_deq(xhci, xhci->cmd_ring);
1459 /* There is no command to handle if we get a stop event when the
1460 * command ring is empty, event->cmd_trb points to the next
1463 if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue)
1467 switch (le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])
1468 & TRB_TYPE_BITMASK) {
1469 case TRB_TYPE(TRB_ENABLE_SLOT):
1470 xhci_handle_cmd_enable_slot(xhci, slot_id,
1471 GET_COMP_CODE(le32_to_cpu(event->status)));
1473 case TRB_TYPE(TRB_DISABLE_SLOT):
1474 xhci_handle_cmd_disable_slot(xhci, slot_id);
1476 case TRB_TYPE(TRB_CONFIG_EP):
1477 virt_dev = xhci->devs[slot_id];
1478 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1481 * Configure endpoint commands can come from the USB core
1482 * configuration or alt setting changes, or because the HW
1483 * needed an extra configure endpoint command after a reset
1484 * endpoint command or streams were being configured.
1485 * If the command was for a halted endpoint, the xHCI driver
1486 * is not waiting on the configure endpoint command.
1488 ctrl_ctx = xhci_get_input_control_ctx(xhci,
1491 xhci_warn(xhci, "Could not get input context, bad type.\n");
1494 /* Input ctx add_flags are the endpoint index plus one */
1495 ep_index = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags)) - 1;
1496 /* A usb_set_interface() call directly after clearing a halted
1497 * condition may race on this quirky hardware. Not worth
1498 * worrying about, since this is prototype hardware. Not sure
1499 * if this will work for streams, but streams support was
1500 * untested on this prototype.
1502 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1503 ep_index != (unsigned int) -1 &&
1504 le32_to_cpu(ctrl_ctx->add_flags) - SLOT_FLAG ==
1505 le32_to_cpu(ctrl_ctx->drop_flags)) {
1506 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
1507 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1508 if (!(ep_state & EP_HALTED))
1509 goto bandwidth_change;
1510 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1511 "Completed config ep cmd - "
1512 "last ep index = %d, state = %d",
1513 ep_index, ep_state);
1514 /* Clear internal halted state and restart ring(s) */
1515 xhci->devs[slot_id]->eps[ep_index].ep_state &=
1517 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1521 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1522 "Completed config ep cmd");
1523 xhci->devs[slot_id]->cmd_status =
1524 GET_COMP_CODE(le32_to_cpu(event->status));
1525 complete(&xhci->devs[slot_id]->cmd_completion);
1527 case TRB_TYPE(TRB_EVAL_CONTEXT):
1528 virt_dev = xhci->devs[slot_id];
1529 if (handle_cmd_in_cmd_wait_list(xhci, virt_dev, event))
1531 xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(le32_to_cpu(event->status));
1532 complete(&xhci->devs[slot_id]->cmd_completion);
1534 case TRB_TYPE(TRB_ADDR_DEV):
1535 xhci_handle_cmd_addr_dev(xhci, slot_id,
1536 GET_COMP_CODE(le32_to_cpu(event->status)));
1538 case TRB_TYPE(TRB_STOP_RING):
1539 xhci_handle_cmd_stop_ep(xhci, xhci->cmd_ring->dequeue, event);
1541 case TRB_TYPE(TRB_SET_DEQ):
1542 xhci_handle_cmd_set_deq(xhci, event, xhci->cmd_ring->dequeue);
1544 case TRB_TYPE(TRB_CMD_NOOP):
1546 case TRB_TYPE(TRB_RESET_EP):
1547 xhci_handle_cmd_reset_ep(xhci, event, xhci->cmd_ring->dequeue);
1549 case TRB_TYPE(TRB_RESET_DEV):
1550 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1551 le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3])));
1552 xhci_dbg(xhci, "Completed reset device command.\n");
1553 virt_dev = xhci->devs[slot_id];
1555 handle_cmd_in_cmd_wait_list(xhci, virt_dev, event);
1557 xhci_warn(xhci, "Reset device command completion "
1558 "for disabled slot %u\n", slot_id);
1560 case TRB_TYPE(TRB_NEC_GET_FW):
1561 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1562 xhci->error_bitmask |= 1 << 6;
1565 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1566 "NEC firmware version %2x.%02x",
1567 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1568 NEC_FW_MINOR(le32_to_cpu(event->status)));
1571 /* Skip over unknown commands on the event ring */
1572 xhci->error_bitmask |= 1 << 6;
1575 inc_deq(xhci, xhci->cmd_ring);
1578 static void handle_vendor_event(struct xhci_hcd *xhci,
1579 union xhci_trb *event)
1583 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1584 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1585 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1586 handle_cmd_completion(xhci, &event->event_cmd);
1589 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1590 * port registers -- USB 3.0 and USB 2.0).
1592 * Returns a zero-based port number, which is suitable for indexing into each of
1593 * the split roothubs' port arrays and bus state arrays.
1594 * Add one to it in order to call xhci_find_slot_id_by_port.
1596 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1597 struct xhci_hcd *xhci, u32 port_id)
1600 unsigned int num_similar_speed_ports = 0;
1602 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1603 * and usb2_ports are 0-based indexes. Count the number of similar
1604 * speed ports, up to 1 port before this port.
1606 for (i = 0; i < (port_id - 1); i++) {
1607 u8 port_speed = xhci->port_array[i];
1610 * Skip ports that don't have known speeds, or have duplicate
1611 * Extended Capabilities port speed entries.
1613 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1617 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1618 * 1.1 ports are under the USB 2.0 hub. If the port speed
1619 * matches the device speed, it's a similar speed port.
1621 if ((port_speed == 0x03) == (hcd->speed == HCD_USB3))
1622 num_similar_speed_ports++;
1624 return num_similar_speed_ports;
1627 static void handle_device_notification(struct xhci_hcd *xhci,
1628 union xhci_trb *event)
1631 struct usb_device *udev;
1633 slot_id = TRB_TO_SLOT_ID(event->generic.field[3]);
1634 if (!xhci->devs[slot_id]) {
1635 xhci_warn(xhci, "Device Notification event for "
1636 "unused slot %u\n", slot_id);
1640 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1642 udev = xhci->devs[slot_id]->udev;
1643 if (udev && udev->parent)
1644 usb_wakeup_notification(udev->parent, udev->portnum);
1647 static void handle_port_status(struct xhci_hcd *xhci,
1648 union xhci_trb *event)
1650 struct usb_hcd *hcd;
1655 unsigned int faked_port_index;
1657 struct xhci_bus_state *bus_state;
1658 __le32 __iomem **port_array;
1659 bool bogus_port_status = false;
1661 /* Port status change events always have a successful completion code */
1662 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
1663 xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
1664 xhci->error_bitmask |= 1 << 8;
1666 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1667 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1669 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1670 if ((port_id <= 0) || (port_id > max_ports)) {
1671 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1672 inc_deq(xhci, xhci->event_ring);
1676 /* Figure out which usb_hcd this port is attached to:
1677 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1679 major_revision = xhci->port_array[port_id - 1];
1681 /* Find the right roothub. */
1682 hcd = xhci_to_hcd(xhci);
1683 if ((major_revision == 0x03) != (hcd->speed == HCD_USB3))
1684 hcd = xhci->shared_hcd;
1686 if (major_revision == 0) {
1687 xhci_warn(xhci, "Event for port %u not in "
1688 "Extended Capabilities, ignoring.\n",
1690 bogus_port_status = true;
1693 if (major_revision == DUPLICATE_ENTRY) {
1694 xhci_warn(xhci, "Event for port %u duplicated in"
1695 "Extended Capabilities, ignoring.\n",
1697 bogus_port_status = true;
1702 * Hardware port IDs reported by a Port Status Change Event include USB
1703 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1704 * resume event, but we first need to translate the hardware port ID
1705 * into the index into the ports on the correct split roothub, and the
1706 * correct bus_state structure.
1708 bus_state = &xhci->bus_state[hcd_index(hcd)];
1709 if (hcd->speed == HCD_USB3)
1710 port_array = xhci->usb3_ports;
1712 port_array = xhci->usb2_ports;
1713 /* Find the faked port hub number */
1714 faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1717 temp = xhci_readl(xhci, port_array[faked_port_index]);
1718 if (hcd->state == HC_STATE_SUSPENDED) {
1719 xhci_dbg(xhci, "resume root hub\n");
1720 usb_hcd_resume_root_hub(hcd);
1723 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1724 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1726 temp1 = xhci_readl(xhci, &xhci->op_regs->command);
1727 if (!(temp1 & CMD_RUN)) {
1728 xhci_warn(xhci, "xHC is not running.\n");
1732 if (DEV_SUPERSPEED(temp)) {
1733 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1734 /* Set a flag to say the port signaled remote wakeup,
1735 * so we can tell the difference between the end of
1736 * device and host initiated resume.
1738 bus_state->port_remote_wakeup |= 1 << faked_port_index;
1739 xhci_test_and_clear_bit(xhci, port_array,
1740 faked_port_index, PORT_PLC);
1741 xhci_set_link_state(xhci, port_array, faked_port_index,
1743 /* Need to wait until the next link state change
1744 * indicates the device is actually in U0.
1746 bogus_port_status = true;
1749 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1750 bus_state->resume_done[faked_port_index] = jiffies +
1751 msecs_to_jiffies(20);
1752 set_bit(faked_port_index, &bus_state->resuming_ports);
1753 mod_timer(&hcd->rh_timer,
1754 bus_state->resume_done[faked_port_index]);
1755 /* Do the rest in GetPortStatus */
1759 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_U0 &&
1760 DEV_SUPERSPEED(temp)) {
1761 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1762 /* We've just brought the device into U0 through either the
1763 * Resume state after a device remote wakeup, or through the
1764 * U3Exit state after a host-initiated resume. If it's a device
1765 * initiated remote wake, don't pass up the link state change,
1766 * so the roothub behavior is consistent with external
1767 * USB 3.0 hub behavior.
1769 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1770 faked_port_index + 1);
1771 if (slot_id && xhci->devs[slot_id])
1772 xhci_ring_device(xhci, slot_id);
1773 if (bus_state->port_remote_wakeup & (1 << faked_port_index)) {
1774 bus_state->port_remote_wakeup &=
1775 ~(1 << faked_port_index);
1776 xhci_test_and_clear_bit(xhci, port_array,
1777 faked_port_index, PORT_PLC);
1778 usb_wakeup_notification(hcd->self.root_hub,
1779 faked_port_index + 1);
1780 bogus_port_status = true;
1786 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1787 * RExit to a disconnect state). If so, let the the driver know it's
1788 * out of the RExit state.
1790 if (!DEV_SUPERSPEED(temp) &&
1791 test_and_clear_bit(faked_port_index,
1792 &bus_state->rexit_ports)) {
1793 complete(&bus_state->rexit_done[faked_port_index]);
1794 bogus_port_status = true;
1798 if (hcd->speed != HCD_USB3)
1799 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1803 /* Update event ring dequeue pointer before dropping the lock */
1804 inc_deq(xhci, xhci->event_ring);
1806 /* Don't make the USB core poll the roothub if we got a bad port status
1807 * change event. Besides, at that point we can't tell which roothub
1808 * (USB 2.0 or USB 3.0) to kick.
1810 if (bogus_port_status)
1814 * xHCI port-status-change events occur when the "or" of all the
1815 * status-change bits in the portsc register changes from 0 to 1.
1816 * New status changes won't cause an event if any other change
1817 * bits are still set. When an event occurs, switch over to
1818 * polling to avoid losing status changes.
1820 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1821 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1822 spin_unlock(&xhci->lock);
1823 /* Pass this up to the core */
1824 usb_hcd_poll_rh_status(hcd);
1825 spin_lock(&xhci->lock);
1829 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1830 * at end_trb, which may be in another segment. If the suspect DMA address is a
1831 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1834 struct xhci_segment *trb_in_td(struct xhci_segment *start_seg,
1835 union xhci_trb *start_trb,
1836 union xhci_trb *end_trb,
1837 dma_addr_t suspect_dma)
1839 dma_addr_t start_dma;
1840 dma_addr_t end_seg_dma;
1841 dma_addr_t end_trb_dma;
1842 struct xhci_segment *cur_seg;
1844 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1845 cur_seg = start_seg;
1850 /* We may get an event for a Link TRB in the middle of a TD */
1851 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1852 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1853 /* If the end TRB isn't in this segment, this is set to 0 */
1854 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1856 if (end_trb_dma > 0) {
1857 /* The end TRB is in this segment, so suspect should be here */
1858 if (start_dma <= end_trb_dma) {
1859 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1862 /* Case for one segment with
1863 * a TD wrapped around to the top
1865 if ((suspect_dma >= start_dma &&
1866 suspect_dma <= end_seg_dma) ||
1867 (suspect_dma >= cur_seg->dma &&
1868 suspect_dma <= end_trb_dma))
1873 /* Might still be somewhere in this segment */
1874 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1877 cur_seg = cur_seg->next;
1878 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1879 } while (cur_seg != start_seg);
1884 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1885 unsigned int slot_id, unsigned int ep_index,
1886 unsigned int stream_id,
1887 struct xhci_td *td, union xhci_trb *event_trb)
1889 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1890 ep->ep_state |= EP_HALTED;
1891 ep->stopped_td = td;
1892 ep->stopped_trb = event_trb;
1893 ep->stopped_stream = stream_id;
1895 xhci_queue_reset_ep(xhci, slot_id, ep_index);
1896 xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
1898 ep->stopped_td = NULL;
1899 ep->stopped_trb = NULL;
1900 ep->stopped_stream = 0;
1902 xhci_ring_cmd_db(xhci);
1905 /* Check if an error has halted the endpoint ring. The class driver will
1906 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1907 * However, a babble and other errors also halt the endpoint ring, and the class
1908 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1909 * Ring Dequeue Pointer command manually.
1911 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1912 struct xhci_ep_ctx *ep_ctx,
1913 unsigned int trb_comp_code)
1915 /* TRB completion codes that may require a manual halt cleanup */
1916 if (trb_comp_code == COMP_TX_ERR ||
1917 trb_comp_code == COMP_BABBLE ||
1918 trb_comp_code == COMP_SPLIT_ERR)
1919 /* The 0.96 spec says a babbling control endpoint
1920 * is not halted. The 0.96 spec says it is. Some HW
1921 * claims to be 0.95 compliant, but it halts the control
1922 * endpoint anyway. Check if a babble halted the
1925 if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1926 cpu_to_le32(EP_STATE_HALTED))
1932 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1934 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1935 /* Vendor defined "informational" completion code,
1936 * treat as not-an-error.
1938 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1940 xhci_dbg(xhci, "Treating code as success.\n");
1947 * Finish the td processing, remove the td from td list;
1948 * Return 1 if the urb can be given back.
1950 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1951 union xhci_trb *event_trb, struct xhci_transfer_event *event,
1952 struct xhci_virt_ep *ep, int *status, bool skip)
1954 struct xhci_virt_device *xdev;
1955 struct xhci_ring *ep_ring;
1956 unsigned int slot_id;
1958 struct urb *urb = NULL;
1959 struct xhci_ep_ctx *ep_ctx;
1961 struct urb_priv *urb_priv;
1964 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1965 xdev = xhci->devs[slot_id];
1966 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1967 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1968 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1969 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1974 if (trb_comp_code == COMP_STOP_INVAL ||
1975 trb_comp_code == COMP_STOP) {
1976 /* The Endpoint Stop Command completion will take care of any
1977 * stopped TDs. A stopped TD may be restarted, so don't update
1978 * the ring dequeue pointer or take this TD off any lists yet.
1980 ep->stopped_td = td;
1981 ep->stopped_trb = event_trb;
1984 if (trb_comp_code == COMP_STALL) {
1985 /* The transfer is completed from the driver's
1986 * perspective, but we need to issue a set dequeue
1987 * command for this stalled endpoint to move the dequeue
1988 * pointer past the TD. We can't do that here because
1989 * the halt condition must be cleared first. Let the
1990 * USB class driver clear the stall later.
1992 ep->stopped_td = td;
1993 ep->stopped_trb = event_trb;
1994 ep->stopped_stream = ep_ring->stream_id;
1995 } else if (xhci_requires_manual_halt_cleanup(xhci,
1996 ep_ctx, trb_comp_code)) {
1997 /* Other types of errors halt the endpoint, but the
1998 * class driver doesn't call usb_reset_endpoint() unless
1999 * the error is -EPIPE. Clear the halted status in the
2000 * xHCI hardware manually.
2002 xhci_cleanup_halted_endpoint(xhci,
2003 slot_id, ep_index, ep_ring->stream_id,
2006 /* Update ring dequeue pointer */
2007 while (ep_ring->dequeue != td->last_trb)
2008 inc_deq(xhci, ep_ring);
2009 inc_deq(xhci, ep_ring);
2013 /* Clean up the endpoint's TD list */
2015 urb_priv = urb->hcpriv;
2017 /* Do one last check of the actual transfer length.
2018 * If the host controller said we transferred more data than
2019 * the buffer length, urb->actual_length will be a very big
2020 * number (since it's unsigned). Play it safe and say we didn't
2021 * transfer anything.
2023 if (urb->actual_length > urb->transfer_buffer_length) {
2024 xhci_warn(xhci, "URB transfer length is wrong, "
2025 "xHC issue? req. len = %u, "
2027 urb->transfer_buffer_length,
2028 urb->actual_length);
2029 urb->actual_length = 0;
2030 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2031 *status = -EREMOTEIO;
2035 list_del_init(&td->td_list);
2036 /* Was this TD slated to be cancelled but completed anyway? */
2037 if (!list_empty(&td->cancelled_td_list))
2038 list_del_init(&td->cancelled_td_list);
2041 /* Giveback the urb when all the tds are completed */
2042 if (urb_priv->td_cnt == urb_priv->length) {
2044 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2045 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
2046 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs
2048 if (xhci->quirks & XHCI_AMD_PLL_FIX)
2049 usb_amd_quirk_pll_enable();
2059 * Process control tds, update urb status and actual_length.
2061 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
2062 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2063 struct xhci_virt_ep *ep, int *status)
2065 struct xhci_virt_device *xdev;
2066 struct xhci_ring *ep_ring;
2067 unsigned int slot_id;
2069 struct xhci_ep_ctx *ep_ctx;
2072 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2073 xdev = xhci->devs[slot_id];
2074 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2075 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2076 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2077 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2079 switch (trb_comp_code) {
2081 if (event_trb == ep_ring->dequeue) {
2082 xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
2083 "without IOC set??\n");
2084 *status = -ESHUTDOWN;
2085 } else if (event_trb != td->last_trb) {
2086 xhci_warn(xhci, "WARN: Success on ctrl data TRB "
2087 "without IOC set??\n");
2088 *status = -ESHUTDOWN;
2094 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2095 *status = -EREMOTEIO;
2099 case COMP_STOP_INVAL:
2101 return finish_td(xhci, td, event_trb, event, ep, status, false);
2103 if (!xhci_requires_manual_halt_cleanup(xhci,
2104 ep_ctx, trb_comp_code))
2106 xhci_dbg(xhci, "TRB error code %u, "
2107 "halted endpoint index = %u\n",
2108 trb_comp_code, ep_index);
2109 /* else fall through */
2111 /* Did we transfer part of the data (middle) phase? */
2112 if (event_trb != ep_ring->dequeue &&
2113 event_trb != td->last_trb)
2114 td->urb->actual_length =
2115 td->urb->transfer_buffer_length -
2116 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2118 td->urb->actual_length = 0;
2120 xhci_cleanup_halted_endpoint(xhci,
2121 slot_id, ep_index, 0, td, event_trb);
2122 return finish_td(xhci, td, event_trb, event, ep, status, true);
2125 * Did we transfer any data, despite the errors that might have
2126 * happened? I.e. did we get past the setup stage?
2128 if (event_trb != ep_ring->dequeue) {
2129 /* The event was for the status stage */
2130 if (event_trb == td->last_trb) {
2131 if (td->urb->actual_length != 0) {
2132 /* Don't overwrite a previously set error code
2134 if ((*status == -EINPROGRESS || *status == 0) &&
2135 (td->urb->transfer_flags
2136 & URB_SHORT_NOT_OK))
2137 /* Did we already see a short data
2139 *status = -EREMOTEIO;
2141 td->urb->actual_length =
2142 td->urb->transfer_buffer_length;
2145 /* Maybe the event was for the data stage? */
2146 td->urb->actual_length =
2147 td->urb->transfer_buffer_length -
2148 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2149 xhci_dbg(xhci, "Waiting for status "
2155 return finish_td(xhci, td, event_trb, event, ep, status, false);
2159 * Process isochronous tds, update urb packet status and actual_length.
2161 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2162 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2163 struct xhci_virt_ep *ep, int *status)
2165 struct xhci_ring *ep_ring;
2166 struct urb_priv *urb_priv;
2169 union xhci_trb *cur_trb;
2170 struct xhci_segment *cur_seg;
2171 struct usb_iso_packet_descriptor *frame;
2173 bool skip_td = false;
2175 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2176 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2177 urb_priv = td->urb->hcpriv;
2178 idx = urb_priv->td_cnt;
2179 frame = &td->urb->iso_frame_desc[idx];
2181 /* handle completion code */
2182 switch (trb_comp_code) {
2184 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
2188 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2189 trb_comp_code = COMP_SHORT_TX;
2191 frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2195 frame->status = -ECOMM;
2198 case COMP_BUFF_OVER:
2200 frame->status = -EOVERFLOW;
2206 frame->status = -EPROTO;
2210 case COMP_STOP_INVAL:
2217 if (trb_comp_code == COMP_SUCCESS || skip_td) {
2218 frame->actual_length = frame->length;
2219 td->urb->actual_length += frame->length;
2221 for (cur_trb = ep_ring->dequeue,
2222 cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
2223 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2224 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2225 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2226 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2228 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2229 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2231 if (trb_comp_code != COMP_STOP_INVAL) {
2232 frame->actual_length = len;
2233 td->urb->actual_length += len;
2237 return finish_td(xhci, td, event_trb, event, ep, status, false);
2240 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2241 struct xhci_transfer_event *event,
2242 struct xhci_virt_ep *ep, int *status)
2244 struct xhci_ring *ep_ring;
2245 struct urb_priv *urb_priv;
2246 struct usb_iso_packet_descriptor *frame;
2249 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2250 urb_priv = td->urb->hcpriv;
2251 idx = urb_priv->td_cnt;
2252 frame = &td->urb->iso_frame_desc[idx];
2254 /* The transfer is partly done. */
2255 frame->status = -EXDEV;
2257 /* calc actual length */
2258 frame->actual_length = 0;
2260 /* Update ring dequeue pointer */
2261 while (ep_ring->dequeue != td->last_trb)
2262 inc_deq(xhci, ep_ring);
2263 inc_deq(xhci, ep_ring);
2265 return finish_td(xhci, td, NULL, event, ep, status, true);
2269 * Process bulk and interrupt tds, update urb status and actual_length.
2271 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2272 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2273 struct xhci_virt_ep *ep, int *status)
2275 struct xhci_ring *ep_ring;
2276 union xhci_trb *cur_trb;
2277 struct xhci_segment *cur_seg;
2280 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2281 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2283 switch (trb_comp_code) {
2285 /* Double check that the HW transferred everything. */
2286 if (event_trb != td->last_trb ||
2287 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2288 xhci_warn(xhci, "WARN Successful completion "
2290 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2291 *status = -EREMOTEIO;
2294 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2295 trb_comp_code = COMP_SHORT_TX;
2301 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2302 *status = -EREMOTEIO;
2307 /* Others already handled above */
2310 if (trb_comp_code == COMP_SHORT_TX)
2311 xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
2312 "%d bytes untransferred\n",
2313 td->urb->ep->desc.bEndpointAddress,
2314 td->urb->transfer_buffer_length,
2315 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2316 /* Fast path - was this the last TRB in the TD for this URB? */
2317 if (event_trb == td->last_trb) {
2318 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2319 td->urb->actual_length =
2320 td->urb->transfer_buffer_length -
2321 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2322 if (td->urb->transfer_buffer_length <
2323 td->urb->actual_length) {
2324 xhci_warn(xhci, "HC gave bad length "
2325 "of %d bytes left\n",
2326 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2327 td->urb->actual_length = 0;
2328 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2329 *status = -EREMOTEIO;
2333 /* Don't overwrite a previously set error code */
2334 if (*status == -EINPROGRESS) {
2335 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2336 *status = -EREMOTEIO;
2341 td->urb->actual_length =
2342 td->urb->transfer_buffer_length;
2343 /* Ignore a short packet completion if the
2344 * untransferred length was zero.
2346 if (*status == -EREMOTEIO)
2350 /* Slow path - walk the list, starting from the dequeue
2351 * pointer, to get the actual length transferred.
2353 td->urb->actual_length = 0;
2354 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
2355 cur_trb != event_trb;
2356 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2357 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2358 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2359 td->urb->actual_length +=
2360 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2362 /* If the ring didn't stop on a Link or No-op TRB, add
2363 * in the actual bytes transferred from the Normal TRB
2365 if (trb_comp_code != COMP_STOP_INVAL)
2366 td->urb->actual_length +=
2367 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2368 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2371 return finish_td(xhci, td, event_trb, event, ep, status, false);
2375 * If this function returns an error condition, it means it got a Transfer
2376 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2377 * At this point, the host controller is probably hosed and should be reset.
2379 static int handle_tx_event(struct xhci_hcd *xhci,
2380 struct xhci_transfer_event *event)
2381 __releases(&xhci->lock)
2382 __acquires(&xhci->lock)
2384 struct xhci_virt_device *xdev;
2385 struct xhci_virt_ep *ep;
2386 struct xhci_ring *ep_ring;
2387 unsigned int slot_id;
2389 struct xhci_td *td = NULL;
2390 dma_addr_t event_dma;
2391 struct xhci_segment *event_seg;
2392 union xhci_trb *event_trb;
2393 struct urb *urb = NULL;
2394 int status = -EINPROGRESS;
2395 struct urb_priv *urb_priv;
2396 struct xhci_ep_ctx *ep_ctx;
2397 struct list_head *tmp;
2402 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2403 xdev = xhci->devs[slot_id];
2405 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2406 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2407 (unsigned long long) xhci_trb_virt_to_dma(
2408 xhci->event_ring->deq_seg,
2409 xhci->event_ring->dequeue),
2410 lower_32_bits(le64_to_cpu(event->buffer)),
2411 upper_32_bits(le64_to_cpu(event->buffer)),
2412 le32_to_cpu(event->transfer_len),
2413 le32_to_cpu(event->flags));
2414 xhci_dbg(xhci, "Event ring:\n");
2415 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2419 /* Endpoint ID is 1 based, our index is zero based */
2420 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2421 ep = &xdev->eps[ep_index];
2422 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2423 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2425 (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
2426 EP_STATE_DISABLED) {
2427 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2428 "or incorrect stream ring\n");
2429 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2430 (unsigned long long) xhci_trb_virt_to_dma(
2431 xhci->event_ring->deq_seg,
2432 xhci->event_ring->dequeue),
2433 lower_32_bits(le64_to_cpu(event->buffer)),
2434 upper_32_bits(le64_to_cpu(event->buffer)),
2435 le32_to_cpu(event->transfer_len),
2436 le32_to_cpu(event->flags));
2437 xhci_dbg(xhci, "Event ring:\n");
2438 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2442 /* Count current td numbers if ep->skip is set */
2444 list_for_each(tmp, &ep_ring->td_list)
2448 event_dma = le64_to_cpu(event->buffer);
2449 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2450 /* Look for common error cases */
2451 switch (trb_comp_code) {
2452 /* Skip codes that require special handling depending on
2456 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2458 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2459 trb_comp_code = COMP_SHORT_TX;
2461 xhci_warn_ratelimited(xhci,
2462 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2466 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2468 case COMP_STOP_INVAL:
2469 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2472 xhci_dbg(xhci, "Stalled endpoint\n");
2473 ep->ep_state |= EP_HALTED;
2477 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2480 case COMP_SPLIT_ERR:
2482 xhci_dbg(xhci, "Transfer error on endpoint\n");
2486 xhci_dbg(xhci, "Babble error on endpoint\n");
2487 status = -EOVERFLOW;
2490 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2494 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2496 case COMP_BUFF_OVER:
2497 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2501 * When the Isoch ring is empty, the xHC will generate
2502 * a Ring Overrun Event for IN Isoch endpoint or Ring
2503 * Underrun Event for OUT Isoch endpoint.
2505 xhci_dbg(xhci, "underrun event on endpoint\n");
2506 if (!list_empty(&ep_ring->td_list))
2507 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2508 "still with TDs queued?\n",
2509 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2513 xhci_dbg(xhci, "overrun event on endpoint\n");
2514 if (!list_empty(&ep_ring->td_list))
2515 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2516 "still with TDs queued?\n",
2517 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2521 xhci_warn(xhci, "WARN: detect an incompatible device");
2524 case COMP_MISSED_INT:
2526 * When encounter missed service error, one or more isoc tds
2527 * may be missed by xHC.
2528 * Set skip flag of the ep_ring; Complete the missed tds as
2529 * short transfer when process the ep_ring next time.
2532 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2535 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2539 xhci_warn(xhci, "ERROR Unknown event condition, HC probably "
2545 /* This TRB should be in the TD at the head of this ring's
2548 if (list_empty(&ep_ring->td_list)) {
2550 * A stopped endpoint may generate an extra completion
2551 * event if the device was suspended. Don't print
2554 if (!(trb_comp_code == COMP_STOP ||
2555 trb_comp_code == COMP_STOP_INVAL)) {
2556 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2557 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2559 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2560 (le32_to_cpu(event->flags) &
2561 TRB_TYPE_BITMASK)>>10);
2562 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2566 xhci_dbg(xhci, "td_list is empty while skip "
2567 "flag set. Clear skip flag.\n");
2573 /* We've skipped all the TDs on the ep ring when ep->skip set */
2574 if (ep->skip && td_num == 0) {
2576 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2577 "Clear skip flag.\n");
2582 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
2586 /* Is this a TRB in the currently executing TD? */
2587 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue,
2588 td->last_trb, event_dma);
2591 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2592 * is not in the current TD pointed by ep_ring->dequeue because
2593 * that the hardware dequeue pointer still at the previous TRB
2594 * of the current TD. The previous TRB maybe a Link TD or the
2595 * last TRB of the previous TD. The command completion handle
2596 * will take care the rest.
2598 if (!event_seg && trb_comp_code == COMP_STOP_INVAL) {
2605 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2606 /* Some host controllers give a spurious
2607 * successful event after a short transfer.
2610 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2611 ep_ring->last_td_was_short) {
2612 ep_ring->last_td_was_short = false;
2616 /* HC is busted, give up! */
2618 "ERROR Transfer event TRB DMA ptr not "
2619 "part of current TD\n");
2623 ret = skip_isoc_td(xhci, td, event, ep, &status);
2626 if (trb_comp_code == COMP_SHORT_TX)
2627 ep_ring->last_td_was_short = true;
2629 ep_ring->last_td_was_short = false;
2632 xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2636 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
2637 sizeof(*event_trb)];
2639 * No-op TRB should not trigger interrupts.
2640 * If event_trb is a no-op TRB, it means the
2641 * corresponding TD has been cancelled. Just ignore
2644 if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
2646 "event_trb is a no-op TRB. Skip it\n");
2650 /* Now update the urb's actual_length and give back to
2653 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2654 ret = process_ctrl_td(xhci, td, event_trb, event, ep,
2656 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2657 ret = process_isoc_td(xhci, td, event_trb, event, ep,
2660 ret = process_bulk_intr_td(xhci, td, event_trb, event,
2665 * Do not update event ring dequeue pointer if ep->skip is set.
2666 * Will roll back to continue process missed tds.
2668 if (trb_comp_code == COMP_MISSED_INT || !ep->skip) {
2669 inc_deq(xhci, xhci->event_ring);
2674 urb_priv = urb->hcpriv;
2675 /* Leave the TD around for the reset endpoint function
2676 * to use(but only if it's not a control endpoint,
2677 * since we already queued the Set TR dequeue pointer
2678 * command for stalled control endpoints).
2680 if (usb_endpoint_xfer_control(&urb->ep->desc) ||
2681 (trb_comp_code != COMP_STALL &&
2682 trb_comp_code != COMP_BABBLE))
2683 xhci_urb_free_priv(xhci, urb_priv);
2687 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
2688 if ((urb->actual_length != urb->transfer_buffer_length &&
2689 (urb->transfer_flags &
2690 URB_SHORT_NOT_OK)) ||
2692 !usb_endpoint_xfer_isoc(&urb->ep->desc)))
2693 xhci_dbg(xhci, "Giveback URB %p, len = %d, "
2694 "expected = %d, status = %d\n",
2695 urb, urb->actual_length,
2696 urb->transfer_buffer_length,
2698 spin_unlock(&xhci->lock);
2699 /* EHCI, UHCI, and OHCI always unconditionally set the
2700 * urb->status of an isochronous endpoint to 0.
2702 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2704 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2705 spin_lock(&xhci->lock);
2709 * If ep->skip is set, it means there are missed tds on the
2710 * endpoint ring need to take care of.
2711 * Process them as short transfer until reach the td pointed by
2714 } while (ep->skip && trb_comp_code != COMP_MISSED_INT);
2720 * This function handles all OS-owned events on the event ring. It may drop
2721 * xhci->lock between event processing (e.g. to pass up port status changes).
2722 * Returns >0 for "possibly more events to process" (caller should call again),
2723 * otherwise 0 if done. In future, <0 returns should indicate error code.
2725 static int xhci_handle_event(struct xhci_hcd *xhci)
2727 union xhci_trb *event;
2728 int update_ptrs = 1;
2731 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2732 xhci->error_bitmask |= 1 << 1;
2736 event = xhci->event_ring->dequeue;
2737 /* Does the HC or OS own the TRB? */
2738 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2739 xhci->event_ring->cycle_state) {
2740 xhci->error_bitmask |= 1 << 2;
2745 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2746 * speculative reads of the event's flags/data below.
2749 /* FIXME: Handle more event types. */
2750 switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
2751 case TRB_TYPE(TRB_COMPLETION):
2752 handle_cmd_completion(xhci, &event->event_cmd);
2754 case TRB_TYPE(TRB_PORT_STATUS):
2755 handle_port_status(xhci, event);
2758 case TRB_TYPE(TRB_TRANSFER):
2759 ret = handle_tx_event(xhci, &event->trans_event);
2761 xhci->error_bitmask |= 1 << 9;
2765 case TRB_TYPE(TRB_DEV_NOTE):
2766 handle_device_notification(xhci, event);
2769 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2771 handle_vendor_event(xhci, event);
2773 xhci->error_bitmask |= 1 << 3;
2775 /* Any of the above functions may drop and re-acquire the lock, so check
2776 * to make sure a watchdog timer didn't mark the host as non-responsive.
2778 if (xhci->xhc_state & XHCI_STATE_DYING) {
2779 xhci_dbg(xhci, "xHCI host dying, returning from "
2780 "event handler.\n");
2785 /* Update SW event ring dequeue pointer */
2786 inc_deq(xhci, xhci->event_ring);
2788 /* Are there more items on the event ring? Caller will call us again to
2795 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2796 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2797 * indicators of an event TRB error, but we check the status *first* to be safe.
2799 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2801 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2804 union xhci_trb *event_ring_deq;
2807 spin_lock(&xhci->lock);
2808 /* Check if the xHC generated the interrupt, or the irq is shared */
2809 status = xhci_readl(xhci, &xhci->op_regs->status);
2810 if (status == 0xffffffff)
2813 if (!(status & STS_EINT)) {
2814 spin_unlock(&xhci->lock);
2817 if (status & STS_FATAL) {
2818 xhci_warn(xhci, "WARNING: Host System Error\n");
2821 spin_unlock(&xhci->lock);
2826 * Clear the op reg interrupt status first,
2827 * so we can receive interrupts from other MSI-X interrupters.
2828 * Write 1 to clear the interrupt status.
2831 xhci_writel(xhci, status, &xhci->op_regs->status);
2832 /* FIXME when MSI-X is supported and there are multiple vectors */
2833 /* Clear the MSI-X event interrupt status */
2837 /* Acknowledge the PCI interrupt */
2838 irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
2839 irq_pending |= IMAN_IP;
2840 xhci_writel(xhci, irq_pending, &xhci->ir_set->irq_pending);
2843 if (xhci->xhc_state & XHCI_STATE_DYING) {
2844 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2845 "Shouldn't IRQs be disabled?\n");
2846 /* Clear the event handler busy flag (RW1C);
2847 * the event ring should be empty.
2849 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2850 xhci_write_64(xhci, temp_64 | ERST_EHB,
2851 &xhci->ir_set->erst_dequeue);
2852 spin_unlock(&xhci->lock);
2857 event_ring_deq = xhci->event_ring->dequeue;
2858 /* FIXME this should be a delayed service routine
2859 * that clears the EHB.
2861 while (xhci_handle_event(xhci) > 0) {}
2863 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2864 /* If necessary, update the HW's version of the event ring deq ptr. */
2865 if (event_ring_deq != xhci->event_ring->dequeue) {
2866 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2867 xhci->event_ring->dequeue);
2869 xhci_warn(xhci, "WARN something wrong with SW event "
2870 "ring dequeue ptr.\n");
2871 /* Update HC event ring dequeue pointer */
2872 temp_64 &= ERST_PTR_MASK;
2873 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2876 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2877 temp_64 |= ERST_EHB;
2878 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2880 spin_unlock(&xhci->lock);
2885 irqreturn_t xhci_msi_irq(int irq, void *hcd)
2887 return xhci_irq(hcd);
2890 /**** Endpoint Ring Operations ****/
2893 * Generic function for queueing a TRB on a ring.
2894 * The caller must have checked to make sure there's room on the ring.
2896 * @more_trbs_coming: Will you enqueue more TRBs before calling
2897 * prepare_transfer()?
2899 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2900 bool more_trbs_coming,
2901 u32 field1, u32 field2, u32 field3, u32 field4)
2903 struct xhci_generic_trb *trb;
2905 trb = &ring->enqueue->generic;
2906 trb->field[0] = cpu_to_le32(field1);
2907 trb->field[1] = cpu_to_le32(field2);
2908 trb->field[2] = cpu_to_le32(field3);
2909 trb->field[3] = cpu_to_le32(field4);
2910 inc_enq(xhci, ring, more_trbs_coming);
2914 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2915 * FIXME allocate segments if the ring is full.
2917 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2918 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
2920 unsigned int num_trbs_needed;
2922 /* Make sure the endpoint has been added to xHC schedule */
2924 case EP_STATE_DISABLED:
2926 * USB core changed config/interfaces without notifying us,
2927 * or hardware is reporting the wrong state.
2929 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2931 case EP_STATE_ERROR:
2932 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2933 /* FIXME event handling code for error needs to clear it */
2934 /* XXX not sure if this should be -ENOENT or not */
2936 case EP_STATE_HALTED:
2937 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2938 case EP_STATE_STOPPED:
2939 case EP_STATE_RUNNING:
2942 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2944 * FIXME issue Configure Endpoint command to try to get the HC
2945 * back into a known state.
2951 if (room_on_ring(xhci, ep_ring, num_trbs))
2954 if (ep_ring == xhci->cmd_ring) {
2955 xhci_err(xhci, "Do not support expand command ring\n");
2959 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
2960 "ERROR no room on ep ring, try ring expansion");
2961 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
2962 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
2964 xhci_err(xhci, "Ring expansion failed\n");
2969 if (enqueue_is_link_trb(ep_ring)) {
2970 struct xhci_ring *ring = ep_ring;
2971 union xhci_trb *next;
2973 next = ring->enqueue;
2975 while (last_trb(xhci, ring, ring->enq_seg, next)) {
2976 /* If we're not dealing with 0.95 hardware or isoc rings
2977 * on AMD 0.96 host, clear the chain bit.
2979 if (!xhci_link_trb_quirk(xhci) &&
2980 !(ring->type == TYPE_ISOC &&
2981 (xhci->quirks & XHCI_AMD_0x96_HOST)))
2982 next->link.control &= cpu_to_le32(~TRB_CHAIN);
2984 next->link.control |= cpu_to_le32(TRB_CHAIN);
2987 next->link.control ^= cpu_to_le32(TRB_CYCLE);
2989 /* Toggle the cycle bit after the last ring segment. */
2990 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
2991 ring->cycle_state = (ring->cycle_state ? 0 : 1);
2993 ring->enq_seg = ring->enq_seg->next;
2994 ring->enqueue = ring->enq_seg->trbs;
2995 next = ring->enqueue;
3002 static int prepare_transfer(struct xhci_hcd *xhci,
3003 struct xhci_virt_device *xdev,
3004 unsigned int ep_index,
3005 unsigned int stream_id,
3006 unsigned int num_trbs,
3008 unsigned int td_index,
3012 struct urb_priv *urb_priv;
3014 struct xhci_ring *ep_ring;
3015 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3017 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
3019 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
3024 ret = prepare_ring(xhci, ep_ring,
3025 le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
3026 num_trbs, mem_flags);
3030 urb_priv = urb->hcpriv;
3031 td = urb_priv->td[td_index];
3033 INIT_LIST_HEAD(&td->td_list);
3034 INIT_LIST_HEAD(&td->cancelled_td_list);
3036 if (td_index == 0) {
3037 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
3043 /* Add this TD to the tail of the endpoint ring's TD list */
3044 list_add_tail(&td->td_list, &ep_ring->td_list);
3045 td->start_seg = ep_ring->enq_seg;
3046 td->first_trb = ep_ring->enqueue;
3048 urb_priv->td[td_index] = td;
3053 static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb)
3055 int num_sgs, num_trbs, running_total, temp, i;
3056 struct scatterlist *sg;
3059 num_sgs = urb->num_mapped_sgs;
3060 temp = urb->transfer_buffer_length;
3063 for_each_sg(urb->sg, sg, num_sgs, i) {
3064 unsigned int len = sg_dma_len(sg);
3066 /* Scatter gather list entries may cross 64KB boundaries */
3067 running_total = TRB_MAX_BUFF_SIZE -
3068 (sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1));
3069 running_total &= TRB_MAX_BUFF_SIZE - 1;
3070 if (running_total != 0)
3073 /* How many more 64KB chunks to transfer, how many more TRBs? */
3074 while (running_total < sg_dma_len(sg) && running_total < temp) {
3076 running_total += TRB_MAX_BUFF_SIZE;
3078 len = min_t(int, len, temp);
3086 static void check_trb_math(struct urb *urb, int num_trbs, int running_total)
3089 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
3090 "TRBs, %d left\n", __func__,
3091 urb->ep->desc.bEndpointAddress, num_trbs);
3092 if (running_total != urb->transfer_buffer_length)
3093 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
3094 "queued %#x (%d), asked for %#x (%d)\n",
3096 urb->ep->desc.bEndpointAddress,
3097 running_total, running_total,
3098 urb->transfer_buffer_length,
3099 urb->transfer_buffer_length);
3102 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
3103 unsigned int ep_index, unsigned int stream_id, int start_cycle,
3104 struct xhci_generic_trb *start_trb)
3107 * Pass all the TRBs to the hardware at once and make sure this write
3112 start_trb->field[3] |= cpu_to_le32(start_cycle);
3114 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
3115 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
3119 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3120 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3121 * (comprised of sg list entries) can take several service intervals to
3124 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3125 struct urb *urb, int slot_id, unsigned int ep_index)
3127 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci,
3128 xhci->devs[slot_id]->out_ctx, ep_index);
3132 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3133 ep_interval = urb->interval;
3134 /* Convert to microframes */
3135 if (urb->dev->speed == USB_SPEED_LOW ||
3136 urb->dev->speed == USB_SPEED_FULL)
3138 /* FIXME change this to a warning and a suggestion to use the new API
3139 * to set the polling interval (once the API is added).
3141 if (xhci_interval != ep_interval) {
3142 dev_dbg_ratelimited(&urb->dev->dev,
3143 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3144 ep_interval, ep_interval == 1 ? "" : "s",
3145 xhci_interval, xhci_interval == 1 ? "" : "s");
3146 urb->interval = xhci_interval;
3147 /* Convert back to frames for LS/FS devices */
3148 if (urb->dev->speed == USB_SPEED_LOW ||
3149 urb->dev->speed == USB_SPEED_FULL)
3152 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
3156 * The TD size is the number of bytes remaining in the TD (including this TRB),
3157 * right shifted by 10.
3158 * It must fit in bits 21:17, so it can't be bigger than 31.
3160 static u32 xhci_td_remainder(unsigned int remainder)
3162 u32 max = (1 << (21 - 17 + 1)) - 1;
3164 if ((remainder >> 10) >= max)
3167 return (remainder >> 10) << 17;
3171 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3172 * packets remaining in the TD (*not* including this TRB).
3174 * Total TD packet count = total_packet_count =
3175 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3177 * Packets transferred up to and including this TRB = packets_transferred =
3178 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3180 * TD size = total_packet_count - packets_transferred
3182 * It must fit in bits 21:17, so it can't be bigger than 31.
3183 * The last TRB in a TD must have the TD size set to zero.
3185 static u32 xhci_v1_0_td_remainder(int running_total, int trb_buff_len,
3186 unsigned int total_packet_count, struct urb *urb,
3187 unsigned int num_trbs_left)
3189 int packets_transferred;
3191 /* One TRB with a zero-length data packet. */
3192 if (num_trbs_left == 0 || (running_total == 0 && trb_buff_len == 0))
3195 /* All the TRB queueing functions don't count the current TRB in
3198 packets_transferred = (running_total + trb_buff_len) /
3199 GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
3201 if ((total_packet_count - packets_transferred) > 31)
3203 return (total_packet_count - packets_transferred) << 17;
3206 static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3207 struct urb *urb, int slot_id, unsigned int ep_index)
3209 struct xhci_ring *ep_ring;
3210 unsigned int num_trbs;
3211 struct urb_priv *urb_priv;
3213 struct scatterlist *sg;
3215 int trb_buff_len, this_sg_len, running_total;
3216 unsigned int total_packet_count;
3219 bool more_trbs_coming;
3221 struct xhci_generic_trb *start_trb;
3224 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3228 num_trbs = count_sg_trbs_needed(xhci, urb);
3229 num_sgs = urb->num_mapped_sgs;
3230 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3231 usb_endpoint_maxp(&urb->ep->desc));
3233 trb_buff_len = prepare_transfer(xhci, xhci->devs[slot_id],
3234 ep_index, urb->stream_id,
3235 num_trbs, urb, 0, mem_flags);
3236 if (trb_buff_len < 0)
3237 return trb_buff_len;
3239 urb_priv = urb->hcpriv;
3240 td = urb_priv->td[0];
3243 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3244 * until we've finished creating all the other TRBs. The ring's cycle
3245 * state may change as we enqueue the other TRBs, so save it too.
3247 start_trb = &ep_ring->enqueue->generic;
3248 start_cycle = ep_ring->cycle_state;
3252 * How much data is in the first TRB?
3254 * There are three forces at work for TRB buffer pointers and lengths:
3255 * 1. We don't want to walk off the end of this sg-list entry buffer.
3256 * 2. The transfer length that the driver requested may be smaller than
3257 * the amount of memory allocated for this scatter-gather list.
3258 * 3. TRBs buffers can't cross 64KB boundaries.
3261 addr = (u64) sg_dma_address(sg);
3262 this_sg_len = sg_dma_len(sg);
3263 trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1));
3264 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3265 if (trb_buff_len > urb->transfer_buffer_length)
3266 trb_buff_len = urb->transfer_buffer_length;
3269 /* Queue the first TRB, even if it's zero-length */
3272 u32 length_field = 0;
3275 /* Don't change the cycle bit of the first TRB until later */
3278 if (start_cycle == 0)
3281 field |= ep_ring->cycle_state;
3283 /* Chain all the TRBs together; clear the chain bit in the last
3284 * TRB to indicate it's the last TRB in the chain.
3289 /* FIXME - add check for ZERO_PACKET flag before this */
3290 td->last_trb = ep_ring->enqueue;
3294 /* Only set interrupt on short packet for IN endpoints */
3295 if (usb_urb_dir_in(urb))
3298 if (TRB_MAX_BUFF_SIZE -
3299 (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) {
3300 xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n");
3301 xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n",
3302 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
3303 (unsigned int) addr + trb_buff_len);
3306 /* Set the TRB length, TD size, and interrupter fields. */
3307 if (xhci->hci_version < 0x100) {
3308 remainder = xhci_td_remainder(
3309 urb->transfer_buffer_length -
3312 remainder = xhci_v1_0_td_remainder(running_total,
3313 trb_buff_len, total_packet_count, urb,
3316 length_field = TRB_LEN(trb_buff_len) |
3321 more_trbs_coming = true;
3323 more_trbs_coming = false;
3324 queue_trb(xhci, ep_ring, more_trbs_coming,
3325 lower_32_bits(addr),
3326 upper_32_bits(addr),
3328 field | TRB_TYPE(TRB_NORMAL));
3330 running_total += trb_buff_len;
3332 /* Calculate length for next transfer --
3333 * Are we done queueing all the TRBs for this sg entry?
3335 this_sg_len -= trb_buff_len;
3336 if (this_sg_len == 0) {
3341 addr = (u64) sg_dma_address(sg);
3342 this_sg_len = sg_dma_len(sg);
3344 addr += trb_buff_len;
3347 trb_buff_len = TRB_MAX_BUFF_SIZE -
3348 (addr & (TRB_MAX_BUFF_SIZE - 1));
3349 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3350 if (running_total + trb_buff_len > urb->transfer_buffer_length)
3352 urb->transfer_buffer_length - running_total;
3353 } while (running_total < urb->transfer_buffer_length);
3355 check_trb_math(urb, num_trbs, running_total);
3356 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3357 start_cycle, start_trb);
3361 /* This is very similar to what ehci-q.c qtd_fill() does */
3362 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3363 struct urb *urb, int slot_id, unsigned int ep_index)
3365 struct xhci_ring *ep_ring;
3366 struct urb_priv *urb_priv;
3369 struct xhci_generic_trb *start_trb;
3371 bool more_trbs_coming;
3373 u32 field, length_field;
3375 int running_total, trb_buff_len, ret;
3376 unsigned int total_packet_count;
3380 return queue_bulk_sg_tx(xhci, mem_flags, urb, slot_id, ep_index);
3382 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3387 /* How much data is (potentially) left before the 64KB boundary? */
3388 running_total = TRB_MAX_BUFF_SIZE -
3389 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3390 running_total &= TRB_MAX_BUFF_SIZE - 1;
3392 /* If there's some data on this 64KB chunk, or we have to send a
3393 * zero-length transfer, we need at least one TRB
3395 if (running_total != 0 || urb->transfer_buffer_length == 0)
3397 /* How many more 64KB chunks to transfer, how many more TRBs? */
3398 while (running_total < urb->transfer_buffer_length) {
3400 running_total += TRB_MAX_BUFF_SIZE;
3402 /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */
3404 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3405 ep_index, urb->stream_id,
3406 num_trbs, urb, 0, mem_flags);
3410 urb_priv = urb->hcpriv;
3411 td = urb_priv->td[0];
3414 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3415 * until we've finished creating all the other TRBs. The ring's cycle
3416 * state may change as we enqueue the other TRBs, so save it too.
3418 start_trb = &ep_ring->enqueue->generic;
3419 start_cycle = ep_ring->cycle_state;
3422 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3423 usb_endpoint_maxp(&urb->ep->desc));
3424 /* How much data is in the first TRB? */
3425 addr = (u64) urb->transfer_dma;
3426 trb_buff_len = TRB_MAX_BUFF_SIZE -
3427 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3428 if (trb_buff_len > urb->transfer_buffer_length)
3429 trb_buff_len = urb->transfer_buffer_length;
3433 /* Queue the first TRB, even if it's zero-length */
3438 /* Don't change the cycle bit of the first TRB until later */
3441 if (start_cycle == 0)
3444 field |= ep_ring->cycle_state;
3446 /* Chain all the TRBs together; clear the chain bit in the last
3447 * TRB to indicate it's the last TRB in the chain.
3452 /* FIXME - add check for ZERO_PACKET flag before this */
3453 td->last_trb = ep_ring->enqueue;
3457 /* Only set interrupt on short packet for IN endpoints */
3458 if (usb_urb_dir_in(urb))
3461 /* Set the TRB length, TD size, and interrupter fields. */
3462 if (xhci->hci_version < 0x100) {
3463 remainder = xhci_td_remainder(
3464 urb->transfer_buffer_length -
3467 remainder = xhci_v1_0_td_remainder(running_total,
3468 trb_buff_len, total_packet_count, urb,
3471 length_field = TRB_LEN(trb_buff_len) |
3476 more_trbs_coming = true;
3478 more_trbs_coming = false;
3479 queue_trb(xhci, ep_ring, more_trbs_coming,
3480 lower_32_bits(addr),
3481 upper_32_bits(addr),
3483 field | TRB_TYPE(TRB_NORMAL));
3485 running_total += trb_buff_len;
3487 /* Calculate length for next transfer */
3488 addr += trb_buff_len;
3489 trb_buff_len = urb->transfer_buffer_length - running_total;
3490 if (trb_buff_len > TRB_MAX_BUFF_SIZE)
3491 trb_buff_len = TRB_MAX_BUFF_SIZE;
3492 } while (running_total < urb->transfer_buffer_length);
3494 check_trb_math(urb, num_trbs, running_total);
3495 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3496 start_cycle, start_trb);
3500 /* Caller must have locked xhci->lock */
3501 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3502 struct urb *urb, int slot_id, unsigned int ep_index)
3504 struct xhci_ring *ep_ring;
3507 struct usb_ctrlrequest *setup;
3508 struct xhci_generic_trb *start_trb;
3510 u32 field, length_field;
3511 struct urb_priv *urb_priv;
3514 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3519 * Need to copy setup packet into setup TRB, so we can't use the setup
3522 if (!urb->setup_packet)
3525 /* 1 TRB for setup, 1 for status */
3528 * Don't need to check if we need additional event data and normal TRBs,
3529 * since data in control transfers will never get bigger than 16MB
3530 * XXX: can we get a buffer that crosses 64KB boundaries?
3532 if (urb->transfer_buffer_length > 0)
3534 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3535 ep_index, urb->stream_id,
3536 num_trbs, urb, 0, mem_flags);
3540 urb_priv = urb->hcpriv;
3541 td = urb_priv->td[0];
3544 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3545 * until we've finished creating all the other TRBs. The ring's cycle
3546 * state may change as we enqueue the other TRBs, so save it too.
3548 start_trb = &ep_ring->enqueue->generic;
3549 start_cycle = ep_ring->cycle_state;
3551 /* Queue setup TRB - see section 6.4.1.2.1 */
3552 /* FIXME better way to translate setup_packet into two u32 fields? */
3553 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3555 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3556 if (start_cycle == 0)
3559 /* xHCI 1.0 6.4.1.2.1: Transfer Type field */
3560 if (xhci->hci_version == 0x100) {
3561 if (urb->transfer_buffer_length > 0) {
3562 if (setup->bRequestType & USB_DIR_IN)
3563 field |= TRB_TX_TYPE(TRB_DATA_IN);
3565 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3569 queue_trb(xhci, ep_ring, true,
3570 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3571 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3572 TRB_LEN(8) | TRB_INTR_TARGET(0),
3573 /* Immediate data in pointer */
3576 /* If there's data, queue data TRBs */
3577 /* Only set interrupt on short packet for IN endpoints */
3578 if (usb_urb_dir_in(urb))
3579 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3581 field = TRB_TYPE(TRB_DATA);
3583 length_field = TRB_LEN(urb->transfer_buffer_length) |
3584 xhci_td_remainder(urb->transfer_buffer_length) |
3586 if (urb->transfer_buffer_length > 0) {
3587 if (setup->bRequestType & USB_DIR_IN)
3588 field |= TRB_DIR_IN;
3589 queue_trb(xhci, ep_ring, true,
3590 lower_32_bits(urb->transfer_dma),
3591 upper_32_bits(urb->transfer_dma),
3593 field | ep_ring->cycle_state);
3596 /* Save the DMA address of the last TRB in the TD */
3597 td->last_trb = ep_ring->enqueue;
3599 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3600 /* If the device sent data, the status stage is an OUT transfer */
3601 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3605 queue_trb(xhci, ep_ring, false,
3609 /* Event on completion */
3610 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3612 giveback_first_trb(xhci, slot_id, ep_index, 0,
3613 start_cycle, start_trb);
3617 static int count_isoc_trbs_needed(struct xhci_hcd *xhci,
3618 struct urb *urb, int i)
3623 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
3624 td_len = urb->iso_frame_desc[i].length;
3626 num_trbs = DIV_ROUND_UP(td_len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
3635 * The transfer burst count field of the isochronous TRB defines the number of
3636 * bursts that are required to move all packets in this TD. Only SuperSpeed
3637 * devices can burst up to bMaxBurst number of packets per service interval.
3638 * This field is zero based, meaning a value of zero in the field means one
3639 * burst. Basically, for everything but SuperSpeed devices, this field will be
3640 * zero. Only xHCI 1.0 host controllers support this field.
3642 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3643 struct usb_device *udev,
3644 struct urb *urb, unsigned int total_packet_count)
3646 unsigned int max_burst;
3648 if (xhci->hci_version < 0x100 || udev->speed != USB_SPEED_SUPER)
3651 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3652 return roundup(total_packet_count, max_burst + 1) - 1;
3656 * Returns the number of packets in the last "burst" of packets. This field is
3657 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3658 * the last burst packet count is equal to the total number of packets in the
3659 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3660 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3661 * contain 1 to (bMaxBurst + 1) packets.
3663 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3664 struct usb_device *udev,
3665 struct urb *urb, unsigned int total_packet_count)
3667 unsigned int max_burst;
3668 unsigned int residue;
3670 if (xhci->hci_version < 0x100)
3673 switch (udev->speed) {
3674 case USB_SPEED_SUPER:
3675 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3676 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3677 residue = total_packet_count % (max_burst + 1);
3678 /* If residue is zero, the last burst contains (max_burst + 1)
3679 * number of packets, but the TLBPC field is zero-based.
3685 if (total_packet_count == 0)
3687 return total_packet_count - 1;
3691 /* This is for isoc transfer */
3692 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3693 struct urb *urb, int slot_id, unsigned int ep_index)
3695 struct xhci_ring *ep_ring;
3696 struct urb_priv *urb_priv;
3698 int num_tds, trbs_per_td;
3699 struct xhci_generic_trb *start_trb;
3702 u32 field, length_field;
3703 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3704 u64 start_addr, addr;
3706 bool more_trbs_coming;
3708 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3710 num_tds = urb->number_of_packets;
3712 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3716 start_addr = (u64) urb->transfer_dma;
3717 start_trb = &ep_ring->enqueue->generic;
3718 start_cycle = ep_ring->cycle_state;
3720 urb_priv = urb->hcpriv;
3721 /* Queue the first TRB, even if it's zero-length */
3722 for (i = 0; i < num_tds; i++) {
3723 unsigned int total_packet_count;
3724 unsigned int burst_count;
3725 unsigned int residue;
3729 addr = start_addr + urb->iso_frame_desc[i].offset;
3730 td_len = urb->iso_frame_desc[i].length;
3731 td_remain_len = td_len;
3732 total_packet_count = DIV_ROUND_UP(td_len,
3734 usb_endpoint_maxp(&urb->ep->desc)));
3735 /* A zero-length transfer still involves at least one packet. */
3736 if (total_packet_count == 0)
3737 total_packet_count++;
3738 burst_count = xhci_get_burst_count(xhci, urb->dev, urb,
3739 total_packet_count);
3740 residue = xhci_get_last_burst_packet_count(xhci,
3741 urb->dev, urb, total_packet_count);
3743 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i);
3745 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3746 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3753 td = urb_priv->td[i];
3754 for (j = 0; j < trbs_per_td; j++) {
3759 field = TRB_TBC(burst_count) |
3761 /* Queue the isoc TRB */
3762 field |= TRB_TYPE(TRB_ISOC);
3763 /* Assume URB_ISO_ASAP is set */
3766 if (start_cycle == 0)
3769 field |= ep_ring->cycle_state;
3772 /* Queue other normal TRBs */
3773 field |= TRB_TYPE(TRB_NORMAL);
3774 field |= ep_ring->cycle_state;
3777 /* Only set interrupt on short packet for IN EPs */
3778 if (usb_urb_dir_in(urb))
3781 /* Chain all the TRBs together; clear the chain bit in
3782 * the last TRB to indicate it's the last TRB in the
3785 if (j < trbs_per_td - 1) {
3787 more_trbs_coming = true;
3789 td->last_trb = ep_ring->enqueue;
3791 if (xhci->hci_version == 0x100 &&
3794 /* Set BEI bit except for the last td */
3795 if (i < num_tds - 1)
3798 more_trbs_coming = false;
3801 /* Calculate TRB length */
3802 trb_buff_len = TRB_MAX_BUFF_SIZE -
3803 (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
3804 if (trb_buff_len > td_remain_len)
3805 trb_buff_len = td_remain_len;
3807 /* Set the TRB length, TD size, & interrupter fields. */
3808 if (xhci->hci_version < 0x100) {
3809 remainder = xhci_td_remainder(
3810 td_len - running_total);
3812 remainder = xhci_v1_0_td_remainder(
3813 running_total, trb_buff_len,
3814 total_packet_count, urb,
3815 (trbs_per_td - j - 1));
3817 length_field = TRB_LEN(trb_buff_len) |
3821 queue_trb(xhci, ep_ring, more_trbs_coming,
3822 lower_32_bits(addr),
3823 upper_32_bits(addr),
3826 running_total += trb_buff_len;
3828 addr += trb_buff_len;
3829 td_remain_len -= trb_buff_len;
3832 /* Check TD length */
3833 if (running_total != td_len) {
3834 xhci_err(xhci, "ISOC TD length unmatch\n");
3840 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
3841 if (xhci->quirks & XHCI_AMD_PLL_FIX)
3842 usb_amd_quirk_pll_disable();
3844 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
3846 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3847 start_cycle, start_trb);
3850 /* Clean up a partially enqueued isoc transfer. */
3852 for (i--; i >= 0; i--)
3853 list_del_init(&urb_priv->td[i]->td_list);
3855 /* Use the first TD as a temporary variable to turn the TDs we've queued
3856 * into No-ops with a software-owned cycle bit. That way the hardware
3857 * won't accidentally start executing bogus TDs when we partially
3858 * overwrite them. td->first_trb and td->start_seg are already set.
3860 urb_priv->td[0]->last_trb = ep_ring->enqueue;
3861 /* Every TRB except the first & last will have its cycle bit flipped. */
3862 td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
3864 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3865 ep_ring->enqueue = urb_priv->td[0]->first_trb;
3866 ep_ring->enq_seg = urb_priv->td[0]->start_seg;
3867 ep_ring->cycle_state = start_cycle;
3868 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
3869 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
3874 * Check transfer ring to guarantee there is enough room for the urb.
3875 * Update ISO URB start_frame and interval.
3876 * Update interval as xhci_queue_intr_tx does. Just use xhci frame_index to
3877 * update the urb->start_frame by now.
3878 * Always assume URB_ISO_ASAP set, and NEVER use urb->start_frame as input.
3880 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3881 struct urb *urb, int slot_id, unsigned int ep_index)
3883 struct xhci_virt_device *xdev;
3884 struct xhci_ring *ep_ring;
3885 struct xhci_ep_ctx *ep_ctx;
3889 int num_tds, num_trbs, i;
3892 xdev = xhci->devs[slot_id];
3893 ep_ring = xdev->eps[ep_index].ring;
3894 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3897 num_tds = urb->number_of_packets;
3898 for (i = 0; i < num_tds; i++)
3899 num_trbs += count_isoc_trbs_needed(xhci, urb, i);
3901 /* Check the ring to guarantee there is enough room for the whole urb.
3902 * Do not insert any td of the urb to the ring if the check failed.
3904 ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
3905 num_trbs, mem_flags);
3909 start_frame = xhci_readl(xhci, &xhci->run_regs->microframe_index);
3910 start_frame &= 0x3fff;
3912 urb->start_frame = start_frame;
3913 if (urb->dev->speed == USB_SPEED_LOW ||
3914 urb->dev->speed == USB_SPEED_FULL)
3915 urb->start_frame >>= 3;
3917 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3918 ep_interval = urb->interval;
3919 /* Convert to microframes */
3920 if (urb->dev->speed == USB_SPEED_LOW ||
3921 urb->dev->speed == USB_SPEED_FULL)
3923 /* FIXME change this to a warning and a suggestion to use the new API
3924 * to set the polling interval (once the API is added).
3926 if (xhci_interval != ep_interval) {
3927 dev_dbg_ratelimited(&urb->dev->dev,
3928 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3929 ep_interval, ep_interval == 1 ? "" : "s",
3930 xhci_interval, xhci_interval == 1 ? "" : "s");
3931 urb->interval = xhci_interval;
3932 /* Convert back to frames for LS/FS devices */
3933 if (urb->dev->speed == USB_SPEED_LOW ||
3934 urb->dev->speed == USB_SPEED_FULL)
3937 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
3939 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
3942 /**** Command Ring Operations ****/
3944 /* Generic function for queueing a command TRB on the command ring.
3945 * Check to make sure there's room on the command ring for one command TRB.
3946 * Also check that there's room reserved for commands that must not fail.
3947 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
3948 * then only check for the number of reserved spots.
3949 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
3950 * because the command event handler may want to resubmit a failed command.
3952 static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2,
3953 u32 field3, u32 field4, bool command_must_succeed)
3955 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
3958 if (!command_must_succeed)
3961 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
3962 reserved_trbs, GFP_ATOMIC);
3964 xhci_err(xhci, "ERR: No room for command on command ring\n");
3965 if (command_must_succeed)
3966 xhci_err(xhci, "ERR: Reserved TRB counting for "
3967 "unfailable commands failed.\n");
3970 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
3971 field4 | xhci->cmd_ring->cycle_state);
3975 /* Queue a slot enable or disable request on the command ring */
3976 int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id)
3978 return queue_command(xhci, 0, 0, 0,
3979 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
3982 /* Queue an address device command TRB */
3983 int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
3986 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
3987 upper_32_bits(in_ctx_ptr), 0,
3988 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id),
3992 int xhci_queue_vendor_command(struct xhci_hcd *xhci,
3993 u32 field1, u32 field2, u32 field3, u32 field4)
3995 return queue_command(xhci, field1, field2, field3, field4, false);
3998 /* Queue a reset device command TRB */
3999 int xhci_queue_reset_device(struct xhci_hcd *xhci, u32 slot_id)
4001 return queue_command(xhci, 0, 0, 0,
4002 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
4006 /* Queue a configure endpoint command TRB */
4007 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
4008 u32 slot_id, bool command_must_succeed)
4010 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
4011 upper_32_bits(in_ctx_ptr), 0,
4012 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
4013 command_must_succeed);
4016 /* Queue an evaluate context command TRB */
4017 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
4018 u32 slot_id, bool command_must_succeed)
4020 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
4021 upper_32_bits(in_ctx_ptr), 0,
4022 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
4023 command_must_succeed);
4027 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
4028 * activity on an endpoint that is about to be suspended.
4030 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id,
4031 unsigned int ep_index, int suspend)
4033 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4034 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4035 u32 type = TRB_TYPE(TRB_STOP_RING);
4036 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
4038 return queue_command(xhci, 0, 0, 0,
4039 trb_slot_id | trb_ep_index | type | trb_suspend, false);
4042 /* Set Transfer Ring Dequeue Pointer command.
4043 * This should not be used for endpoints that have streams enabled.
4045 static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
4046 unsigned int ep_index, unsigned int stream_id,
4047 struct xhci_segment *deq_seg,
4048 union xhci_trb *deq_ptr, u32 cycle_state)
4051 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4052 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4053 u32 trb_stream_id = STREAM_ID_FOR_TRB(stream_id);
4054 u32 type = TRB_TYPE(TRB_SET_DEQ);
4055 struct xhci_virt_ep *ep;
4057 addr = xhci_trb_virt_to_dma(deq_seg, deq_ptr);
4059 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4060 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
4064 ep = &xhci->devs[slot_id]->eps[ep_index];
4065 if ((ep->ep_state & SET_DEQ_PENDING)) {
4066 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4067 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
4070 ep->queued_deq_seg = deq_seg;
4071 ep->queued_deq_ptr = deq_ptr;
4072 return queue_command(xhci, lower_32_bits(addr) | cycle_state,
4073 upper_32_bits(addr), trb_stream_id,
4074 trb_slot_id | trb_ep_index | type, false);
4077 int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id,
4078 unsigned int ep_index)
4080 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4081 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4082 u32 type = TRB_TYPE(TRB_RESET_EP);
4084 return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type,