2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
70 #include "xhci-trace.h"
73 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
76 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
79 unsigned long segment_offset;
81 if (!seg || !trb || trb < seg->trbs)
84 segment_offset = trb - seg->trbs;
85 if (segment_offset >= TRBS_PER_SEGMENT)
87 return seg->dma + (segment_offset * sizeof(*trb));
90 /* Does this link TRB point to the first segment in a ring,
91 * or was the previous TRB the last TRB on the last segment in the ERST?
93 static bool last_trb_on_last_seg(struct xhci_hcd *xhci, struct xhci_ring *ring,
94 struct xhci_segment *seg, union xhci_trb *trb)
96 if (ring == xhci->event_ring)
97 return (trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
98 (seg->next == xhci->event_ring->first_seg);
100 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
103 /* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
104 * segment? I.e. would the updated event TRB pointer step off the end of the
107 static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
108 struct xhci_segment *seg, union xhci_trb *trb)
110 if (ring == xhci->event_ring)
111 return trb == &seg->trbs[TRBS_PER_SEGMENT];
113 return TRB_TYPE_LINK_LE32(trb->link.control);
116 static int enqueue_is_link_trb(struct xhci_ring *ring)
118 struct xhci_link_trb *link = &ring->enqueue->link;
119 return TRB_TYPE_LINK_LE32(link->control);
122 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
123 * TRB is in a new segment. This does not skip over link TRBs, and it does not
124 * effect the ring dequeue or enqueue pointers.
126 static void next_trb(struct xhci_hcd *xhci,
127 struct xhci_ring *ring,
128 struct xhci_segment **seg,
129 union xhci_trb **trb)
131 if (last_trb(xhci, ring, *seg, *trb)) {
133 *trb = ((*seg)->trbs);
140 * See Cycle bit rules. SW is the consumer for the event ring only.
141 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
143 static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
148 * If this is not event ring, and the dequeue pointer
149 * is not on a link TRB, there is one more usable TRB
151 if (ring->type != TYPE_EVENT &&
152 !last_trb(xhci, ring, ring->deq_seg, ring->dequeue))
153 ring->num_trbs_free++;
157 * Update the dequeue pointer further if that was a link TRB or
158 * we're at the end of an event ring segment (which doesn't have
161 if (last_trb(xhci, ring, ring->deq_seg, ring->dequeue)) {
162 if (ring->type == TYPE_EVENT &&
163 last_trb_on_last_seg(xhci, ring,
164 ring->deq_seg, ring->dequeue)) {
165 ring->cycle_state ^= 1;
167 ring->deq_seg = ring->deq_seg->next;
168 ring->dequeue = ring->deq_seg->trbs;
172 } while (last_trb(xhci, ring, ring->deq_seg, ring->dequeue));
176 * See Cycle bit rules. SW is the consumer for the event ring only.
177 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
179 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
180 * chain bit is set), then set the chain bit in all the following link TRBs.
181 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
182 * have their chain bit cleared (so that each Link TRB is a separate TD).
184 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
185 * set, but other sections talk about dealing with the chain bit set. This was
186 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
187 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
189 * @more_trbs_coming: Will you enqueue more TRBs before calling
190 * prepare_transfer()?
192 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
193 bool more_trbs_coming)
196 union xhci_trb *next;
198 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
199 /* If this is not event ring, there is one less usable TRB */
200 if (ring->type != TYPE_EVENT &&
201 !last_trb(xhci, ring, ring->enq_seg, ring->enqueue))
202 ring->num_trbs_free--;
203 next = ++(ring->enqueue);
206 /* Update the dequeue pointer further if that was a link TRB or we're at
207 * the end of an event ring segment (which doesn't have link TRBS)
209 while (last_trb(xhci, ring, ring->enq_seg, next)) {
210 if (ring->type != TYPE_EVENT) {
212 * If the caller doesn't plan on enqueueing more
213 * TDs before ringing the doorbell, then we
214 * don't want to give the link TRB to the
215 * hardware just yet. We'll give the link TRB
216 * back in prepare_ring() just before we enqueue
217 * the TD at the top of the ring.
219 if (!chain && !more_trbs_coming)
222 /* If we're not dealing with 0.95 hardware or
223 * isoc rings on AMD 0.96 host,
224 * carry over the chain bit of the previous TRB
225 * (which may mean the chain bit is cleared).
227 if (!(ring->type == TYPE_ISOC &&
228 (xhci->quirks & XHCI_AMD_0x96_HOST))
229 && !xhci_link_trb_quirk(xhci)) {
230 next->link.control &=
231 cpu_to_le32(~TRB_CHAIN);
232 next->link.control |=
235 /* Give this link TRB to the hardware */
237 next->link.control ^= cpu_to_le32(TRB_CYCLE);
239 /* Toggle the cycle bit after the last ring segment. */
240 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
241 ring->cycle_state ^= 1;
244 ring->enq_seg = ring->enq_seg->next;
245 ring->enqueue = ring->enq_seg->trbs;
246 next = ring->enqueue;
251 * Check to see if there's room to enqueue num_trbs on the ring and make sure
252 * enqueue pointer will not advance into dequeue segment. See rules above.
254 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
255 unsigned int num_trbs)
257 int num_trbs_in_deq_seg;
259 if (ring->num_trbs_free < num_trbs)
262 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
263 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
264 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
271 /* Ring the host controller doorbell after placing a command on the ring */
272 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
274 if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
277 xhci_dbg(xhci, "// Ding dong!\n");
278 writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
279 /* Flush PCI posted writes */
280 readl(&xhci->dba->doorbell[0]);
283 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
288 xhci_dbg(xhci, "Abort command ring\n");
290 temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
291 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
294 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
295 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
296 * but the completion event in never sent. Use the cmd timeout timer to
297 * handle those cases. Use twice the time to cover the bit polling retry
299 mod_timer(&xhci->cmd_timer, jiffies + (2 * XHCI_CMD_DEFAULT_TIMEOUT));
300 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
301 &xhci->op_regs->cmd_ring);
303 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
304 * time the completion od all xHCI commands, including
305 * the Command Abort operation. If software doesn't see
306 * CRR negated in a timely manner (e.g. longer than 5
307 * seconds), then it should assume that the there are
308 * larger problems with the xHC and assert HCRST.
310 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
311 CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
313 /* we are about to kill xhci, give it one more chance */
314 xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
315 &xhci->op_regs->cmd_ring);
317 ret = xhci_handshake(&xhci->op_regs->cmd_ring,
318 CMD_RING_RUNNING, 0, 3 * 1000 * 1000);
322 xhci_err(xhci, "Stopped the command ring failed, "
323 "maybe the host is dead\n");
324 del_timer(&xhci->cmd_timer);
325 xhci->xhc_state |= XHCI_STATE_DYING;
334 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
335 unsigned int slot_id,
336 unsigned int ep_index,
337 unsigned int stream_id)
339 __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
340 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
341 unsigned int ep_state = ep->ep_state;
343 /* Don't ring the doorbell for this endpoint if there are pending
344 * cancellations because we don't want to interrupt processing.
345 * We don't want to restart any stream rings if there's a set dequeue
346 * pointer command pending because the device can choose to start any
347 * stream once the endpoint is on the HW schedule.
349 if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) ||
350 (ep_state & EP_HALTED))
352 writel(DB_VALUE(ep_index, stream_id), db_addr);
353 /* The CPU has better things to do at this point than wait for a
354 * write-posting flush. It'll get there soon enough.
358 /* Ring the doorbell for any rings with pending URBs */
359 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
360 unsigned int slot_id,
361 unsigned int ep_index)
363 unsigned int stream_id;
364 struct xhci_virt_ep *ep;
366 ep = &xhci->devs[slot_id]->eps[ep_index];
368 /* A ring has pending URBs if its TD list is not empty */
369 if (!(ep->ep_state & EP_HAS_STREAMS)) {
370 if (ep->ring && !(list_empty(&ep->ring->td_list)))
371 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
375 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
377 struct xhci_stream_info *stream_info = ep->stream_info;
378 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
379 xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
384 static struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
385 unsigned int slot_id, unsigned int ep_index,
386 unsigned int stream_id)
388 struct xhci_virt_ep *ep;
390 ep = &xhci->devs[slot_id]->eps[ep_index];
391 /* Common case: no streams */
392 if (!(ep->ep_state & EP_HAS_STREAMS))
395 if (stream_id == 0) {
397 "WARN: Slot ID %u, ep index %u has streams, "
398 "but URB has no stream ID.\n",
403 if (stream_id < ep->stream_info->num_streams)
404 return ep->stream_info->stream_rings[stream_id];
407 "WARN: Slot ID %u, ep index %u has "
408 "stream IDs 1 to %u allocated, "
409 "but stream ID %u is requested.\n",
411 ep->stream_info->num_streams - 1,
416 /* Get the right ring for the given URB.
417 * If the endpoint supports streams, boundary check the URB's stream ID.
418 * If the endpoint doesn't support streams, return the singular endpoint ring.
420 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
423 return xhci_triad_to_transfer_ring(xhci, urb->dev->slot_id,
424 xhci_get_endpoint_index(&urb->ep->desc), urb->stream_id);
428 * Move the xHC's endpoint ring dequeue pointer past cur_td.
429 * Record the new state of the xHC's endpoint ring dequeue segment,
430 * dequeue pointer, and new consumer cycle state in state.
431 * Update our internal representation of the ring's dequeue pointer.
433 * We do this in three jumps:
434 * - First we update our new ring state to be the same as when the xHC stopped.
435 * - Then we traverse the ring to find the segment that contains
436 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
437 * any link TRBs with the toggle cycle bit set.
438 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
439 * if we've moved it past a link TRB with the toggle cycle bit set.
441 * Some of the uses of xhci_generic_trb are grotty, but if they're done
442 * with correct __le32 accesses they should work fine. Only users of this are
445 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
446 unsigned int slot_id, unsigned int ep_index,
447 unsigned int stream_id, struct xhci_td *cur_td,
448 struct xhci_dequeue_state *state)
450 struct xhci_virt_device *dev = xhci->devs[slot_id];
451 struct xhci_virt_ep *ep = &dev->eps[ep_index];
452 struct xhci_ring *ep_ring;
453 struct xhci_segment *new_seg;
454 union xhci_trb *new_deq;
457 bool cycle_found = false;
458 bool td_last_trb_found = false;
460 ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
461 ep_index, stream_id);
463 xhci_warn(xhci, "WARN can't find new dequeue state "
464 "for invalid stream ID %u.\n",
469 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
470 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
471 "Finding endpoint context");
472 /* 4.6.9 the css flag is written to the stream context for streams */
473 if (ep->ep_state & EP_HAS_STREAMS) {
474 struct xhci_stream_ctx *ctx =
475 &ep->stream_info->stream_ctx_array[stream_id];
476 hw_dequeue = le64_to_cpu(ctx->stream_ring);
478 struct xhci_ep_ctx *ep_ctx
479 = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
480 hw_dequeue = le64_to_cpu(ep_ctx->deq);
483 new_seg = ep_ring->deq_seg;
484 new_deq = ep_ring->dequeue;
485 state->new_cycle_state = hw_dequeue & 0x1;
488 * We want to find the pointer, segment and cycle state of the new trb
489 * (the one after current TD's last_trb). We know the cycle state at
490 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
494 if (!cycle_found && xhci_trb_virt_to_dma(new_seg, new_deq)
495 == (dma_addr_t)(hw_dequeue & ~0xf)) {
497 if (td_last_trb_found)
500 if (new_deq == cur_td->last_trb)
501 td_last_trb_found = true;
504 TRB_TYPE_LINK_LE32(new_deq->generic.field[3]) &&
505 new_deq->generic.field[3] & cpu_to_le32(LINK_TOGGLE))
506 state->new_cycle_state ^= 0x1;
508 next_trb(xhci, ep_ring, &new_seg, &new_deq);
510 /* Search wrapped around, bail out */
511 if (new_deq == ep->ring->dequeue) {
512 xhci_err(xhci, "Error: Failed finding new dequeue state\n");
513 state->new_deq_seg = NULL;
514 state->new_deq_ptr = NULL;
518 } while (!cycle_found || !td_last_trb_found);
520 state->new_deq_seg = new_seg;
521 state->new_deq_ptr = new_deq;
523 /* Don't update the ring cycle state for the producer (us). */
524 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
525 "Cycle state = 0x%x", state->new_cycle_state);
527 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
528 "New dequeue segment = %p (virtual)",
530 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
531 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
532 "New dequeue pointer = 0x%llx (DMA)",
533 (unsigned long long) addr);
536 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
537 * (The last TRB actually points to the ring enqueue pointer, which is not part
538 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
540 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
541 struct xhci_td *cur_td, bool flip_cycle)
543 struct xhci_segment *cur_seg;
544 union xhci_trb *cur_trb;
546 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
548 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
549 if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
550 /* Unchain any chained Link TRBs, but
551 * leave the pointers intact.
553 cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
554 /* Flip the cycle bit (link TRBs can't be the first
558 cur_trb->generic.field[3] ^=
559 cpu_to_le32(TRB_CYCLE);
560 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
561 "Cancel (unchain) link TRB");
562 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
563 "Address = %p (0x%llx dma); "
564 "in seg %p (0x%llx dma)",
566 (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
568 (unsigned long long)cur_seg->dma);
570 cur_trb->generic.field[0] = 0;
571 cur_trb->generic.field[1] = 0;
572 cur_trb->generic.field[2] = 0;
573 /* Preserve only the cycle bit of this TRB */
574 cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
575 /* Flip the cycle bit except on the first or last TRB */
576 if (flip_cycle && cur_trb != cur_td->first_trb &&
577 cur_trb != cur_td->last_trb)
578 cur_trb->generic.field[3] ^=
579 cpu_to_le32(TRB_CYCLE);
580 cur_trb->generic.field[3] |= cpu_to_le32(
581 TRB_TYPE(TRB_TR_NOOP));
582 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
583 "TRB to noop at offset 0x%llx",
585 xhci_trb_virt_to_dma(cur_seg, cur_trb));
587 if (cur_trb == cur_td->last_trb)
592 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
593 struct xhci_virt_ep *ep)
595 ep->ep_state &= ~EP_HALT_PENDING;
596 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the
597 * timer is running on another CPU, we don't decrement stop_cmds_pending
598 * (since we didn't successfully stop the watchdog timer).
600 if (del_timer(&ep->stop_cmd_timer))
601 ep->stop_cmds_pending--;
604 /* Must be called with xhci->lock held in interrupt context */
605 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
606 struct xhci_td *cur_td, int status)
610 struct urb_priv *urb_priv;
613 urb_priv = urb->hcpriv;
615 hcd = bus_to_hcd(urb->dev->bus);
617 /* Only giveback urb when this is the last td in urb */
618 if (urb_priv->td_cnt == urb_priv->length) {
619 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
620 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
621 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
622 if (xhci->quirks & XHCI_AMD_PLL_FIX)
623 usb_amd_quirk_pll_enable();
626 usb_hcd_unlink_urb_from_ep(hcd, urb);
628 spin_unlock(&xhci->lock);
629 usb_hcd_giveback_urb(hcd, urb, status);
630 xhci_urb_free_priv(urb_priv);
631 spin_lock(&xhci->lock);
636 * When we get a command completion for a Stop Endpoint Command, we need to
637 * unlink any cancelled TDs from the ring. There are two ways to do that:
639 * 1. If the HW was in the middle of processing the TD that needs to be
640 * cancelled, then we must move the ring's dequeue pointer past the last TRB
641 * in the TD with a Set Dequeue Pointer Command.
642 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
643 * bit cleared) so that the HW will skip over them.
645 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
646 union xhci_trb *trb, struct xhci_event_cmd *event)
648 unsigned int ep_index;
649 struct xhci_ring *ep_ring;
650 struct xhci_virt_ep *ep;
651 struct list_head *entry;
652 struct xhci_td *cur_td = NULL;
653 struct xhci_td *last_unlinked_td;
655 struct xhci_dequeue_state deq_state;
657 if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb->generic.field[3])))) {
658 if (!xhci->devs[slot_id])
659 xhci_warn(xhci, "Stop endpoint command "
660 "completion for disabled slot %u\n",
665 memset(&deq_state, 0, sizeof(deq_state));
666 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
667 ep = &xhci->devs[slot_id]->eps[ep_index];
669 if (list_empty(&ep->cancelled_td_list)) {
670 xhci_stop_watchdog_timer_in_irq(xhci, ep);
671 ep->stopped_td = NULL;
672 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
676 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
677 * We have the xHCI lock, so nothing can modify this list until we drop
678 * it. We're also in the event handler, so we can't get re-interrupted
679 * if another Stop Endpoint command completes
681 list_for_each(entry, &ep->cancelled_td_list) {
682 cur_td = list_entry(entry, struct xhci_td, cancelled_td_list);
683 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
684 "Removing canceled TD starting at 0x%llx (dma).",
685 (unsigned long long)xhci_trb_virt_to_dma(
686 cur_td->start_seg, cur_td->first_trb));
687 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
689 /* This shouldn't happen unless a driver is mucking
690 * with the stream ID after submission. This will
691 * leave the TD on the hardware ring, and the hardware
692 * will try to execute it, and may access a buffer
693 * that has already been freed. In the best case, the
694 * hardware will execute it, and the event handler will
695 * ignore the completion event for that TD, since it was
696 * removed from the td_list for that endpoint. In
697 * short, don't muck with the stream ID after
700 xhci_warn(xhci, "WARN Cancelled URB %p "
701 "has invalid stream ID %u.\n",
703 cur_td->urb->stream_id);
704 goto remove_finished_td;
707 * If we stopped on the TD we need to cancel, then we have to
708 * move the xHC endpoint ring dequeue pointer past this TD.
710 if (cur_td == ep->stopped_td)
711 xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
712 cur_td->urb->stream_id,
715 td_to_noop(xhci, ep_ring, cur_td, false);
718 * The event handler won't see a completion for this TD anymore,
719 * so remove it from the endpoint ring's TD list. Keep it in
720 * the cancelled TD list for URB completion later.
722 list_del_init(&cur_td->td_list);
724 last_unlinked_td = cur_td;
725 xhci_stop_watchdog_timer_in_irq(xhci, ep);
727 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
728 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
729 xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
730 ep->stopped_td->urb->stream_id, &deq_state);
731 xhci_ring_cmd_db(xhci);
733 /* Otherwise ring the doorbell(s) to restart queued transfers */
734 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
737 ep->stopped_td = NULL;
740 * Drop the lock and complete the URBs in the cancelled TD list.
741 * New TDs to be cancelled might be added to the end of the list before
742 * we can complete all the URBs for the TDs we already unlinked.
743 * So stop when we've completed the URB for the last TD we unlinked.
746 cur_td = list_entry(ep->cancelled_td_list.next,
747 struct xhci_td, cancelled_td_list);
748 list_del_init(&cur_td->cancelled_td_list);
750 /* Clean up the cancelled URB */
751 /* Doesn't matter what we pass for status, since the core will
752 * just overwrite it (because the URB has been unlinked).
754 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
756 /* Stop processing the cancelled list if the watchdog timer is
759 if (xhci->xhc_state & XHCI_STATE_DYING)
761 } while (cur_td != last_unlinked_td);
763 /* Return to the event handler with xhci->lock re-acquired */
766 static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
768 struct xhci_td *cur_td;
770 while (!list_empty(&ring->td_list)) {
771 cur_td = list_first_entry(&ring->td_list,
772 struct xhci_td, td_list);
773 list_del_init(&cur_td->td_list);
774 if (!list_empty(&cur_td->cancelled_td_list))
775 list_del_init(&cur_td->cancelled_td_list);
776 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
780 static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
781 int slot_id, int ep_index)
783 struct xhci_td *cur_td;
784 struct xhci_virt_ep *ep;
785 struct xhci_ring *ring;
787 ep = &xhci->devs[slot_id]->eps[ep_index];
788 if ((ep->ep_state & EP_HAS_STREAMS) ||
789 (ep->ep_state & EP_GETTING_NO_STREAMS)) {
792 for (stream_id = 0; stream_id < ep->stream_info->num_streams;
794 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
795 "Killing URBs for slot ID %u, ep index %u, stream %u",
796 slot_id, ep_index, stream_id + 1);
797 xhci_kill_ring_urbs(xhci,
798 ep->stream_info->stream_rings[stream_id]);
804 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
805 "Killing URBs for slot ID %u, ep index %u",
807 xhci_kill_ring_urbs(xhci, ring);
809 while (!list_empty(&ep->cancelled_td_list)) {
810 cur_td = list_first_entry(&ep->cancelled_td_list,
811 struct xhci_td, cancelled_td_list);
812 list_del_init(&cur_td->cancelled_td_list);
813 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
817 /* Watchdog timer function for when a stop endpoint command fails to complete.
818 * In this case, we assume the host controller is broken or dying or dead. The
819 * host may still be completing some other events, so we have to be careful to
820 * let the event ring handler and the URB dequeueing/enqueueing functions know
821 * through xhci->state.
823 * The timer may also fire if the host takes a very long time to respond to the
824 * command, and the stop endpoint command completion handler cannot delete the
825 * timer before the timer function is called. Another endpoint cancellation may
826 * sneak in before the timer function can grab the lock, and that may queue
827 * another stop endpoint command and add the timer back. So we cannot use a
828 * simple flag to say whether there is a pending stop endpoint command for a
829 * particular endpoint.
831 * Instead we use a combination of that flag and a counter for the number of
832 * pending stop endpoint commands. If the timer is the tail end of the last
833 * stop endpoint command, and the endpoint's command is still pending, we assume
836 void xhci_stop_endpoint_command_watchdog(unsigned long arg)
838 struct xhci_hcd *xhci;
839 struct xhci_virt_ep *ep;
843 ep = (struct xhci_virt_ep *) arg;
846 spin_lock_irqsave(&xhci->lock, flags);
848 ep->stop_cmds_pending--;
849 if (xhci->xhc_state & XHCI_STATE_REMOVING) {
850 spin_unlock_irqrestore(&xhci->lock, flags);
853 if (xhci->xhc_state & XHCI_STATE_DYING) {
854 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
855 "Stop EP timer ran, but another timer marked "
856 "xHCI as DYING, exiting.");
857 spin_unlock_irqrestore(&xhci->lock, flags);
860 if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) {
861 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
862 "Stop EP timer ran, but no command pending, "
864 spin_unlock_irqrestore(&xhci->lock, flags);
868 xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
869 xhci_warn(xhci, "Assuming host is dying, halting host.\n");
870 /* Oops, HC is dead or dying or at least not responding to the stop
873 xhci->xhc_state |= XHCI_STATE_DYING;
874 /* Disable interrupts from the host controller and start halting it */
876 spin_unlock_irqrestore(&xhci->lock, flags);
878 ret = xhci_halt(xhci);
880 spin_lock_irqsave(&xhci->lock, flags);
882 /* This is bad; the host is not responding to commands and it's
883 * not allowing itself to be halted. At least interrupts are
884 * disabled. If we call usb_hc_died(), it will attempt to
885 * disconnect all device drivers under this host. Those
886 * disconnect() methods will wait for all URBs to be unlinked,
887 * so we must complete them.
889 xhci_warn(xhci, "Non-responsive xHCI host is not halting.\n");
890 xhci_warn(xhci, "Completing active URBs anyway.\n");
891 /* We could turn all TDs on the rings to no-ops. This won't
892 * help if the host has cached part of the ring, and is slow if
893 * we want to preserve the cycle bit. Skip it and hope the host
894 * doesn't touch the memory.
897 for (i = 0; i < MAX_HC_SLOTS; i++) {
900 for (j = 0; j < 31; j++)
901 xhci_kill_endpoint_urbs(xhci, i, j);
903 spin_unlock_irqrestore(&xhci->lock, flags);
904 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
905 "Calling usb_hc_died()");
906 usb_hc_died(xhci_to_hcd(xhci));
907 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
908 "xHCI host controller is dead.");
912 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
913 struct xhci_virt_device *dev,
914 struct xhci_ring *ep_ring,
915 unsigned int ep_index)
917 union xhci_trb *dequeue_temp;
918 int num_trbs_free_temp;
921 num_trbs_free_temp = ep_ring->num_trbs_free;
922 dequeue_temp = ep_ring->dequeue;
924 /* If we get two back-to-back stalls, and the first stalled transfer
925 * ends just before a link TRB, the dequeue pointer will be left on
926 * the link TRB by the code in the while loop. So we have to update
927 * the dequeue pointer one segment further, or we'll jump off
928 * the segment into la-la-land.
930 if (last_trb(xhci, ep_ring, ep_ring->deq_seg, ep_ring->dequeue)) {
931 ep_ring->deq_seg = ep_ring->deq_seg->next;
932 ep_ring->dequeue = ep_ring->deq_seg->trbs;
935 while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
936 /* We have more usable TRBs */
937 ep_ring->num_trbs_free++;
939 if (last_trb(xhci, ep_ring, ep_ring->deq_seg,
941 if (ep_ring->dequeue ==
942 dev->eps[ep_index].queued_deq_ptr)
944 ep_ring->deq_seg = ep_ring->deq_seg->next;
945 ep_ring->dequeue = ep_ring->deq_seg->trbs;
947 if (ep_ring->dequeue == dequeue_temp) {
954 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
955 ep_ring->num_trbs_free = num_trbs_free_temp;
960 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
961 * we need to clear the set deq pending flag in the endpoint ring state, so that
962 * the TD queueing code can ring the doorbell again. We also need to ring the
963 * endpoint doorbell to restart the ring, but only if there aren't more
964 * cancellations pending.
966 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
967 union xhci_trb *trb, u32 cmd_comp_code)
969 unsigned int ep_index;
970 unsigned int stream_id;
971 struct xhci_ring *ep_ring;
972 struct xhci_virt_device *dev;
973 struct xhci_virt_ep *ep;
974 struct xhci_ep_ctx *ep_ctx;
975 struct xhci_slot_ctx *slot_ctx;
977 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
978 stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
979 dev = xhci->devs[slot_id];
980 ep = &dev->eps[ep_index];
982 ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
984 xhci_warn(xhci, "WARN Set TR deq ptr command for freed stream ID %u\n",
986 /* XXX: Harmless??? */
990 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
991 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
993 if (cmd_comp_code != COMP_SUCCESS) {
994 unsigned int ep_state;
995 unsigned int slot_state;
997 switch (cmd_comp_code) {
999 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1001 case COMP_CTX_STATE:
1002 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1003 ep_state = le32_to_cpu(ep_ctx->ep_info);
1004 ep_state &= EP_STATE_MASK;
1005 slot_state = le32_to_cpu(slot_ctx->dev_state);
1006 slot_state = GET_SLOT_STATE(slot_state);
1007 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1008 "Slot state = %u, EP state = %u",
1009 slot_state, ep_state);
1012 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1016 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1020 /* OK what do we do now? The endpoint state is hosed, and we
1021 * should never get to this point if the synchronization between
1022 * queueing, and endpoint state are correct. This might happen
1023 * if the device gets disconnected after we've finished
1024 * cancelling URBs, which might not be an error...
1028 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1029 if (ep->ep_state & EP_HAS_STREAMS) {
1030 struct xhci_stream_ctx *ctx =
1031 &ep->stream_info->stream_ctx_array[stream_id];
1032 deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
1034 deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
1036 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1037 "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq);
1038 if (xhci_trb_virt_to_dma(ep->queued_deq_seg,
1039 ep->queued_deq_ptr) == deq) {
1040 /* Update the ring's dequeue segment and dequeue pointer
1041 * to reflect the new position.
1043 update_ring_for_set_deq_completion(xhci, dev,
1046 xhci_warn(xhci, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1047 xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1048 ep->queued_deq_seg, ep->queued_deq_ptr);
1053 dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1054 dev->eps[ep_index].queued_deq_seg = NULL;
1055 dev->eps[ep_index].queued_deq_ptr = NULL;
1056 /* Restart any rings with pending URBs */
1057 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1060 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1061 union xhci_trb *trb, u32 cmd_comp_code)
1063 unsigned int ep_index;
1065 ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1066 /* This command will only fail if the endpoint wasn't halted,
1067 * but we don't care.
1069 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1070 "Ignoring reset ep completion code of %u", cmd_comp_code);
1072 /* HW with the reset endpoint quirk needs to have a configure endpoint
1073 * command complete before the endpoint can be used. Queue that here
1074 * because the HW can't handle two commands being queued in a row.
1076 if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1077 struct xhci_command *command;
1078 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1080 xhci_warn(xhci, "WARN Cannot submit cfg ep: ENOMEM\n");
1083 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1084 "Queueing configure endpoint command");
1085 xhci_queue_configure_endpoint(xhci, command,
1086 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1088 xhci_ring_cmd_db(xhci);
1090 /* Clear our internal halted state */
1091 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1095 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1098 if (cmd_comp_code == COMP_SUCCESS)
1099 xhci->slot_id = slot_id;
1104 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1106 struct xhci_virt_device *virt_dev;
1108 virt_dev = xhci->devs[slot_id];
1111 if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1112 /* Delete default control endpoint resources */
1113 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1114 xhci_free_virt_device(xhci, slot_id);
1117 static void xhci_handle_cmd_config_ep(struct xhci_hcd *xhci, int slot_id,
1118 struct xhci_event_cmd *event, u32 cmd_comp_code)
1120 struct xhci_virt_device *virt_dev;
1121 struct xhci_input_control_ctx *ctrl_ctx;
1122 unsigned int ep_index;
1123 unsigned int ep_state;
1124 u32 add_flags, drop_flags;
1127 * Configure endpoint commands can come from the USB core
1128 * configuration or alt setting changes, or because the HW
1129 * needed an extra configure endpoint command after a reset
1130 * endpoint command or streams were being configured.
1131 * If the command was for a halted endpoint, the xHCI driver
1132 * is not waiting on the configure endpoint command.
1134 virt_dev = xhci->devs[slot_id];
1135 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1137 xhci_warn(xhci, "Could not get input context, bad type.\n");
1141 add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1142 drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1143 /* Input ctx add_flags are the endpoint index plus one */
1144 ep_index = xhci_last_valid_endpoint(add_flags) - 1;
1146 /* A usb_set_interface() call directly after clearing a halted
1147 * condition may race on this quirky hardware. Not worth
1148 * worrying about, since this is prototype hardware. Not sure
1149 * if this will work for streams, but streams support was
1150 * untested on this prototype.
1152 if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1153 ep_index != (unsigned int) -1 &&
1154 add_flags - SLOT_FLAG == drop_flags) {
1155 ep_state = virt_dev->eps[ep_index].ep_state;
1156 if (!(ep_state & EP_HALTED))
1158 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1159 "Completed config ep cmd - "
1160 "last ep index = %d, state = %d",
1161 ep_index, ep_state);
1162 /* Clear internal halted state and restart ring(s) */
1163 virt_dev->eps[ep_index].ep_state &= ~EP_HALTED;
1164 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1170 static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
1171 struct xhci_event_cmd *event)
1173 xhci_dbg(xhci, "Completed reset device command.\n");
1174 if (!xhci->devs[slot_id])
1175 xhci_warn(xhci, "Reset device command completion "
1176 "for disabled slot %u\n", slot_id);
1179 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1180 struct xhci_event_cmd *event)
1182 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1183 xhci->error_bitmask |= 1 << 6;
1186 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1187 "NEC firmware version %2x.%02x",
1188 NEC_FW_MAJOR(le32_to_cpu(event->status)),
1189 NEC_FW_MINOR(le32_to_cpu(event->status)));
1192 static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
1194 list_del(&cmd->cmd_list);
1196 if (cmd->completion) {
1197 cmd->status = status;
1198 complete(cmd->completion);
1204 void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1206 struct xhci_command *cur_cmd, *tmp_cmd;
1207 list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1208 xhci_complete_del_and_free_cmd(cur_cmd, COMP_CMD_ABORT);
1212 * Turn all commands on command ring with status set to "aborted" to no-op trbs.
1213 * If there are other commands waiting then restart the ring and kick the timer.
1214 * This must be called with command ring stopped and xhci->lock held.
1216 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
1217 struct xhci_command *cur_cmd)
1219 struct xhci_command *i_cmd, *tmp_cmd;
1222 /* Turn all aborted commands in list to no-ops, then restart */
1223 list_for_each_entry_safe(i_cmd, tmp_cmd, &xhci->cmd_list,
1226 if (i_cmd->status != COMP_CMD_ABORT)
1229 i_cmd->status = COMP_CMD_STOP;
1231 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
1232 i_cmd->command_trb);
1233 /* get cycle state from the original cmd trb */
1234 cycle_state = le32_to_cpu(
1235 i_cmd->command_trb->generic.field[3]) & TRB_CYCLE;
1236 /* modify the command trb to no-op command */
1237 i_cmd->command_trb->generic.field[0] = 0;
1238 i_cmd->command_trb->generic.field[1] = 0;
1239 i_cmd->command_trb->generic.field[2] = 0;
1240 i_cmd->command_trb->generic.field[3] = cpu_to_le32(
1241 TRB_TYPE(TRB_CMD_NOOP) | cycle_state);
1244 * caller waiting for completion is called when command
1245 * completion event is received for these no-op commands
1249 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
1251 /* ring command ring doorbell to restart the command ring */
1252 if ((xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue) &&
1253 !(xhci->xhc_state & XHCI_STATE_DYING)) {
1254 xhci->current_cmd = cur_cmd;
1255 mod_timer(&xhci->cmd_timer, jiffies + XHCI_CMD_DEFAULT_TIMEOUT);
1256 xhci_ring_cmd_db(xhci);
1262 void xhci_handle_command_timeout(unsigned long data)
1264 struct xhci_hcd *xhci;
1266 unsigned long flags;
1268 bool second_timeout = false;
1269 xhci = (struct xhci_hcd *) data;
1271 /* mark this command to be cancelled */
1272 spin_lock_irqsave(&xhci->lock, flags);
1273 if (xhci->current_cmd) {
1274 if (xhci->current_cmd->status == COMP_CMD_ABORT)
1275 second_timeout = true;
1276 xhci->current_cmd->status = COMP_CMD_ABORT;
1279 /* Make sure command ring is running before aborting it */
1280 hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1281 if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
1282 (hw_ring_state & CMD_RING_RUNNING)) {
1283 spin_unlock_irqrestore(&xhci->lock, flags);
1284 xhci_dbg(xhci, "Command timeout\n");
1285 ret = xhci_abort_cmd_ring(xhci);
1286 if (unlikely(ret == -ESHUTDOWN)) {
1287 xhci_err(xhci, "Abort command ring failed\n");
1288 xhci_cleanup_command_queue(xhci);
1289 usb_hc_died(xhci_to_hcd(xhci)->primary_hcd);
1290 xhci_dbg(xhci, "xHCI host controller is dead.\n");
1295 /* command ring failed to restart, or host removed. Bail out */
1296 if (second_timeout || xhci->xhc_state & XHCI_STATE_REMOVING) {
1297 spin_unlock_irqrestore(&xhci->lock, flags);
1298 xhci_dbg(xhci, "command timed out twice, ring start fail?\n");
1299 xhci_cleanup_command_queue(xhci);
1303 /* command timeout on stopped ring, ring can't be aborted */
1304 xhci_dbg(xhci, "Command timeout on stopped ring\n");
1305 xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
1306 spin_unlock_irqrestore(&xhci->lock, flags);
1310 static void handle_cmd_completion(struct xhci_hcd *xhci,
1311 struct xhci_event_cmd *event)
1313 int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1315 dma_addr_t cmd_dequeue_dma;
1317 union xhci_trb *cmd_trb;
1318 struct xhci_command *cmd;
1321 cmd_dma = le64_to_cpu(event->cmd_trb);
1322 cmd_trb = xhci->cmd_ring->dequeue;
1323 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1325 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
1326 if (cmd_dequeue_dma == 0) {
1327 xhci->error_bitmask |= 1 << 4;
1330 /* Does the DMA address match our internal dequeue pointer address? */
1331 if (cmd_dma != (u64) cmd_dequeue_dma) {
1332 xhci->error_bitmask |= 1 << 5;
1336 cmd = list_entry(xhci->cmd_list.next, struct xhci_command, cmd_list);
1338 del_timer(&xhci->cmd_timer);
1340 trace_xhci_cmd_completion(cmd_trb, (struct xhci_generic_trb *) event);
1342 cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1344 /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1345 if (cmd_comp_code == COMP_CMD_STOP) {
1346 xhci_handle_stopped_cmd_ring(xhci, cmd);
1350 if (cmd->command_trb != xhci->cmd_ring->dequeue) {
1352 "Command completion event does not match command\n");
1357 * Host aborted the command ring, check if the current command was
1358 * supposed to be aborted, otherwise continue normally.
1359 * The command ring is stopped now, but the xHC will issue a Command
1360 * Ring Stopped event which will cause us to restart it.
1362 if (cmd_comp_code == COMP_CMD_ABORT) {
1363 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1364 if (cmd->status == COMP_CMD_ABORT)
1368 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1370 case TRB_ENABLE_SLOT:
1371 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd_comp_code);
1373 case TRB_DISABLE_SLOT:
1374 xhci_handle_cmd_disable_slot(xhci, slot_id);
1377 if (!cmd->completion)
1378 xhci_handle_cmd_config_ep(xhci, slot_id, event,
1381 case TRB_EVAL_CONTEXT:
1386 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1387 le32_to_cpu(cmd_trb->generic.field[3])));
1388 xhci_handle_cmd_stop_ep(xhci, slot_id, cmd_trb, event);
1391 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1392 le32_to_cpu(cmd_trb->generic.field[3])));
1393 xhci_handle_cmd_set_deq(xhci, slot_id, cmd_trb, cmd_comp_code);
1396 /* Is this an aborted command turned to NO-OP? */
1397 if (cmd->status == COMP_CMD_STOP)
1398 cmd_comp_code = COMP_CMD_STOP;
1401 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1402 le32_to_cpu(cmd_trb->generic.field[3])));
1403 xhci_handle_cmd_reset_ep(xhci, slot_id, cmd_trb, cmd_comp_code);
1406 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1407 * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1409 slot_id = TRB_TO_SLOT_ID(
1410 le32_to_cpu(cmd_trb->generic.field[3]));
1411 xhci_handle_cmd_reset_dev(xhci, slot_id, event);
1413 case TRB_NEC_GET_FW:
1414 xhci_handle_cmd_nec_get_fw(xhci, event);
1417 /* Skip over unknown commands on the event ring */
1418 xhci->error_bitmask |= 1 << 6;
1422 /* restart timer if this wasn't the last command */
1423 if (cmd->cmd_list.next != &xhci->cmd_list) {
1424 xhci->current_cmd = list_entry(cmd->cmd_list.next,
1425 struct xhci_command, cmd_list);
1426 mod_timer(&xhci->cmd_timer, jiffies + XHCI_CMD_DEFAULT_TIMEOUT);
1430 xhci_complete_del_and_free_cmd(cmd, cmd_comp_code);
1432 inc_deq(xhci, xhci->cmd_ring);
1435 static void handle_vendor_event(struct xhci_hcd *xhci,
1436 union xhci_trb *event)
1440 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1441 xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1442 if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1443 handle_cmd_completion(xhci, &event->event_cmd);
1446 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1447 * port registers -- USB 3.0 and USB 2.0).
1449 * Returns a zero-based port number, which is suitable for indexing into each of
1450 * the split roothubs' port arrays and bus state arrays.
1451 * Add one to it in order to call xhci_find_slot_id_by_port.
1453 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd,
1454 struct xhci_hcd *xhci, u32 port_id)
1457 unsigned int num_similar_speed_ports = 0;
1459 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1460 * and usb2_ports are 0-based indexes. Count the number of similar
1461 * speed ports, up to 1 port before this port.
1463 for (i = 0; i < (port_id - 1); i++) {
1464 u8 port_speed = xhci->port_array[i];
1467 * Skip ports that don't have known speeds, or have duplicate
1468 * Extended Capabilities port speed entries.
1470 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
1474 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1475 * 1.1 ports are under the USB 2.0 hub. If the port speed
1476 * matches the device speed, it's a similar speed port.
1478 if ((port_speed == 0x03) == (hcd->speed >= HCD_USB3))
1479 num_similar_speed_ports++;
1481 return num_similar_speed_ports;
1484 static void handle_device_notification(struct xhci_hcd *xhci,
1485 union xhci_trb *event)
1488 struct usb_device *udev;
1490 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->generic.field[3]));
1491 if (!xhci->devs[slot_id]) {
1492 xhci_warn(xhci, "Device Notification event for "
1493 "unused slot %u\n", slot_id);
1497 xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1499 udev = xhci->devs[slot_id]->udev;
1500 if (udev && udev->parent)
1501 usb_wakeup_notification(udev->parent, udev->portnum);
1504 static void handle_port_status(struct xhci_hcd *xhci,
1505 union xhci_trb *event)
1507 struct usb_hcd *hcd;
1512 unsigned int faked_port_index;
1514 struct xhci_bus_state *bus_state;
1515 __le32 __iomem **port_array;
1516 bool bogus_port_status = false;
1518 /* Port status change events always have a successful completion code */
1519 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
1520 xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
1521 xhci->error_bitmask |= 1 << 8;
1523 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1524 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1526 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1527 if ((port_id <= 0) || (port_id > max_ports)) {
1528 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1529 inc_deq(xhci, xhci->event_ring);
1533 /* Figure out which usb_hcd this port is attached to:
1534 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1536 major_revision = xhci->port_array[port_id - 1];
1538 /* Find the right roothub. */
1539 hcd = xhci_to_hcd(xhci);
1540 if ((major_revision == 0x03) != (hcd->speed >= HCD_USB3))
1541 hcd = xhci->shared_hcd;
1543 if (major_revision == 0) {
1544 xhci_warn(xhci, "Event for port %u not in "
1545 "Extended Capabilities, ignoring.\n",
1547 bogus_port_status = true;
1550 if (major_revision == DUPLICATE_ENTRY) {
1551 xhci_warn(xhci, "Event for port %u duplicated in"
1552 "Extended Capabilities, ignoring.\n",
1554 bogus_port_status = true;
1559 * Hardware port IDs reported by a Port Status Change Event include USB
1560 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1561 * resume event, but we first need to translate the hardware port ID
1562 * into the index into the ports on the correct split roothub, and the
1563 * correct bus_state structure.
1565 bus_state = &xhci->bus_state[hcd_index(hcd)];
1566 if (hcd->speed >= HCD_USB3)
1567 port_array = xhci->usb3_ports;
1569 port_array = xhci->usb2_ports;
1570 /* Find the faked port hub number */
1571 faked_port_index = find_faked_portnum_from_hw_portnum(hcd, xhci,
1574 temp = readl(port_array[faked_port_index]);
1575 if (hcd->state == HC_STATE_SUSPENDED) {
1576 xhci_dbg(xhci, "resume root hub\n");
1577 usb_hcd_resume_root_hub(hcd);
1580 if (hcd->speed >= HCD_USB3 && (temp & PORT_PLS_MASK) == XDEV_INACTIVE)
1581 bus_state->port_remote_wakeup &= ~(1 << faked_port_index);
1583 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_RESUME) {
1584 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1586 temp1 = readl(&xhci->op_regs->command);
1587 if (!(temp1 & CMD_RUN)) {
1588 xhci_warn(xhci, "xHC is not running.\n");
1592 if (DEV_SUPERSPEED_ANY(temp)) {
1593 xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1594 /* Set a flag to say the port signaled remote wakeup,
1595 * so we can tell the difference between the end of
1596 * device and host initiated resume.
1598 bus_state->port_remote_wakeup |= 1 << faked_port_index;
1599 xhci_test_and_clear_bit(xhci, port_array,
1600 faked_port_index, PORT_PLC);
1601 xhci_set_link_state(xhci, port_array, faked_port_index,
1603 /* Need to wait until the next link state change
1604 * indicates the device is actually in U0.
1606 bogus_port_status = true;
1608 } else if (!test_bit(faked_port_index,
1609 &bus_state->resuming_ports)) {
1610 xhci_dbg(xhci, "resume HS port %d\n", port_id);
1611 bus_state->resume_done[faked_port_index] = jiffies +
1612 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1613 set_bit(faked_port_index, &bus_state->resuming_ports);
1614 mod_timer(&hcd->rh_timer,
1615 bus_state->resume_done[faked_port_index]);
1616 /* Do the rest in GetPortStatus */
1620 if ((temp & PORT_PLC) && (temp & PORT_PLS_MASK) == XDEV_U0 &&
1621 DEV_SUPERSPEED_ANY(temp)) {
1622 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1623 /* We've just brought the device into U0 through either the
1624 * Resume state after a device remote wakeup, or through the
1625 * U3Exit state after a host-initiated resume. If it's a device
1626 * initiated remote wake, don't pass up the link state change,
1627 * so the roothub behavior is consistent with external
1628 * USB 3.0 hub behavior.
1630 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1631 faked_port_index + 1);
1632 if (slot_id && xhci->devs[slot_id])
1633 xhci_ring_device(xhci, slot_id);
1634 if (bus_state->port_remote_wakeup & (1 << faked_port_index)) {
1635 bus_state->port_remote_wakeup &=
1636 ~(1 << faked_port_index);
1637 xhci_test_and_clear_bit(xhci, port_array,
1638 faked_port_index, PORT_PLC);
1639 usb_wakeup_notification(hcd->self.root_hub,
1640 faked_port_index + 1);
1641 bogus_port_status = true;
1647 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1648 * RExit to a disconnect state). If so, let the the driver know it's
1649 * out of the RExit state.
1651 if (!DEV_SUPERSPEED_ANY(temp) &&
1652 test_and_clear_bit(faked_port_index,
1653 &bus_state->rexit_ports)) {
1654 complete(&bus_state->rexit_done[faked_port_index]);
1655 bogus_port_status = true;
1659 if (hcd->speed < HCD_USB3)
1660 xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
1664 /* Update event ring dequeue pointer before dropping the lock */
1665 inc_deq(xhci, xhci->event_ring);
1667 /* Don't make the USB core poll the roothub if we got a bad port status
1668 * change event. Besides, at that point we can't tell which roothub
1669 * (USB 2.0 or USB 3.0) to kick.
1671 if (bogus_port_status)
1675 * xHCI port-status-change events occur when the "or" of all the
1676 * status-change bits in the portsc register changes from 0 to 1.
1677 * New status changes won't cause an event if any other change
1678 * bits are still set. When an event occurs, switch over to
1679 * polling to avoid losing status changes.
1681 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1682 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1683 spin_unlock(&xhci->lock);
1684 /* Pass this up to the core */
1685 usb_hcd_poll_rh_status(hcd);
1686 spin_lock(&xhci->lock);
1690 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1691 * at end_trb, which may be in another segment. If the suspect DMA address is a
1692 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1695 struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1696 struct xhci_segment *start_seg,
1697 union xhci_trb *start_trb,
1698 union xhci_trb *end_trb,
1699 dma_addr_t suspect_dma,
1702 dma_addr_t start_dma;
1703 dma_addr_t end_seg_dma;
1704 dma_addr_t end_trb_dma;
1705 struct xhci_segment *cur_seg;
1707 start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1708 cur_seg = start_seg;
1713 /* We may get an event for a Link TRB in the middle of a TD */
1714 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1715 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1716 /* If the end TRB isn't in this segment, this is set to 0 */
1717 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1721 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1722 (unsigned long long)suspect_dma,
1723 (unsigned long long)start_dma,
1724 (unsigned long long)end_trb_dma,
1725 (unsigned long long)cur_seg->dma,
1726 (unsigned long long)end_seg_dma);
1728 if (end_trb_dma > 0) {
1729 /* The end TRB is in this segment, so suspect should be here */
1730 if (start_dma <= end_trb_dma) {
1731 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1734 /* Case for one segment with
1735 * a TD wrapped around to the top
1737 if ((suspect_dma >= start_dma &&
1738 suspect_dma <= end_seg_dma) ||
1739 (suspect_dma >= cur_seg->dma &&
1740 suspect_dma <= end_trb_dma))
1745 /* Might still be somewhere in this segment */
1746 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1749 cur_seg = cur_seg->next;
1750 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1751 } while (cur_seg != start_seg);
1756 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1757 unsigned int slot_id, unsigned int ep_index,
1758 unsigned int stream_id,
1759 struct xhci_td *td, union xhci_trb *event_trb)
1761 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1762 struct xhci_command *command;
1763 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1767 ep->ep_state |= EP_HALTED;
1768 ep->stopped_stream = stream_id;
1770 xhci_queue_reset_ep(xhci, command, slot_id, ep_index);
1771 xhci_cleanup_stalled_ring(xhci, ep_index, td);
1773 ep->stopped_stream = 0;
1775 xhci_ring_cmd_db(xhci);
1778 /* Check if an error has halted the endpoint ring. The class driver will
1779 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1780 * However, a babble and other errors also halt the endpoint ring, and the class
1781 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1782 * Ring Dequeue Pointer command manually.
1784 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1785 struct xhci_ep_ctx *ep_ctx,
1786 unsigned int trb_comp_code)
1788 /* TRB completion codes that may require a manual halt cleanup */
1789 if (trb_comp_code == COMP_TX_ERR ||
1790 trb_comp_code == COMP_BABBLE ||
1791 trb_comp_code == COMP_SPLIT_ERR)
1792 /* The 0.96 spec says a babbling control endpoint
1793 * is not halted. The 0.96 spec says it is. Some HW
1794 * claims to be 0.95 compliant, but it halts the control
1795 * endpoint anyway. Check if a babble halted the
1798 if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1799 cpu_to_le32(EP_STATE_HALTED))
1805 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1807 if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1808 /* Vendor defined "informational" completion code,
1809 * treat as not-an-error.
1811 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1813 xhci_dbg(xhci, "Treating code as success.\n");
1820 * Finish the td processing, remove the td from td list;
1821 * Return 1 if the urb can be given back.
1823 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1824 union xhci_trb *event_trb, struct xhci_transfer_event *event,
1825 struct xhci_virt_ep *ep, int *status, bool skip)
1827 struct xhci_virt_device *xdev;
1828 struct xhci_ring *ep_ring;
1829 unsigned int slot_id;
1831 struct urb *urb = NULL;
1832 struct xhci_ep_ctx *ep_ctx;
1834 struct urb_priv *urb_priv;
1837 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1838 xdev = xhci->devs[slot_id];
1839 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1840 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1841 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1842 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1847 if (trb_comp_code == COMP_STOP_INVAL ||
1848 trb_comp_code == COMP_STOP ||
1849 trb_comp_code == COMP_STOP_SHORT) {
1850 /* The Endpoint Stop Command completion will take care of any
1851 * stopped TDs. A stopped TD may be restarted, so don't update
1852 * the ring dequeue pointer or take this TD off any lists yet.
1854 ep->stopped_td = td;
1857 if (trb_comp_code == COMP_STALL ||
1858 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
1860 /* Issue a reset endpoint command to clear the host side
1861 * halt, followed by a set dequeue command to move the
1862 * dequeue pointer past the TD.
1863 * The class driver clears the device side halt later.
1865 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
1866 ep_ring->stream_id, td, event_trb);
1868 /* Update ring dequeue pointer */
1869 while (ep_ring->dequeue != td->last_trb)
1870 inc_deq(xhci, ep_ring);
1871 inc_deq(xhci, ep_ring);
1875 /* Clean up the endpoint's TD list */
1877 urb_priv = urb->hcpriv;
1879 /* Do one last check of the actual transfer length.
1880 * If the host controller said we transferred more data than the buffer
1881 * length, urb->actual_length will be a very big number (since it's
1882 * unsigned). Play it safe and say we didn't transfer anything.
1884 if (urb->actual_length > urb->transfer_buffer_length) {
1885 xhci_warn(xhci, "URB transfer length is wrong, xHC issue? req. len = %u, act. len = %u\n",
1886 urb->transfer_buffer_length,
1887 urb->actual_length);
1888 urb->actual_length = 0;
1889 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1890 *status = -EREMOTEIO;
1894 list_del_init(&td->td_list);
1895 /* Was this TD slated to be cancelled but completed anyway? */
1896 if (!list_empty(&td->cancelled_td_list))
1897 list_del_init(&td->cancelled_td_list);
1900 /* Giveback the urb when all the tds are completed */
1901 if (urb_priv->td_cnt == urb_priv->length) {
1903 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
1904 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
1905 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
1906 if (xhci->quirks & XHCI_AMD_PLL_FIX)
1907 usb_amd_quirk_pll_enable();
1916 * Process control tds, update urb status and actual_length.
1918 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1919 union xhci_trb *event_trb, struct xhci_transfer_event *event,
1920 struct xhci_virt_ep *ep, int *status)
1922 struct xhci_virt_device *xdev;
1923 struct xhci_ring *ep_ring;
1924 unsigned int slot_id;
1926 struct xhci_ep_ctx *ep_ctx;
1929 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1930 xdev = xhci->devs[slot_id];
1931 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1932 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1933 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1934 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1936 switch (trb_comp_code) {
1938 if (event_trb == ep_ring->dequeue) {
1939 xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
1940 "without IOC set??\n");
1941 *status = -ESHUTDOWN;
1942 } else if (event_trb != td->last_trb) {
1943 xhci_warn(xhci, "WARN: Success on ctrl data TRB "
1944 "without IOC set??\n");
1945 *status = -ESHUTDOWN;
1951 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
1952 *status = -EREMOTEIO;
1956 case COMP_STOP_SHORT:
1957 if (event_trb == ep_ring->dequeue || event_trb == td->last_trb)
1958 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
1960 td->urb->actual_length =
1961 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1963 return finish_td(xhci, td, event_trb, event, ep, status, false);
1965 /* Did we stop at data stage? */
1966 if (event_trb != ep_ring->dequeue && event_trb != td->last_trb)
1967 td->urb->actual_length =
1968 td->urb->transfer_buffer_length -
1969 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1971 case COMP_STOP_INVAL:
1972 return finish_td(xhci, td, event_trb, event, ep, status, false);
1974 if (!xhci_requires_manual_halt_cleanup(xhci,
1975 ep_ctx, trb_comp_code))
1977 xhci_dbg(xhci, "TRB error code %u, "
1978 "halted endpoint index = %u\n",
1979 trb_comp_code, ep_index);
1980 /* else fall through */
1982 /* Did we transfer part of the data (middle) phase? */
1983 if (event_trb != ep_ring->dequeue &&
1984 event_trb != td->last_trb)
1985 td->urb->actual_length =
1986 td->urb->transfer_buffer_length -
1987 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1988 else if (!td->urb_length_set)
1989 td->urb->actual_length = 0;
1991 return finish_td(xhci, td, event_trb, event, ep, status, false);
1994 * Did we transfer any data, despite the errors that might have
1995 * happened? I.e. did we get past the setup stage?
1997 if (event_trb != ep_ring->dequeue) {
1998 /* The event was for the status stage */
1999 if (event_trb == td->last_trb) {
2000 if (td->urb_length_set) {
2001 /* Don't overwrite a previously set error code
2003 if ((*status == -EINPROGRESS || *status == 0) &&
2004 (td->urb->transfer_flags
2005 & URB_SHORT_NOT_OK))
2006 /* Did we already see a short data
2008 *status = -EREMOTEIO;
2010 td->urb->actual_length =
2011 td->urb->transfer_buffer_length;
2015 * Maybe the event was for the data stage? If so, update
2016 * already the actual_length of the URB and flag it as
2017 * set, so that it is not overwritten in the event for
2020 td->urb_length_set = true;
2021 td->urb->actual_length =
2022 td->urb->transfer_buffer_length -
2023 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2024 xhci_dbg(xhci, "Waiting for status "
2030 return finish_td(xhci, td, event_trb, event, ep, status, false);
2034 * Process isochronous tds, update urb packet status and actual_length.
2036 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2037 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2038 struct xhci_virt_ep *ep, int *status)
2040 struct xhci_ring *ep_ring;
2041 struct urb_priv *urb_priv;
2044 union xhci_trb *cur_trb;
2045 struct xhci_segment *cur_seg;
2046 struct usb_iso_packet_descriptor *frame;
2048 bool skip_td = false;
2050 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2051 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2052 urb_priv = td->urb->hcpriv;
2053 idx = urb_priv->td_cnt;
2054 frame = &td->urb->iso_frame_desc[idx];
2056 /* handle completion code */
2057 switch (trb_comp_code) {
2059 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
2063 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2064 trb_comp_code = COMP_SHORT_TX;
2066 case COMP_STOP_SHORT:
2068 frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2072 frame->status = -ECOMM;
2075 case COMP_BUFF_OVER:
2077 frame->status = -EOVERFLOW;
2082 frame->status = -EPROTO;
2086 frame->status = -EPROTO;
2087 if (event_trb != td->last_trb)
2092 case COMP_STOP_INVAL:
2099 if (trb_comp_code == COMP_SUCCESS || skip_td) {
2100 frame->actual_length = frame->length;
2101 td->urb->actual_length += frame->length;
2102 } else if (trb_comp_code == COMP_STOP_SHORT) {
2103 frame->actual_length =
2104 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2105 td->urb->actual_length += frame->actual_length;
2107 for (cur_trb = ep_ring->dequeue,
2108 cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
2109 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2110 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2111 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2112 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2114 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2115 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2117 if (trb_comp_code != COMP_STOP_INVAL) {
2118 frame->actual_length = len;
2119 td->urb->actual_length += len;
2123 return finish_td(xhci, td, event_trb, event, ep, status, false);
2126 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2127 struct xhci_transfer_event *event,
2128 struct xhci_virt_ep *ep, int *status)
2130 struct xhci_ring *ep_ring;
2131 struct urb_priv *urb_priv;
2132 struct usb_iso_packet_descriptor *frame;
2135 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2136 urb_priv = td->urb->hcpriv;
2137 idx = urb_priv->td_cnt;
2138 frame = &td->urb->iso_frame_desc[idx];
2140 /* The transfer is partly done. */
2141 frame->status = -EXDEV;
2143 /* calc actual length */
2144 frame->actual_length = 0;
2146 /* Update ring dequeue pointer */
2147 while (ep_ring->dequeue != td->last_trb)
2148 inc_deq(xhci, ep_ring);
2149 inc_deq(xhci, ep_ring);
2151 return finish_td(xhci, td, NULL, event, ep, status, true);
2155 * Process bulk and interrupt tds, update urb status and actual_length.
2157 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2158 union xhci_trb *event_trb, struct xhci_transfer_event *event,
2159 struct xhci_virt_ep *ep, int *status)
2161 struct xhci_ring *ep_ring;
2162 union xhci_trb *cur_trb;
2163 struct xhci_segment *cur_seg;
2166 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2167 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2169 switch (trb_comp_code) {
2171 /* Double check that the HW transferred everything. */
2172 if (event_trb != td->last_trb ||
2173 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2174 xhci_warn(xhci, "WARN Successful completion "
2176 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2177 *status = -EREMOTEIO;
2180 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2181 trb_comp_code = COMP_SHORT_TX;
2186 case COMP_STOP_SHORT:
2188 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2189 *status = -EREMOTEIO;
2194 /* Others already handled above */
2197 if (trb_comp_code == COMP_SHORT_TX)
2198 xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
2199 "%d bytes untransferred\n",
2200 td->urb->ep->desc.bEndpointAddress,
2201 td->urb->transfer_buffer_length,
2202 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2203 /* Stopped - short packet completion */
2204 if (trb_comp_code == COMP_STOP_SHORT) {
2205 td->urb->actual_length =
2206 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2208 if (td->urb->transfer_buffer_length <
2209 td->urb->actual_length) {
2210 xhci_warn(xhci, "HC gave bad length of %d bytes txed\n",
2211 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2212 td->urb->actual_length = 0;
2213 /* status will be set by usb core for canceled urbs */
2215 /* Fast path - was this the last TRB in the TD for this URB? */
2216 } else if (event_trb == td->last_trb) {
2217 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
2218 td->urb->actual_length =
2219 td->urb->transfer_buffer_length -
2220 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2221 if (td->urb->transfer_buffer_length <
2222 td->urb->actual_length) {
2223 xhci_warn(xhci, "HC gave bad length "
2224 "of %d bytes left\n",
2225 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2226 td->urb->actual_length = 0;
2227 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2228 *status = -EREMOTEIO;
2232 /* Don't overwrite a previously set error code */
2233 if (*status == -EINPROGRESS) {
2234 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2235 *status = -EREMOTEIO;
2240 td->urb->actual_length =
2241 td->urb->transfer_buffer_length;
2242 /* Ignore a short packet completion if the
2243 * untransferred length was zero.
2245 if (*status == -EREMOTEIO)
2249 /* Slow path - walk the list, starting from the dequeue
2250 * pointer, to get the actual length transferred.
2252 td->urb->actual_length = 0;
2253 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
2254 cur_trb != event_trb;
2255 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2256 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2257 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2258 td->urb->actual_length +=
2259 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2261 /* If the ring didn't stop on a Link or No-op TRB, add
2262 * in the actual bytes transferred from the Normal TRB
2264 if (trb_comp_code != COMP_STOP_INVAL)
2265 td->urb->actual_length +=
2266 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2267 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2270 return finish_td(xhci, td, event_trb, event, ep, status, false);
2274 * If this function returns an error condition, it means it got a Transfer
2275 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2276 * At this point, the host controller is probably hosed and should be reset.
2278 static int handle_tx_event(struct xhci_hcd *xhci,
2279 struct xhci_transfer_event *event)
2280 __releases(&xhci->lock)
2281 __acquires(&xhci->lock)
2283 struct xhci_virt_device *xdev;
2284 struct xhci_virt_ep *ep;
2285 struct xhci_ring *ep_ring;
2286 unsigned int slot_id;
2288 struct xhci_td *td = NULL;
2289 dma_addr_t event_dma;
2290 struct xhci_segment *event_seg;
2291 union xhci_trb *event_trb;
2292 struct urb *urb = NULL;
2293 int status = -EINPROGRESS;
2294 struct urb_priv *urb_priv;
2295 struct xhci_ep_ctx *ep_ctx;
2296 struct list_head *tmp;
2300 bool handling_skipped_tds = false;
2302 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2303 xdev = xhci->devs[slot_id];
2305 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
2306 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2307 (unsigned long long) xhci_trb_virt_to_dma(
2308 xhci->event_ring->deq_seg,
2309 xhci->event_ring->dequeue),
2310 lower_32_bits(le64_to_cpu(event->buffer)),
2311 upper_32_bits(le64_to_cpu(event->buffer)),
2312 le32_to_cpu(event->transfer_len),
2313 le32_to_cpu(event->flags));
2314 xhci_dbg(xhci, "Event ring:\n");
2315 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2319 /* Endpoint ID is 1 based, our index is zero based */
2320 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2321 ep = &xdev->eps[ep_index];
2322 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2323 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2325 (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
2326 EP_STATE_DISABLED) {
2327 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2328 "or incorrect stream ring\n");
2329 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2330 (unsigned long long) xhci_trb_virt_to_dma(
2331 xhci->event_ring->deq_seg,
2332 xhci->event_ring->dequeue),
2333 lower_32_bits(le64_to_cpu(event->buffer)),
2334 upper_32_bits(le64_to_cpu(event->buffer)),
2335 le32_to_cpu(event->transfer_len),
2336 le32_to_cpu(event->flags));
2337 xhci_dbg(xhci, "Event ring:\n");
2338 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
2342 /* Count current td numbers if ep->skip is set */
2344 list_for_each(tmp, &ep_ring->td_list)
2348 event_dma = le64_to_cpu(event->buffer);
2349 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2350 /* Look for common error cases */
2351 switch (trb_comp_code) {
2352 /* Skip codes that require special handling depending on
2356 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2358 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2359 trb_comp_code = COMP_SHORT_TX;
2361 xhci_warn_ratelimited(xhci,
2362 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2366 xhci_dbg(xhci, "Stopped on Transfer TRB\n");
2368 case COMP_STOP_INVAL:
2369 xhci_dbg(xhci, "Stopped on No-op or Link TRB\n");
2371 case COMP_STOP_SHORT:
2372 xhci_dbg(xhci, "Stopped with short packet transfer detected\n");
2375 xhci_dbg(xhci, "Stalled endpoint\n");
2376 ep->ep_state |= EP_HALTED;
2380 xhci_warn(xhci, "WARN: TRB error on endpoint\n");
2383 case COMP_SPLIT_ERR:
2385 xhci_dbg(xhci, "Transfer error on endpoint\n");
2389 xhci_dbg(xhci, "Babble error on endpoint\n");
2390 status = -EOVERFLOW;
2393 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
2397 xhci_warn(xhci, "WARN: bandwidth overrun event on endpoint\n");
2399 case COMP_BUFF_OVER:
2400 xhci_warn(xhci, "WARN: buffer overrun event on endpoint\n");
2404 * When the Isoch ring is empty, the xHC will generate
2405 * a Ring Overrun Event for IN Isoch endpoint or Ring
2406 * Underrun Event for OUT Isoch endpoint.
2408 xhci_dbg(xhci, "underrun event on endpoint\n");
2409 if (!list_empty(&ep_ring->td_list))
2410 xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2411 "still with TDs queued?\n",
2412 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2416 xhci_dbg(xhci, "overrun event on endpoint\n");
2417 if (!list_empty(&ep_ring->td_list))
2418 xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2419 "still with TDs queued?\n",
2420 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2424 xhci_warn(xhci, "WARN: detect an incompatible device");
2427 case COMP_MISSED_INT:
2429 * When encounter missed service error, one or more isoc tds
2430 * may be missed by xHC.
2431 * Set skip flag of the ep_ring; Complete the missed tds as
2432 * short transfer when process the ep_ring next time.
2435 xhci_dbg(xhci, "Miss service interval error, set skip flag\n");
2439 xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n");
2442 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2446 xhci_warn(xhci, "ERROR Unknown event condition %u, HC probably busted\n",
2452 /* This TRB should be in the TD at the head of this ring's
2455 if (list_empty(&ep_ring->td_list)) {
2457 * A stopped endpoint may generate an extra completion
2458 * event if the device was suspended. Don't print
2461 if (!(trb_comp_code == COMP_STOP ||
2462 trb_comp_code == COMP_STOP_INVAL)) {
2463 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2464 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2466 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
2467 (le32_to_cpu(event->flags) &
2468 TRB_TYPE_BITMASK)>>10);
2469 xhci_print_trb_offsets(xhci, (union xhci_trb *) event);
2473 xhci_dbg(xhci, "td_list is empty while skip "
2474 "flag set. Clear skip flag.\n");
2480 /* We've skipped all the TDs on the ep ring when ep->skip set */
2481 if (ep->skip && td_num == 0) {
2483 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2484 "Clear skip flag.\n");
2489 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
2493 /* Is this a TRB in the currently executing TD? */
2494 event_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2495 td->last_trb, event_dma, false);
2498 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2499 * is not in the current TD pointed by ep_ring->dequeue because
2500 * that the hardware dequeue pointer still at the previous TRB
2501 * of the current TD. The previous TRB maybe a Link TD or the
2502 * last TRB of the previous TD. The command completion handle
2503 * will take care the rest.
2505 if (!event_seg && (trb_comp_code == COMP_STOP ||
2506 trb_comp_code == COMP_STOP_INVAL)) {
2513 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2514 /* Some host controllers give a spurious
2515 * successful event after a short transfer.
2518 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2519 ep_ring->last_td_was_short) {
2520 ep_ring->last_td_was_short = false;
2524 /* HC is busted, give up! */
2526 "ERROR Transfer event TRB DMA ptr not "
2527 "part of current TD ep_index %d "
2528 "comp_code %u\n", ep_index,
2530 trb_in_td(xhci, ep_ring->deq_seg,
2531 ep_ring->dequeue, td->last_trb,
2536 ret = skip_isoc_td(xhci, td, event, ep, &status);
2539 if (trb_comp_code == COMP_SHORT_TX)
2540 ep_ring->last_td_was_short = true;
2542 ep_ring->last_td_was_short = false;
2545 xhci_dbg(xhci, "Found td. Clear skip flag.\n");
2549 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
2550 sizeof(*event_trb)];
2552 * No-op TRB should not trigger interrupts.
2553 * If event_trb is a no-op TRB, it means the
2554 * corresponding TD has been cancelled. Just ignore
2557 if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
2559 "event_trb is a no-op TRB. Skip it\n");
2563 /* Now update the urb's actual_length and give back to
2566 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2567 ret = process_ctrl_td(xhci, td, event_trb, event, ep,
2569 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2570 ret = process_isoc_td(xhci, td, event_trb, event, ep,
2573 ret = process_bulk_intr_td(xhci, td, event_trb, event,
2579 handling_skipped_tds = ep->skip &&
2580 trb_comp_code != COMP_MISSED_INT &&
2581 trb_comp_code != COMP_PING_ERR;
2584 * Do not update event ring dequeue pointer if we're in a loop
2585 * processing missed tds.
2587 if (!handling_skipped_tds)
2588 inc_deq(xhci, xhci->event_ring);
2592 urb_priv = urb->hcpriv;
2594 xhci_urb_free_priv(urb_priv);
2596 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
2597 if ((urb->actual_length != urb->transfer_buffer_length &&
2598 (urb->transfer_flags &
2599 URB_SHORT_NOT_OK)) ||
2601 !usb_endpoint_xfer_isoc(&urb->ep->desc)))
2602 xhci_dbg(xhci, "Giveback URB %p, len = %d, "
2603 "expected = %d, status = %d\n",
2604 urb, urb->actual_length,
2605 urb->transfer_buffer_length,
2607 spin_unlock(&xhci->lock);
2608 /* EHCI, UHCI, and OHCI always unconditionally set the
2609 * urb->status of an isochronous endpoint to 0.
2611 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2613 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2614 spin_lock(&xhci->lock);
2618 * If ep->skip is set, it means there are missed tds on the
2619 * endpoint ring need to take care of.
2620 * Process them as short transfer until reach the td pointed by
2623 } while (handling_skipped_tds);
2629 * This function handles all OS-owned events on the event ring. It may drop
2630 * xhci->lock between event processing (e.g. to pass up port status changes).
2631 * Returns >0 for "possibly more events to process" (caller should call again),
2632 * otherwise 0 if done. In future, <0 returns should indicate error code.
2634 static int xhci_handle_event(struct xhci_hcd *xhci)
2636 union xhci_trb *event;
2637 int update_ptrs = 1;
2640 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2641 xhci->error_bitmask |= 1 << 1;
2645 event = xhci->event_ring->dequeue;
2646 /* Does the HC or OS own the TRB? */
2647 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2648 xhci->event_ring->cycle_state) {
2649 xhci->error_bitmask |= 1 << 2;
2654 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2655 * speculative reads of the event's flags/data below.
2658 /* FIXME: Handle more event types. */
2659 switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
2660 case TRB_TYPE(TRB_COMPLETION):
2661 handle_cmd_completion(xhci, &event->event_cmd);
2663 case TRB_TYPE(TRB_PORT_STATUS):
2664 handle_port_status(xhci, event);
2667 case TRB_TYPE(TRB_TRANSFER):
2668 ret = handle_tx_event(xhci, &event->trans_event);
2670 xhci->error_bitmask |= 1 << 9;
2674 case TRB_TYPE(TRB_DEV_NOTE):
2675 handle_device_notification(xhci, event);
2678 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2680 handle_vendor_event(xhci, event);
2682 xhci->error_bitmask |= 1 << 3;
2684 /* Any of the above functions may drop and re-acquire the lock, so check
2685 * to make sure a watchdog timer didn't mark the host as non-responsive.
2687 if (xhci->xhc_state & XHCI_STATE_DYING) {
2688 xhci_dbg(xhci, "xHCI host dying, returning from "
2689 "event handler.\n");
2694 /* Update SW event ring dequeue pointer */
2695 inc_deq(xhci, xhci->event_ring);
2697 /* Are there more items on the event ring? Caller will call us again to
2704 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2705 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2706 * indicators of an event TRB error, but we check the status *first* to be safe.
2708 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2710 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2713 union xhci_trb *event_ring_deq;
2716 spin_lock(&xhci->lock);
2717 /* Check if the xHC generated the interrupt, or the irq is shared */
2718 status = readl(&xhci->op_regs->status);
2719 if (status == 0xffffffff)
2722 if (!(status & STS_EINT)) {
2723 spin_unlock(&xhci->lock);
2726 if (status & STS_FATAL) {
2727 xhci_warn(xhci, "WARNING: Host System Error\n");
2730 spin_unlock(&xhci->lock);
2735 * Clear the op reg interrupt status first,
2736 * so we can receive interrupts from other MSI-X interrupters.
2737 * Write 1 to clear the interrupt status.
2740 writel(status, &xhci->op_regs->status);
2741 /* FIXME when MSI-X is supported and there are multiple vectors */
2742 /* Clear the MSI-X event interrupt status */
2746 /* Acknowledge the PCI interrupt */
2747 irq_pending = readl(&xhci->ir_set->irq_pending);
2748 irq_pending |= IMAN_IP;
2749 writel(irq_pending, &xhci->ir_set->irq_pending);
2752 if (xhci->xhc_state & XHCI_STATE_DYING ||
2753 xhci->xhc_state & XHCI_STATE_HALTED) {
2754 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2755 "Shouldn't IRQs be disabled?\n");
2756 /* Clear the event handler busy flag (RW1C);
2757 * the event ring should be empty.
2759 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2760 xhci_write_64(xhci, temp_64 | ERST_EHB,
2761 &xhci->ir_set->erst_dequeue);
2762 spin_unlock(&xhci->lock);
2767 event_ring_deq = xhci->event_ring->dequeue;
2768 /* FIXME this should be a delayed service routine
2769 * that clears the EHB.
2771 while (xhci_handle_event(xhci) > 0) {}
2773 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2774 /* If necessary, update the HW's version of the event ring deq ptr. */
2775 if (event_ring_deq != xhci->event_ring->dequeue) {
2776 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2777 xhci->event_ring->dequeue);
2779 xhci_warn(xhci, "WARN something wrong with SW event "
2780 "ring dequeue ptr.\n");
2781 /* Update HC event ring dequeue pointer */
2782 temp_64 &= ERST_PTR_MASK;
2783 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2786 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2787 temp_64 |= ERST_EHB;
2788 xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2790 spin_unlock(&xhci->lock);
2795 irqreturn_t xhci_msi_irq(int irq, void *hcd)
2797 return xhci_irq(hcd);
2800 /**** Endpoint Ring Operations ****/
2803 * Generic function for queueing a TRB on a ring.
2804 * The caller must have checked to make sure there's room on the ring.
2806 * @more_trbs_coming: Will you enqueue more TRBs before calling
2807 * prepare_transfer()?
2809 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2810 bool more_trbs_coming,
2811 u32 field1, u32 field2, u32 field3, u32 field4)
2813 struct xhci_generic_trb *trb;
2815 trb = &ring->enqueue->generic;
2816 trb->field[0] = cpu_to_le32(field1);
2817 trb->field[1] = cpu_to_le32(field2);
2818 trb->field[2] = cpu_to_le32(field3);
2819 trb->field[3] = cpu_to_le32(field4);
2820 inc_enq(xhci, ring, more_trbs_coming);
2824 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2825 * FIXME allocate segments if the ring is full.
2827 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2828 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
2830 unsigned int num_trbs_needed;
2832 /* Make sure the endpoint has been added to xHC schedule */
2834 case EP_STATE_DISABLED:
2836 * USB core changed config/interfaces without notifying us,
2837 * or hardware is reporting the wrong state.
2839 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2841 case EP_STATE_ERROR:
2842 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2843 /* FIXME event handling code for error needs to clear it */
2844 /* XXX not sure if this should be -ENOENT or not */
2846 case EP_STATE_HALTED:
2847 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2848 case EP_STATE_STOPPED:
2849 case EP_STATE_RUNNING:
2852 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2854 * FIXME issue Configure Endpoint command to try to get the HC
2855 * back into a known state.
2861 if (room_on_ring(xhci, ep_ring, num_trbs))
2864 if (ep_ring == xhci->cmd_ring) {
2865 xhci_err(xhci, "Do not support expand command ring\n");
2869 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
2870 "ERROR no room on ep ring, try ring expansion");
2871 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
2872 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
2874 xhci_err(xhci, "Ring expansion failed\n");
2879 if (enqueue_is_link_trb(ep_ring)) {
2880 struct xhci_ring *ring = ep_ring;
2881 union xhci_trb *next;
2883 next = ring->enqueue;
2885 while (last_trb(xhci, ring, ring->enq_seg, next)) {
2886 /* If we're not dealing with 0.95 hardware or isoc rings
2887 * on AMD 0.96 host, clear the chain bit.
2889 if (!xhci_link_trb_quirk(xhci) &&
2890 !(ring->type == TYPE_ISOC &&
2891 (xhci->quirks & XHCI_AMD_0x96_HOST)))
2892 next->link.control &= cpu_to_le32(~TRB_CHAIN);
2894 next->link.control |= cpu_to_le32(TRB_CHAIN);
2897 next->link.control ^= cpu_to_le32(TRB_CYCLE);
2899 /* Toggle the cycle bit after the last ring segment. */
2900 if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
2901 ring->cycle_state ^= 1;
2903 ring->enq_seg = ring->enq_seg->next;
2904 ring->enqueue = ring->enq_seg->trbs;
2905 next = ring->enqueue;
2912 static int prepare_transfer(struct xhci_hcd *xhci,
2913 struct xhci_virt_device *xdev,
2914 unsigned int ep_index,
2915 unsigned int stream_id,
2916 unsigned int num_trbs,
2918 unsigned int td_index,
2922 struct urb_priv *urb_priv;
2924 struct xhci_ring *ep_ring;
2925 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2927 ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
2929 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
2934 ret = prepare_ring(xhci, ep_ring,
2935 le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
2936 num_trbs, mem_flags);
2940 urb_priv = urb->hcpriv;
2941 td = urb_priv->td[td_index];
2943 INIT_LIST_HEAD(&td->td_list);
2944 INIT_LIST_HEAD(&td->cancelled_td_list);
2946 if (td_index == 0) {
2947 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
2953 /* Add this TD to the tail of the endpoint ring's TD list */
2954 list_add_tail(&td->td_list, &ep_ring->td_list);
2955 td->start_seg = ep_ring->enq_seg;
2956 td->first_trb = ep_ring->enqueue;
2958 urb_priv->td[td_index] = td;
2963 static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb)
2965 int num_sgs, num_trbs, running_total, temp, i;
2966 struct scatterlist *sg;
2969 num_sgs = urb->num_mapped_sgs;
2970 temp = urb->transfer_buffer_length;
2973 for_each_sg(urb->sg, sg, num_sgs, i) {
2974 unsigned int len = sg_dma_len(sg);
2976 /* Scatter gather list entries may cross 64KB boundaries */
2977 running_total = TRB_MAX_BUFF_SIZE -
2978 (sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1));
2979 running_total &= TRB_MAX_BUFF_SIZE - 1;
2980 if (running_total != 0)
2983 /* How many more 64KB chunks to transfer, how many more TRBs? */
2984 while (running_total < sg_dma_len(sg) && running_total < temp) {
2986 running_total += TRB_MAX_BUFF_SIZE;
2988 len = min_t(int, len, temp);
2996 static void check_trb_math(struct urb *urb, int num_trbs, int running_total)
2999 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
3000 "TRBs, %d left\n", __func__,
3001 urb->ep->desc.bEndpointAddress, num_trbs);
3002 if (running_total != urb->transfer_buffer_length)
3003 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
3004 "queued %#x (%d), asked for %#x (%d)\n",
3006 urb->ep->desc.bEndpointAddress,
3007 running_total, running_total,
3008 urb->transfer_buffer_length,
3009 urb->transfer_buffer_length);
3012 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
3013 unsigned int ep_index, unsigned int stream_id, int start_cycle,
3014 struct xhci_generic_trb *start_trb)
3017 * Pass all the TRBs to the hardware at once and make sure this write
3022 start_trb->field[3] |= cpu_to_le32(start_cycle);
3024 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
3025 xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
3029 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3030 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3031 * (comprised of sg list entries) can take several service intervals to
3034 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3035 struct urb *urb, int slot_id, unsigned int ep_index)
3037 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci,
3038 xhci->devs[slot_id]->out_ctx, ep_index);
3042 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3043 ep_interval = urb->interval;
3044 /* Convert to microframes */
3045 if (urb->dev->speed == USB_SPEED_LOW ||
3046 urb->dev->speed == USB_SPEED_FULL)
3048 /* FIXME change this to a warning and a suggestion to use the new API
3049 * to set the polling interval (once the API is added).
3051 if (xhci_interval != ep_interval) {
3052 dev_dbg_ratelimited(&urb->dev->dev,
3053 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3054 ep_interval, ep_interval == 1 ? "" : "s",
3055 xhci_interval, xhci_interval == 1 ? "" : "s");
3056 urb->interval = xhci_interval;
3057 /* Convert back to frames for LS/FS devices */
3058 if (urb->dev->speed == USB_SPEED_LOW ||
3059 urb->dev->speed == USB_SPEED_FULL)
3062 return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
3066 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3067 * packets remaining in the TD (*not* including this TRB).
3069 * Total TD packet count = total_packet_count =
3070 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3072 * Packets transferred up to and including this TRB = packets_transferred =
3073 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3075 * TD size = total_packet_count - packets_transferred
3077 * For xHCI 0.96 and older, TD size field should be the remaining bytes
3078 * including this TRB, right shifted by 10
3080 * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
3081 * This is taken care of in the TRB_TD_SIZE() macro
3083 * The last TRB in a TD must have the TD size set to zero.
3085 static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3086 int trb_buff_len, unsigned int td_total_len,
3087 struct urb *urb, unsigned int num_trbs_left)
3089 u32 maxp, total_packet_count;
3091 if (xhci->hci_version < 0x100)
3092 return ((td_total_len - transferred) >> 10);
3094 maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
3095 total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3097 /* One TRB with a zero-length data packet. */
3098 if (num_trbs_left == 0 || (transferred == 0 && trb_buff_len == 0) ||
3099 trb_buff_len == td_total_len)
3102 /* Queueing functions don't count the current TRB into transferred */
3103 return (total_packet_count - ((transferred + trb_buff_len) / maxp));
3107 static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3108 struct urb *urb, int slot_id, unsigned int ep_index)
3110 struct xhci_ring *ep_ring;
3111 unsigned int num_trbs;
3112 struct urb_priv *urb_priv;
3114 struct scatterlist *sg;
3116 int trb_buff_len, this_sg_len, running_total, ret;
3117 unsigned int total_packet_count;
3118 bool zero_length_needed;
3122 bool more_trbs_coming;
3124 struct xhci_generic_trb *start_trb;
3127 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3131 num_trbs = count_sg_trbs_needed(xhci, urb);
3132 num_sgs = urb->num_mapped_sgs;
3133 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3134 usb_endpoint_maxp(&urb->ep->desc));
3136 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3137 ep_index, urb->stream_id,
3138 num_trbs, urb, 0, mem_flags);
3142 urb_priv = urb->hcpriv;
3144 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3145 zero_length_needed = urb->transfer_flags & URB_ZERO_PACKET &&
3146 urb_priv->length == 2;
3147 if (zero_length_needed) {
3149 xhci_dbg(xhci, "Creating zero length td.\n");
3150 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3151 ep_index, urb->stream_id,
3152 1, urb, 1, mem_flags);
3157 td = urb_priv->td[0];
3160 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3161 * until we've finished creating all the other TRBs. The ring's cycle
3162 * state may change as we enqueue the other TRBs, so save it too.
3164 start_trb = &ep_ring->enqueue->generic;
3165 start_cycle = ep_ring->cycle_state;
3169 * How much data is in the first TRB?
3171 * There are three forces at work for TRB buffer pointers and lengths:
3172 * 1. We don't want to walk off the end of this sg-list entry buffer.
3173 * 2. The transfer length that the driver requested may be smaller than
3174 * the amount of memory allocated for this scatter-gather list.
3175 * 3. TRBs buffers can't cross 64KB boundaries.
3178 addr = (u64) sg_dma_address(sg);
3179 this_sg_len = sg_dma_len(sg);
3180 trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1));
3181 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3182 if (trb_buff_len > urb->transfer_buffer_length)
3183 trb_buff_len = urb->transfer_buffer_length;
3186 last_trb_num = zero_length_needed ? 2 : 1;
3187 /* Queue the first TRB, even if it's zero-length */
3190 u32 length_field = 0;
3193 /* Don't change the cycle bit of the first TRB until later */
3196 if (start_cycle == 0)
3199 field |= ep_ring->cycle_state;
3201 /* Chain all the TRBs together; clear the chain bit in the last
3202 * TRB to indicate it's the last TRB in the chain.
3204 if (num_trbs > last_trb_num) {
3206 } else if (num_trbs == last_trb_num) {
3207 td->last_trb = ep_ring->enqueue;
3209 } else if (zero_length_needed && num_trbs == 1) {
3211 urb_priv->td[1]->last_trb = ep_ring->enqueue;
3215 /* Only set interrupt on short packet for IN endpoints */
3216 if (usb_urb_dir_in(urb))
3219 if (TRB_MAX_BUFF_SIZE -
3220 (addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) {
3221 xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n");
3222 xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n",
3223 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
3224 (unsigned int) addr + trb_buff_len);
3227 /* Set the TRB length, TD size, and interrupter fields. */
3228 remainder = xhci_td_remainder(xhci, running_total, trb_buff_len,
3229 urb->transfer_buffer_length,
3232 length_field = TRB_LEN(trb_buff_len) |
3233 TRB_TD_SIZE(remainder) |
3237 more_trbs_coming = true;
3239 more_trbs_coming = false;
3240 queue_trb(xhci, ep_ring, more_trbs_coming,
3241 lower_32_bits(addr),
3242 upper_32_bits(addr),
3244 field | TRB_TYPE(TRB_NORMAL));
3246 running_total += trb_buff_len;
3248 /* Calculate length for next transfer --
3249 * Are we done queueing all the TRBs for this sg entry?
3251 this_sg_len -= trb_buff_len;
3252 if (this_sg_len == 0) {
3257 addr = (u64) sg_dma_address(sg);
3258 this_sg_len = sg_dma_len(sg);
3260 addr += trb_buff_len;
3263 trb_buff_len = TRB_MAX_BUFF_SIZE -
3264 (addr & (TRB_MAX_BUFF_SIZE - 1));
3265 trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
3266 if (running_total + trb_buff_len > urb->transfer_buffer_length)
3268 urb->transfer_buffer_length - running_total;
3269 } while (num_trbs > 0);
3271 check_trb_math(urb, num_trbs, running_total);
3272 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3273 start_cycle, start_trb);
3277 /* This is very similar to what ehci-q.c qtd_fill() does */
3278 int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3279 struct urb *urb, int slot_id, unsigned int ep_index)
3281 struct xhci_ring *ep_ring;
3282 struct urb_priv *urb_priv;
3285 struct xhci_generic_trb *start_trb;
3288 bool more_trbs_coming;
3289 bool zero_length_needed;
3291 u32 field, length_field;
3293 int running_total, trb_buff_len, ret;
3294 unsigned int total_packet_count;
3298 return queue_bulk_sg_tx(xhci, mem_flags, urb, slot_id, ep_index);
3300 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3305 /* How much data is (potentially) left before the 64KB boundary? */
3306 running_total = TRB_MAX_BUFF_SIZE -
3307 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3308 running_total &= TRB_MAX_BUFF_SIZE - 1;
3310 /* If there's some data on this 64KB chunk, or we have to send a
3311 * zero-length transfer, we need at least one TRB
3313 if (running_total != 0 || urb->transfer_buffer_length == 0)
3315 /* How many more 64KB chunks to transfer, how many more TRBs? */
3316 while (running_total < urb->transfer_buffer_length) {
3318 running_total += TRB_MAX_BUFF_SIZE;
3321 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3322 ep_index, urb->stream_id,
3323 num_trbs, urb, 0, mem_flags);
3327 urb_priv = urb->hcpriv;
3329 /* Deal with URB_ZERO_PACKET - need one more td/trb */
3330 zero_length_needed = urb->transfer_flags & URB_ZERO_PACKET &&
3331 urb_priv->length == 2;
3332 if (zero_length_needed) {
3334 xhci_dbg(xhci, "Creating zero length td.\n");
3335 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3336 ep_index, urb->stream_id,
3337 1, urb, 1, mem_flags);
3342 td = urb_priv->td[0];
3345 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3346 * until we've finished creating all the other TRBs. The ring's cycle
3347 * state may change as we enqueue the other TRBs, so save it too.
3349 start_trb = &ep_ring->enqueue->generic;
3350 start_cycle = ep_ring->cycle_state;
3353 total_packet_count = DIV_ROUND_UP(urb->transfer_buffer_length,
3354 usb_endpoint_maxp(&urb->ep->desc));
3355 /* How much data is in the first TRB? */
3356 addr = (u64) urb->transfer_dma;
3357 trb_buff_len = TRB_MAX_BUFF_SIZE -
3358 (urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
3359 if (trb_buff_len > urb->transfer_buffer_length)
3360 trb_buff_len = urb->transfer_buffer_length;
3363 last_trb_num = zero_length_needed ? 2 : 1;
3364 /* Queue the first TRB, even if it's zero-length */
3369 /* Don't change the cycle bit of the first TRB until later */
3372 if (start_cycle == 0)
3375 field |= ep_ring->cycle_state;
3377 /* Chain all the TRBs together; clear the chain bit in the last
3378 * TRB to indicate it's the last TRB in the chain.
3380 if (num_trbs > last_trb_num) {
3382 } else if (num_trbs == last_trb_num) {
3383 td->last_trb = ep_ring->enqueue;
3385 } else if (zero_length_needed && num_trbs == 1) {
3387 urb_priv->td[1]->last_trb = ep_ring->enqueue;
3391 /* Only set interrupt on short packet for IN endpoints */
3392 if (usb_urb_dir_in(urb))
3395 /* Set the TRB length, TD size, and interrupter fields. */
3396 remainder = xhci_td_remainder(xhci, running_total, trb_buff_len,
3397 urb->transfer_buffer_length,
3400 length_field = TRB_LEN(trb_buff_len) |
3401 TRB_TD_SIZE(remainder) |
3405 more_trbs_coming = true;
3407 more_trbs_coming = false;
3408 queue_trb(xhci, ep_ring, more_trbs_coming,
3409 lower_32_bits(addr),
3410 upper_32_bits(addr),
3412 field | TRB_TYPE(TRB_NORMAL));
3414 running_total += trb_buff_len;
3416 /* Calculate length for next transfer */
3417 addr += trb_buff_len;
3418 trb_buff_len = urb->transfer_buffer_length - running_total;
3419 if (trb_buff_len > TRB_MAX_BUFF_SIZE)
3420 trb_buff_len = TRB_MAX_BUFF_SIZE;
3421 } while (num_trbs > 0);
3423 check_trb_math(urb, num_trbs, running_total);
3424 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3425 start_cycle, start_trb);
3429 /* Caller must have locked xhci->lock */
3430 int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3431 struct urb *urb, int slot_id, unsigned int ep_index)
3433 struct xhci_ring *ep_ring;
3436 struct usb_ctrlrequest *setup;
3437 struct xhci_generic_trb *start_trb;
3439 u32 field, length_field, remainder;
3440 struct urb_priv *urb_priv;
3443 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
3448 * Need to copy setup packet into setup TRB, so we can't use the setup
3451 if (!urb->setup_packet)
3454 /* 1 TRB for setup, 1 for status */
3457 * Don't need to check if we need additional event data and normal TRBs,
3458 * since data in control transfers will never get bigger than 16MB
3459 * XXX: can we get a buffer that crosses 64KB boundaries?
3461 if (urb->transfer_buffer_length > 0)
3463 ret = prepare_transfer(xhci, xhci->devs[slot_id],
3464 ep_index, urb->stream_id,
3465 num_trbs, urb, 0, mem_flags);
3469 urb_priv = urb->hcpriv;
3470 td = urb_priv->td[0];
3473 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3474 * until we've finished creating all the other TRBs. The ring's cycle
3475 * state may change as we enqueue the other TRBs, so save it too.
3477 start_trb = &ep_ring->enqueue->generic;
3478 start_cycle = ep_ring->cycle_state;
3480 /* Queue setup TRB - see section 6.4.1.2.1 */
3481 /* FIXME better way to translate setup_packet into two u32 fields? */
3482 setup = (struct usb_ctrlrequest *) urb->setup_packet;
3484 field |= TRB_IDT | TRB_TYPE(TRB_SETUP);
3485 if (start_cycle == 0)
3488 /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
3489 if (xhci->hci_version >= 0x100) {
3490 if (urb->transfer_buffer_length > 0) {
3491 if (setup->bRequestType & USB_DIR_IN)
3492 field |= TRB_TX_TYPE(TRB_DATA_IN);
3494 field |= TRB_TX_TYPE(TRB_DATA_OUT);
3498 queue_trb(xhci, ep_ring, true,
3499 setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16,
3500 le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16,
3501 TRB_LEN(8) | TRB_INTR_TARGET(0),
3502 /* Immediate data in pointer */
3505 /* If there's data, queue data TRBs */
3506 /* Only set interrupt on short packet for IN endpoints */
3507 if (usb_urb_dir_in(urb))
3508 field = TRB_ISP | TRB_TYPE(TRB_DATA);
3510 field = TRB_TYPE(TRB_DATA);
3512 remainder = xhci_td_remainder(xhci, 0,
3513 urb->transfer_buffer_length,
3514 urb->transfer_buffer_length,
3517 length_field = TRB_LEN(urb->transfer_buffer_length) |
3518 TRB_TD_SIZE(remainder) |
3521 if (urb->transfer_buffer_length > 0) {
3522 if (setup->bRequestType & USB_DIR_IN)
3523 field |= TRB_DIR_IN;
3524 queue_trb(xhci, ep_ring, true,
3525 lower_32_bits(urb->transfer_dma),
3526 upper_32_bits(urb->transfer_dma),
3528 field | ep_ring->cycle_state);
3531 /* Save the DMA address of the last TRB in the TD */
3532 td->last_trb = ep_ring->enqueue;
3534 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3535 /* If the device sent data, the status stage is an OUT transfer */
3536 if (urb->transfer_buffer_length > 0 && setup->bRequestType & USB_DIR_IN)
3540 queue_trb(xhci, ep_ring, false,
3544 /* Event on completion */
3545 field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
3547 giveback_first_trb(xhci, slot_id, ep_index, 0,
3548 start_cycle, start_trb);
3552 static int count_isoc_trbs_needed(struct xhci_hcd *xhci,
3553 struct urb *urb, int i)
3558 addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
3559 td_len = urb->iso_frame_desc[i].length;
3561 num_trbs = DIV_ROUND_UP(td_len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
3570 * The transfer burst count field of the isochronous TRB defines the number of
3571 * bursts that are required to move all packets in this TD. Only SuperSpeed
3572 * devices can burst up to bMaxBurst number of packets per service interval.
3573 * This field is zero based, meaning a value of zero in the field means one
3574 * burst. Basically, for everything but SuperSpeed devices, this field will be
3575 * zero. Only xHCI 1.0 host controllers support this field.
3577 static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3578 struct usb_device *udev,
3579 struct urb *urb, unsigned int total_packet_count)
3581 unsigned int max_burst;
3583 if (xhci->hci_version < 0x100 || udev->speed < USB_SPEED_SUPER)
3586 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3587 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1;
3591 * Returns the number of packets in the last "burst" of packets. This field is
3592 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3593 * the last burst packet count is equal to the total number of packets in the
3594 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3595 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3596 * contain 1 to (bMaxBurst + 1) packets.
3598 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3599 struct usb_device *udev,
3600 struct urb *urb, unsigned int total_packet_count)
3602 unsigned int max_burst;
3603 unsigned int residue;
3605 if (xhci->hci_version < 0x100)
3608 switch (udev->speed) {
3609 case USB_SPEED_SUPER_PLUS:
3610 case USB_SPEED_SUPER:
3611 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3612 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3613 residue = total_packet_count % (max_burst + 1);
3614 /* If residue is zero, the last burst contains (max_burst + 1)
3615 * number of packets, but the TLBPC field is zero-based.
3621 if (total_packet_count == 0)
3623 return total_packet_count - 1;
3628 * Calculates Frame ID field of the isochronous TRB identifies the
3629 * target frame that the Interval associated with this Isochronous
3630 * Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
3632 * Returns actual frame id on success, negative value on error.
3634 static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci,
3635 struct urb *urb, int index)
3637 int start_frame, ist, ret = 0;
3638 int start_frame_id, end_frame_id, current_frame_id;
3640 if (urb->dev->speed == USB_SPEED_LOW ||
3641 urb->dev->speed == USB_SPEED_FULL)
3642 start_frame = urb->start_frame + index * urb->interval;
3644 start_frame = (urb->start_frame + index * urb->interval) >> 3;
3646 /* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3648 * If bit [3] of IST is cleared to '0', software can add a TRB no
3649 * later than IST[2:0] Microframes before that TRB is scheduled to
3651 * If bit [3] of IST is set to '1', software can add a TRB no later
3652 * than IST[2:0] Frames before that TRB is scheduled to be executed.
3654 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3655 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3658 /* Software shall not schedule an Isoch TD with a Frame ID value that
3659 * is less than the Start Frame ID or greater than the End Frame ID,
3662 * End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
3663 * Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
3665 * Both the End Frame ID and Start Frame ID values are calculated
3666 * in microframes. When software determines the valid Frame ID value;
3667 * The End Frame ID value should be rounded down to the nearest Frame
3668 * boundary, and the Start Frame ID value should be rounded up to the
3669 * nearest Frame boundary.
3671 current_frame_id = readl(&xhci->run_regs->microframe_index);
3672 start_frame_id = roundup(current_frame_id + ist + 1, 8);
3673 end_frame_id = rounddown(current_frame_id + 895 * 8, 8);
3675 start_frame &= 0x7ff;
3676 start_frame_id = (start_frame_id >> 3) & 0x7ff;
3677 end_frame_id = (end_frame_id >> 3) & 0x7ff;
3679 xhci_dbg(xhci, "%s: index %d, reg 0x%x start_frame_id 0x%x, end_frame_id 0x%x, start_frame 0x%x\n",
3680 __func__, index, readl(&xhci->run_regs->microframe_index),
3681 start_frame_id, end_frame_id, start_frame);
3683 if (start_frame_id < end_frame_id) {
3684 if (start_frame > end_frame_id ||
3685 start_frame < start_frame_id)
3687 } else if (start_frame_id > end_frame_id) {
3688 if ((start_frame > end_frame_id &&
3689 start_frame < start_frame_id))
3696 if (ret == -EINVAL || start_frame == start_frame_id) {
3697 start_frame = start_frame_id + 1;
3698 if (urb->dev->speed == USB_SPEED_LOW ||
3699 urb->dev->speed == USB_SPEED_FULL)
3700 urb->start_frame = start_frame;
3702 urb->start_frame = start_frame << 3;
3708 xhci_warn(xhci, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
3709 start_frame, current_frame_id, index,
3710 start_frame_id, end_frame_id);
3711 xhci_warn(xhci, "Ignore frame ID field, use SIA bit instead\n");
3718 /* This is for isoc transfer */
3719 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3720 struct urb *urb, int slot_id, unsigned int ep_index)
3722 struct xhci_ring *ep_ring;
3723 struct urb_priv *urb_priv;
3725 int num_tds, trbs_per_td;
3726 struct xhci_generic_trb *start_trb;
3729 u32 field, length_field;
3730 int running_total, trb_buff_len, td_len, td_remain_len, ret;
3731 u64 start_addr, addr;
3733 bool more_trbs_coming;
3734 struct xhci_virt_ep *xep;
3736 xep = &xhci->devs[slot_id]->eps[ep_index];
3737 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
3739 num_tds = urb->number_of_packets;
3741 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3745 start_addr = (u64) urb->transfer_dma;
3746 start_trb = &ep_ring->enqueue->generic;
3747 start_cycle = ep_ring->cycle_state;
3749 urb_priv = urb->hcpriv;
3750 /* Queue the first TRB, even if it's zero-length */
3751 for (i = 0; i < num_tds; i++) {
3752 unsigned int total_packet_count;
3753 unsigned int burst_count;
3754 unsigned int residue;
3758 addr = start_addr + urb->iso_frame_desc[i].offset;
3759 td_len = urb->iso_frame_desc[i].length;
3760 td_remain_len = td_len;
3761 total_packet_count = DIV_ROUND_UP(td_len,
3763 usb_endpoint_maxp(&urb->ep->desc)));
3764 /* A zero-length transfer still involves at least one packet. */
3765 if (total_packet_count == 0)
3766 total_packet_count++;
3767 burst_count = xhci_get_burst_count(xhci, urb->dev, urb,
3768 total_packet_count);
3769 residue = xhci_get_last_burst_packet_count(xhci,
3770 urb->dev, urb, total_packet_count);
3772 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i);
3774 ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3775 urb->stream_id, trbs_per_td, urb, i, mem_flags);
3782 td = urb_priv->td[i];
3783 for (j = 0; j < trbs_per_td; j++) {
3789 field = TRB_TBC(burst_count) |
3791 /* Queue the isoc TRB */
3792 field |= TRB_TYPE(TRB_ISOC);
3794 /* Calculate Frame ID and SIA fields */
3795 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3796 HCC_CFC(xhci->hcc_params)) {
3797 frame_id = xhci_get_isoc_frame_id(xhci,
3801 field |= TRB_FRAME_ID(frame_id);
3808 if (start_cycle == 0)
3811 field |= ep_ring->cycle_state;
3814 /* Queue other normal TRBs */
3815 field |= TRB_TYPE(TRB_NORMAL);
3816 field |= ep_ring->cycle_state;
3819 /* Only set interrupt on short packet for IN EPs */
3820 if (usb_urb_dir_in(urb))
3823 /* Chain all the TRBs together; clear the chain bit in
3824 * the last TRB to indicate it's the last TRB in the
3827 if (j < trbs_per_td - 1) {
3829 more_trbs_coming = true;
3831 td->last_trb = ep_ring->enqueue;
3833 if (xhci->hci_version == 0x100 &&
3836 /* Set BEI bit except for the last td */
3837 if (i < num_tds - 1)
3840 more_trbs_coming = false;
3843 /* Calculate TRB length */
3844 trb_buff_len = TRB_MAX_BUFF_SIZE -
3845 (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
3846 if (trb_buff_len > td_remain_len)
3847 trb_buff_len = td_remain_len;
3849 /* Set the TRB length, TD size, & interrupter fields. */
3850 remainder = xhci_td_remainder(xhci, running_total,
3851 trb_buff_len, td_len,
3852 urb, trbs_per_td - j - 1);
3854 length_field = TRB_LEN(trb_buff_len) |
3855 TRB_TD_SIZE(remainder) |
3858 queue_trb(xhci, ep_ring, more_trbs_coming,
3859 lower_32_bits(addr),
3860 upper_32_bits(addr),
3863 running_total += trb_buff_len;
3865 addr += trb_buff_len;
3866 td_remain_len -= trb_buff_len;
3869 /* Check TD length */
3870 if (running_total != td_len) {
3871 xhci_err(xhci, "ISOC TD length unmatch\n");
3877 /* store the next frame id */
3878 if (HCC_CFC(xhci->hcc_params))
3879 xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
3881 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
3882 if (xhci->quirks & XHCI_AMD_PLL_FIX)
3883 usb_amd_quirk_pll_disable();
3885 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs++;
3887 giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3888 start_cycle, start_trb);
3891 /* Clean up a partially enqueued isoc transfer. */
3893 for (i--; i >= 0; i--)
3894 list_del_init(&urb_priv->td[i]->td_list);
3896 /* Use the first TD as a temporary variable to turn the TDs we've queued
3897 * into No-ops with a software-owned cycle bit. That way the hardware
3898 * won't accidentally start executing bogus TDs when we partially
3899 * overwrite them. td->first_trb and td->start_seg are already set.
3901 urb_priv->td[0]->last_trb = ep_ring->enqueue;
3902 /* Every TRB except the first & last will have its cycle bit flipped. */
3903 td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
3905 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3906 ep_ring->enqueue = urb_priv->td[0]->first_trb;
3907 ep_ring->enq_seg = urb_priv->td[0]->start_seg;
3908 ep_ring->cycle_state = start_cycle;
3909 ep_ring->num_trbs_free = ep_ring->num_trbs_free_temp;
3910 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
3915 * Check transfer ring to guarantee there is enough room for the urb.
3916 * Update ISO URB start_frame and interval.
3917 * Update interval as xhci_queue_intr_tx does. Use xhci frame_index to
3918 * update urb->start_frame if URB_ISO_ASAP is set in transfer_flags or
3919 * Contiguous Frame ID is not supported by HC.
3921 int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3922 struct urb *urb, int slot_id, unsigned int ep_index)
3924 struct xhci_virt_device *xdev;
3925 struct xhci_ring *ep_ring;
3926 struct xhci_ep_ctx *ep_ctx;
3930 int num_tds, num_trbs, i;
3932 struct xhci_virt_ep *xep;
3935 xdev = xhci->devs[slot_id];
3936 xep = &xhci->devs[slot_id]->eps[ep_index];
3937 ep_ring = xdev->eps[ep_index].ring;
3938 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
3941 num_tds = urb->number_of_packets;
3942 for (i = 0; i < num_tds; i++)
3943 num_trbs += count_isoc_trbs_needed(xhci, urb, i);
3945 /* Check the ring to guarantee there is enough room for the whole urb.
3946 * Do not insert any td of the urb to the ring if the check failed.
3948 ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
3949 num_trbs, mem_flags);
3954 * Check interval value. This should be done before we start to
3955 * calculate the start frame value.
3957 xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3958 ep_interval = urb->interval;
3959 /* Convert to microframes */
3960 if (urb->dev->speed == USB_SPEED_LOW ||
3961 urb->dev->speed == USB_SPEED_FULL)
3963 /* FIXME change this to a warning and a suggestion to use the new API
3964 * to set the polling interval (once the API is added).
3966 if (xhci_interval != ep_interval) {
3967 dev_dbg_ratelimited(&urb->dev->dev,
3968 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3969 ep_interval, ep_interval == 1 ? "" : "s",
3970 xhci_interval, xhci_interval == 1 ? "" : "s");
3971 urb->interval = xhci_interval;
3972 /* Convert back to frames for LS/FS devices */
3973 if (urb->dev->speed == USB_SPEED_LOW ||
3974 urb->dev->speed == USB_SPEED_FULL)
3978 /* Calculate the start frame and put it in urb->start_frame. */
3979 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
3980 if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
3982 urb->start_frame = xep->next_frame_id;
3983 goto skip_start_over;
3987 start_frame = readl(&xhci->run_regs->microframe_index);
3988 start_frame &= 0x3fff;
3990 * Round up to the next frame and consider the time before trb really
3991 * gets scheduled by hardare.
3993 ist = HCS_IST(xhci->hcs_params2) & 0x7;
3994 if (HCS_IST(xhci->hcs_params2) & (1 << 3))
3996 start_frame += ist + XHCI_CFC_DELAY;
3997 start_frame = roundup(start_frame, 8);
4000 * Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
4001 * is greate than 8 microframes.
4003 if (urb->dev->speed == USB_SPEED_LOW ||
4004 urb->dev->speed == USB_SPEED_FULL) {
4005 start_frame = roundup(start_frame, urb->interval << 3);
4006 urb->start_frame = start_frame >> 3;
4008 start_frame = roundup(start_frame, urb->interval);
4009 urb->start_frame = start_frame;
4013 ep_ring->num_trbs_free_temp = ep_ring->num_trbs_free;
4015 return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
4018 /**** Command Ring Operations ****/
4020 /* Generic function for queueing a command TRB on the command ring.
4021 * Check to make sure there's room on the command ring for one command TRB.
4022 * Also check that there's room reserved for commands that must not fail.
4023 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
4024 * then only check for the number of reserved spots.
4025 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
4026 * because the command event handler may want to resubmit a failed command.
4028 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
4029 u32 field1, u32 field2,
4030 u32 field3, u32 field4, bool command_must_succeed)
4032 int reserved_trbs = xhci->cmd_ring_reserved_trbs;
4035 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
4036 (xhci->xhc_state & XHCI_STATE_HALTED)) {
4037 xhci_dbg(xhci, "xHCI dying or halted, can't queue_command\n");
4041 if (!command_must_succeed)
4044 ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
4045 reserved_trbs, GFP_ATOMIC);
4047 xhci_err(xhci, "ERR: No room for command on command ring\n");
4048 if (command_must_succeed)
4049 xhci_err(xhci, "ERR: Reserved TRB counting for "
4050 "unfailable commands failed.\n");
4054 cmd->command_trb = xhci->cmd_ring->enqueue;
4055 list_add_tail(&cmd->cmd_list, &xhci->cmd_list);
4057 /* if there are no other commands queued we start the timeout timer */
4058 if (xhci->cmd_list.next == &cmd->cmd_list &&
4059 !timer_pending(&xhci->cmd_timer)) {
4060 xhci->current_cmd = cmd;
4061 mod_timer(&xhci->cmd_timer, jiffies + XHCI_CMD_DEFAULT_TIMEOUT);
4064 queue_trb(xhci, xhci->cmd_ring, false, field1, field2, field3,
4065 field4 | xhci->cmd_ring->cycle_state);
4069 /* Queue a slot enable or disable request on the command ring */
4070 int xhci_queue_slot_control(struct xhci_hcd *xhci, struct xhci_command *cmd,
4071 u32 trb_type, u32 slot_id)
4073 return queue_command(xhci, cmd, 0, 0, 0,
4074 TRB_TYPE(trb_type) | SLOT_ID_FOR_TRB(slot_id), false);
4077 /* Queue an address device command TRB */
4078 int xhci_queue_address_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
4079 dma_addr_t in_ctx_ptr, u32 slot_id, enum xhci_setup_dev setup)
4081 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4082 upper_32_bits(in_ctx_ptr), 0,
4083 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)
4084 | (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0), false);
4087 int xhci_queue_vendor_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
4088 u32 field1, u32 field2, u32 field3, u32 field4)
4090 return queue_command(xhci, cmd, field1, field2, field3, field4, false);
4093 /* Queue a reset device command TRB */
4094 int xhci_queue_reset_device(struct xhci_hcd *xhci, struct xhci_command *cmd,
4097 return queue_command(xhci, cmd, 0, 0, 0,
4098 TRB_TYPE(TRB_RESET_DEV) | SLOT_ID_FOR_TRB(slot_id),
4102 /* Queue a configure endpoint command TRB */
4103 int xhci_queue_configure_endpoint(struct xhci_hcd *xhci,
4104 struct xhci_command *cmd, dma_addr_t in_ctx_ptr,
4105 u32 slot_id, bool command_must_succeed)
4107 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4108 upper_32_bits(in_ctx_ptr), 0,
4109 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id),
4110 command_must_succeed);
4113 /* Queue an evaluate context command TRB */
4114 int xhci_queue_evaluate_context(struct xhci_hcd *xhci, struct xhci_command *cmd,
4115 dma_addr_t in_ctx_ptr, u32 slot_id, bool command_must_succeed)
4117 return queue_command(xhci, cmd, lower_32_bits(in_ctx_ptr),
4118 upper_32_bits(in_ctx_ptr), 0,
4119 TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id),
4120 command_must_succeed);
4124 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
4125 * activity on an endpoint that is about to be suspended.
4127 int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, struct xhci_command *cmd,
4128 int slot_id, unsigned int ep_index, int suspend)
4130 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4131 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4132 u32 type = TRB_TYPE(TRB_STOP_RING);
4133 u32 trb_suspend = SUSPEND_PORT_FOR_TRB(suspend);
4135 return queue_command(xhci, cmd, 0, 0, 0,
4136 trb_slot_id | trb_ep_index | type | trb_suspend, false);
4139 /* Set Transfer Ring Dequeue Pointer command */
4140 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
4141 unsigned int slot_id, unsigned int ep_index,
4142 unsigned int stream_id,
4143 struct xhci_dequeue_state *deq_state)
4146 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4147 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4148 u32 trb_stream_id = STREAM_ID_FOR_TRB(stream_id);
4150 u32 type = TRB_TYPE(TRB_SET_DEQ);
4151 struct xhci_virt_ep *ep;
4152 struct xhci_command *cmd;
4155 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
4156 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u",
4157 deq_state->new_deq_seg,
4158 (unsigned long long)deq_state->new_deq_seg->dma,
4159 deq_state->new_deq_ptr,
4160 (unsigned long long)xhci_trb_virt_to_dma(
4161 deq_state->new_deq_seg, deq_state->new_deq_ptr),
4162 deq_state->new_cycle_state);
4164 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
4165 deq_state->new_deq_ptr);
4167 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4168 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
4169 deq_state->new_deq_seg, deq_state->new_deq_ptr);
4172 ep = &xhci->devs[slot_id]->eps[ep_index];
4173 if ((ep->ep_state & SET_DEQ_PENDING)) {
4174 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
4175 xhci_warn(xhci, "A Set TR Deq Ptr command is pending.\n");
4179 /* This function gets called from contexts where it cannot sleep */
4180 cmd = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
4182 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr: ENOMEM\n");
4186 ep->queued_deq_seg = deq_state->new_deq_seg;
4187 ep->queued_deq_ptr = deq_state->new_deq_ptr;
4189 trb_sct = SCT_FOR_TRB(SCT_PRI_TR);
4190 ret = queue_command(xhci, cmd,
4191 lower_32_bits(addr) | trb_sct | deq_state->new_cycle_state,
4192 upper_32_bits(addr), trb_stream_id,
4193 trb_slot_id | trb_ep_index | type, false);
4195 xhci_free_command(xhci, cmd);
4199 /* Stop the TD queueing code from ringing the doorbell until
4200 * this command completes. The HC won't set the dequeue pointer
4201 * if the ring is running, and ringing the doorbell starts the
4204 ep->ep_state |= SET_DEQ_PENDING;
4207 int xhci_queue_reset_ep(struct xhci_hcd *xhci, struct xhci_command *cmd,
4208 int slot_id, unsigned int ep_index)
4210 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
4211 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
4212 u32 type = TRB_TYPE(TRB_RESET_EP);
4214 return queue_command(xhci, cmd, 0, 0, 0,
4215 trb_slot_id | trb_ep_index | type, false);