2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 static unsigned int quirks;
44 module_param(quirks, uint, S_IRUGO);
45 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
47 /* TODO: copied from ehci-hcd.c - can this be refactored? */
49 * xhci_handshake - spin reading hc until handshake completes or fails
50 * @ptr: address of hc register to be read
51 * @mask: bits to look at in result of read
52 * @done: value of those bits when handshake succeeds
53 * @usec: timeout in microseconds
55 * Returns negative errno, or zero on success
57 * Success happens when the "mask" bits have the specified value (hardware
58 * handshake done). There are two failure modes: "usec" have passed (major
59 * hardware flakeout), or the register reads as all-ones (hardware removed).
61 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
62 u32 mask, u32 done, int usec)
68 if (result == ~(u32)0) /* card removed */
80 * Disable interrupts and begin the xHCI halting process.
82 void xhci_quiesce(struct xhci_hcd *xhci)
89 halted = readl(&xhci->op_regs->status) & STS_HALT;
93 cmd = readl(&xhci->op_regs->command);
95 writel(cmd, &xhci->op_regs->command);
99 * Force HC into halt state.
101 * Disable any IRQs and clear the run/stop bit.
102 * HC will complete any current and actively pipelined transactions, and
103 * should halt within 16 ms of the run/stop bit being cleared.
104 * Read HC Halted bit in the status register to see when the HC is finished.
106 int xhci_halt(struct xhci_hcd *xhci)
109 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
112 ret = xhci_handshake(xhci, &xhci->op_regs->status,
113 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
115 xhci->xhc_state |= XHCI_STATE_HALTED;
116 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
118 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
124 * Set the run bit and wait for the host to be running.
126 static int xhci_start(struct xhci_hcd *xhci)
131 temp = readl(&xhci->op_regs->command);
133 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
135 writel(temp, &xhci->op_regs->command);
138 * Wait for the HCHalted Status bit to be 0 to indicate the host is
141 ret = xhci_handshake(xhci, &xhci->op_regs->status,
142 STS_HALT, 0, XHCI_MAX_HALT_USEC);
143 if (ret == -ETIMEDOUT)
144 xhci_err(xhci, "Host took too long to start, "
145 "waited %u microseconds.\n",
148 xhci->xhc_state &= ~XHCI_STATE_HALTED;
155 * This resets pipelines, timers, counters, state machines, etc.
156 * Transactions will be terminated immediately, and operational registers
157 * will be set to their defaults.
159 int xhci_reset(struct xhci_hcd *xhci)
165 state = readl(&xhci->op_regs->status);
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 ret = xhci_handshake(xhci, &xhci->op_regs->command,
177 CMD_RESET, 0, 10 * 1000 * 1000);
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
182 "Wait for controller to be ready for doorbell rings");
184 * xHCI cannot write to any doorbells or operational registers other
185 * than status until the "Controller Not Ready" flag is cleared.
187 ret = xhci_handshake(xhci, &xhci->op_regs->status,
188 STS_CNR, 0, 10 * 1000 * 1000);
190 for (i = 0; i < 2; ++i) {
191 xhci->bus_state[i].port_c_suspend = 0;
192 xhci->bus_state[i].suspended_ports = 0;
193 xhci->bus_state[i].resuming_ports = 0;
200 static int xhci_free_msi(struct xhci_hcd *xhci)
204 if (!xhci->msix_entries)
207 for (i = 0; i < xhci->msix_count; i++)
208 if (xhci->msix_entries[i].vector)
209 free_irq(xhci->msix_entries[i].vector,
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
220 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222 ret = pci_enable_msi(pdev);
224 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
225 "failed to allocate MSI entry");
229 ret = request_irq(pdev->irq, xhci_msi_irq,
230 0, "xhci_hcd", xhci_to_hcd(xhci));
232 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
233 "disable MSI interrupt");
234 pci_disable_msi(pdev);
242 * free all IRQs request
244 static void xhci_free_irq(struct xhci_hcd *xhci)
246 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
249 /* return if using legacy interrupt */
250 if (xhci_to_hcd(xhci)->irq > 0)
253 ret = xhci_free_msi(xhci);
257 free_irq(pdev->irq, xhci_to_hcd(xhci));
265 static int xhci_setup_msix(struct xhci_hcd *xhci)
268 struct usb_hcd *hcd = xhci_to_hcd(xhci);
269 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272 * calculate number of msi-x vectors supported.
273 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
274 * with max number of interrupters based on the xhci HCSPARAMS1.
275 * - num_online_cpus: maximum msi-x vectors per CPUs core.
276 * Add additional 1 vector to ensure always available interrupt.
278 xhci->msix_count = min(num_online_cpus() + 1,
279 HCS_MAX_INTRS(xhci->hcs_params1));
282 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
284 if (!xhci->msix_entries) {
285 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
289 for (i = 0; i < xhci->msix_count; i++) {
290 xhci->msix_entries[i].entry = i;
291 xhci->msix_entries[i].vector = 0;
294 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
296 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
297 "Failed to enable MSI-X");
301 for (i = 0; i < xhci->msix_count; i++) {
302 ret = request_irq(xhci->msix_entries[i].vector,
304 0, "xhci_hcd", xhci_to_hcd(xhci));
309 hcd->msix_enabled = 1;
313 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
315 pci_disable_msix(pdev);
317 kfree(xhci->msix_entries);
318 xhci->msix_entries = NULL;
322 /* Free any IRQs and disable MSI-X */
323 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 struct usb_hcd *hcd = xhci_to_hcd(xhci);
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328 if (xhci->quirks & XHCI_PLAT)
333 if (xhci->msix_entries) {
334 pci_disable_msix(pdev);
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
338 pci_disable_msi(pdev);
341 hcd->msix_enabled = 0;
345 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
349 if (xhci->msix_entries) {
350 for (i = 0; i < xhci->msix_count; i++)
351 synchronize_irq(xhci->msix_entries[i].vector);
355 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358 struct pci_dev *pdev;
361 /* The xhci platform device has set up IRQs through usb_add_hcd. */
362 if (xhci->quirks & XHCI_PLAT)
365 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367 * Some Fresco Logic host controllers advertise MSI, but fail to
368 * generate interrupts. Don't even try to enable MSI.
370 if (xhci->quirks & XHCI_BROKEN_MSI)
373 /* unregister the legacy interrupt */
375 free_irq(hcd->irq, hcd);
378 ret = xhci_setup_msix(xhci);
380 /* fall back to msi*/
381 ret = xhci_setup_msi(xhci);
384 /* hcd->irq is 0, we have MSI */
388 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
393 if (!strlen(hcd->irq_descr))
394 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
395 hcd->driver->description, hcd->self.busnum);
397 /* fall back to legacy interrupt*/
398 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
399 hcd->irq_descr, hcd);
401 xhci_err(xhci, "request interrupt %d failed\n",
405 hcd->irq = pdev->irq;
411 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
416 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
420 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
426 static void compliance_mode_recovery(unsigned long arg)
428 struct xhci_hcd *xhci;
433 xhci = (struct xhci_hcd *)arg;
435 for (i = 0; i < xhci->num_usb3_ports; i++) {
436 temp = readl(xhci->usb3_ports[i]);
437 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
439 * Compliance Mode Detected. Letting USB Core
440 * handle the Warm Reset
442 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
443 "Compliance mode detected->port %d",
445 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
446 "Attempting compliance mode recovery");
447 hcd = xhci->shared_hcd;
449 if (hcd->state == HC_STATE_SUSPENDED)
450 usb_hcd_resume_root_hub(hcd);
452 usb_hcd_poll_rh_status(hcd);
456 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
457 mod_timer(&xhci->comp_mode_recovery_timer,
458 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
462 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
463 * that causes ports behind that hardware to enter compliance mode sometimes.
464 * The quirk creates a timer that polls every 2 seconds the link state of
465 * each host controller's port and recovers it by issuing a Warm reset
466 * if Compliance mode is detected, otherwise the port will become "dead" (no
467 * device connections or disconnections will be detected anymore). Becasue no
468 * status event is generated when entering compliance mode (per xhci spec),
469 * this quirk is needed on systems that have the failing hardware installed.
471 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
473 xhci->port_status_u0 = 0;
474 init_timer(&xhci->comp_mode_recovery_timer);
476 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
477 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
478 xhci->comp_mode_recovery_timer.expires = jiffies +
479 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
481 set_timer_slack(&xhci->comp_mode_recovery_timer,
482 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
483 add_timer(&xhci->comp_mode_recovery_timer);
484 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
485 "Compliance mode recovery timer initialized");
489 * This function identifies the systems that have installed the SN65LVPE502CP
490 * USB3.0 re-driver and that need the Compliance Mode Quirk.
492 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
494 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
496 const char *dmi_product_name, *dmi_sys_vendor;
498 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
499 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
500 if (!dmi_product_name || !dmi_sys_vendor)
503 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
506 if (strstr(dmi_product_name, "Z420") ||
507 strstr(dmi_product_name, "Z620") ||
508 strstr(dmi_product_name, "Z820") ||
509 strstr(dmi_product_name, "Z1 Workstation"))
515 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
517 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
522 * Initialize memory for HCD and xHC (one-time init).
524 * Program the PAGESIZE register, initialize the device context array, create
525 * device contexts (?), set up a command ring segment (or two?), create event
526 * ring (one for now).
528 int xhci_init(struct usb_hcd *hcd)
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
533 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
534 spin_lock_init(&xhci->lock);
535 if (xhci->hci_version == 0x95 && link_quirk) {
536 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
537 "QUIRK: Not clearing Link TRB chain bits.");
538 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
541 "xHCI doesn't need link TRB QUIRK");
543 retval = xhci_mem_init(xhci, GFP_KERNEL);
544 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
546 /* Initializing Compliance Mode Recovery Data If Needed */
547 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
548 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
549 compliance_mode_recovery_timer_init(xhci);
555 /*-------------------------------------------------------------------------*/
558 static int xhci_run_finished(struct xhci_hcd *xhci)
560 if (xhci_start(xhci)) {
564 xhci->shared_hcd->state = HC_STATE_RUNNING;
565 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
567 if (xhci->quirks & XHCI_NEC_HOST)
568 xhci_ring_cmd_db(xhci);
570 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
571 "Finished xhci_run for USB3 roothub");
576 * Start the HC after it was halted.
578 * This function is called by the USB core when the HC driver is added.
579 * Its opposite is xhci_stop().
581 * xhci_init() must be called once before this function can be called.
582 * Reset the HC, enable device slot contexts, program DCBAAP, and
583 * set command ring pointer and event ring pointer.
585 * Setup MSI-X vectors and enable interrupts.
587 int xhci_run(struct usb_hcd *hcd)
592 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 /* Start the xHCI host controller running only after the USB 2.0 roothub
598 hcd->uses_new_polling = 1;
599 if (!usb_hcd_is_primary_hcd(hcd))
600 return xhci_run_finished(xhci);
602 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
604 ret = xhci_try_enable_msi(hcd);
608 xhci_dbg(xhci, "Command ring memory map follows:\n");
609 xhci_debug_ring(xhci, xhci->cmd_ring);
610 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
611 xhci_dbg_cmd_ptrs(xhci);
613 xhci_dbg(xhci, "ERST memory map follows:\n");
614 xhci_dbg_erst(xhci, &xhci->erst);
615 xhci_dbg(xhci, "Event ring:\n");
616 xhci_debug_ring(xhci, xhci->event_ring);
617 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
618 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
619 temp_64 &= ~ERST_PTR_MASK;
620 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
621 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
623 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
624 "// Set the interrupt modulation register");
625 temp = readl(&xhci->ir_set->irq_control);
626 temp &= ~ER_IRQ_INTERVAL_MASK;
628 writel(temp, &xhci->ir_set->irq_control);
630 /* Set the HCD state before we enable the irqs */
631 temp = readl(&xhci->op_regs->command);
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "// Enable interrupts, cmd = 0x%x.", temp);
635 writel(temp, &xhci->op_regs->command);
637 temp = readl(&xhci->ir_set->irq_pending);
638 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
639 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
640 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
641 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
642 xhci_print_ir_set(xhci, 0);
644 if (xhci->quirks & XHCI_NEC_HOST) {
645 struct xhci_command *command;
646 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
649 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
650 TRB_TYPE(TRB_NEC_GET_FW));
652 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
653 "Finished xhci_run for USB2 roothub");
656 EXPORT_SYMBOL_GPL(xhci_run);
658 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
660 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
662 spin_lock_irq(&xhci->lock);
665 /* The shared_hcd is going to be deallocated shortly (the USB core only
666 * calls this function when allocation fails in usb_add_hcd(), or
667 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
669 xhci->shared_hcd = NULL;
670 spin_unlock_irq(&xhci->lock);
676 * This function is called by the USB core when the HC driver is removed.
677 * Its opposite is xhci_run().
679 * Disable device contexts, disable IRQs, and quiesce the HC.
680 * Reset the HC, finish any completed transactions, and cleanup memory.
682 void xhci_stop(struct usb_hcd *hcd)
685 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
687 if (!usb_hcd_is_primary_hcd(hcd)) {
688 xhci_only_stop_hcd(xhci->shared_hcd);
692 spin_lock_irq(&xhci->lock);
693 /* Make sure the xHC is halted for a USB3 roothub
694 * (xhci_stop() could be called as part of failed init).
698 spin_unlock_irq(&xhci->lock);
700 xhci_cleanup_msix(xhci);
702 /* Deleting Compliance Mode Recovery Timer */
703 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
704 (!(xhci_all_ports_seen_u0(xhci)))) {
705 del_timer_sync(&xhci->comp_mode_recovery_timer);
706 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
707 "%s: compliance mode recovery timer deleted",
711 if (xhci->quirks & XHCI_AMD_PLL_FIX)
714 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
715 "// Disabling event ring interrupts");
716 temp = readl(&xhci->op_regs->status);
717 writel(temp & ~STS_EINT, &xhci->op_regs->status);
718 temp = readl(&xhci->ir_set->irq_pending);
719 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
720 xhci_print_ir_set(xhci, 0);
722 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
723 xhci_mem_cleanup(xhci);
724 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
725 "xhci_stop completed - status = %x",
726 readl(&xhci->op_regs->status));
730 * Shutdown HC (not bus-specific)
732 * This is called when the machine is rebooting or halting. We assume that the
733 * machine will be powered off, and the HC's internal state will be reset.
734 * Don't bother to free memory.
736 * This will only ever be called with the main usb_hcd (the USB3 roothub).
738 void xhci_shutdown(struct usb_hcd *hcd)
740 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
742 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
743 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
745 spin_lock_irq(&xhci->lock);
747 /* Workaround for spurious wakeups at shutdown with HSW */
748 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
750 spin_unlock_irq(&xhci->lock);
752 xhci_cleanup_msix(xhci);
754 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
755 "xhci_shutdown completed - status = %x",
756 readl(&xhci->op_regs->status));
758 /* Yet another workaround for spurious wakeups at shutdown with HSW */
759 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
760 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
764 static void xhci_save_registers(struct xhci_hcd *xhci)
766 xhci->s3.command = readl(&xhci->op_regs->command);
767 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
768 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
769 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
770 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
771 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
772 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
773 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
774 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
777 static void xhci_restore_registers(struct xhci_hcd *xhci)
779 writel(xhci->s3.command, &xhci->op_regs->command);
780 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
781 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
782 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
783 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
784 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
785 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
786 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
787 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
790 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
794 /* step 2: initialize command ring buffer */
795 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
796 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
797 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
798 xhci->cmd_ring->dequeue) &
799 (u64) ~CMD_RING_RSVD_BITS) |
800 xhci->cmd_ring->cycle_state;
801 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
802 "// Setting command ring address to 0x%llx",
803 (long unsigned long) val_64);
804 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
808 * The whole command ring must be cleared to zero when we suspend the host.
810 * The host doesn't save the command ring pointer in the suspend well, so we
811 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
812 * aligned, because of the reserved bits in the command ring dequeue pointer
813 * register. Therefore, we can't just set the dequeue pointer back in the
814 * middle of the ring (TRBs are 16-byte aligned).
816 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
818 struct xhci_ring *ring;
819 struct xhci_segment *seg;
821 ring = xhci->cmd_ring;
825 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
826 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
827 cpu_to_le32(~TRB_CYCLE);
829 } while (seg != ring->deq_seg);
831 /* Reset the software enqueue and dequeue pointers */
832 ring->deq_seg = ring->first_seg;
833 ring->dequeue = ring->first_seg->trbs;
834 ring->enq_seg = ring->deq_seg;
835 ring->enqueue = ring->dequeue;
837 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
839 * Ring is now zeroed, so the HW should look for change of ownership
840 * when the cycle bit is set to 1.
842 ring->cycle_state = 1;
845 * Reset the hardware dequeue pointer.
846 * Yes, this will need to be re-written after resume, but we're paranoid
847 * and want to make sure the hardware doesn't access bogus memory
848 * because, say, the BIOS or an SMI started the host without changing
849 * the command ring pointers.
851 xhci_set_cmd_ring_deq(xhci);
855 * Stop HC (not bus-specific)
857 * This is called when the machine transition into S3/S4 mode.
860 int xhci_suspend(struct xhci_hcd *xhci)
863 unsigned int delay = XHCI_MAX_HALT_USEC;
864 struct usb_hcd *hcd = xhci_to_hcd(xhci);
867 if (hcd->state != HC_STATE_SUSPENDED ||
868 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
871 /* Don't poll the roothubs on bus suspend. */
872 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
873 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
874 del_timer_sync(&hcd->rh_timer);
875 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
876 del_timer_sync(&xhci->shared_hcd->rh_timer);
878 spin_lock_irq(&xhci->lock);
879 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
880 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
881 /* step 1: stop endpoint */
882 /* skipped assuming that port suspend has done */
884 /* step 2: clear Run/Stop bit */
885 command = readl(&xhci->op_regs->command);
887 writel(command, &xhci->op_regs->command);
889 /* Some chips from Fresco Logic need an extraordinary delay */
890 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
892 if (xhci_handshake(xhci, &xhci->op_regs->status,
893 STS_HALT, STS_HALT, delay)) {
894 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
895 spin_unlock_irq(&xhci->lock);
898 xhci_clear_command_ring(xhci);
900 /* step 3: save registers */
901 xhci_save_registers(xhci);
903 /* step 4: set CSS flag */
904 command = readl(&xhci->op_regs->command);
906 writel(command, &xhci->op_regs->command);
907 if (xhci_handshake(xhci, &xhci->op_regs->status,
908 STS_SAVE, 0, 10 * 1000)) {
909 xhci_warn(xhci, "WARN: xHC save state timeout\n");
910 spin_unlock_irq(&xhci->lock);
913 spin_unlock_irq(&xhci->lock);
916 * Deleting Compliance Mode Recovery Timer because the xHCI Host
917 * is about to be suspended.
919 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
920 (!(xhci_all_ports_seen_u0(xhci)))) {
921 del_timer_sync(&xhci->comp_mode_recovery_timer);
922 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
923 "%s: compliance mode recovery timer deleted",
927 /* step 5: remove core well power */
928 /* synchronize irq when using MSI-X */
929 xhci_msix_sync_irqs(xhci);
933 EXPORT_SYMBOL_GPL(xhci_suspend);
936 * start xHC (not bus-specific)
938 * This is called when the machine transition from S3/S4 mode.
941 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
943 u32 command, temp = 0, status;
944 struct usb_hcd *hcd = xhci_to_hcd(xhci);
945 struct usb_hcd *secondary_hcd;
947 bool comp_timer_running = false;
949 /* Wait a bit if either of the roothubs need to settle from the
950 * transition into bus suspend.
952 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
954 xhci->bus_state[1].next_statechange))
957 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
958 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
960 spin_lock_irq(&xhci->lock);
961 if (xhci->quirks & XHCI_RESET_ON_RESUME)
965 /* step 1: restore register */
966 xhci_restore_registers(xhci);
967 /* step 2: initialize command ring buffer */
968 xhci_set_cmd_ring_deq(xhci);
969 /* step 3: restore state and start state*/
970 /* step 3: set CRS flag */
971 command = readl(&xhci->op_regs->command);
973 writel(command, &xhci->op_regs->command);
974 if (xhci_handshake(xhci, &xhci->op_regs->status,
975 STS_RESTORE, 0, 10 * 1000)) {
976 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
977 spin_unlock_irq(&xhci->lock);
980 temp = readl(&xhci->op_regs->status);
983 /* If restore operation fails, re-initialize the HC during resume */
984 if ((temp & STS_SRE) || hibernated) {
986 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
987 !(xhci_all_ports_seen_u0(xhci))) {
988 del_timer_sync(&xhci->comp_mode_recovery_timer);
989 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
990 "Compliance Mode Recovery Timer deleted!");
993 /* Let the USB core know _both_ roothubs lost power. */
994 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
995 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
997 xhci_dbg(xhci, "Stop HCD\n");
1000 spin_unlock_irq(&xhci->lock);
1001 xhci_cleanup_msix(xhci);
1003 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1004 temp = readl(&xhci->op_regs->status);
1005 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1006 temp = readl(&xhci->ir_set->irq_pending);
1007 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1008 xhci_print_ir_set(xhci, 0);
1010 xhci_dbg(xhci, "cleaning up memory\n");
1011 xhci_mem_cleanup(xhci);
1012 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1013 readl(&xhci->op_regs->status));
1015 /* USB core calls the PCI reinit and start functions twice:
1016 * first with the primary HCD, and then with the secondary HCD.
1017 * If we don't do the same, the host will never be started.
1019 if (!usb_hcd_is_primary_hcd(hcd))
1020 secondary_hcd = hcd;
1022 secondary_hcd = xhci->shared_hcd;
1024 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1025 retval = xhci_init(hcd->primary_hcd);
1028 comp_timer_running = true;
1030 xhci_dbg(xhci, "Start the primary HCD\n");
1031 retval = xhci_run(hcd->primary_hcd);
1033 xhci_dbg(xhci, "Start the secondary HCD\n");
1034 retval = xhci_run(secondary_hcd);
1036 hcd->state = HC_STATE_SUSPENDED;
1037 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1041 /* step 4: set Run/Stop bit */
1042 command = readl(&xhci->op_regs->command);
1044 writel(command, &xhci->op_regs->command);
1045 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1048 /* step 5: walk topology and initialize portsc,
1049 * portpmsc and portli
1051 /* this is done in bus_resume */
1053 /* step 6: restart each of the previously
1054 * Running endpoints by ringing their doorbells
1057 spin_unlock_irq(&xhci->lock);
1061 /* Resume root hubs only when have pending events. */
1062 status = readl(&xhci->op_regs->status);
1063 if (status & STS_EINT) {
1064 usb_hcd_resume_root_hub(hcd);
1065 usb_hcd_resume_root_hub(xhci->shared_hcd);
1070 * If system is subject to the Quirk, Compliance Mode Timer needs to
1071 * be re-initialized Always after a system resume. Ports are subject
1072 * to suffer the Compliance Mode issue again. It doesn't matter if
1073 * ports have entered previously to U0 before system's suspension.
1075 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1076 compliance_mode_recovery_timer_init(xhci);
1078 /* Re-enable port polling. */
1079 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1080 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1081 usb_hcd_poll_rh_status(hcd);
1082 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1083 usb_hcd_poll_rh_status(xhci->shared_hcd);
1087 EXPORT_SYMBOL_GPL(xhci_resume);
1088 #endif /* CONFIG_PM */
1090 /*-------------------------------------------------------------------------*/
1093 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1094 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1095 * value to right shift 1 for the bitmask.
1097 * Index = (epnum * 2) + direction - 1,
1098 * where direction = 0 for OUT, 1 for IN.
1099 * For control endpoints, the IN index is used (OUT index is unused), so
1100 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1102 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1105 if (usb_endpoint_xfer_control(desc))
1106 index = (unsigned int) (usb_endpoint_num(desc)*2);
1108 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1109 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1113 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1114 * address from the XHCI endpoint index.
1116 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1118 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1119 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1120 return direction | number;
1123 /* Find the flag for this endpoint (for use in the control context). Use the
1124 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1127 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1129 return 1 << (xhci_get_endpoint_index(desc) + 1);
1132 /* Find the flag for this endpoint (for use in the control context). Use the
1133 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1136 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1138 return 1 << (ep_index + 1);
1141 /* Compute the last valid endpoint context index. Basically, this is the
1142 * endpoint index plus one. For slot contexts with more than valid endpoint,
1143 * we find the most significant bit set in the added contexts flags.
1144 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1145 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1147 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1149 return fls(added_ctxs) - 1;
1152 /* Returns 1 if the arguments are OK;
1153 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1155 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1156 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1158 struct xhci_hcd *xhci;
1159 struct xhci_virt_device *virt_dev;
1161 if (!hcd || (check_ep && !ep) || !udev) {
1162 pr_debug("xHCI %s called with invalid args\n", func);
1165 if (!udev->parent) {
1166 pr_debug("xHCI %s called for root hub\n", func);
1170 xhci = hcd_to_xhci(hcd);
1171 if (check_virt_dev) {
1172 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1173 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1178 virt_dev = xhci->devs[udev->slot_id];
1179 if (virt_dev->udev != udev) {
1180 xhci_dbg(xhci, "xHCI %s called with udev and "
1181 "virt_dev does not match\n", func);
1186 if (xhci->xhc_state & XHCI_STATE_HALTED)
1192 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1193 struct usb_device *udev, struct xhci_command *command,
1194 bool ctx_change, bool must_succeed);
1197 * Full speed devices may have a max packet size greater than 8 bytes, but the
1198 * USB core doesn't know that until it reads the first 8 bytes of the
1199 * descriptor. If the usb_device's max packet size changes after that point,
1200 * we need to issue an evaluate context command and wait on it.
1202 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1203 unsigned int ep_index, struct urb *urb)
1205 struct xhci_container_ctx *out_ctx;
1206 struct xhci_input_control_ctx *ctrl_ctx;
1207 struct xhci_ep_ctx *ep_ctx;
1208 struct xhci_command *command;
1209 int max_packet_size;
1210 int hw_max_packet_size;
1213 out_ctx = xhci->devs[slot_id]->out_ctx;
1214 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1215 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1216 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1217 if (hw_max_packet_size != max_packet_size) {
1218 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1219 "Max Packet Size for ep 0 changed.");
1220 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1221 "Max packet size in usb_device = %d",
1223 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1224 "Max packet size in xHCI HW = %d",
1225 hw_max_packet_size);
1226 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1227 "Issuing evaluate context command.");
1229 /* Set up the input context flags for the command */
1230 /* FIXME: This won't work if a non-default control endpoint
1231 * changes max packet sizes.
1234 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1238 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1239 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
1241 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1244 goto command_cleanup;
1246 /* Set up the modified control endpoint 0 */
1247 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1248 xhci->devs[slot_id]->out_ctx, ep_index);
1250 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1251 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1252 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1254 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1255 ctrl_ctx->drop_flags = 0;
1257 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1258 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1259 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1260 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1262 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1265 /* Clean up the input context for later use by bandwidth
1268 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1270 kfree(command->completion);
1277 * non-error returns are a promise to giveback() the urb later
1278 * we drop ownership so next owner (or urb unlink) can get it
1280 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1282 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1283 struct xhci_td *buffer;
1284 unsigned long flags;
1286 unsigned int slot_id, ep_index;
1287 struct urb_priv *urb_priv;
1290 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1291 true, true, __func__) <= 0)
1294 slot_id = urb->dev->slot_id;
1295 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1297 if (!HCD_HW_ACCESSIBLE(hcd)) {
1298 if (!in_interrupt())
1299 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1304 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1305 size = urb->number_of_packets;
1309 urb_priv = kzalloc(sizeof(struct urb_priv) +
1310 size * sizeof(struct xhci_td *), mem_flags);
1314 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1320 for (i = 0; i < size; i++) {
1321 urb_priv->td[i] = buffer;
1325 urb_priv->length = size;
1326 urb_priv->td_cnt = 0;
1327 urb->hcpriv = urb_priv;
1329 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1330 /* Check to see if the max packet size for the default control
1331 * endpoint changed during FS device enumeration
1333 if (urb->dev->speed == USB_SPEED_FULL) {
1334 ret = xhci_check_maxpacket(xhci, slot_id,
1337 xhci_urb_free_priv(xhci, urb_priv);
1343 /* We have a spinlock and interrupts disabled, so we must pass
1344 * atomic context to this function, which may allocate memory.
1346 spin_lock_irqsave(&xhci->lock, flags);
1347 if (xhci->xhc_state & XHCI_STATE_DYING)
1349 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1353 spin_unlock_irqrestore(&xhci->lock, flags);
1354 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1355 spin_lock_irqsave(&xhci->lock, flags);
1356 if (xhci->xhc_state & XHCI_STATE_DYING)
1358 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1359 EP_GETTING_STREAMS) {
1360 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1361 "is transitioning to using streams.\n");
1363 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1364 EP_GETTING_NO_STREAMS) {
1365 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1366 "is transitioning to "
1367 "not having streams.\n");
1370 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1375 spin_unlock_irqrestore(&xhci->lock, flags);
1376 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1377 spin_lock_irqsave(&xhci->lock, flags);
1378 if (xhci->xhc_state & XHCI_STATE_DYING)
1380 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1384 spin_unlock_irqrestore(&xhci->lock, flags);
1386 spin_lock_irqsave(&xhci->lock, flags);
1387 if (xhci->xhc_state & XHCI_STATE_DYING)
1389 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1393 spin_unlock_irqrestore(&xhci->lock, flags);
1398 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1399 "non-responsive xHCI host.\n",
1400 urb->ep->desc.bEndpointAddress, urb);
1403 xhci_urb_free_priv(xhci, urb_priv);
1405 spin_unlock_irqrestore(&xhci->lock, flags);
1409 /* Get the right ring for the given URB.
1410 * If the endpoint supports streams, boundary check the URB's stream ID.
1411 * If the endpoint doesn't support streams, return the singular endpoint ring.
1413 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1416 unsigned int slot_id;
1417 unsigned int ep_index;
1418 unsigned int stream_id;
1419 struct xhci_virt_ep *ep;
1421 slot_id = urb->dev->slot_id;
1422 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1423 stream_id = urb->stream_id;
1424 ep = &xhci->devs[slot_id]->eps[ep_index];
1425 /* Common case: no streams */
1426 if (!(ep->ep_state & EP_HAS_STREAMS))
1429 if (stream_id == 0) {
1431 "WARN: Slot ID %u, ep index %u has streams, "
1432 "but URB has no stream ID.\n",
1437 if (stream_id < ep->stream_info->num_streams)
1438 return ep->stream_info->stream_rings[stream_id];
1441 "WARN: Slot ID %u, ep index %u has "
1442 "stream IDs 1 to %u allocated, "
1443 "but stream ID %u is requested.\n",
1445 ep->stream_info->num_streams - 1,
1451 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1452 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1453 * should pick up where it left off in the TD, unless a Set Transfer Ring
1454 * Dequeue Pointer is issued.
1456 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1457 * the ring. Since the ring is a contiguous structure, they can't be physically
1458 * removed. Instead, there are two options:
1460 * 1) If the HC is in the middle of processing the URB to be canceled, we
1461 * simply move the ring's dequeue pointer past those TRBs using the Set
1462 * Transfer Ring Dequeue Pointer command. This will be the common case,
1463 * when drivers timeout on the last submitted URB and attempt to cancel.
1465 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1466 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1467 * HC will need to invalidate the any TRBs it has cached after the stop
1468 * endpoint command, as noted in the xHCI 0.95 errata.
1470 * 3) The TD may have completed by the time the Stop Endpoint Command
1471 * completes, so software needs to handle that case too.
1473 * This function should protect against the TD enqueueing code ringing the
1474 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1475 * It also needs to account for multiple cancellations on happening at the same
1476 * time for the same endpoint.
1478 * Note that this function can be called in any context, or so says
1479 * usb_hcd_unlink_urb()
1481 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1483 unsigned long flags;
1486 struct xhci_hcd *xhci;
1487 struct urb_priv *urb_priv;
1489 unsigned int ep_index;
1490 struct xhci_ring *ep_ring;
1491 struct xhci_virt_ep *ep;
1492 struct xhci_command *command;
1494 xhci = hcd_to_xhci(hcd);
1495 spin_lock_irqsave(&xhci->lock, flags);
1496 /* Make sure the URB hasn't completed or been unlinked already */
1497 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1498 if (ret || !urb->hcpriv)
1500 temp = readl(&xhci->op_regs->status);
1501 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1502 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1503 "HW died, freeing TD.");
1504 urb_priv = urb->hcpriv;
1505 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1506 td = urb_priv->td[i];
1507 if (!list_empty(&td->td_list))
1508 list_del_init(&td->td_list);
1509 if (!list_empty(&td->cancelled_td_list))
1510 list_del_init(&td->cancelled_td_list);
1513 usb_hcd_unlink_urb_from_ep(hcd, urb);
1514 spin_unlock_irqrestore(&xhci->lock, flags);
1515 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1516 xhci_urb_free_priv(xhci, urb_priv);
1519 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1520 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1521 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1522 "Ep 0x%x: URB %p to be canceled on "
1523 "non-responsive xHCI host.",
1524 urb->ep->desc.bEndpointAddress, urb);
1525 /* Let the stop endpoint command watchdog timer (which set this
1526 * state) finish cleaning up the endpoint TD lists. We must
1527 * have caught it in the middle of dropping a lock and giving
1533 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1534 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1535 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1541 urb_priv = urb->hcpriv;
1542 i = urb_priv->td_cnt;
1543 if (i < urb_priv->length)
1544 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1545 "Cancel URB %p, dev %s, ep 0x%x, "
1546 "starting at offset 0x%llx",
1547 urb, urb->dev->devpath,
1548 urb->ep->desc.bEndpointAddress,
1549 (unsigned long long) xhci_trb_virt_to_dma(
1550 urb_priv->td[i]->start_seg,
1551 urb_priv->td[i]->first_trb));
1553 for (; i < urb_priv->length; i++) {
1554 td = urb_priv->td[i];
1555 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1558 /* Queue a stop endpoint command, but only if this is
1559 * the first cancellation to be handled.
1561 if (!(ep->ep_state & EP_HALT_PENDING)) {
1562 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1567 ep->ep_state |= EP_HALT_PENDING;
1568 ep->stop_cmds_pending++;
1569 ep->stop_cmd_timer.expires = jiffies +
1570 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1571 add_timer(&ep->stop_cmd_timer);
1572 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1574 xhci_ring_cmd_db(xhci);
1577 spin_unlock_irqrestore(&xhci->lock, flags);
1581 /* Drop an endpoint from a new bandwidth configuration for this device.
1582 * Only one call to this function is allowed per endpoint before
1583 * check_bandwidth() or reset_bandwidth() must be called.
1584 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1585 * add the endpoint to the schedule with possibly new parameters denoted by a
1586 * different endpoint descriptor in usb_host_endpoint.
1587 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1590 * The USB core will not allow URBs to be queued to an endpoint that is being
1591 * disabled, so there's no need for mutual exclusion to protect
1592 * the xhci->devs[slot_id] structure.
1594 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1595 struct usb_host_endpoint *ep)
1597 struct xhci_hcd *xhci;
1598 struct xhci_container_ctx *in_ctx, *out_ctx;
1599 struct xhci_input_control_ctx *ctrl_ctx;
1600 unsigned int ep_index;
1601 struct xhci_ep_ctx *ep_ctx;
1603 u32 new_add_flags, new_drop_flags;
1606 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1609 xhci = hcd_to_xhci(hcd);
1610 if (xhci->xhc_state & XHCI_STATE_DYING)
1613 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1614 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1615 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1616 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1617 __func__, drop_flag);
1621 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1622 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1623 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1625 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1630 ep_index = xhci_get_endpoint_index(&ep->desc);
1631 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1632 /* If the HC already knows the endpoint is disabled,
1633 * or the HCD has noted it is disabled, ignore this request
1635 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1636 cpu_to_le32(EP_STATE_DISABLED)) ||
1637 le32_to_cpu(ctrl_ctx->drop_flags) &
1638 xhci_get_endpoint_flag(&ep->desc)) {
1639 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1644 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1645 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1647 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1648 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1650 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1652 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1653 (unsigned int) ep->desc.bEndpointAddress,
1655 (unsigned int) new_drop_flags,
1656 (unsigned int) new_add_flags);
1660 /* Add an endpoint to a new possible bandwidth configuration for this device.
1661 * Only one call to this function is allowed per endpoint before
1662 * check_bandwidth() or reset_bandwidth() must be called.
1663 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1664 * add the endpoint to the schedule with possibly new parameters denoted by a
1665 * different endpoint descriptor in usb_host_endpoint.
1666 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1669 * The USB core will not allow URBs to be queued to an endpoint until the
1670 * configuration or alt setting is installed in the device, so there's no need
1671 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1673 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1674 struct usb_host_endpoint *ep)
1676 struct xhci_hcd *xhci;
1677 struct xhci_container_ctx *in_ctx, *out_ctx;
1678 unsigned int ep_index;
1679 struct xhci_input_control_ctx *ctrl_ctx;
1681 u32 new_add_flags, new_drop_flags;
1682 struct xhci_virt_device *virt_dev;
1685 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1687 /* So we won't queue a reset ep command for a root hub */
1691 xhci = hcd_to_xhci(hcd);
1692 if (xhci->xhc_state & XHCI_STATE_DYING)
1695 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1696 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1697 /* FIXME when we have to issue an evaluate endpoint command to
1698 * deal with ep0 max packet size changing once we get the
1701 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1702 __func__, added_ctxs);
1706 virt_dev = xhci->devs[udev->slot_id];
1707 in_ctx = virt_dev->in_ctx;
1708 out_ctx = virt_dev->out_ctx;
1709 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1711 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1716 ep_index = xhci_get_endpoint_index(&ep->desc);
1717 /* If this endpoint is already in use, and the upper layers are trying
1718 * to add it again without dropping it, reject the addition.
1720 if (virt_dev->eps[ep_index].ring &&
1721 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1722 xhci_get_endpoint_flag(&ep->desc))) {
1723 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1724 "without dropping it.\n",
1725 (unsigned int) ep->desc.bEndpointAddress);
1729 /* If the HCD has already noted the endpoint is enabled,
1730 * ignore this request.
1732 if (le32_to_cpu(ctrl_ctx->add_flags) &
1733 xhci_get_endpoint_flag(&ep->desc)) {
1734 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1740 * Configuration and alternate setting changes must be done in
1741 * process context, not interrupt context (or so documenation
1742 * for usb_set_interface() and usb_set_configuration() claim).
1744 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1745 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1746 __func__, ep->desc.bEndpointAddress);
1750 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1751 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1753 /* If xhci_endpoint_disable() was called for this endpoint, but the
1754 * xHC hasn't been notified yet through the check_bandwidth() call,
1755 * this re-adds a new state for the endpoint from the new endpoint
1756 * descriptors. We must drop and re-add this endpoint, so we leave the
1759 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1761 /* Store the usb_device pointer for later use */
1764 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1765 (unsigned int) ep->desc.bEndpointAddress,
1767 (unsigned int) new_drop_flags,
1768 (unsigned int) new_add_flags);
1772 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1774 struct xhci_input_control_ctx *ctrl_ctx;
1775 struct xhci_ep_ctx *ep_ctx;
1776 struct xhci_slot_ctx *slot_ctx;
1779 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1781 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1786 /* When a device's add flag and drop flag are zero, any subsequent
1787 * configure endpoint command will leave that endpoint's state
1788 * untouched. Make sure we don't leave any old state in the input
1789 * endpoint contexts.
1791 ctrl_ctx->drop_flags = 0;
1792 ctrl_ctx->add_flags = 0;
1793 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1794 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1795 /* Endpoint 0 is always valid */
1796 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1797 for (i = 1; i < 31; ++i) {
1798 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1799 ep_ctx->ep_info = 0;
1800 ep_ctx->ep_info2 = 0;
1802 ep_ctx->tx_info = 0;
1806 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1807 struct usb_device *udev, u32 *cmd_status)
1811 switch (*cmd_status) {
1812 case COMP_CMD_ABORT:
1814 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1818 dev_warn(&udev->dev,
1819 "Not enough host controller resources for new device state.\n");
1821 /* FIXME: can we allocate more resources for the HC? */
1824 case COMP_2ND_BW_ERR:
1825 dev_warn(&udev->dev,
1826 "Not enough bandwidth for new device state.\n");
1828 /* FIXME: can we go back to the old state? */
1831 /* the HCD set up something wrong */
1832 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1834 "and endpoint is not disabled.\n");
1838 dev_warn(&udev->dev,
1839 "ERROR: Incompatible device for endpoint configure command.\n");
1843 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1844 "Successful Endpoint Configure command");
1848 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1856 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1857 struct usb_device *udev, u32 *cmd_status)
1860 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1862 switch (*cmd_status) {
1863 case COMP_CMD_ABORT:
1865 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1869 dev_warn(&udev->dev,
1870 "WARN: xHCI driver setup invalid evaluate context command.\n");
1874 dev_warn(&udev->dev,
1875 "WARN: slot not enabled for evaluate context command.\n");
1878 case COMP_CTX_STATE:
1879 dev_warn(&udev->dev,
1880 "WARN: invalid context state for evaluate context command.\n");
1881 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1885 dev_warn(&udev->dev,
1886 "ERROR: Incompatible device for evaluate context command.\n");
1890 /* Max Exit Latency too large error */
1891 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1895 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1896 "Successful evaluate context command");
1900 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1908 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1909 struct xhci_input_control_ctx *ctrl_ctx)
1911 u32 valid_add_flags;
1912 u32 valid_drop_flags;
1914 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1915 * (bit 1). The default control endpoint is added during the Address
1916 * Device command and is never removed until the slot is disabled.
1918 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1919 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1921 /* Use hweight32 to count the number of ones in the add flags, or
1922 * number of endpoints added. Don't count endpoints that are changed
1923 * (both added and dropped).
1925 return hweight32(valid_add_flags) -
1926 hweight32(valid_add_flags & valid_drop_flags);
1929 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1930 struct xhci_input_control_ctx *ctrl_ctx)
1932 u32 valid_add_flags;
1933 u32 valid_drop_flags;
1935 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1936 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1938 return hweight32(valid_drop_flags) -
1939 hweight32(valid_add_flags & valid_drop_flags);
1943 * We need to reserve the new number of endpoints before the configure endpoint
1944 * command completes. We can't subtract the dropped endpoints from the number
1945 * of active endpoints until the command completes because we can oversubscribe
1946 * the host in this case:
1948 * - the first configure endpoint command drops more endpoints than it adds
1949 * - a second configure endpoint command that adds more endpoints is queued
1950 * - the first configure endpoint command fails, so the config is unchanged
1951 * - the second command may succeed, even though there isn't enough resources
1953 * Must be called with xhci->lock held.
1955 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1956 struct xhci_input_control_ctx *ctrl_ctx)
1960 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1961 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1962 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1963 "Not enough ep ctxs: "
1964 "%u active, need to add %u, limit is %u.",
1965 xhci->num_active_eps, added_eps,
1966 xhci->limit_active_eps);
1969 xhci->num_active_eps += added_eps;
1970 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1971 "Adding %u ep ctxs, %u now active.", added_eps,
1972 xhci->num_active_eps);
1977 * The configure endpoint was failed by the xHC for some other reason, so we
1978 * need to revert the resources that failed configuration would have used.
1980 * Must be called with xhci->lock held.
1982 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1983 struct xhci_input_control_ctx *ctrl_ctx)
1987 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1988 xhci->num_active_eps -= num_failed_eps;
1989 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1990 "Removing %u failed ep ctxs, %u now active.",
1992 xhci->num_active_eps);
1996 * Now that the command has completed, clean up the active endpoint count by
1997 * subtracting out the endpoints that were dropped (but not changed).
1999 * Must be called with xhci->lock held.
2001 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2002 struct xhci_input_control_ctx *ctrl_ctx)
2004 u32 num_dropped_eps;
2006 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2007 xhci->num_active_eps -= num_dropped_eps;
2008 if (num_dropped_eps)
2009 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2010 "Removing %u dropped ep ctxs, %u now active.",
2012 xhci->num_active_eps);
2015 static unsigned int xhci_get_block_size(struct usb_device *udev)
2017 switch (udev->speed) {
2019 case USB_SPEED_FULL:
2021 case USB_SPEED_HIGH:
2023 case USB_SPEED_SUPER:
2025 case USB_SPEED_UNKNOWN:
2026 case USB_SPEED_WIRELESS:
2028 /* Should never happen */
2034 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2036 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2038 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2043 /* If we are changing a LS/FS device under a HS hub,
2044 * make sure (if we are activating a new TT) that the HS bus has enough
2045 * bandwidth for this new TT.
2047 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2048 struct xhci_virt_device *virt_dev,
2051 struct xhci_interval_bw_table *bw_table;
2052 struct xhci_tt_bw_info *tt_info;
2054 /* Find the bandwidth table for the root port this TT is attached to. */
2055 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2056 tt_info = virt_dev->tt_info;
2057 /* If this TT already had active endpoints, the bandwidth for this TT
2058 * has already been added. Removing all periodic endpoints (and thus
2059 * making the TT enactive) will only decrease the bandwidth used.
2063 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2064 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2068 /* Not sure why we would have no new active endpoints...
2070 * Maybe because of an Evaluate Context change for a hub update or a
2071 * control endpoint 0 max packet size change?
2072 * FIXME: skip the bandwidth calculation in that case.
2077 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2078 struct xhci_virt_device *virt_dev)
2080 unsigned int bw_reserved;
2082 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2083 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2086 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2087 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2094 * This algorithm is a very conservative estimate of the worst-case scheduling
2095 * scenario for any one interval. The hardware dynamically schedules the
2096 * packets, so we can't tell which microframe could be the limiting factor in
2097 * the bandwidth scheduling. This only takes into account periodic endpoints.
2099 * Obviously, we can't solve an NP complete problem to find the minimum worst
2100 * case scenario. Instead, we come up with an estimate that is no less than
2101 * the worst case bandwidth used for any one microframe, but may be an
2104 * We walk the requirements for each endpoint by interval, starting with the
2105 * smallest interval, and place packets in the schedule where there is only one
2106 * possible way to schedule packets for that interval. In order to simplify
2107 * this algorithm, we record the largest max packet size for each interval, and
2108 * assume all packets will be that size.
2110 * For interval 0, we obviously must schedule all packets for each interval.
2111 * The bandwidth for interval 0 is just the amount of data to be transmitted
2112 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2113 * the number of packets).
2115 * For interval 1, we have two possible microframes to schedule those packets
2116 * in. For this algorithm, if we can schedule the same number of packets for
2117 * each possible scheduling opportunity (each microframe), we will do so. The
2118 * remaining number of packets will be saved to be transmitted in the gaps in
2119 * the next interval's scheduling sequence.
2121 * As we move those remaining packets to be scheduled with interval 2 packets,
2122 * we have to double the number of remaining packets to transmit. This is
2123 * because the intervals are actually powers of 2, and we would be transmitting
2124 * the previous interval's packets twice in this interval. We also have to be
2125 * sure that when we look at the largest max packet size for this interval, we
2126 * also look at the largest max packet size for the remaining packets and take
2127 * the greater of the two.
2129 * The algorithm continues to evenly distribute packets in each scheduling
2130 * opportunity, and push the remaining packets out, until we get to the last
2131 * interval. Then those packets and their associated overhead are just added
2132 * to the bandwidth used.
2134 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2135 struct xhci_virt_device *virt_dev,
2138 unsigned int bw_reserved;
2139 unsigned int max_bandwidth;
2140 unsigned int bw_used;
2141 unsigned int block_size;
2142 struct xhci_interval_bw_table *bw_table;
2143 unsigned int packet_size = 0;
2144 unsigned int overhead = 0;
2145 unsigned int packets_transmitted = 0;
2146 unsigned int packets_remaining = 0;
2149 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2150 return xhci_check_ss_bw(xhci, virt_dev);
2152 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2153 max_bandwidth = HS_BW_LIMIT;
2154 /* Convert percent of bus BW reserved to blocks reserved */
2155 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2157 max_bandwidth = FS_BW_LIMIT;
2158 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2161 bw_table = virt_dev->bw_table;
2162 /* We need to translate the max packet size and max ESIT payloads into
2163 * the units the hardware uses.
2165 block_size = xhci_get_block_size(virt_dev->udev);
2167 /* If we are manipulating a LS/FS device under a HS hub, double check
2168 * that the HS bus has enough bandwidth if we are activing a new TT.
2170 if (virt_dev->tt_info) {
2171 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2172 "Recalculating BW for rootport %u",
2173 virt_dev->real_port);
2174 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2175 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2176 "newly activated TT.\n");
2179 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2180 "Recalculating BW for TT slot %u port %u",
2181 virt_dev->tt_info->slot_id,
2182 virt_dev->tt_info->ttport);
2184 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2185 "Recalculating BW for rootport %u",
2186 virt_dev->real_port);
2189 /* Add in how much bandwidth will be used for interval zero, or the
2190 * rounded max ESIT payload + number of packets * largest overhead.
2192 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2193 bw_table->interval_bw[0].num_packets *
2194 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2196 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2197 unsigned int bw_added;
2198 unsigned int largest_mps;
2199 unsigned int interval_overhead;
2202 * How many packets could we transmit in this interval?
2203 * If packets didn't fit in the previous interval, we will need
2204 * to transmit that many packets twice within this interval.
2206 packets_remaining = 2 * packets_remaining +
2207 bw_table->interval_bw[i].num_packets;
2209 /* Find the largest max packet size of this or the previous
2212 if (list_empty(&bw_table->interval_bw[i].endpoints))
2215 struct xhci_virt_ep *virt_ep;
2216 struct list_head *ep_entry;
2218 ep_entry = bw_table->interval_bw[i].endpoints.next;
2219 virt_ep = list_entry(ep_entry,
2220 struct xhci_virt_ep, bw_endpoint_list);
2221 /* Convert to blocks, rounding up */
2222 largest_mps = DIV_ROUND_UP(
2223 virt_ep->bw_info.max_packet_size,
2226 if (largest_mps > packet_size)
2227 packet_size = largest_mps;
2229 /* Use the larger overhead of this or the previous interval. */
2230 interval_overhead = xhci_get_largest_overhead(
2231 &bw_table->interval_bw[i]);
2232 if (interval_overhead > overhead)
2233 overhead = interval_overhead;
2235 /* How many packets can we evenly distribute across
2236 * (1 << (i + 1)) possible scheduling opportunities?
2238 packets_transmitted = packets_remaining >> (i + 1);
2240 /* Add in the bandwidth used for those scheduled packets */
2241 bw_added = packets_transmitted * (overhead + packet_size);
2243 /* How many packets do we have remaining to transmit? */
2244 packets_remaining = packets_remaining % (1 << (i + 1));
2246 /* What largest max packet size should those packets have? */
2247 /* If we've transmitted all packets, don't carry over the
2248 * largest packet size.
2250 if (packets_remaining == 0) {
2253 } else if (packets_transmitted > 0) {
2254 /* Otherwise if we do have remaining packets, and we've
2255 * scheduled some packets in this interval, take the
2256 * largest max packet size from endpoints with this
2259 packet_size = largest_mps;
2260 overhead = interval_overhead;
2262 /* Otherwise carry over packet_size and overhead from the last
2263 * time we had a remainder.
2265 bw_used += bw_added;
2266 if (bw_used > max_bandwidth) {
2267 xhci_warn(xhci, "Not enough bandwidth. "
2268 "Proposed: %u, Max: %u\n",
2269 bw_used, max_bandwidth);
2274 * Ok, we know we have some packets left over after even-handedly
2275 * scheduling interval 15. We don't know which microframes they will
2276 * fit into, so we over-schedule and say they will be scheduled every
2279 if (packets_remaining > 0)
2280 bw_used += overhead + packet_size;
2282 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2283 unsigned int port_index = virt_dev->real_port - 1;
2285 /* OK, we're manipulating a HS device attached to a
2286 * root port bandwidth domain. Include the number of active TTs
2287 * in the bandwidth used.
2289 bw_used += TT_HS_OVERHEAD *
2290 xhci->rh_bw[port_index].num_active_tts;
2293 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2294 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2295 "Available: %u " "percent",
2296 bw_used, max_bandwidth, bw_reserved,
2297 (max_bandwidth - bw_used - bw_reserved) * 100 /
2300 bw_used += bw_reserved;
2301 if (bw_used > max_bandwidth) {
2302 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2303 bw_used, max_bandwidth);
2307 bw_table->bw_used = bw_used;
2311 static bool xhci_is_async_ep(unsigned int ep_type)
2313 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2314 ep_type != ISOC_IN_EP &&
2315 ep_type != INT_IN_EP);
2318 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2320 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2323 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2325 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2327 if (ep_bw->ep_interval == 0)
2328 return SS_OVERHEAD_BURST +
2329 (ep_bw->mult * ep_bw->num_packets *
2330 (SS_OVERHEAD + mps));
2331 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2332 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2333 1 << ep_bw->ep_interval);
2337 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2338 struct xhci_bw_info *ep_bw,
2339 struct xhci_interval_bw_table *bw_table,
2340 struct usb_device *udev,
2341 struct xhci_virt_ep *virt_ep,
2342 struct xhci_tt_bw_info *tt_info)
2344 struct xhci_interval_bw *interval_bw;
2345 int normalized_interval;
2347 if (xhci_is_async_ep(ep_bw->type))
2350 if (udev->speed == USB_SPEED_SUPER) {
2351 if (xhci_is_sync_in_ep(ep_bw->type))
2352 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2353 xhci_get_ss_bw_consumed(ep_bw);
2355 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2356 xhci_get_ss_bw_consumed(ep_bw);
2360 /* SuperSpeed endpoints never get added to intervals in the table, so
2361 * this check is only valid for HS/FS/LS devices.
2363 if (list_empty(&virt_ep->bw_endpoint_list))
2365 /* For LS/FS devices, we need to translate the interval expressed in
2366 * microframes to frames.
2368 if (udev->speed == USB_SPEED_HIGH)
2369 normalized_interval = ep_bw->ep_interval;
2371 normalized_interval = ep_bw->ep_interval - 3;
2373 if (normalized_interval == 0)
2374 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2375 interval_bw = &bw_table->interval_bw[normalized_interval];
2376 interval_bw->num_packets -= ep_bw->num_packets;
2377 switch (udev->speed) {
2379 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2381 case USB_SPEED_FULL:
2382 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2384 case USB_SPEED_HIGH:
2385 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2387 case USB_SPEED_SUPER:
2388 case USB_SPEED_UNKNOWN:
2389 case USB_SPEED_WIRELESS:
2390 /* Should never happen because only LS/FS/HS endpoints will get
2391 * added to the endpoint list.
2396 tt_info->active_eps -= 1;
2397 list_del_init(&virt_ep->bw_endpoint_list);
2400 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2401 struct xhci_bw_info *ep_bw,
2402 struct xhci_interval_bw_table *bw_table,
2403 struct usb_device *udev,
2404 struct xhci_virt_ep *virt_ep,
2405 struct xhci_tt_bw_info *tt_info)
2407 struct xhci_interval_bw *interval_bw;
2408 struct xhci_virt_ep *smaller_ep;
2409 int normalized_interval;
2411 if (xhci_is_async_ep(ep_bw->type))
2414 if (udev->speed == USB_SPEED_SUPER) {
2415 if (xhci_is_sync_in_ep(ep_bw->type))
2416 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2417 xhci_get_ss_bw_consumed(ep_bw);
2419 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2420 xhci_get_ss_bw_consumed(ep_bw);
2424 /* For LS/FS devices, we need to translate the interval expressed in
2425 * microframes to frames.
2427 if (udev->speed == USB_SPEED_HIGH)
2428 normalized_interval = ep_bw->ep_interval;
2430 normalized_interval = ep_bw->ep_interval - 3;
2432 if (normalized_interval == 0)
2433 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2434 interval_bw = &bw_table->interval_bw[normalized_interval];
2435 interval_bw->num_packets += ep_bw->num_packets;
2436 switch (udev->speed) {
2438 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2440 case USB_SPEED_FULL:
2441 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2443 case USB_SPEED_HIGH:
2444 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2446 case USB_SPEED_SUPER:
2447 case USB_SPEED_UNKNOWN:
2448 case USB_SPEED_WIRELESS:
2449 /* Should never happen because only LS/FS/HS endpoints will get
2450 * added to the endpoint list.
2456 tt_info->active_eps += 1;
2457 /* Insert the endpoint into the list, largest max packet size first. */
2458 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2460 if (ep_bw->max_packet_size >=
2461 smaller_ep->bw_info.max_packet_size) {
2462 /* Add the new ep before the smaller endpoint */
2463 list_add_tail(&virt_ep->bw_endpoint_list,
2464 &smaller_ep->bw_endpoint_list);
2468 /* Add the new endpoint at the end of the list. */
2469 list_add_tail(&virt_ep->bw_endpoint_list,
2470 &interval_bw->endpoints);
2473 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2474 struct xhci_virt_device *virt_dev,
2477 struct xhci_root_port_bw_info *rh_bw_info;
2478 if (!virt_dev->tt_info)
2481 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2482 if (old_active_eps == 0 &&
2483 virt_dev->tt_info->active_eps != 0) {
2484 rh_bw_info->num_active_tts += 1;
2485 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2486 } else if (old_active_eps != 0 &&
2487 virt_dev->tt_info->active_eps == 0) {
2488 rh_bw_info->num_active_tts -= 1;
2489 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2493 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2494 struct xhci_virt_device *virt_dev,
2495 struct xhci_container_ctx *in_ctx)
2497 struct xhci_bw_info ep_bw_info[31];
2499 struct xhci_input_control_ctx *ctrl_ctx;
2500 int old_active_eps = 0;
2502 if (virt_dev->tt_info)
2503 old_active_eps = virt_dev->tt_info->active_eps;
2505 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2507 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2512 for (i = 0; i < 31; i++) {
2513 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2516 /* Make a copy of the BW info in case we need to revert this */
2517 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2518 sizeof(ep_bw_info[i]));
2519 /* Drop the endpoint from the interval table if the endpoint is
2520 * being dropped or changed.
2522 if (EP_IS_DROPPED(ctrl_ctx, i))
2523 xhci_drop_ep_from_interval_table(xhci,
2524 &virt_dev->eps[i].bw_info,
2530 /* Overwrite the information stored in the endpoints' bw_info */
2531 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2532 for (i = 0; i < 31; i++) {
2533 /* Add any changed or added endpoints to the interval table */
2534 if (EP_IS_ADDED(ctrl_ctx, i))
2535 xhci_add_ep_to_interval_table(xhci,
2536 &virt_dev->eps[i].bw_info,
2543 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2544 /* Ok, this fits in the bandwidth we have.
2545 * Update the number of active TTs.
2547 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2551 /* We don't have enough bandwidth for this, revert the stored info. */
2552 for (i = 0; i < 31; i++) {
2553 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2556 /* Drop the new copies of any added or changed endpoints from
2557 * the interval table.
2559 if (EP_IS_ADDED(ctrl_ctx, i)) {
2560 xhci_drop_ep_from_interval_table(xhci,
2561 &virt_dev->eps[i].bw_info,
2567 /* Revert the endpoint back to its old information */
2568 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2569 sizeof(ep_bw_info[i]));
2570 /* Add any changed or dropped endpoints back into the table */
2571 if (EP_IS_DROPPED(ctrl_ctx, i))
2572 xhci_add_ep_to_interval_table(xhci,
2573 &virt_dev->eps[i].bw_info,
2583 /* Issue a configure endpoint command or evaluate context command
2584 * and wait for it to finish.
2586 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2587 struct usb_device *udev,
2588 struct xhci_command *command,
2589 bool ctx_change, bool must_succeed)
2592 unsigned long flags;
2593 struct xhci_input_control_ctx *ctrl_ctx;
2594 struct xhci_virt_device *virt_dev;
2599 spin_lock_irqsave(&xhci->lock, flags);
2600 virt_dev = xhci->devs[udev->slot_id];
2602 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2604 spin_unlock_irqrestore(&xhci->lock, flags);
2605 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2610 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2611 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2612 spin_unlock_irqrestore(&xhci->lock, flags);
2613 xhci_warn(xhci, "Not enough host resources, "
2614 "active endpoint contexts = %u\n",
2615 xhci->num_active_eps);
2618 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2619 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2620 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2621 xhci_free_host_resources(xhci, ctrl_ctx);
2622 spin_unlock_irqrestore(&xhci->lock, flags);
2623 xhci_warn(xhci, "Not enough bandwidth\n");
2628 ret = xhci_queue_configure_endpoint(xhci, command,
2629 command->in_ctx->dma,
2630 udev->slot_id, must_succeed);
2632 ret = xhci_queue_evaluate_context(xhci, command,
2633 command->in_ctx->dma,
2634 udev->slot_id, must_succeed);
2636 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2637 xhci_free_host_resources(xhci, ctrl_ctx);
2638 spin_unlock_irqrestore(&xhci->lock, flags);
2639 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2640 "FIXME allocate a new ring segment");
2643 xhci_ring_cmd_db(xhci);
2644 spin_unlock_irqrestore(&xhci->lock, flags);
2646 /* Wait for the configure endpoint command to complete */
2647 wait_for_completion(command->completion);
2650 ret = xhci_configure_endpoint_result(xhci, udev,
2653 ret = xhci_evaluate_context_result(xhci, udev,
2656 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2657 spin_lock_irqsave(&xhci->lock, flags);
2658 /* If the command failed, remove the reserved resources.
2659 * Otherwise, clean up the estimate to include dropped eps.
2662 xhci_free_host_resources(xhci, ctrl_ctx);
2664 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2665 spin_unlock_irqrestore(&xhci->lock, flags);
2670 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2671 struct xhci_virt_device *vdev, int i)
2673 struct xhci_virt_ep *ep = &vdev->eps[i];
2675 if (ep->ep_state & EP_HAS_STREAMS) {
2676 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2677 xhci_get_endpoint_address(i));
2678 xhci_free_stream_info(xhci, ep->stream_info);
2679 ep->stream_info = NULL;
2680 ep->ep_state &= ~EP_HAS_STREAMS;
2684 /* Called after one or more calls to xhci_add_endpoint() or
2685 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2686 * to call xhci_reset_bandwidth().
2688 * Since we are in the middle of changing either configuration or
2689 * installing a new alt setting, the USB core won't allow URBs to be
2690 * enqueued for any endpoint on the old config or interface. Nothing
2691 * else should be touching the xhci->devs[slot_id] structure, so we
2692 * don't need to take the xhci->lock for manipulating that.
2694 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2698 struct xhci_hcd *xhci;
2699 struct xhci_virt_device *virt_dev;
2700 struct xhci_input_control_ctx *ctrl_ctx;
2701 struct xhci_slot_ctx *slot_ctx;
2702 struct xhci_command *command;
2704 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2707 xhci = hcd_to_xhci(hcd);
2708 if (xhci->xhc_state & XHCI_STATE_DYING)
2711 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2712 virt_dev = xhci->devs[udev->slot_id];
2714 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2718 command->in_ctx = virt_dev->in_ctx;
2720 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2721 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2723 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2726 goto command_cleanup;
2728 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2729 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2730 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2732 /* Don't issue the command if there's no endpoints to update. */
2733 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2734 ctrl_ctx->drop_flags == 0) {
2736 goto command_cleanup;
2738 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2739 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2740 for (i = 31; i >= 1; i--) {
2741 __le32 le32 = cpu_to_le32(BIT(i));
2743 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2744 || (ctrl_ctx->add_flags & le32) || i == 1) {
2745 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2746 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2750 xhci_dbg(xhci, "New Input Control Context:\n");
2751 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2752 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2754 ret = xhci_configure_endpoint(xhci, udev, command,
2757 /* Callee should call reset_bandwidth() */
2758 goto command_cleanup;
2760 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2761 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2762 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2764 /* Free any rings that were dropped, but not changed. */
2765 for (i = 1; i < 31; ++i) {
2766 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2767 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2768 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2769 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2772 xhci_zero_in_ctx(xhci, virt_dev);
2774 * Install any rings for completely new endpoints or changed endpoints,
2775 * and free or cache any old rings from changed endpoints.
2777 for (i = 1; i < 31; ++i) {
2778 if (!virt_dev->eps[i].new_ring)
2780 /* Only cache or free the old ring if it exists.
2781 * It may not if this is the first add of an endpoint.
2783 if (virt_dev->eps[i].ring) {
2784 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2786 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2787 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2788 virt_dev->eps[i].new_ring = NULL;
2791 kfree(command->completion);
2797 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2799 struct xhci_hcd *xhci;
2800 struct xhci_virt_device *virt_dev;
2803 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2806 xhci = hcd_to_xhci(hcd);
2808 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2809 virt_dev = xhci->devs[udev->slot_id];
2810 /* Free any rings allocated for added endpoints */
2811 for (i = 0; i < 31; ++i) {
2812 if (virt_dev->eps[i].new_ring) {
2813 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2814 virt_dev->eps[i].new_ring = NULL;
2817 xhci_zero_in_ctx(xhci, virt_dev);
2820 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2821 struct xhci_container_ctx *in_ctx,
2822 struct xhci_container_ctx *out_ctx,
2823 struct xhci_input_control_ctx *ctrl_ctx,
2824 u32 add_flags, u32 drop_flags)
2826 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2827 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2828 xhci_slot_copy(xhci, in_ctx, out_ctx);
2829 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2831 xhci_dbg(xhci, "Input Context:\n");
2832 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2835 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2836 unsigned int slot_id, unsigned int ep_index,
2837 struct xhci_dequeue_state *deq_state)
2839 struct xhci_input_control_ctx *ctrl_ctx;
2840 struct xhci_container_ctx *in_ctx;
2841 struct xhci_ep_ctx *ep_ctx;
2845 in_ctx = xhci->devs[slot_id]->in_ctx;
2846 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2848 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2853 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2854 xhci->devs[slot_id]->out_ctx, ep_index);
2855 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2856 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2857 deq_state->new_deq_ptr);
2859 xhci_warn(xhci, "WARN Cannot submit config ep after "
2860 "reset ep command\n");
2861 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2862 deq_state->new_deq_seg,
2863 deq_state->new_deq_ptr);
2866 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2868 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2869 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2870 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2871 added_ctxs, added_ctxs);
2874 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2875 struct usb_device *udev, unsigned int ep_index)
2877 struct xhci_dequeue_state deq_state;
2878 struct xhci_virt_ep *ep;
2880 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2881 "Cleaning up stalled endpoint ring");
2882 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2883 /* We need to move the HW's dequeue pointer past this TD,
2884 * or it will attempt to resend it on the next doorbell ring.
2886 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2887 ep_index, ep->stopped_stream, ep->stopped_td,
2890 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2893 /* HW with the reset endpoint quirk will use the saved dequeue state to
2894 * issue a configure endpoint command later.
2896 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2897 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2898 "Queueing new dequeue state");
2899 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2900 ep_index, ep->stopped_stream, &deq_state);
2902 /* Better hope no one uses the input context between now and the
2903 * reset endpoint completion!
2904 * XXX: No idea how this hardware will react when stream rings
2907 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2908 "Setting up input context for "
2909 "configure endpoint command");
2910 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2911 ep_index, &deq_state);
2915 /* Deal with stalled endpoints. The core should have sent the control message
2916 * to clear the halt condition. However, we need to make the xHCI hardware
2917 * reset its sequence number, since a device will expect a sequence number of
2918 * zero after the halt condition is cleared.
2919 * Context: in_interrupt
2921 void xhci_endpoint_reset(struct usb_hcd *hcd,
2922 struct usb_host_endpoint *ep)
2924 struct xhci_hcd *xhci;
2925 struct usb_device *udev;
2926 unsigned int ep_index;
2927 unsigned long flags;
2929 struct xhci_virt_ep *virt_ep;
2930 struct xhci_command *command;
2932 xhci = hcd_to_xhci(hcd);
2933 udev = (struct usb_device *) ep->hcpriv;
2934 /* Called with a root hub endpoint (or an endpoint that wasn't added
2935 * with xhci_add_endpoint()
2939 ep_index = xhci_get_endpoint_index(&ep->desc);
2940 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2941 if (!virt_ep->stopped_td) {
2942 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2943 "Endpoint 0x%x not halted, refusing to reset.",
2944 ep->desc.bEndpointAddress);
2947 if (usb_endpoint_xfer_control(&ep->desc)) {
2948 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2949 "Control endpoint stall already handled.");
2953 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2957 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2958 "Queueing reset endpoint command");
2959 spin_lock_irqsave(&xhci->lock, flags);
2960 ret = xhci_queue_reset_ep(xhci, command, udev->slot_id, ep_index);
2962 * Can't change the ring dequeue pointer until it's transitioned to the
2963 * stopped state, which is only upon a successful reset endpoint
2964 * command. Better hope that last command worked!
2967 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2968 kfree(virt_ep->stopped_td);
2969 xhci_ring_cmd_db(xhci);
2971 virt_ep->stopped_td = NULL;
2972 virt_ep->stopped_stream = 0;
2973 spin_unlock_irqrestore(&xhci->lock, flags);
2976 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2979 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2980 struct usb_device *udev, struct usb_host_endpoint *ep,
2981 unsigned int slot_id)
2984 unsigned int ep_index;
2985 unsigned int ep_state;
2989 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2992 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2993 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2994 " descriptor for ep 0x%x does not support streams\n",
2995 ep->desc.bEndpointAddress);
2999 ep_index = xhci_get_endpoint_index(&ep->desc);
3000 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3001 if (ep_state & EP_HAS_STREAMS ||
3002 ep_state & EP_GETTING_STREAMS) {
3003 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3004 "already has streams set up.\n",
3005 ep->desc.bEndpointAddress);
3006 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3007 "dynamic stream context array reallocation.\n");
3010 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3011 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3012 "endpoint 0x%x; URBs are pending.\n",
3013 ep->desc.bEndpointAddress);
3019 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3020 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3022 unsigned int max_streams;
3024 /* The stream context array size must be a power of two */
3025 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3027 * Find out how many primary stream array entries the host controller
3028 * supports. Later we may use secondary stream arrays (similar to 2nd
3029 * level page entries), but that's an optional feature for xHCI host
3030 * controllers. xHCs must support at least 4 stream IDs.
3032 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3033 if (*num_stream_ctxs > max_streams) {
3034 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3036 *num_stream_ctxs = max_streams;
3037 *num_streams = max_streams;
3041 /* Returns an error code if one of the endpoint already has streams.
3042 * This does not change any data structures, it only checks and gathers
3045 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3046 struct usb_device *udev,
3047 struct usb_host_endpoint **eps, unsigned int num_eps,
3048 unsigned int *num_streams, u32 *changed_ep_bitmask)
3050 unsigned int max_streams;
3051 unsigned int endpoint_flag;
3055 for (i = 0; i < num_eps; i++) {
3056 ret = xhci_check_streams_endpoint(xhci, udev,
3057 eps[i], udev->slot_id);
3061 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3062 if (max_streams < (*num_streams - 1)) {
3063 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3064 eps[i]->desc.bEndpointAddress,
3066 *num_streams = max_streams+1;
3069 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3070 if (*changed_ep_bitmask & endpoint_flag)
3072 *changed_ep_bitmask |= endpoint_flag;
3077 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3078 struct usb_device *udev,
3079 struct usb_host_endpoint **eps, unsigned int num_eps)
3081 u32 changed_ep_bitmask = 0;
3082 unsigned int slot_id;
3083 unsigned int ep_index;
3084 unsigned int ep_state;
3087 slot_id = udev->slot_id;
3088 if (!xhci->devs[slot_id])
3091 for (i = 0; i < num_eps; i++) {
3092 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3093 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3094 /* Are streams already being freed for the endpoint? */
3095 if (ep_state & EP_GETTING_NO_STREAMS) {
3096 xhci_warn(xhci, "WARN Can't disable streams for "
3098 "streams are being disabled already\n",
3099 eps[i]->desc.bEndpointAddress);
3102 /* Are there actually any streams to free? */
3103 if (!(ep_state & EP_HAS_STREAMS) &&
3104 !(ep_state & EP_GETTING_STREAMS)) {
3105 xhci_warn(xhci, "WARN Can't disable streams for "
3107 "streams are already disabled!\n",
3108 eps[i]->desc.bEndpointAddress);
3109 xhci_warn(xhci, "WARN xhci_free_streams() called "
3110 "with non-streams endpoint\n");
3113 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3115 return changed_ep_bitmask;
3119 * The USB device drivers use this function (though the HCD interface in USB
3120 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3121 * coordinate mass storage command queueing across multiple endpoints (basically
3122 * a stream ID == a task ID).
3124 * Setting up streams involves allocating the same size stream context array
3125 * for each endpoint and issuing a configure endpoint command for all endpoints.
3127 * Don't allow the call to succeed if one endpoint only supports one stream
3128 * (which means it doesn't support streams at all).
3130 * Drivers may get less stream IDs than they asked for, if the host controller
3131 * hardware or endpoints claim they can't support the number of requested
3134 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3135 struct usb_host_endpoint **eps, unsigned int num_eps,
3136 unsigned int num_streams, gfp_t mem_flags)
3139 struct xhci_hcd *xhci;
3140 struct xhci_virt_device *vdev;
3141 struct xhci_command *config_cmd;
3142 struct xhci_input_control_ctx *ctrl_ctx;
3143 unsigned int ep_index;
3144 unsigned int num_stream_ctxs;
3145 unsigned long flags;
3146 u32 changed_ep_bitmask = 0;
3151 /* Add one to the number of streams requested to account for
3152 * stream 0 that is reserved for xHCI usage.
3155 xhci = hcd_to_xhci(hcd);
3156 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3159 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3160 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3161 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3162 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3166 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3168 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3171 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3173 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3175 xhci_free_command(xhci, config_cmd);
3179 /* Check to make sure all endpoints are not already configured for
3180 * streams. While we're at it, find the maximum number of streams that
3181 * all the endpoints will support and check for duplicate endpoints.
3183 spin_lock_irqsave(&xhci->lock, flags);
3184 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3185 num_eps, &num_streams, &changed_ep_bitmask);
3187 xhci_free_command(xhci, config_cmd);
3188 spin_unlock_irqrestore(&xhci->lock, flags);
3191 if (num_streams <= 1) {
3192 xhci_warn(xhci, "WARN: endpoints can't handle "
3193 "more than one stream.\n");
3194 xhci_free_command(xhci, config_cmd);
3195 spin_unlock_irqrestore(&xhci->lock, flags);
3198 vdev = xhci->devs[udev->slot_id];
3199 /* Mark each endpoint as being in transition, so
3200 * xhci_urb_enqueue() will reject all URBs.
3202 for (i = 0; i < num_eps; i++) {
3203 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3204 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3206 spin_unlock_irqrestore(&xhci->lock, flags);
3208 /* Setup internal data structures and allocate HW data structures for
3209 * streams (but don't install the HW structures in the input context
3210 * until we're sure all memory allocation succeeded).
3212 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3213 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3214 num_stream_ctxs, num_streams);
3216 for (i = 0; i < num_eps; i++) {
3217 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3218 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3220 num_streams, mem_flags);
3221 if (!vdev->eps[ep_index].stream_info)
3223 /* Set maxPstreams in endpoint context and update deq ptr to
3224 * point to stream context array. FIXME
3228 /* Set up the input context for a configure endpoint command. */
3229 for (i = 0; i < num_eps; i++) {
3230 struct xhci_ep_ctx *ep_ctx;
3232 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3233 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3235 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3236 vdev->out_ctx, ep_index);
3237 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3238 vdev->eps[ep_index].stream_info);
3240 /* Tell the HW to drop its old copy of the endpoint context info
3241 * and add the updated copy from the input context.
3243 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3244 vdev->out_ctx, ctrl_ctx,
3245 changed_ep_bitmask, changed_ep_bitmask);
3247 /* Issue and wait for the configure endpoint command */
3248 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3251 /* xHC rejected the configure endpoint command for some reason, so we
3252 * leave the old ring intact and free our internal streams data
3258 spin_lock_irqsave(&xhci->lock, flags);
3259 for (i = 0; i < num_eps; i++) {
3260 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3261 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3262 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3263 udev->slot_id, ep_index);
3264 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3266 xhci_free_command(xhci, config_cmd);
3267 spin_unlock_irqrestore(&xhci->lock, flags);
3269 /* Subtract 1 for stream 0, which drivers can't use */
3270 return num_streams - 1;
3273 /* If it didn't work, free the streams! */
3274 for (i = 0; i < num_eps; i++) {
3275 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3276 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3277 vdev->eps[ep_index].stream_info = NULL;
3278 /* FIXME Unset maxPstreams in endpoint context and
3279 * update deq ptr to point to normal string ring.
3281 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3282 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3283 xhci_endpoint_zero(xhci, vdev, eps[i]);
3285 xhci_free_command(xhci, config_cmd);
3289 /* Transition the endpoint from using streams to being a "normal" endpoint
3292 * Modify the endpoint context state, submit a configure endpoint command,
3293 * and free all endpoint rings for streams if that completes successfully.
3295 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3296 struct usb_host_endpoint **eps, unsigned int num_eps,
3300 struct xhci_hcd *xhci;
3301 struct xhci_virt_device *vdev;
3302 struct xhci_command *command;
3303 struct xhci_input_control_ctx *ctrl_ctx;
3304 unsigned int ep_index;
3305 unsigned long flags;
3306 u32 changed_ep_bitmask;
3308 xhci = hcd_to_xhci(hcd);
3309 vdev = xhci->devs[udev->slot_id];
3311 /* Set up a configure endpoint command to remove the streams rings */
3312 spin_lock_irqsave(&xhci->lock, flags);
3313 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3314 udev, eps, num_eps);
3315 if (changed_ep_bitmask == 0) {
3316 spin_unlock_irqrestore(&xhci->lock, flags);
3320 /* Use the xhci_command structure from the first endpoint. We may have
3321 * allocated too many, but the driver may call xhci_free_streams() for
3322 * each endpoint it grouped into one call to xhci_alloc_streams().
3324 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3325 command = vdev->eps[ep_index].stream_info->free_streams_command;
3326 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3328 spin_unlock_irqrestore(&xhci->lock, flags);
3329 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3334 for (i = 0; i < num_eps; i++) {
3335 struct xhci_ep_ctx *ep_ctx;
3337 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3338 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3339 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3340 EP_GETTING_NO_STREAMS;
3342 xhci_endpoint_copy(xhci, command->in_ctx,
3343 vdev->out_ctx, ep_index);
3344 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3345 &vdev->eps[ep_index]);
3347 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3348 vdev->out_ctx, ctrl_ctx,
3349 changed_ep_bitmask, changed_ep_bitmask);
3350 spin_unlock_irqrestore(&xhci->lock, flags);
3352 /* Issue and wait for the configure endpoint command,
3353 * which must succeed.
3355 ret = xhci_configure_endpoint(xhci, udev, command,
3358 /* xHC rejected the configure endpoint command for some reason, so we
3359 * leave the streams rings intact.
3364 spin_lock_irqsave(&xhci->lock, flags);
3365 for (i = 0; i < num_eps; i++) {
3366 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3367 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3368 vdev->eps[ep_index].stream_info = NULL;
3369 /* FIXME Unset maxPstreams in endpoint context and
3370 * update deq ptr to point to normal string ring.
3372 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3373 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3375 spin_unlock_irqrestore(&xhci->lock, flags);
3381 * Deletes endpoint resources for endpoints that were active before a Reset
3382 * Device command, or a Disable Slot command. The Reset Device command leaves
3383 * the control endpoint intact, whereas the Disable Slot command deletes it.
3385 * Must be called with xhci->lock held.
3387 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3388 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3391 unsigned int num_dropped_eps = 0;
3392 unsigned int drop_flags = 0;
3394 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3395 if (virt_dev->eps[i].ring) {
3396 drop_flags |= 1 << i;
3400 xhci->num_active_eps -= num_dropped_eps;
3401 if (num_dropped_eps)
3402 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3403 "Dropped %u ep ctxs, flags = 0x%x, "
3405 num_dropped_eps, drop_flags,
3406 xhci->num_active_eps);
3410 * This submits a Reset Device Command, which will set the device state to 0,
3411 * set the device address to 0, and disable all the endpoints except the default
3412 * control endpoint. The USB core should come back and call
3413 * xhci_address_device(), and then re-set up the configuration. If this is
3414 * called because of a usb_reset_and_verify_device(), then the old alternate
3415 * settings will be re-installed through the normal bandwidth allocation
3418 * Wait for the Reset Device command to finish. Remove all structures
3419 * associated with the endpoints that were disabled. Clear the input device
3420 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3422 * If the virt_dev to be reset does not exist or does not match the udev,
3423 * it means the device is lost, possibly due to the xHC restore error and
3424 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3425 * re-allocate the device.
3427 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3430 unsigned long flags;
3431 struct xhci_hcd *xhci;
3432 unsigned int slot_id;
3433 struct xhci_virt_device *virt_dev;
3434 struct xhci_command *reset_device_cmd;
3435 int last_freed_endpoint;
3436 struct xhci_slot_ctx *slot_ctx;
3437 int old_active_eps = 0;
3439 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3442 xhci = hcd_to_xhci(hcd);
3443 slot_id = udev->slot_id;
3444 virt_dev = xhci->devs[slot_id];
3446 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3447 "not exist. Re-allocate the device\n", slot_id);
3448 ret = xhci_alloc_dev(hcd, udev);
3455 if (virt_dev->udev != udev) {
3456 /* If the virt_dev and the udev does not match, this virt_dev
3457 * may belong to another udev.
3458 * Re-allocate the device.
3460 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3461 "not match the udev. Re-allocate the device\n",
3463 ret = xhci_alloc_dev(hcd, udev);
3470 /* If device is not setup, there is no point in resetting it */
3471 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3472 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3473 SLOT_STATE_DISABLED)
3476 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3477 /* Allocate the command structure that holds the struct completion.
3478 * Assume we're in process context, since the normal device reset
3479 * process has to wait for the device anyway. Storage devices are
3480 * reset as part of error handling, so use GFP_NOIO instead of
3483 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3484 if (!reset_device_cmd) {
3485 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3489 /* Attempt to submit the Reset Device command to the command ring */
3490 spin_lock_irqsave(&xhci->lock, flags);
3492 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3494 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3495 spin_unlock_irqrestore(&xhci->lock, flags);
3496 goto command_cleanup;
3498 xhci_ring_cmd_db(xhci);
3499 spin_unlock_irqrestore(&xhci->lock, flags);
3501 /* Wait for the Reset Device command to finish */
3502 wait_for_completion(reset_device_cmd->completion);
3504 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3505 * unless we tried to reset a slot ID that wasn't enabled,
3506 * or the device wasn't in the addressed or configured state.
3508 ret = reset_device_cmd->status;
3510 case COMP_CMD_ABORT:
3512 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3514 goto command_cleanup;
3515 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3516 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3517 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3519 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3520 xhci_dbg(xhci, "Not freeing device rings.\n");
3521 /* Don't treat this as an error. May change my mind later. */
3523 goto command_cleanup;
3525 xhci_dbg(xhci, "Successful reset device command.\n");
3528 if (xhci_is_vendor_info_code(xhci, ret))
3530 xhci_warn(xhci, "Unknown completion code %u for "
3531 "reset device command.\n", ret);
3533 goto command_cleanup;
3536 /* Free up host controller endpoint resources */
3537 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3538 spin_lock_irqsave(&xhci->lock, flags);
3539 /* Don't delete the default control endpoint resources */
3540 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3541 spin_unlock_irqrestore(&xhci->lock, flags);
3544 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3545 last_freed_endpoint = 1;
3546 for (i = 1; i < 31; ++i) {
3547 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3549 if (ep->ep_state & EP_HAS_STREAMS) {
3550 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3551 xhci_get_endpoint_address(i));
3552 xhci_free_stream_info(xhci, ep->stream_info);
3553 ep->stream_info = NULL;
3554 ep->ep_state &= ~EP_HAS_STREAMS;
3558 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3559 last_freed_endpoint = i;
3561 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3562 xhci_drop_ep_from_interval_table(xhci,
3563 &virt_dev->eps[i].bw_info,
3568 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3570 /* If necessary, update the number of active TTs on this root port */
3571 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3573 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3574 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3578 xhci_free_command(xhci, reset_device_cmd);
3583 * At this point, the struct usb_device is about to go away, the device has
3584 * disconnected, and all traffic has been stopped and the endpoints have been
3585 * disabled. Free any HC data structures associated with that device.
3587 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3589 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3590 struct xhci_virt_device *virt_dev;
3591 unsigned long flags;
3594 struct xhci_command *command;
3596 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3600 #ifndef CONFIG_USB_DEFAULT_PERSIST
3602 * We called pm_runtime_get_noresume when the device was attached.
3603 * Decrement the counter here to allow controller to runtime suspend
3604 * if no devices remain.
3606 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3607 pm_runtime_put_noidle(hcd->self.controller);
3610 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3611 /* If the host is halted due to driver unload, we still need to free the
3614 if (ret <= 0 && ret != -ENODEV) {
3619 virt_dev = xhci->devs[udev->slot_id];
3621 /* Stop any wayward timer functions (which may grab the lock) */
3622 for (i = 0; i < 31; ++i) {
3623 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3624 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3627 spin_lock_irqsave(&xhci->lock, flags);
3628 /* Don't disable the slot if the host controller is dead. */
3629 state = readl(&xhci->op_regs->status);
3630 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3631 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3632 xhci_free_virt_device(xhci, udev->slot_id);
3633 spin_unlock_irqrestore(&xhci->lock, flags);
3638 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3640 spin_unlock_irqrestore(&xhci->lock, flags);
3641 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3644 xhci_ring_cmd_db(xhci);
3645 spin_unlock_irqrestore(&xhci->lock, flags);
3648 * Event command completion handler will free any data structures
3649 * associated with the slot. XXX Can free sleep?
3654 * Checks if we have enough host controller resources for the default control
3657 * Must be called with xhci->lock held.
3659 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3661 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3662 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3663 "Not enough ep ctxs: "
3664 "%u active, need to add 1, limit is %u.",
3665 xhci->num_active_eps, xhci->limit_active_eps);
3668 xhci->num_active_eps += 1;
3669 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3670 "Adding 1 ep ctx, %u now active.",
3671 xhci->num_active_eps);
3677 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3678 * timed out, or allocating memory failed. Returns 1 on success.
3680 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3682 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3683 unsigned long flags;
3685 struct xhci_command *command;
3687 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3691 spin_lock_irqsave(&xhci->lock, flags);
3692 command->completion = &xhci->addr_dev;
3693 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3695 spin_unlock_irqrestore(&xhci->lock, flags);
3696 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3700 xhci_ring_cmd_db(xhci);
3701 spin_unlock_irqrestore(&xhci->lock, flags);
3703 wait_for_completion(command->completion);
3705 if (!xhci->slot_id || command->status != COMP_SUCCESS) {
3706 xhci_err(xhci, "Error while assigning device slot ID\n");
3707 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3709 readl(&xhci->cap_regs->hcs_params1)));
3714 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3715 spin_lock_irqsave(&xhci->lock, flags);
3716 ret = xhci_reserve_host_control_ep_resources(xhci);
3718 spin_unlock_irqrestore(&xhci->lock, flags);
3719 xhci_warn(xhci, "Not enough host resources, "
3720 "active endpoint contexts = %u\n",
3721 xhci->num_active_eps);
3724 spin_unlock_irqrestore(&xhci->lock, flags);
3726 /* Use GFP_NOIO, since this function can be called from
3727 * xhci_discover_or_reset_device(), which may be called as part of
3728 * mass storage driver error handling.
3730 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3731 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3734 udev->slot_id = xhci->slot_id;
3736 #ifndef CONFIG_USB_DEFAULT_PERSIST
3738 * If resetting upon resume, we can't put the controller into runtime
3739 * suspend if there is a device attached.
3741 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3742 pm_runtime_get_noresume(hcd->self.controller);
3747 /* Is this a LS or FS device under a HS hub? */
3748 /* Hub or peripherial? */
3752 /* Disable slot, if we can do it without mem alloc */
3753 spin_lock_irqsave(&xhci->lock, flags);
3754 command->completion = NULL;
3755 command->status = 0;
3756 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3758 xhci_ring_cmd_db(xhci);
3759 spin_unlock_irqrestore(&xhci->lock, flags);
3764 * Issue an Address Device command and optionally send a corresponding
3765 * SetAddress request to the device.
3766 * We should be protected by the usb_address0_mutex in hub_wq's hub_port_init,
3767 * so we should only issue and wait on one address command at the same time.
3769 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3770 enum xhci_setup_dev setup)
3772 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3773 unsigned long flags;
3774 struct xhci_virt_device *virt_dev;
3776 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3777 struct xhci_slot_ctx *slot_ctx;
3778 struct xhci_input_control_ctx *ctrl_ctx;
3780 struct xhci_command *command;
3782 if (!udev->slot_id) {
3783 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3784 "Bad Slot ID %d", udev->slot_id);
3788 virt_dev = xhci->devs[udev->slot_id];
3790 if (WARN_ON(!virt_dev)) {
3792 * In plug/unplug torture test with an NEC controller,
3793 * a zero-dereference was observed once due to virt_dev = 0.
3794 * Print useful debug rather than crash if it is observed again!
3796 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3801 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3805 command->in_ctx = virt_dev->in_ctx;
3806 command->completion = &xhci->addr_dev;
3808 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3809 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3811 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3817 * If this is the first Set Address since device plug-in or
3818 * virt_device realloaction after a resume with an xHCI power loss,
3819 * then set up the slot context.
3821 if (!slot_ctx->dev_info)
3822 xhci_setup_addressable_virt_dev(xhci, udev);
3823 /* Otherwise, update the control endpoint ring enqueue pointer. */
3825 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3826 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3827 ctrl_ctx->drop_flags = 0;
3829 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3830 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3831 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3832 le32_to_cpu(slot_ctx->dev_info) >> 27);
3834 spin_lock_irqsave(&xhci->lock, flags);
3835 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3836 udev->slot_id, setup);
3838 spin_unlock_irqrestore(&xhci->lock, flags);
3839 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3840 "FIXME: allocate a command ring segment");
3844 xhci_ring_cmd_db(xhci);
3845 spin_unlock_irqrestore(&xhci->lock, flags);
3847 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3848 wait_for_completion(command->completion);
3850 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3851 * the SetAddress() "recovery interval" required by USB and aborting the
3852 * command on a timeout.
3854 switch (command->status) {
3855 case COMP_CMD_ABORT:
3857 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3860 case COMP_CTX_STATE:
3862 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3863 act, udev->slot_id);
3867 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3871 dev_warn(&udev->dev,
3872 "ERROR: Incompatible device for setup %s command\n", act);
3876 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3877 "Successful setup %s command", act);
3881 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3882 act, command->status);
3883 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3884 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3885 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3893 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3894 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3895 "Op regs DCBAA ptr = %#016llx", temp_64);
3896 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3897 "Slot ID %d dcbaa entry @%p = %#016llx",
3899 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3900 (unsigned long long)
3901 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3902 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3903 "Output Context DMA address = %#08llx",
3904 (unsigned long long)virt_dev->out_ctx->dma);
3905 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3906 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3907 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3908 le32_to_cpu(slot_ctx->dev_info) >> 27);
3909 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3910 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3912 * USB core uses address 1 for the roothubs, so we add one to the
3913 * address given back to us by the HC.
3915 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3916 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3917 le32_to_cpu(slot_ctx->dev_info) >> 27);
3918 /* Zero the input context control for later use */
3919 ctrl_ctx->add_flags = 0;
3920 ctrl_ctx->drop_flags = 0;
3922 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3923 "Internal device address = %d",
3924 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3929 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3931 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3934 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3936 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3940 * Transfer the port index into real index in the HW port status
3941 * registers. Caculate offset between the port's PORTSC register
3942 * and port status base. Divide the number of per port register
3943 * to get the real index. The raw port number bases 1.
3945 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3947 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3948 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3949 __le32 __iomem *addr;
3952 if (hcd->speed != HCD_USB3)
3953 addr = xhci->usb2_ports[port1 - 1];
3955 addr = xhci->usb3_ports[port1 - 1];
3957 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3962 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3963 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3965 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3966 struct usb_device *udev, u16 max_exit_latency)
3968 struct xhci_virt_device *virt_dev;
3969 struct xhci_command *command;
3970 struct xhci_input_control_ctx *ctrl_ctx;
3971 struct xhci_slot_ctx *slot_ctx;
3972 unsigned long flags;
3975 spin_lock_irqsave(&xhci->lock, flags);
3977 virt_dev = xhci->devs[udev->slot_id];
3980 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3981 * xHC was re-initialized. Exit latency will be set later after
3982 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3985 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3986 spin_unlock_irqrestore(&xhci->lock, flags);
3990 /* Attempt to issue an Evaluate Context command to change the MEL. */
3991 command = xhci->lpm_command;
3992 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3994 spin_unlock_irqrestore(&xhci->lock, flags);
3995 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4000 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4001 spin_unlock_irqrestore(&xhci->lock, flags);
4003 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4004 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4005 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4006 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4008 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4009 "Set up evaluate context for LPM MEL change.");
4010 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4011 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4013 /* Issue and wait for the evaluate context command. */
4014 ret = xhci_configure_endpoint(xhci, udev, command,
4016 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4017 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4020 spin_lock_irqsave(&xhci->lock, flags);
4021 virt_dev->current_mel = max_exit_latency;
4022 spin_unlock_irqrestore(&xhci->lock, flags);
4027 #ifdef CONFIG_PM_RUNTIME
4029 /* BESL to HIRD Encoding array for USB2 LPM */
4030 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4031 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4033 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4034 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4035 struct usb_device *udev)
4037 int u2del, besl, besl_host;
4038 int besl_device = 0;
4041 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4042 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4044 if (field & USB_BESL_SUPPORT) {
4045 for (besl_host = 0; besl_host < 16; besl_host++) {
4046 if (xhci_besl_encoding[besl_host] >= u2del)
4049 /* Use baseline BESL value as default */
4050 if (field & USB_BESL_BASELINE_VALID)
4051 besl_device = USB_GET_BESL_BASELINE(field);
4052 else if (field & USB_BESL_DEEP_VALID)
4053 besl_device = USB_GET_BESL_DEEP(field);
4058 besl_host = (u2del - 51) / 75 + 1;
4061 besl = besl_host + besl_device;
4068 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4069 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4076 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4078 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4079 l1 = udev->l1_params.timeout / 256;
4081 /* device has preferred BESLD */
4082 if (field & USB_BESL_DEEP_VALID) {
4083 besld = USB_GET_BESL_DEEP(field);
4087 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4090 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4091 struct usb_device *udev, int enable)
4093 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4094 __le32 __iomem **port_array;
4095 __le32 __iomem *pm_addr, *hlpm_addr;
4096 u32 pm_val, hlpm_val, field;
4097 unsigned int port_num;
4098 unsigned long flags;
4099 int hird, exit_latency;
4102 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4106 if (!udev->parent || udev->parent->parent ||
4107 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4110 if (udev->usb2_hw_lpm_capable != 1)
4113 spin_lock_irqsave(&xhci->lock, flags);
4115 port_array = xhci->usb2_ports;
4116 port_num = udev->portnum - 1;
4117 pm_addr = port_array[port_num] + PORTPMSC;
4118 pm_val = readl(pm_addr);
4119 hlpm_addr = port_array[port_num] + PORTHLPMC;
4120 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4122 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4123 enable ? "enable" : "disable", port_num + 1);
4126 /* Host supports BESL timeout instead of HIRD */
4127 if (udev->usb2_hw_lpm_besl_capable) {
4128 /* if device doesn't have a preferred BESL value use a
4129 * default one which works with mixed HIRD and BESL
4130 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4132 if ((field & USB_BESL_SUPPORT) &&
4133 (field & USB_BESL_BASELINE_VALID))
4134 hird = USB_GET_BESL_BASELINE(field);
4136 hird = udev->l1_params.besl;
4138 exit_latency = xhci_besl_encoding[hird];
4139 spin_unlock_irqrestore(&xhci->lock, flags);
4141 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4142 * input context for link powermanagement evaluate
4143 * context commands. It is protected by hcd->bandwidth
4144 * mutex and is shared by all devices. We need to set
4145 * the max ext latency in USB 2 BESL LPM as well, so
4146 * use the same mutex and xhci_change_max_exit_latency()
4148 mutex_lock(hcd->bandwidth_mutex);
4149 ret = xhci_change_max_exit_latency(xhci, udev,
4151 mutex_unlock(hcd->bandwidth_mutex);
4155 spin_lock_irqsave(&xhci->lock, flags);
4157 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4158 writel(hlpm_val, hlpm_addr);
4162 hird = xhci_calculate_hird_besl(xhci, udev);
4165 pm_val &= ~PORT_HIRD_MASK;
4166 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4167 writel(pm_val, pm_addr);
4168 pm_val = readl(pm_addr);
4170 writel(pm_val, pm_addr);
4174 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4175 writel(pm_val, pm_addr);
4178 if (udev->usb2_hw_lpm_besl_capable) {
4179 spin_unlock_irqrestore(&xhci->lock, flags);
4180 mutex_lock(hcd->bandwidth_mutex);
4181 xhci_change_max_exit_latency(xhci, udev, 0);
4182 mutex_unlock(hcd->bandwidth_mutex);
4187 spin_unlock_irqrestore(&xhci->lock, flags);
4191 /* check if a usb2 port supports a given extened capability protocol
4192 * only USB2 ports extended protocol capability values are cached.
4193 * Return 1 if capability is supported
4195 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4196 unsigned capability)
4198 u32 port_offset, port_count;
4201 for (i = 0; i < xhci->num_ext_caps; i++) {
4202 if (xhci->ext_caps[i] & capability) {
4203 /* port offsets starts at 1 */
4204 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4205 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4206 if (port >= port_offset &&
4207 port < port_offset + port_count)
4214 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4216 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4217 int portnum = udev->portnum - 1;
4219 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4223 /* we only support lpm for non-hub device connected to root hub yet */
4224 if (!udev->parent || udev->parent->parent ||
4225 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4228 if (xhci->hw_lpm_support == 1 &&
4229 xhci_check_usb2_port_capability(
4230 xhci, portnum, XHCI_HLC)) {
4231 udev->usb2_hw_lpm_capable = 1;
4232 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4233 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4234 if (xhci_check_usb2_port_capability(xhci, portnum,
4236 udev->usb2_hw_lpm_besl_capable = 1;
4244 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4245 struct usb_device *udev, int enable)
4250 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4255 #endif /* CONFIG_PM_RUNTIME */
4257 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4260 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4261 static unsigned long long xhci_service_interval_to_ns(
4262 struct usb_endpoint_descriptor *desc)
4264 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4267 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4268 enum usb3_link_state state)
4270 unsigned long long sel;
4271 unsigned long long pel;
4272 unsigned int max_sel_pel;
4277 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4278 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4279 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4280 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4284 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4285 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4286 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4290 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4292 return USB3_LPM_DISABLED;
4295 if (sel <= max_sel_pel && pel <= max_sel_pel)
4296 return USB3_LPM_DEVICE_INITIATED;
4298 if (sel > max_sel_pel)
4299 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4300 "due to long SEL %llu ms\n",
4303 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4304 "due to long PEL %llu ms\n",
4306 return USB3_LPM_DISABLED;
4309 /* The U1 timeout should be the maximum of the following values:
4310 * - For control endpoints, U1 system exit latency (SEL) * 3
4311 * - For bulk endpoints, U1 SEL * 5
4312 * - For interrupt endpoints:
4313 * - Notification EPs, U1 SEL * 3
4314 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4315 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4317 static unsigned long long xhci_calculate_intel_u1_timeout(
4318 struct usb_device *udev,
4319 struct usb_endpoint_descriptor *desc)
4321 unsigned long long timeout_ns;
4325 ep_type = usb_endpoint_type(desc);
4327 case USB_ENDPOINT_XFER_CONTROL:
4328 timeout_ns = udev->u1_params.sel * 3;
4330 case USB_ENDPOINT_XFER_BULK:
4331 timeout_ns = udev->u1_params.sel * 5;
4333 case USB_ENDPOINT_XFER_INT:
4334 intr_type = usb_endpoint_interrupt_type(desc);
4335 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4336 timeout_ns = udev->u1_params.sel * 3;
4339 /* Otherwise the calculation is the same as isoc eps */
4340 case USB_ENDPOINT_XFER_ISOC:
4341 timeout_ns = xhci_service_interval_to_ns(desc);
4342 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4343 if (timeout_ns < udev->u1_params.sel * 2)
4344 timeout_ns = udev->u1_params.sel * 2;
4353 /* Returns the hub-encoded U1 timeout value. */
4354 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4355 struct usb_device *udev,
4356 struct usb_endpoint_descriptor *desc)
4358 unsigned long long timeout_ns;
4360 if (xhci->quirks & XHCI_INTEL_HOST)
4361 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4363 timeout_ns = udev->u1_params.sel;
4365 /* The U1 timeout is encoded in 1us intervals.
4366 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4368 if (timeout_ns == USB3_LPM_DISABLED)
4371 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4373 /* If the necessary timeout value is bigger than what we can set in the
4374 * USB 3.0 hub, we have to disable hub-initiated U1.
4376 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4378 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4379 "due to long timeout %llu ms\n", timeout_ns);
4380 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4383 /* The U2 timeout should be the maximum of:
4384 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4385 * - largest bInterval of any active periodic endpoint (to avoid going
4386 * into lower power link states between intervals).
4387 * - the U2 Exit Latency of the device
4389 static unsigned long long xhci_calculate_intel_u2_timeout(
4390 struct usb_device *udev,
4391 struct usb_endpoint_descriptor *desc)
4393 unsigned long long timeout_ns;
4394 unsigned long long u2_del_ns;
4396 timeout_ns = 10 * 1000 * 1000;
4398 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4399 (xhci_service_interval_to_ns(desc) > timeout_ns))
4400 timeout_ns = xhci_service_interval_to_ns(desc);
4402 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4403 if (u2_del_ns > timeout_ns)
4404 timeout_ns = u2_del_ns;
4409 /* Returns the hub-encoded U2 timeout value. */
4410 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4411 struct usb_device *udev,
4412 struct usb_endpoint_descriptor *desc)
4414 unsigned long long timeout_ns;
4416 if (xhci->quirks & XHCI_INTEL_HOST)
4417 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4419 timeout_ns = udev->u2_params.sel;
4421 /* The U2 timeout is encoded in 256us intervals */
4422 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4423 /* If the necessary timeout value is bigger than what we can set in the
4424 * USB 3.0 hub, we have to disable hub-initiated U2.
4426 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4428 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4429 "due to long timeout %llu ms\n", timeout_ns);
4430 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4433 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4434 struct usb_device *udev,
4435 struct usb_endpoint_descriptor *desc,
4436 enum usb3_link_state state,
4439 if (state == USB3_LPM_U1)
4440 return xhci_calculate_u1_timeout(xhci, udev, desc);
4441 else if (state == USB3_LPM_U2)
4442 return xhci_calculate_u2_timeout(xhci, udev, desc);
4444 return USB3_LPM_DISABLED;
4447 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4448 struct usb_device *udev,
4449 struct usb_endpoint_descriptor *desc,
4450 enum usb3_link_state state,
4455 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4456 desc, state, timeout);
4458 /* If we found we can't enable hub-initiated LPM, or
4459 * the U1 or U2 exit latency was too high to allow
4460 * device-initiated LPM as well, just stop searching.
4462 if (alt_timeout == USB3_LPM_DISABLED ||
4463 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4464 *timeout = alt_timeout;
4467 if (alt_timeout > *timeout)
4468 *timeout = alt_timeout;
4472 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4473 struct usb_device *udev,
4474 struct usb_host_interface *alt,
4475 enum usb3_link_state state,
4480 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4481 if (xhci_update_timeout_for_endpoint(xhci, udev,
4482 &alt->endpoint[j].desc, state, timeout))
4489 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4490 enum usb3_link_state state)
4492 struct usb_device *parent;
4493 unsigned int num_hubs;
4495 if (state == USB3_LPM_U2)
4498 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4499 for (parent = udev->parent, num_hubs = 0; parent->parent;
4500 parent = parent->parent)
4506 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4507 " below second-tier hub.\n");
4508 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4509 "to decrease power consumption.\n");
4513 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4514 struct usb_device *udev,
4515 enum usb3_link_state state)
4517 if (xhci->quirks & XHCI_INTEL_HOST)
4518 return xhci_check_intel_tier_policy(udev, state);
4523 /* Returns the U1 or U2 timeout that should be enabled.
4524 * If the tier check or timeout setting functions return with a non-zero exit
4525 * code, that means the timeout value has been finalized and we shouldn't look
4526 * at any more endpoints.
4528 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4529 struct usb_device *udev, enum usb3_link_state state)
4531 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4532 struct usb_host_config *config;
4535 u16 timeout = USB3_LPM_DISABLED;
4537 if (state == USB3_LPM_U1)
4539 else if (state == USB3_LPM_U2)
4542 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4547 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4550 /* Gather some information about the currently installed configuration
4551 * and alternate interface settings.
4553 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4557 config = udev->actconfig;
4561 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4562 struct usb_driver *driver;
4563 struct usb_interface *intf = config->interface[i];
4568 /* Check if any currently bound drivers want hub-initiated LPM
4571 if (intf->dev.driver) {
4572 driver = to_usb_driver(intf->dev.driver);
4573 if (driver && driver->disable_hub_initiated_lpm) {
4574 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4575 "at request of driver %s\n",
4576 state_name, driver->name);
4577 return xhci_get_timeout_no_hub_lpm(udev, state);
4581 /* Not sure how this could happen... */
4582 if (!intf->cur_altsetting)
4585 if (xhci_update_timeout_for_interface(xhci, udev,
4586 intf->cur_altsetting,
4593 static int calculate_max_exit_latency(struct usb_device *udev,
4594 enum usb3_link_state state_changed,
4595 u16 hub_encoded_timeout)
4597 unsigned long long u1_mel_us = 0;
4598 unsigned long long u2_mel_us = 0;
4599 unsigned long long mel_us = 0;
4605 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4606 hub_encoded_timeout == USB3_LPM_DISABLED);
4607 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4608 hub_encoded_timeout == USB3_LPM_DISABLED);
4610 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4611 hub_encoded_timeout != USB3_LPM_DISABLED);
4612 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4613 hub_encoded_timeout != USB3_LPM_DISABLED);
4615 /* If U1 was already enabled and we're not disabling it,
4616 * or we're going to enable U1, account for the U1 max exit latency.
4618 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4620 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4621 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4623 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4625 if (u1_mel_us > u2_mel_us)
4629 /* xHCI host controller max exit latency field is only 16 bits wide. */
4630 if (mel_us > MAX_EXIT) {
4631 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4632 "is too big.\n", mel_us);
4638 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4639 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4640 struct usb_device *udev, enum usb3_link_state state)
4642 struct xhci_hcd *xhci;
4643 u16 hub_encoded_timeout;
4647 xhci = hcd_to_xhci(hcd);
4648 /* The LPM timeout values are pretty host-controller specific, so don't
4649 * enable hub-initiated timeouts unless the vendor has provided
4650 * information about their timeout algorithm.
4652 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4653 !xhci->devs[udev->slot_id])
4654 return USB3_LPM_DISABLED;
4656 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4657 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4659 /* Max Exit Latency is too big, disable LPM. */
4660 hub_encoded_timeout = USB3_LPM_DISABLED;
4664 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4667 return hub_encoded_timeout;
4670 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4671 struct usb_device *udev, enum usb3_link_state state)
4673 struct xhci_hcd *xhci;
4677 xhci = hcd_to_xhci(hcd);
4678 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4679 !xhci->devs[udev->slot_id])
4682 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4683 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4688 #else /* CONFIG_PM */
4690 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4691 struct usb_device *udev, enum usb3_link_state state)
4693 return USB3_LPM_DISABLED;
4696 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4697 struct usb_device *udev, enum usb3_link_state state)
4701 #endif /* CONFIG_PM */
4703 /*-------------------------------------------------------------------------*/
4705 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4706 * internal data structures for the device.
4708 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4709 struct usb_tt *tt, gfp_t mem_flags)
4711 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4712 struct xhci_virt_device *vdev;
4713 struct xhci_command *config_cmd;
4714 struct xhci_input_control_ctx *ctrl_ctx;
4715 struct xhci_slot_ctx *slot_ctx;
4716 unsigned long flags;
4717 unsigned think_time;
4720 /* Ignore root hubs */
4724 vdev = xhci->devs[hdev->slot_id];
4726 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4729 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4731 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4734 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4736 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4738 xhci_free_command(xhci, config_cmd);
4742 spin_lock_irqsave(&xhci->lock, flags);
4743 if (hdev->speed == USB_SPEED_HIGH &&
4744 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4745 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4746 xhci_free_command(xhci, config_cmd);
4747 spin_unlock_irqrestore(&xhci->lock, flags);
4751 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4752 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4753 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4754 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4756 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4757 if (xhci->hci_version > 0x95) {
4758 xhci_dbg(xhci, "xHCI version %x needs hub "
4759 "TT think time and number of ports\n",
4760 (unsigned int) xhci->hci_version);
4761 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4762 /* Set TT think time - convert from ns to FS bit times.
4763 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4764 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4766 * xHCI 1.0: this field shall be 0 if the device is not a
4769 think_time = tt->think_time;
4770 if (think_time != 0)
4771 think_time = (think_time / 666) - 1;
4772 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4773 slot_ctx->tt_info |=
4774 cpu_to_le32(TT_THINK_TIME(think_time));
4776 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4777 "TT think time or number of ports\n",
4778 (unsigned int) xhci->hci_version);
4780 slot_ctx->dev_state = 0;
4781 spin_unlock_irqrestore(&xhci->lock, flags);
4783 xhci_dbg(xhci, "Set up %s for hub device.\n",
4784 (xhci->hci_version > 0x95) ?
4785 "configure endpoint" : "evaluate context");
4786 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4787 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4789 /* Issue and wait for the configure endpoint or
4790 * evaluate context command.
4792 if (xhci->hci_version > 0x95)
4793 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4796 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4799 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4800 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4802 xhci_free_command(xhci, config_cmd);
4806 int xhci_get_frame(struct usb_hcd *hcd)
4808 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4809 /* EHCI mods by the periodic size. Why? */
4810 return readl(&xhci->run_regs->microframe_index) >> 3;
4813 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4815 struct xhci_hcd *xhci;
4816 struct device *dev = hcd->self.controller;
4819 /* Accept arbitrarily long scatter-gather lists */
4820 hcd->self.sg_tablesize = ~0;
4822 /* support to build packet from discontinuous buffers */
4823 hcd->self.no_sg_constraint = 1;
4825 /* XHCI controllers don't stop the ep queue on short packets :| */
4826 hcd->self.no_stop_on_short = 1;
4828 if (usb_hcd_is_primary_hcd(hcd)) {
4829 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4832 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4833 xhci->main_hcd = hcd;
4834 /* Mark the first roothub as being USB 2.0.
4835 * The xHCI driver will register the USB 3.0 roothub.
4837 hcd->speed = HCD_USB2;
4838 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4840 * USB 2.0 roothub under xHCI has an integrated TT,
4841 * (rate matching hub) as opposed to having an OHCI/UHCI
4842 * companion controller.
4846 /* xHCI private pointer was set in xhci_pci_probe for the second
4847 * registered roothub.
4852 xhci->cap_regs = hcd->regs;
4853 xhci->op_regs = hcd->regs +
4854 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4855 xhci->run_regs = hcd->regs +
4856 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4857 /* Cache read-only capability registers */
4858 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4859 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4860 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4861 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4862 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4863 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4864 xhci_print_registers(xhci);
4866 xhci->quirks = quirks;
4868 get_quirks(dev, xhci);
4870 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4871 * success event after a short transfer. This quirk will ignore such
4874 if (xhci->hci_version > 0x96)
4875 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4877 /* Make sure the HC is halted. */
4878 retval = xhci_halt(xhci);
4882 xhci_dbg(xhci, "Resetting HCD\n");
4883 /* Reset the internal HC memory state and registers. */
4884 retval = xhci_reset(xhci);
4887 xhci_dbg(xhci, "Reset complete\n");
4889 /* Set dma_mask and coherent_dma_mask to 64-bits,
4890 * if xHC supports 64-bit addressing */
4891 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4892 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4893 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4894 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4897 xhci_dbg(xhci, "Calling HCD init\n");
4898 /* Initialize HCD and host controller data structures. */
4899 retval = xhci_init(hcd);
4902 xhci_dbg(xhci, "Called HCD init\n");
4908 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4910 static const struct hc_driver xhci_hc_driver = {
4911 .description = "xhci-hcd",
4912 .product_desc = "xHCI Host Controller",
4913 .hcd_priv_size = sizeof(struct xhci_hcd *),
4916 * generic hardware linkage
4919 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4922 * basic lifecycle operations
4924 .reset = NULL, /* set in xhci_init_driver() */
4927 .shutdown = xhci_shutdown,
4930 * managing i/o requests and associated device resources
4932 .urb_enqueue = xhci_urb_enqueue,
4933 .urb_dequeue = xhci_urb_dequeue,
4934 .alloc_dev = xhci_alloc_dev,
4935 .free_dev = xhci_free_dev,
4936 .alloc_streams = xhci_alloc_streams,
4937 .free_streams = xhci_free_streams,
4938 .add_endpoint = xhci_add_endpoint,
4939 .drop_endpoint = xhci_drop_endpoint,
4940 .endpoint_reset = xhci_endpoint_reset,
4941 .check_bandwidth = xhci_check_bandwidth,
4942 .reset_bandwidth = xhci_reset_bandwidth,
4943 .address_device = xhci_address_device,
4944 .enable_device = xhci_enable_device,
4945 .update_hub_device = xhci_update_hub_device,
4946 .reset_device = xhci_discover_or_reset_device,
4949 * scheduling support
4951 .get_frame_number = xhci_get_frame,
4956 .hub_control = xhci_hub_control,
4957 .hub_status_data = xhci_hub_status_data,
4958 .bus_suspend = xhci_bus_suspend,
4959 .bus_resume = xhci_bus_resume,
4962 * call back when device connected and addressed
4964 .update_device = xhci_update_device,
4965 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4966 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4967 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4968 .find_raw_port_number = xhci_find_raw_port_number,
4971 void xhci_init_driver(struct hc_driver *drv, int (*setup_fn)(struct usb_hcd *))
4974 *drv = xhci_hc_driver;
4975 drv->reset = setup_fn;
4977 EXPORT_SYMBOL_GPL(xhci_init_driver);
4979 MODULE_DESCRIPTION(DRIVER_DESC);
4980 MODULE_AUTHOR(DRIVER_AUTHOR);
4981 MODULE_LICENSE("GPL");
4983 static int __init xhci_hcd_init(void)
4986 * Check the compiler generated sizes of structures that must be laid
4987 * out in specific ways for hardware access.
4989 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4990 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4991 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4992 /* xhci_device_control has eight fields, and also
4993 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4995 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4996 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4997 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4998 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4999 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5000 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5001 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5004 module_init(xhci_hcd_init);