2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
41 static int link_quirk;
42 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
43 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45 static unsigned int quirks;
46 module_param(quirks, uint, S_IRUGO);
47 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49 /* TODO: copied from ehci-hcd.c - can this be refactored? */
51 * xhci_handshake - spin reading hc until handshake completes or fails
52 * @ptr: address of hc register to be read
53 * @mask: bits to look at in result of read
54 * @done: value of those bits when handshake succeeds
55 * @usec: timeout in microseconds
57 * Returns negative errno, or zero on success
59 * Success happens when the "mask" bits have the specified value (hardware
60 * handshake done). There are two failure modes: "usec" have passed (major
61 * hardware flakeout), or the register reads as all-ones (hardware removed).
63 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
69 if (result == ~(u32)0) /* card removed */
81 * Disable interrupts and begin the xHCI halting process.
83 void xhci_quiesce(struct xhci_hcd *xhci)
90 halted = readl(&xhci->op_regs->status) & STS_HALT;
94 cmd = readl(&xhci->op_regs->command);
96 writel(cmd, &xhci->op_regs->command);
100 * Force HC into halt state.
102 * Disable any IRQs and clear the run/stop bit.
103 * HC will complete any current and actively pipelined transactions, and
104 * should halt within 16 ms of the run/stop bit being cleared.
105 * Read HC Halted bit in the status register to see when the HC is finished.
107 int xhci_halt(struct xhci_hcd *xhci)
110 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
113 ret = xhci_handshake(&xhci->op_regs->status,
114 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
116 xhci->xhc_state |= XHCI_STATE_HALTED;
117 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
119 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
125 * Set the run bit and wait for the host to be running.
127 static int xhci_start(struct xhci_hcd *xhci)
132 temp = readl(&xhci->op_regs->command);
134 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
136 writel(temp, &xhci->op_regs->command);
139 * Wait for the HCHalted Status bit to be 0 to indicate the host is
142 ret = xhci_handshake(&xhci->op_regs->status,
143 STS_HALT, 0, XHCI_MAX_HALT_USEC);
144 if (ret == -ETIMEDOUT)
145 xhci_err(xhci, "Host took too long to start, "
146 "waited %u microseconds.\n",
149 xhci->xhc_state &= ~(XHCI_STATE_HALTED | XHCI_STATE_DYING);
157 * This resets pipelines, timers, counters, state machines, etc.
158 * Transactions will be terminated immediately, and operational registers
159 * will be set to their defaults.
161 int xhci_reset(struct xhci_hcd *xhci)
167 state = readl(&xhci->op_regs->status);
168 if ((state & STS_HALT) == 0) {
169 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
173 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
174 command = readl(&xhci->op_regs->command);
175 command |= CMD_RESET;
176 writel(command, &xhci->op_regs->command);
178 ret = xhci_handshake(&xhci->op_regs->command,
179 CMD_RESET, 0, 10 * 1000 * 1000);
183 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
184 "Wait for controller to be ready for doorbell rings");
186 * xHCI cannot write to any doorbells or operational registers other
187 * than status until the "Controller Not Ready" flag is cleared.
189 ret = xhci_handshake(&xhci->op_regs->status,
190 STS_CNR, 0, 10 * 1000 * 1000);
192 for (i = 0; i < 2; ++i) {
193 xhci->bus_state[i].port_c_suspend = 0;
194 xhci->bus_state[i].suspended_ports = 0;
195 xhci->bus_state[i].resuming_ports = 0;
202 static int xhci_free_msi(struct xhci_hcd *xhci)
206 if (!xhci->msix_entries)
209 for (i = 0; i < xhci->msix_count; i++)
210 if (xhci->msix_entries[i].vector)
211 free_irq(xhci->msix_entries[i].vector,
219 static int xhci_setup_msi(struct xhci_hcd *xhci)
222 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
224 ret = pci_enable_msi(pdev);
226 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
227 "failed to allocate MSI entry");
231 ret = request_irq(pdev->irq, xhci_msi_irq,
232 0, "xhci_hcd", xhci_to_hcd(xhci));
234 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
235 "disable MSI interrupt");
236 pci_disable_msi(pdev);
244 * free all IRQs request
246 static void xhci_free_irq(struct xhci_hcd *xhci)
248 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
251 /* return if using legacy interrupt */
252 if (xhci_to_hcd(xhci)->irq > 0)
255 ret = xhci_free_msi(xhci);
259 free_irq(pdev->irq, xhci_to_hcd(xhci));
267 static int xhci_setup_msix(struct xhci_hcd *xhci)
270 struct usb_hcd *hcd = xhci_to_hcd(xhci);
271 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
274 * calculate number of msi-x vectors supported.
275 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
276 * with max number of interrupters based on the xhci HCSPARAMS1.
277 * - num_online_cpus: maximum msi-x vectors per CPUs core.
278 * Add additional 1 vector to ensure always available interrupt.
280 xhci->msix_count = min(num_online_cpus() + 1,
281 HCS_MAX_INTRS(xhci->hcs_params1));
284 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
286 if (!xhci->msix_entries) {
287 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
291 for (i = 0; i < xhci->msix_count; i++) {
292 xhci->msix_entries[i].entry = i;
293 xhci->msix_entries[i].vector = 0;
296 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
298 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
299 "Failed to enable MSI-X");
303 for (i = 0; i < xhci->msix_count; i++) {
304 ret = request_irq(xhci->msix_entries[i].vector,
306 0, "xhci_hcd", xhci_to_hcd(xhci));
311 hcd->msix_enabled = 1;
315 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
317 pci_disable_msix(pdev);
319 kfree(xhci->msix_entries);
320 xhci->msix_entries = NULL;
324 /* Free any IRQs and disable MSI-X */
325 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
327 struct usb_hcd *hcd = xhci_to_hcd(xhci);
328 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
330 if (xhci->quirks & XHCI_PLAT)
335 if (xhci->msix_entries) {
336 pci_disable_msix(pdev);
337 kfree(xhci->msix_entries);
338 xhci->msix_entries = NULL;
340 pci_disable_msi(pdev);
343 hcd->msix_enabled = 0;
347 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
351 if (xhci->msix_entries) {
352 for (i = 0; i < xhci->msix_count; i++)
353 synchronize_irq(xhci->msix_entries[i].vector);
357 static int xhci_try_enable_msi(struct usb_hcd *hcd)
359 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
360 struct pci_dev *pdev;
363 /* The xhci platform device has set up IRQs through usb_add_hcd. */
364 if (xhci->quirks & XHCI_PLAT)
367 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
369 * Some Fresco Logic host controllers advertise MSI, but fail to
370 * generate interrupts. Don't even try to enable MSI.
372 if (xhci->quirks & XHCI_BROKEN_MSI)
375 /* unregister the legacy interrupt */
377 free_irq(hcd->irq, hcd);
380 ret = xhci_setup_msix(xhci);
382 /* fall back to msi*/
383 ret = xhci_setup_msi(xhci);
386 /* hcd->irq is 0, we have MSI */
390 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
395 if (!strlen(hcd->irq_descr))
396 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
397 hcd->driver->description, hcd->self.busnum);
399 /* fall back to legacy interrupt*/
400 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
401 hcd->irq_descr, hcd);
403 xhci_err(xhci, "request interrupt %d failed\n",
407 hcd->irq = pdev->irq;
413 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
418 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
422 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
428 static void compliance_mode_recovery(unsigned long arg)
430 struct xhci_hcd *xhci;
435 xhci = (struct xhci_hcd *)arg;
437 for (i = 0; i < xhci->num_usb3_ports; i++) {
438 temp = readl(xhci->usb3_ports[i]);
439 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
441 * Compliance Mode Detected. Letting USB Core
442 * handle the Warm Reset
444 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
445 "Compliance mode detected->port %d",
447 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
448 "Attempting compliance mode recovery");
449 hcd = xhci->shared_hcd;
451 if (hcd->state == HC_STATE_SUSPENDED)
452 usb_hcd_resume_root_hub(hcd);
454 usb_hcd_poll_rh_status(hcd);
458 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
459 mod_timer(&xhci->comp_mode_recovery_timer,
460 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
464 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
465 * that causes ports behind that hardware to enter compliance mode sometimes.
466 * The quirk creates a timer that polls every 2 seconds the link state of
467 * each host controller's port and recovers it by issuing a Warm reset
468 * if Compliance mode is detected, otherwise the port will become "dead" (no
469 * device connections or disconnections will be detected anymore). Becasue no
470 * status event is generated when entering compliance mode (per xhci spec),
471 * this quirk is needed on systems that have the failing hardware installed.
473 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
475 xhci->port_status_u0 = 0;
476 setup_timer(&xhci->comp_mode_recovery_timer,
477 compliance_mode_recovery, (unsigned long)xhci);
478 xhci->comp_mode_recovery_timer.expires = jiffies +
479 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
481 set_timer_slack(&xhci->comp_mode_recovery_timer,
482 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
483 add_timer(&xhci->comp_mode_recovery_timer);
484 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
485 "Compliance mode recovery timer initialized");
489 * This function identifies the systems that have installed the SN65LVPE502CP
490 * USB3.0 re-driver and that need the Compliance Mode Quirk.
492 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
494 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
496 const char *dmi_product_name, *dmi_sys_vendor;
498 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
499 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
500 if (!dmi_product_name || !dmi_sys_vendor)
503 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
506 if (strstr(dmi_product_name, "Z420") ||
507 strstr(dmi_product_name, "Z620") ||
508 strstr(dmi_product_name, "Z820") ||
509 strstr(dmi_product_name, "Z1 Workstation"))
515 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
517 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
522 * Initialize memory for HCD and xHC (one-time init).
524 * Program the PAGESIZE register, initialize the device context array, create
525 * device contexts (?), set up a command ring segment (or two?), create event
526 * ring (one for now).
528 int xhci_init(struct usb_hcd *hcd)
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
533 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
534 spin_lock_init(&xhci->lock);
535 if (xhci->hci_version == 0x95 && link_quirk) {
536 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
537 "QUIRK: Not clearing Link TRB chain bits.");
538 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
541 "xHCI doesn't need link TRB QUIRK");
543 retval = xhci_mem_init(xhci, GFP_KERNEL);
544 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
546 /* Initializing Compliance Mode Recovery Data If Needed */
547 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
548 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
549 compliance_mode_recovery_timer_init(xhci);
555 /*-------------------------------------------------------------------------*/
558 static int xhci_run_finished(struct xhci_hcd *xhci)
560 if (xhci_start(xhci)) {
564 xhci->shared_hcd->state = HC_STATE_RUNNING;
565 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
567 if (xhci->quirks & XHCI_NEC_HOST)
568 xhci_ring_cmd_db(xhci);
570 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
571 "Finished xhci_run for USB3 roothub");
576 * Start the HC after it was halted.
578 * This function is called by the USB core when the HC driver is added.
579 * Its opposite is xhci_stop().
581 * xhci_init() must be called once before this function can be called.
582 * Reset the HC, enable device slot contexts, program DCBAAP, and
583 * set command ring pointer and event ring pointer.
585 * Setup MSI-X vectors and enable interrupts.
587 int xhci_run(struct usb_hcd *hcd)
592 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 /* Start the xHCI host controller running only after the USB 2.0 roothub
598 hcd->uses_new_polling = 1;
599 if (!usb_hcd_is_primary_hcd(hcd))
600 return xhci_run_finished(xhci);
602 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
604 ret = xhci_try_enable_msi(hcd);
608 xhci_dbg(xhci, "Command ring memory map follows:\n");
609 xhci_debug_ring(xhci, xhci->cmd_ring);
610 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
611 xhci_dbg_cmd_ptrs(xhci);
613 xhci_dbg(xhci, "ERST memory map follows:\n");
614 xhci_dbg_erst(xhci, &xhci->erst);
615 xhci_dbg(xhci, "Event ring:\n");
616 xhci_debug_ring(xhci, xhci->event_ring);
617 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
618 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
619 temp_64 &= ~ERST_PTR_MASK;
620 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
621 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
623 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
624 "// Set the interrupt modulation register");
625 temp = readl(&xhci->ir_set->irq_control);
626 temp &= ~ER_IRQ_INTERVAL_MASK;
628 writel(temp, &xhci->ir_set->irq_control);
630 /* Set the HCD state before we enable the irqs */
631 temp = readl(&xhci->op_regs->command);
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "// Enable interrupts, cmd = 0x%x.", temp);
635 writel(temp, &xhci->op_regs->command);
637 temp = readl(&xhci->ir_set->irq_pending);
638 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
639 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
640 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
641 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
642 xhci_print_ir_set(xhci, 0);
644 if (xhci->quirks & XHCI_NEC_HOST) {
645 struct xhci_command *command;
646 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
649 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
650 TRB_TYPE(TRB_NEC_GET_FW));
652 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
653 "Finished xhci_run for USB2 roothub");
656 EXPORT_SYMBOL_GPL(xhci_run);
661 * This function is called by the USB core when the HC driver is removed.
662 * Its opposite is xhci_run().
664 * Disable device contexts, disable IRQs, and quiesce the HC.
665 * Reset the HC, finish any completed transactions, and cleanup memory.
667 void xhci_stop(struct usb_hcd *hcd)
670 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
672 if (xhci->xhc_state & XHCI_STATE_HALTED)
675 mutex_lock(&xhci->mutex);
676 spin_lock_irq(&xhci->lock);
677 xhci->xhc_state |= XHCI_STATE_HALTED;
678 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
680 /* Make sure the xHC is halted for a USB3 roothub
681 * (xhci_stop() could be called as part of failed init).
685 spin_unlock_irq(&xhci->lock);
687 xhci_cleanup_msix(xhci);
689 /* Deleting Compliance Mode Recovery Timer */
690 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
691 (!(xhci_all_ports_seen_u0(xhci)))) {
692 del_timer_sync(&xhci->comp_mode_recovery_timer);
693 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
694 "%s: compliance mode recovery timer deleted",
698 if (xhci->quirks & XHCI_AMD_PLL_FIX)
701 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
702 "// Disabling event ring interrupts");
703 temp = readl(&xhci->op_regs->status);
704 writel(temp & ~STS_EINT, &xhci->op_regs->status);
705 temp = readl(&xhci->ir_set->irq_pending);
706 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
707 xhci_print_ir_set(xhci, 0);
709 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
710 xhci_mem_cleanup(xhci);
711 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
712 "xhci_stop completed - status = %x",
713 readl(&xhci->op_regs->status));
714 mutex_unlock(&xhci->mutex);
718 * Shutdown HC (not bus-specific)
720 * This is called when the machine is rebooting or halting. We assume that the
721 * machine will be powered off, and the HC's internal state will be reset.
722 * Don't bother to free memory.
724 * This will only ever be called with the main usb_hcd (the USB3 roothub).
726 void xhci_shutdown(struct usb_hcd *hcd)
728 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
730 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
731 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
733 spin_lock_irq(&xhci->lock);
735 /* Workaround for spurious wakeups at shutdown with HSW */
736 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
738 spin_unlock_irq(&xhci->lock);
740 xhci_cleanup_msix(xhci);
742 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
743 "xhci_shutdown completed - status = %x",
744 readl(&xhci->op_regs->status));
746 /* Yet another workaround for spurious wakeups at shutdown with HSW */
747 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
748 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
752 static void xhci_save_registers(struct xhci_hcd *xhci)
754 xhci->s3.command = readl(&xhci->op_regs->command);
755 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
756 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
757 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
758 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
759 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
760 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
761 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
762 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
765 static void xhci_restore_registers(struct xhci_hcd *xhci)
767 writel(xhci->s3.command, &xhci->op_regs->command);
768 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
769 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
770 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
771 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
772 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
773 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
774 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
775 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
778 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
782 /* step 2: initialize command ring buffer */
783 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
784 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
785 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
786 xhci->cmd_ring->dequeue) &
787 (u64) ~CMD_RING_RSVD_BITS) |
788 xhci->cmd_ring->cycle_state;
789 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
790 "// Setting command ring address to 0x%llx",
791 (long unsigned long) val_64);
792 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
796 * The whole command ring must be cleared to zero when we suspend the host.
798 * The host doesn't save the command ring pointer in the suspend well, so we
799 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
800 * aligned, because of the reserved bits in the command ring dequeue pointer
801 * register. Therefore, we can't just set the dequeue pointer back in the
802 * middle of the ring (TRBs are 16-byte aligned).
804 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
806 struct xhci_ring *ring;
807 struct xhci_segment *seg;
809 ring = xhci->cmd_ring;
813 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
814 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
815 cpu_to_le32(~TRB_CYCLE);
817 } while (seg != ring->deq_seg);
819 /* Reset the software enqueue and dequeue pointers */
820 ring->deq_seg = ring->first_seg;
821 ring->dequeue = ring->first_seg->trbs;
822 ring->enq_seg = ring->deq_seg;
823 ring->enqueue = ring->dequeue;
825 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
827 * Ring is now zeroed, so the HW should look for change of ownership
828 * when the cycle bit is set to 1.
830 ring->cycle_state = 1;
833 * Reset the hardware dequeue pointer.
834 * Yes, this will need to be re-written after resume, but we're paranoid
835 * and want to make sure the hardware doesn't access bogus memory
836 * because, say, the BIOS or an SMI started the host without changing
837 * the command ring pointers.
839 xhci_set_cmd_ring_deq(xhci);
842 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
845 __le32 __iomem **port_array;
849 spin_lock_irqsave(&xhci->lock, flags);
851 /* disble usb3 ports Wake bits*/
852 port_index = xhci->num_usb3_ports;
853 port_array = xhci->usb3_ports;
854 while (port_index--) {
855 t1 = readl(port_array[port_index]);
856 t1 = xhci_port_state_to_neutral(t1);
857 t2 = t1 & ~PORT_WAKE_BITS;
859 writel(t2, port_array[port_index]);
862 /* disble usb2 ports Wake bits*/
863 port_index = xhci->num_usb2_ports;
864 port_array = xhci->usb2_ports;
865 while (port_index--) {
866 t1 = readl(port_array[port_index]);
867 t1 = xhci_port_state_to_neutral(t1);
868 t2 = t1 & ~PORT_WAKE_BITS;
870 writel(t2, port_array[port_index]);
873 spin_unlock_irqrestore(&xhci->lock, flags);
877 * Stop HC (not bus-specific)
879 * This is called when the machine transition into S3/S4 mode.
882 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
885 unsigned int delay = XHCI_MAX_HALT_USEC;
886 struct usb_hcd *hcd = xhci_to_hcd(xhci);
892 if (hcd->state != HC_STATE_SUSPENDED ||
893 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
896 /* Clear root port wake on bits if wakeup not allowed. */
898 xhci_disable_port_wake_on_bits(xhci);
900 /* Don't poll the roothubs on bus suspend. */
901 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
902 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
903 del_timer_sync(&hcd->rh_timer);
904 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
905 del_timer_sync(&xhci->shared_hcd->rh_timer);
907 spin_lock_irq(&xhci->lock);
908 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
909 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
910 /* step 1: stop endpoint */
911 /* skipped assuming that port suspend has done */
913 /* step 2: clear Run/Stop bit */
914 command = readl(&xhci->op_regs->command);
916 writel(command, &xhci->op_regs->command);
918 /* Some chips from Fresco Logic need an extraordinary delay */
919 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
921 if (xhci_handshake(&xhci->op_regs->status,
922 STS_HALT, STS_HALT, delay)) {
923 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
924 spin_unlock_irq(&xhci->lock);
927 xhci_clear_command_ring(xhci);
929 /* step 3: save registers */
930 xhci_save_registers(xhci);
932 /* step 4: set CSS flag */
933 command = readl(&xhci->op_regs->command);
935 writel(command, &xhci->op_regs->command);
936 if (xhci_handshake(&xhci->op_regs->status,
937 STS_SAVE, 0, 10 * 1000)) {
938 xhci_warn(xhci, "WARN: xHC save state timeout\n");
939 spin_unlock_irq(&xhci->lock);
942 spin_unlock_irq(&xhci->lock);
945 * Deleting Compliance Mode Recovery Timer because the xHCI Host
946 * is about to be suspended.
948 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
949 (!(xhci_all_ports_seen_u0(xhci)))) {
950 del_timer_sync(&xhci->comp_mode_recovery_timer);
951 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
952 "%s: compliance mode recovery timer deleted",
956 /* step 5: remove core well power */
957 /* synchronize irq when using MSI-X */
958 xhci_msix_sync_irqs(xhci);
962 EXPORT_SYMBOL_GPL(xhci_suspend);
965 * start xHC (not bus-specific)
967 * This is called when the machine transition from S3/S4 mode.
970 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
972 u32 command, temp = 0, status;
973 struct usb_hcd *hcd = xhci_to_hcd(xhci);
974 struct usb_hcd *secondary_hcd;
976 bool comp_timer_running = false;
981 /* Wait a bit if either of the roothubs need to settle from the
982 * transition into bus suspend.
984 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
986 xhci->bus_state[1].next_statechange))
989 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
990 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
992 spin_lock_irq(&xhci->lock);
993 if (xhci->quirks & XHCI_RESET_ON_RESUME)
997 /* step 1: restore register */
998 xhci_restore_registers(xhci);
999 /* step 2: initialize command ring buffer */
1000 xhci_set_cmd_ring_deq(xhci);
1001 /* step 3: restore state and start state*/
1002 /* step 3: set CRS flag */
1003 command = readl(&xhci->op_regs->command);
1005 writel(command, &xhci->op_regs->command);
1006 if (xhci_handshake(&xhci->op_regs->status,
1007 STS_RESTORE, 0, 10 * 1000)) {
1008 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1009 spin_unlock_irq(&xhci->lock);
1012 temp = readl(&xhci->op_regs->status);
1015 /* If restore operation fails, re-initialize the HC during resume */
1016 if ((temp & STS_SRE) || hibernated) {
1018 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1019 !(xhci_all_ports_seen_u0(xhci))) {
1020 del_timer_sync(&xhci->comp_mode_recovery_timer);
1021 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1022 "Compliance Mode Recovery Timer deleted!");
1025 /* Let the USB core know _both_ roothubs lost power. */
1026 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1027 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1029 xhci_dbg(xhci, "Stop HCD\n");
1032 spin_unlock_irq(&xhci->lock);
1033 xhci_cleanup_msix(xhci);
1035 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1036 temp = readl(&xhci->op_regs->status);
1037 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1038 temp = readl(&xhci->ir_set->irq_pending);
1039 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1040 xhci_print_ir_set(xhci, 0);
1042 xhci_dbg(xhci, "cleaning up memory\n");
1043 xhci_mem_cleanup(xhci);
1044 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1045 readl(&xhci->op_regs->status));
1047 /* USB core calls the PCI reinit and start functions twice:
1048 * first with the primary HCD, and then with the secondary HCD.
1049 * If we don't do the same, the host will never be started.
1051 if (!usb_hcd_is_primary_hcd(hcd))
1052 secondary_hcd = hcd;
1054 secondary_hcd = xhci->shared_hcd;
1056 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1057 retval = xhci_init(hcd->primary_hcd);
1060 comp_timer_running = true;
1062 xhci_dbg(xhci, "Start the primary HCD\n");
1063 retval = xhci_run(hcd->primary_hcd);
1065 xhci_dbg(xhci, "Start the secondary HCD\n");
1066 retval = xhci_run(secondary_hcd);
1068 hcd->state = HC_STATE_SUSPENDED;
1069 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1073 /* step 4: set Run/Stop bit */
1074 command = readl(&xhci->op_regs->command);
1076 writel(command, &xhci->op_regs->command);
1077 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1080 /* step 5: walk topology and initialize portsc,
1081 * portpmsc and portli
1083 /* this is done in bus_resume */
1085 /* step 6: restart each of the previously
1086 * Running endpoints by ringing their doorbells
1089 spin_unlock_irq(&xhci->lock);
1093 /* Resume root hubs only when have pending events. */
1094 status = readl(&xhci->op_regs->status);
1095 if (status & STS_EINT) {
1096 usb_hcd_resume_root_hub(hcd);
1097 usb_hcd_resume_root_hub(xhci->shared_hcd);
1102 * If system is subject to the Quirk, Compliance Mode Timer needs to
1103 * be re-initialized Always after a system resume. Ports are subject
1104 * to suffer the Compliance Mode issue again. It doesn't matter if
1105 * ports have entered previously to U0 before system's suspension.
1107 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1108 compliance_mode_recovery_timer_init(xhci);
1110 /* Re-enable port polling. */
1111 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1112 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1113 usb_hcd_poll_rh_status(hcd);
1114 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1115 usb_hcd_poll_rh_status(xhci->shared_hcd);
1119 EXPORT_SYMBOL_GPL(xhci_resume);
1120 #endif /* CONFIG_PM */
1122 /*-------------------------------------------------------------------------*/
1125 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1126 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1127 * value to right shift 1 for the bitmask.
1129 * Index = (epnum * 2) + direction - 1,
1130 * where direction = 0 for OUT, 1 for IN.
1131 * For control endpoints, the IN index is used (OUT index is unused), so
1132 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1134 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1137 if (usb_endpoint_xfer_control(desc))
1138 index = (unsigned int) (usb_endpoint_num(desc)*2);
1140 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1141 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1145 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1146 * address from the XHCI endpoint index.
1148 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1150 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1151 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1152 return direction | number;
1155 /* Find the flag for this endpoint (for use in the control context). Use the
1156 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1159 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1161 return 1 << (xhci_get_endpoint_index(desc) + 1);
1164 /* Find the flag for this endpoint (for use in the control context). Use the
1165 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1168 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1170 return 1 << (ep_index + 1);
1173 /* Compute the last valid endpoint context index. Basically, this is the
1174 * endpoint index plus one. For slot contexts with more than valid endpoint,
1175 * we find the most significant bit set in the added contexts flags.
1176 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1177 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1179 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1181 return fls(added_ctxs) - 1;
1184 /* Returns 1 if the arguments are OK;
1185 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1187 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1188 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1190 struct xhci_hcd *xhci;
1191 struct xhci_virt_device *virt_dev;
1193 if (!hcd || (check_ep && !ep) || !udev) {
1194 pr_debug("xHCI %s called with invalid args\n", func);
1197 if (!udev->parent) {
1198 pr_debug("xHCI %s called for root hub\n", func);
1202 xhci = hcd_to_xhci(hcd);
1203 if (check_virt_dev) {
1204 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1205 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1210 virt_dev = xhci->devs[udev->slot_id];
1211 if (virt_dev->udev != udev) {
1212 xhci_dbg(xhci, "xHCI %s called with udev and "
1213 "virt_dev does not match\n", func);
1218 if (xhci->xhc_state & XHCI_STATE_HALTED)
1224 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1225 struct usb_device *udev, struct xhci_command *command,
1226 bool ctx_change, bool must_succeed);
1229 * Full speed devices may have a max packet size greater than 8 bytes, but the
1230 * USB core doesn't know that until it reads the first 8 bytes of the
1231 * descriptor. If the usb_device's max packet size changes after that point,
1232 * we need to issue an evaluate context command and wait on it.
1234 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1235 unsigned int ep_index, struct urb *urb)
1237 struct xhci_container_ctx *out_ctx;
1238 struct xhci_input_control_ctx *ctrl_ctx;
1239 struct xhci_ep_ctx *ep_ctx;
1240 struct xhci_command *command;
1241 int max_packet_size;
1242 int hw_max_packet_size;
1245 out_ctx = xhci->devs[slot_id]->out_ctx;
1246 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1247 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1248 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1249 if (hw_max_packet_size != max_packet_size) {
1250 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1251 "Max Packet Size for ep 0 changed.");
1252 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1253 "Max packet size in usb_device = %d",
1255 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1256 "Max packet size in xHCI HW = %d",
1257 hw_max_packet_size);
1258 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1259 "Issuing evaluate context command.");
1261 /* Set up the input context flags for the command */
1262 /* FIXME: This won't work if a non-default control endpoint
1263 * changes max packet sizes.
1266 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1270 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1271 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1273 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1276 goto command_cleanup;
1278 /* Set up the modified control endpoint 0 */
1279 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1280 xhci->devs[slot_id]->out_ctx, ep_index);
1282 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1283 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1284 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1286 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1287 ctrl_ctx->drop_flags = 0;
1289 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1290 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1291 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1292 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1294 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1297 /* Clean up the input context for later use by bandwidth
1300 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1302 kfree(command->completion);
1309 * non-error returns are a promise to giveback() the urb later
1310 * we drop ownership so next owner (or urb unlink) can get it
1312 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1314 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1315 struct xhci_td *buffer;
1316 unsigned long flags;
1318 unsigned int slot_id, ep_index;
1319 struct urb_priv *urb_priv;
1322 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1323 true, true, __func__) <= 0)
1326 slot_id = urb->dev->slot_id;
1327 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1329 if (!HCD_HW_ACCESSIBLE(hcd)) {
1330 if (!in_interrupt())
1331 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1336 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1337 size = urb->number_of_packets;
1338 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1339 urb->transfer_buffer_length > 0 &&
1340 urb->transfer_flags & URB_ZERO_PACKET &&
1341 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1346 urb_priv = kzalloc(sizeof(struct urb_priv) +
1347 size * sizeof(struct xhci_td *), mem_flags);
1351 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1357 for (i = 0; i < size; i++) {
1358 urb_priv->td[i] = buffer;
1362 urb_priv->length = size;
1363 urb_priv->td_cnt = 0;
1364 urb->hcpriv = urb_priv;
1366 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1367 /* Check to see if the max packet size for the default control
1368 * endpoint changed during FS device enumeration
1370 if (urb->dev->speed == USB_SPEED_FULL) {
1371 ret = xhci_check_maxpacket(xhci, slot_id,
1374 xhci_urb_free_priv(urb_priv);
1380 /* We have a spinlock and interrupts disabled, so we must pass
1381 * atomic context to this function, which may allocate memory.
1383 spin_lock_irqsave(&xhci->lock, flags);
1384 if (xhci->xhc_state & XHCI_STATE_DYING)
1386 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1390 spin_unlock_irqrestore(&xhci->lock, flags);
1391 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1392 spin_lock_irqsave(&xhci->lock, flags);
1393 if (xhci->xhc_state & XHCI_STATE_DYING)
1395 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1396 EP_GETTING_STREAMS) {
1397 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1398 "is transitioning to using streams.\n");
1400 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1401 EP_GETTING_NO_STREAMS) {
1402 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1403 "is transitioning to "
1404 "not having streams.\n");
1407 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1412 spin_unlock_irqrestore(&xhci->lock, flags);
1413 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1414 spin_lock_irqsave(&xhci->lock, flags);
1415 if (xhci->xhc_state & XHCI_STATE_DYING)
1417 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1421 spin_unlock_irqrestore(&xhci->lock, flags);
1423 spin_lock_irqsave(&xhci->lock, flags);
1424 if (xhci->xhc_state & XHCI_STATE_DYING)
1426 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1430 spin_unlock_irqrestore(&xhci->lock, flags);
1435 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1436 "non-responsive xHCI host.\n",
1437 urb->ep->desc.bEndpointAddress, urb);
1440 xhci_urb_free_priv(urb_priv);
1442 spin_unlock_irqrestore(&xhci->lock, flags);
1446 /* Get the right ring for the given URB.
1447 * If the endpoint supports streams, boundary check the URB's stream ID.
1448 * If the endpoint doesn't support streams, return the singular endpoint ring.
1450 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1453 unsigned int slot_id;
1454 unsigned int ep_index;
1455 unsigned int stream_id;
1456 struct xhci_virt_ep *ep;
1458 slot_id = urb->dev->slot_id;
1459 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1460 stream_id = urb->stream_id;
1461 ep = &xhci->devs[slot_id]->eps[ep_index];
1462 /* Common case: no streams */
1463 if (!(ep->ep_state & EP_HAS_STREAMS))
1466 if (stream_id == 0) {
1468 "WARN: Slot ID %u, ep index %u has streams, "
1469 "but URB has no stream ID.\n",
1474 if (stream_id < ep->stream_info->num_streams)
1475 return ep->stream_info->stream_rings[stream_id];
1478 "WARN: Slot ID %u, ep index %u has "
1479 "stream IDs 1 to %u allocated, "
1480 "but stream ID %u is requested.\n",
1482 ep->stream_info->num_streams - 1,
1488 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1489 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1490 * should pick up where it left off in the TD, unless a Set Transfer Ring
1491 * Dequeue Pointer is issued.
1493 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1494 * the ring. Since the ring is a contiguous structure, they can't be physically
1495 * removed. Instead, there are two options:
1497 * 1) If the HC is in the middle of processing the URB to be canceled, we
1498 * simply move the ring's dequeue pointer past those TRBs using the Set
1499 * Transfer Ring Dequeue Pointer command. This will be the common case,
1500 * when drivers timeout on the last submitted URB and attempt to cancel.
1502 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1503 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1504 * HC will need to invalidate the any TRBs it has cached after the stop
1505 * endpoint command, as noted in the xHCI 0.95 errata.
1507 * 3) The TD may have completed by the time the Stop Endpoint Command
1508 * completes, so software needs to handle that case too.
1510 * This function should protect against the TD enqueueing code ringing the
1511 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1512 * It also needs to account for multiple cancellations on happening at the same
1513 * time for the same endpoint.
1515 * Note that this function can be called in any context, or so says
1516 * usb_hcd_unlink_urb()
1518 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1520 unsigned long flags;
1523 struct xhci_hcd *xhci;
1524 struct urb_priv *urb_priv;
1526 unsigned int ep_index;
1527 struct xhci_ring *ep_ring;
1528 struct xhci_virt_ep *ep;
1529 struct xhci_command *command;
1531 xhci = hcd_to_xhci(hcd);
1532 spin_lock_irqsave(&xhci->lock, flags);
1533 /* Make sure the URB hasn't completed or been unlinked already */
1534 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1535 if (ret || !urb->hcpriv)
1537 temp = readl(&xhci->op_regs->status);
1538 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1539 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1540 "HW died, freeing TD.");
1541 urb_priv = urb->hcpriv;
1542 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1543 td = urb_priv->td[i];
1544 if (!list_empty(&td->td_list))
1545 list_del_init(&td->td_list);
1546 if (!list_empty(&td->cancelled_td_list))
1547 list_del_init(&td->cancelled_td_list);
1550 usb_hcd_unlink_urb_from_ep(hcd, urb);
1551 spin_unlock_irqrestore(&xhci->lock, flags);
1552 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1553 xhci_urb_free_priv(urb_priv);
1556 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1557 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1558 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1559 "Ep 0x%x: URB %p to be canceled on "
1560 "non-responsive xHCI host.",
1561 urb->ep->desc.bEndpointAddress, urb);
1562 /* Let the stop endpoint command watchdog timer (which set this
1563 * state) finish cleaning up the endpoint TD lists. We must
1564 * have caught it in the middle of dropping a lock and giving
1570 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1571 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1572 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1578 urb_priv = urb->hcpriv;
1579 i = urb_priv->td_cnt;
1580 if (i < urb_priv->length)
1581 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1582 "Cancel URB %p, dev %s, ep 0x%x, "
1583 "starting at offset 0x%llx",
1584 urb, urb->dev->devpath,
1585 urb->ep->desc.bEndpointAddress,
1586 (unsigned long long) xhci_trb_virt_to_dma(
1587 urb_priv->td[i]->start_seg,
1588 urb_priv->td[i]->first_trb));
1590 for (; i < urb_priv->length; i++) {
1591 td = urb_priv->td[i];
1592 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1595 /* Queue a stop endpoint command, but only if this is
1596 * the first cancellation to be handled.
1598 if (!(ep->ep_state & EP_HALT_PENDING)) {
1599 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1604 ep->ep_state |= EP_HALT_PENDING;
1605 ep->stop_cmds_pending++;
1606 ep->stop_cmd_timer.expires = jiffies +
1607 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1608 add_timer(&ep->stop_cmd_timer);
1609 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1611 xhci_ring_cmd_db(xhci);
1614 spin_unlock_irqrestore(&xhci->lock, flags);
1618 /* Drop an endpoint from a new bandwidth configuration for this device.
1619 * Only one call to this function is allowed per endpoint before
1620 * check_bandwidth() or reset_bandwidth() must be called.
1621 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1622 * add the endpoint to the schedule with possibly new parameters denoted by a
1623 * different endpoint descriptor in usb_host_endpoint.
1624 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1627 * The USB core will not allow URBs to be queued to an endpoint that is being
1628 * disabled, so there's no need for mutual exclusion to protect
1629 * the xhci->devs[slot_id] structure.
1631 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1632 struct usb_host_endpoint *ep)
1634 struct xhci_hcd *xhci;
1635 struct xhci_container_ctx *in_ctx, *out_ctx;
1636 struct xhci_input_control_ctx *ctrl_ctx;
1637 unsigned int ep_index;
1638 struct xhci_ep_ctx *ep_ctx;
1640 u32 new_add_flags, new_drop_flags;
1643 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1646 xhci = hcd_to_xhci(hcd);
1647 if (xhci->xhc_state & XHCI_STATE_DYING)
1650 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1651 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1652 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1653 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1654 __func__, drop_flag);
1658 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1659 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1660 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1662 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1667 ep_index = xhci_get_endpoint_index(&ep->desc);
1668 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1669 /* If the HC already knows the endpoint is disabled,
1670 * or the HCD has noted it is disabled, ignore this request
1672 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1673 cpu_to_le32(EP_STATE_DISABLED)) ||
1674 le32_to_cpu(ctrl_ctx->drop_flags) &
1675 xhci_get_endpoint_flag(&ep->desc)) {
1676 /* Do not warn when called after a usb_device_reset */
1677 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1678 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1683 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1684 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1686 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1687 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1689 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1691 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1692 (unsigned int) ep->desc.bEndpointAddress,
1694 (unsigned int) new_drop_flags,
1695 (unsigned int) new_add_flags);
1699 /* Add an endpoint to a new possible bandwidth configuration for this device.
1700 * Only one call to this function is allowed per endpoint before
1701 * check_bandwidth() or reset_bandwidth() must be called.
1702 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1703 * add the endpoint to the schedule with possibly new parameters denoted by a
1704 * different endpoint descriptor in usb_host_endpoint.
1705 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1708 * The USB core will not allow URBs to be queued to an endpoint until the
1709 * configuration or alt setting is installed in the device, so there's no need
1710 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1712 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1713 struct usb_host_endpoint *ep)
1715 struct xhci_hcd *xhci;
1716 struct xhci_container_ctx *in_ctx;
1717 unsigned int ep_index;
1718 struct xhci_input_control_ctx *ctrl_ctx;
1720 u32 new_add_flags, new_drop_flags;
1721 struct xhci_virt_device *virt_dev;
1724 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1726 /* So we won't queue a reset ep command for a root hub */
1730 xhci = hcd_to_xhci(hcd);
1731 if (xhci->xhc_state & XHCI_STATE_DYING)
1734 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1735 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1736 /* FIXME when we have to issue an evaluate endpoint command to
1737 * deal with ep0 max packet size changing once we get the
1740 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1741 __func__, added_ctxs);
1745 virt_dev = xhci->devs[udev->slot_id];
1746 in_ctx = virt_dev->in_ctx;
1747 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1749 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1754 ep_index = xhci_get_endpoint_index(&ep->desc);
1755 /* If this endpoint is already in use, and the upper layers are trying
1756 * to add it again without dropping it, reject the addition.
1758 if (virt_dev->eps[ep_index].ring &&
1759 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1760 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1761 "without dropping it.\n",
1762 (unsigned int) ep->desc.bEndpointAddress);
1766 /* If the HCD has already noted the endpoint is enabled,
1767 * ignore this request.
1769 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1770 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1776 * Configuration and alternate setting changes must be done in
1777 * process context, not interrupt context (or so documenation
1778 * for usb_set_interface() and usb_set_configuration() claim).
1780 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1781 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1782 __func__, ep->desc.bEndpointAddress);
1786 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1787 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1789 /* If xhci_endpoint_disable() was called for this endpoint, but the
1790 * xHC hasn't been notified yet through the check_bandwidth() call,
1791 * this re-adds a new state for the endpoint from the new endpoint
1792 * descriptors. We must drop and re-add this endpoint, so we leave the
1795 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1797 /* Store the usb_device pointer for later use */
1800 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1801 (unsigned int) ep->desc.bEndpointAddress,
1803 (unsigned int) new_drop_flags,
1804 (unsigned int) new_add_flags);
1808 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1810 struct xhci_input_control_ctx *ctrl_ctx;
1811 struct xhci_ep_ctx *ep_ctx;
1812 struct xhci_slot_ctx *slot_ctx;
1815 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1817 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1822 /* When a device's add flag and drop flag are zero, any subsequent
1823 * configure endpoint command will leave that endpoint's state
1824 * untouched. Make sure we don't leave any old state in the input
1825 * endpoint contexts.
1827 ctrl_ctx->drop_flags = 0;
1828 ctrl_ctx->add_flags = 0;
1829 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1830 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1831 /* Endpoint 0 is always valid */
1832 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1833 for (i = 1; i < 31; ++i) {
1834 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1835 ep_ctx->ep_info = 0;
1836 ep_ctx->ep_info2 = 0;
1838 ep_ctx->tx_info = 0;
1842 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1843 struct usb_device *udev, u32 *cmd_status)
1847 switch (*cmd_status) {
1848 case COMP_CMD_ABORT:
1850 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1854 dev_warn(&udev->dev,
1855 "Not enough host controller resources for new device state.\n");
1857 /* FIXME: can we allocate more resources for the HC? */
1860 case COMP_2ND_BW_ERR:
1861 dev_warn(&udev->dev,
1862 "Not enough bandwidth for new device state.\n");
1864 /* FIXME: can we go back to the old state? */
1867 /* the HCD set up something wrong */
1868 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1870 "and endpoint is not disabled.\n");
1874 dev_warn(&udev->dev,
1875 "ERROR: Incompatible device for endpoint configure command.\n");
1879 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1880 "Successful Endpoint Configure command");
1884 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1892 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1893 struct usb_device *udev, u32 *cmd_status)
1896 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1898 switch (*cmd_status) {
1899 case COMP_CMD_ABORT:
1901 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1905 dev_warn(&udev->dev,
1906 "WARN: xHCI driver setup invalid evaluate context command.\n");
1910 dev_warn(&udev->dev,
1911 "WARN: slot not enabled for evaluate context command.\n");
1914 case COMP_CTX_STATE:
1915 dev_warn(&udev->dev,
1916 "WARN: invalid context state for evaluate context command.\n");
1917 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1921 dev_warn(&udev->dev,
1922 "ERROR: Incompatible device for evaluate context command.\n");
1926 /* Max Exit Latency too large error */
1927 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1931 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1932 "Successful evaluate context command");
1936 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1944 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1945 struct xhci_input_control_ctx *ctrl_ctx)
1947 u32 valid_add_flags;
1948 u32 valid_drop_flags;
1950 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1951 * (bit 1). The default control endpoint is added during the Address
1952 * Device command and is never removed until the slot is disabled.
1954 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1955 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1957 /* Use hweight32 to count the number of ones in the add flags, or
1958 * number of endpoints added. Don't count endpoints that are changed
1959 * (both added and dropped).
1961 return hweight32(valid_add_flags) -
1962 hweight32(valid_add_flags & valid_drop_flags);
1965 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1966 struct xhci_input_control_ctx *ctrl_ctx)
1968 u32 valid_add_flags;
1969 u32 valid_drop_flags;
1971 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1972 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1974 return hweight32(valid_drop_flags) -
1975 hweight32(valid_add_flags & valid_drop_flags);
1979 * We need to reserve the new number of endpoints before the configure endpoint
1980 * command completes. We can't subtract the dropped endpoints from the number
1981 * of active endpoints until the command completes because we can oversubscribe
1982 * the host in this case:
1984 * - the first configure endpoint command drops more endpoints than it adds
1985 * - a second configure endpoint command that adds more endpoints is queued
1986 * - the first configure endpoint command fails, so the config is unchanged
1987 * - the second command may succeed, even though there isn't enough resources
1989 * Must be called with xhci->lock held.
1991 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1992 struct xhci_input_control_ctx *ctrl_ctx)
1996 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1997 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1998 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1999 "Not enough ep ctxs: "
2000 "%u active, need to add %u, limit is %u.",
2001 xhci->num_active_eps, added_eps,
2002 xhci->limit_active_eps);
2005 xhci->num_active_eps += added_eps;
2006 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2007 "Adding %u ep ctxs, %u now active.", added_eps,
2008 xhci->num_active_eps);
2013 * The configure endpoint was failed by the xHC for some other reason, so we
2014 * need to revert the resources that failed configuration would have used.
2016 * Must be called with xhci->lock held.
2018 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2019 struct xhci_input_control_ctx *ctrl_ctx)
2023 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2024 xhci->num_active_eps -= num_failed_eps;
2025 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2026 "Removing %u failed ep ctxs, %u now active.",
2028 xhci->num_active_eps);
2032 * Now that the command has completed, clean up the active endpoint count by
2033 * subtracting out the endpoints that were dropped (but not changed).
2035 * Must be called with xhci->lock held.
2037 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2038 struct xhci_input_control_ctx *ctrl_ctx)
2040 u32 num_dropped_eps;
2042 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2043 xhci->num_active_eps -= num_dropped_eps;
2044 if (num_dropped_eps)
2045 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2046 "Removing %u dropped ep ctxs, %u now active.",
2048 xhci->num_active_eps);
2051 static unsigned int xhci_get_block_size(struct usb_device *udev)
2053 switch (udev->speed) {
2055 case USB_SPEED_FULL:
2057 case USB_SPEED_HIGH:
2059 case USB_SPEED_SUPER:
2061 case USB_SPEED_UNKNOWN:
2062 case USB_SPEED_WIRELESS:
2064 /* Should never happen */
2070 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2072 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2074 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2079 /* If we are changing a LS/FS device under a HS hub,
2080 * make sure (if we are activating a new TT) that the HS bus has enough
2081 * bandwidth for this new TT.
2083 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2084 struct xhci_virt_device *virt_dev,
2087 struct xhci_interval_bw_table *bw_table;
2088 struct xhci_tt_bw_info *tt_info;
2090 /* Find the bandwidth table for the root port this TT is attached to. */
2091 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2092 tt_info = virt_dev->tt_info;
2093 /* If this TT already had active endpoints, the bandwidth for this TT
2094 * has already been added. Removing all periodic endpoints (and thus
2095 * making the TT enactive) will only decrease the bandwidth used.
2099 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2100 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2104 /* Not sure why we would have no new active endpoints...
2106 * Maybe because of an Evaluate Context change for a hub update or a
2107 * control endpoint 0 max packet size change?
2108 * FIXME: skip the bandwidth calculation in that case.
2113 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2114 struct xhci_virt_device *virt_dev)
2116 unsigned int bw_reserved;
2118 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2119 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2122 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2123 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2130 * This algorithm is a very conservative estimate of the worst-case scheduling
2131 * scenario for any one interval. The hardware dynamically schedules the
2132 * packets, so we can't tell which microframe could be the limiting factor in
2133 * the bandwidth scheduling. This only takes into account periodic endpoints.
2135 * Obviously, we can't solve an NP complete problem to find the minimum worst
2136 * case scenario. Instead, we come up with an estimate that is no less than
2137 * the worst case bandwidth used for any one microframe, but may be an
2140 * We walk the requirements for each endpoint by interval, starting with the
2141 * smallest interval, and place packets in the schedule where there is only one
2142 * possible way to schedule packets for that interval. In order to simplify
2143 * this algorithm, we record the largest max packet size for each interval, and
2144 * assume all packets will be that size.
2146 * For interval 0, we obviously must schedule all packets for each interval.
2147 * The bandwidth for interval 0 is just the amount of data to be transmitted
2148 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2149 * the number of packets).
2151 * For interval 1, we have two possible microframes to schedule those packets
2152 * in. For this algorithm, if we can schedule the same number of packets for
2153 * each possible scheduling opportunity (each microframe), we will do so. The
2154 * remaining number of packets will be saved to be transmitted in the gaps in
2155 * the next interval's scheduling sequence.
2157 * As we move those remaining packets to be scheduled with interval 2 packets,
2158 * we have to double the number of remaining packets to transmit. This is
2159 * because the intervals are actually powers of 2, and we would be transmitting
2160 * the previous interval's packets twice in this interval. We also have to be
2161 * sure that when we look at the largest max packet size for this interval, we
2162 * also look at the largest max packet size for the remaining packets and take
2163 * the greater of the two.
2165 * The algorithm continues to evenly distribute packets in each scheduling
2166 * opportunity, and push the remaining packets out, until we get to the last
2167 * interval. Then those packets and their associated overhead are just added
2168 * to the bandwidth used.
2170 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2171 struct xhci_virt_device *virt_dev,
2174 unsigned int bw_reserved;
2175 unsigned int max_bandwidth;
2176 unsigned int bw_used;
2177 unsigned int block_size;
2178 struct xhci_interval_bw_table *bw_table;
2179 unsigned int packet_size = 0;
2180 unsigned int overhead = 0;
2181 unsigned int packets_transmitted = 0;
2182 unsigned int packets_remaining = 0;
2185 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2186 return xhci_check_ss_bw(xhci, virt_dev);
2188 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2189 max_bandwidth = HS_BW_LIMIT;
2190 /* Convert percent of bus BW reserved to blocks reserved */
2191 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2193 max_bandwidth = FS_BW_LIMIT;
2194 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2197 bw_table = virt_dev->bw_table;
2198 /* We need to translate the max packet size and max ESIT payloads into
2199 * the units the hardware uses.
2201 block_size = xhci_get_block_size(virt_dev->udev);
2203 /* If we are manipulating a LS/FS device under a HS hub, double check
2204 * that the HS bus has enough bandwidth if we are activing a new TT.
2206 if (virt_dev->tt_info) {
2207 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2208 "Recalculating BW for rootport %u",
2209 virt_dev->real_port);
2210 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2211 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2212 "newly activated TT.\n");
2215 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2216 "Recalculating BW for TT slot %u port %u",
2217 virt_dev->tt_info->slot_id,
2218 virt_dev->tt_info->ttport);
2220 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2221 "Recalculating BW for rootport %u",
2222 virt_dev->real_port);
2225 /* Add in how much bandwidth will be used for interval zero, or the
2226 * rounded max ESIT payload + number of packets * largest overhead.
2228 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2229 bw_table->interval_bw[0].num_packets *
2230 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2232 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2233 unsigned int bw_added;
2234 unsigned int largest_mps;
2235 unsigned int interval_overhead;
2238 * How many packets could we transmit in this interval?
2239 * If packets didn't fit in the previous interval, we will need
2240 * to transmit that many packets twice within this interval.
2242 packets_remaining = 2 * packets_remaining +
2243 bw_table->interval_bw[i].num_packets;
2245 /* Find the largest max packet size of this or the previous
2248 if (list_empty(&bw_table->interval_bw[i].endpoints))
2251 struct xhci_virt_ep *virt_ep;
2252 struct list_head *ep_entry;
2254 ep_entry = bw_table->interval_bw[i].endpoints.next;
2255 virt_ep = list_entry(ep_entry,
2256 struct xhci_virt_ep, bw_endpoint_list);
2257 /* Convert to blocks, rounding up */
2258 largest_mps = DIV_ROUND_UP(
2259 virt_ep->bw_info.max_packet_size,
2262 if (largest_mps > packet_size)
2263 packet_size = largest_mps;
2265 /* Use the larger overhead of this or the previous interval. */
2266 interval_overhead = xhci_get_largest_overhead(
2267 &bw_table->interval_bw[i]);
2268 if (interval_overhead > overhead)
2269 overhead = interval_overhead;
2271 /* How many packets can we evenly distribute across
2272 * (1 << (i + 1)) possible scheduling opportunities?
2274 packets_transmitted = packets_remaining >> (i + 1);
2276 /* Add in the bandwidth used for those scheduled packets */
2277 bw_added = packets_transmitted * (overhead + packet_size);
2279 /* How many packets do we have remaining to transmit? */
2280 packets_remaining = packets_remaining % (1 << (i + 1));
2282 /* What largest max packet size should those packets have? */
2283 /* If we've transmitted all packets, don't carry over the
2284 * largest packet size.
2286 if (packets_remaining == 0) {
2289 } else if (packets_transmitted > 0) {
2290 /* Otherwise if we do have remaining packets, and we've
2291 * scheduled some packets in this interval, take the
2292 * largest max packet size from endpoints with this
2295 packet_size = largest_mps;
2296 overhead = interval_overhead;
2298 /* Otherwise carry over packet_size and overhead from the last
2299 * time we had a remainder.
2301 bw_used += bw_added;
2302 if (bw_used > max_bandwidth) {
2303 xhci_warn(xhci, "Not enough bandwidth. "
2304 "Proposed: %u, Max: %u\n",
2305 bw_used, max_bandwidth);
2310 * Ok, we know we have some packets left over after even-handedly
2311 * scheduling interval 15. We don't know which microframes they will
2312 * fit into, so we over-schedule and say they will be scheduled every
2315 if (packets_remaining > 0)
2316 bw_used += overhead + packet_size;
2318 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2319 unsigned int port_index = virt_dev->real_port - 1;
2321 /* OK, we're manipulating a HS device attached to a
2322 * root port bandwidth domain. Include the number of active TTs
2323 * in the bandwidth used.
2325 bw_used += TT_HS_OVERHEAD *
2326 xhci->rh_bw[port_index].num_active_tts;
2329 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2330 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2331 "Available: %u " "percent",
2332 bw_used, max_bandwidth, bw_reserved,
2333 (max_bandwidth - bw_used - bw_reserved) * 100 /
2336 bw_used += bw_reserved;
2337 if (bw_used > max_bandwidth) {
2338 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2339 bw_used, max_bandwidth);
2343 bw_table->bw_used = bw_used;
2347 static bool xhci_is_async_ep(unsigned int ep_type)
2349 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2350 ep_type != ISOC_IN_EP &&
2351 ep_type != INT_IN_EP);
2354 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2356 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2359 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2361 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2363 if (ep_bw->ep_interval == 0)
2364 return SS_OVERHEAD_BURST +
2365 (ep_bw->mult * ep_bw->num_packets *
2366 (SS_OVERHEAD + mps));
2367 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2368 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2369 1 << ep_bw->ep_interval);
2373 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2374 struct xhci_bw_info *ep_bw,
2375 struct xhci_interval_bw_table *bw_table,
2376 struct usb_device *udev,
2377 struct xhci_virt_ep *virt_ep,
2378 struct xhci_tt_bw_info *tt_info)
2380 struct xhci_interval_bw *interval_bw;
2381 int normalized_interval;
2383 if (xhci_is_async_ep(ep_bw->type))
2386 if (udev->speed == USB_SPEED_SUPER) {
2387 if (xhci_is_sync_in_ep(ep_bw->type))
2388 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2389 xhci_get_ss_bw_consumed(ep_bw);
2391 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2392 xhci_get_ss_bw_consumed(ep_bw);
2396 /* SuperSpeed endpoints never get added to intervals in the table, so
2397 * this check is only valid for HS/FS/LS devices.
2399 if (list_empty(&virt_ep->bw_endpoint_list))
2401 /* For LS/FS devices, we need to translate the interval expressed in
2402 * microframes to frames.
2404 if (udev->speed == USB_SPEED_HIGH)
2405 normalized_interval = ep_bw->ep_interval;
2407 normalized_interval = ep_bw->ep_interval - 3;
2409 if (normalized_interval == 0)
2410 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2411 interval_bw = &bw_table->interval_bw[normalized_interval];
2412 interval_bw->num_packets -= ep_bw->num_packets;
2413 switch (udev->speed) {
2415 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2417 case USB_SPEED_FULL:
2418 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2420 case USB_SPEED_HIGH:
2421 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2423 case USB_SPEED_SUPER:
2424 case USB_SPEED_UNKNOWN:
2425 case USB_SPEED_WIRELESS:
2426 /* Should never happen because only LS/FS/HS endpoints will get
2427 * added to the endpoint list.
2432 tt_info->active_eps -= 1;
2433 list_del_init(&virt_ep->bw_endpoint_list);
2436 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2437 struct xhci_bw_info *ep_bw,
2438 struct xhci_interval_bw_table *bw_table,
2439 struct usb_device *udev,
2440 struct xhci_virt_ep *virt_ep,
2441 struct xhci_tt_bw_info *tt_info)
2443 struct xhci_interval_bw *interval_bw;
2444 struct xhci_virt_ep *smaller_ep;
2445 int normalized_interval;
2447 if (xhci_is_async_ep(ep_bw->type))
2450 if (udev->speed == USB_SPEED_SUPER) {
2451 if (xhci_is_sync_in_ep(ep_bw->type))
2452 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2453 xhci_get_ss_bw_consumed(ep_bw);
2455 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2456 xhci_get_ss_bw_consumed(ep_bw);
2460 /* For LS/FS devices, we need to translate the interval expressed in
2461 * microframes to frames.
2463 if (udev->speed == USB_SPEED_HIGH)
2464 normalized_interval = ep_bw->ep_interval;
2466 normalized_interval = ep_bw->ep_interval - 3;
2468 if (normalized_interval == 0)
2469 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2470 interval_bw = &bw_table->interval_bw[normalized_interval];
2471 interval_bw->num_packets += ep_bw->num_packets;
2472 switch (udev->speed) {
2474 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2476 case USB_SPEED_FULL:
2477 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2479 case USB_SPEED_HIGH:
2480 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2482 case USB_SPEED_SUPER:
2483 case USB_SPEED_UNKNOWN:
2484 case USB_SPEED_WIRELESS:
2485 /* Should never happen because only LS/FS/HS endpoints will get
2486 * added to the endpoint list.
2492 tt_info->active_eps += 1;
2493 /* Insert the endpoint into the list, largest max packet size first. */
2494 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2496 if (ep_bw->max_packet_size >=
2497 smaller_ep->bw_info.max_packet_size) {
2498 /* Add the new ep before the smaller endpoint */
2499 list_add_tail(&virt_ep->bw_endpoint_list,
2500 &smaller_ep->bw_endpoint_list);
2504 /* Add the new endpoint at the end of the list. */
2505 list_add_tail(&virt_ep->bw_endpoint_list,
2506 &interval_bw->endpoints);
2509 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2510 struct xhci_virt_device *virt_dev,
2513 struct xhci_root_port_bw_info *rh_bw_info;
2514 if (!virt_dev->tt_info)
2517 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2518 if (old_active_eps == 0 &&
2519 virt_dev->tt_info->active_eps != 0) {
2520 rh_bw_info->num_active_tts += 1;
2521 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2522 } else if (old_active_eps != 0 &&
2523 virt_dev->tt_info->active_eps == 0) {
2524 rh_bw_info->num_active_tts -= 1;
2525 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2529 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2530 struct xhci_virt_device *virt_dev,
2531 struct xhci_container_ctx *in_ctx)
2533 struct xhci_bw_info ep_bw_info[31];
2535 struct xhci_input_control_ctx *ctrl_ctx;
2536 int old_active_eps = 0;
2538 if (virt_dev->tt_info)
2539 old_active_eps = virt_dev->tt_info->active_eps;
2541 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2543 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2548 for (i = 0; i < 31; i++) {
2549 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2552 /* Make a copy of the BW info in case we need to revert this */
2553 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2554 sizeof(ep_bw_info[i]));
2555 /* Drop the endpoint from the interval table if the endpoint is
2556 * being dropped or changed.
2558 if (EP_IS_DROPPED(ctrl_ctx, i))
2559 xhci_drop_ep_from_interval_table(xhci,
2560 &virt_dev->eps[i].bw_info,
2566 /* Overwrite the information stored in the endpoints' bw_info */
2567 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2568 for (i = 0; i < 31; i++) {
2569 /* Add any changed or added endpoints to the interval table */
2570 if (EP_IS_ADDED(ctrl_ctx, i))
2571 xhci_add_ep_to_interval_table(xhci,
2572 &virt_dev->eps[i].bw_info,
2579 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2580 /* Ok, this fits in the bandwidth we have.
2581 * Update the number of active TTs.
2583 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2587 /* We don't have enough bandwidth for this, revert the stored info. */
2588 for (i = 0; i < 31; i++) {
2589 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2592 /* Drop the new copies of any added or changed endpoints from
2593 * the interval table.
2595 if (EP_IS_ADDED(ctrl_ctx, i)) {
2596 xhci_drop_ep_from_interval_table(xhci,
2597 &virt_dev->eps[i].bw_info,
2603 /* Revert the endpoint back to its old information */
2604 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2605 sizeof(ep_bw_info[i]));
2606 /* Add any changed or dropped endpoints back into the table */
2607 if (EP_IS_DROPPED(ctrl_ctx, i))
2608 xhci_add_ep_to_interval_table(xhci,
2609 &virt_dev->eps[i].bw_info,
2619 /* Issue a configure endpoint command or evaluate context command
2620 * and wait for it to finish.
2622 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2623 struct usb_device *udev,
2624 struct xhci_command *command,
2625 bool ctx_change, bool must_succeed)
2628 unsigned long flags;
2629 struct xhci_input_control_ctx *ctrl_ctx;
2630 struct xhci_virt_device *virt_dev;
2635 spin_lock_irqsave(&xhci->lock, flags);
2636 virt_dev = xhci->devs[udev->slot_id];
2638 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2640 spin_unlock_irqrestore(&xhci->lock, flags);
2641 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2646 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2647 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2648 spin_unlock_irqrestore(&xhci->lock, flags);
2649 xhci_warn(xhci, "Not enough host resources, "
2650 "active endpoint contexts = %u\n",
2651 xhci->num_active_eps);
2654 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2655 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2656 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2657 xhci_free_host_resources(xhci, ctrl_ctx);
2658 spin_unlock_irqrestore(&xhci->lock, flags);
2659 xhci_warn(xhci, "Not enough bandwidth\n");
2664 ret = xhci_queue_configure_endpoint(xhci, command,
2665 command->in_ctx->dma,
2666 udev->slot_id, must_succeed);
2668 ret = xhci_queue_evaluate_context(xhci, command,
2669 command->in_ctx->dma,
2670 udev->slot_id, must_succeed);
2672 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2673 xhci_free_host_resources(xhci, ctrl_ctx);
2674 spin_unlock_irqrestore(&xhci->lock, flags);
2675 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2676 "FIXME allocate a new ring segment");
2679 xhci_ring_cmd_db(xhci);
2680 spin_unlock_irqrestore(&xhci->lock, flags);
2682 /* Wait for the configure endpoint command to complete */
2683 wait_for_completion(command->completion);
2686 ret = xhci_configure_endpoint_result(xhci, udev,
2689 ret = xhci_evaluate_context_result(xhci, udev,
2692 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2693 spin_lock_irqsave(&xhci->lock, flags);
2694 /* If the command failed, remove the reserved resources.
2695 * Otherwise, clean up the estimate to include dropped eps.
2698 xhci_free_host_resources(xhci, ctrl_ctx);
2700 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2701 spin_unlock_irqrestore(&xhci->lock, flags);
2706 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2707 struct xhci_virt_device *vdev, int i)
2709 struct xhci_virt_ep *ep = &vdev->eps[i];
2711 if (ep->ep_state & EP_HAS_STREAMS) {
2712 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2713 xhci_get_endpoint_address(i));
2714 xhci_free_stream_info(xhci, ep->stream_info);
2715 ep->stream_info = NULL;
2716 ep->ep_state &= ~EP_HAS_STREAMS;
2720 /* Called after one or more calls to xhci_add_endpoint() or
2721 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2722 * to call xhci_reset_bandwidth().
2724 * Since we are in the middle of changing either configuration or
2725 * installing a new alt setting, the USB core won't allow URBs to be
2726 * enqueued for any endpoint on the old config or interface. Nothing
2727 * else should be touching the xhci->devs[slot_id] structure, so we
2728 * don't need to take the xhci->lock for manipulating that.
2730 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2734 struct xhci_hcd *xhci;
2735 struct xhci_virt_device *virt_dev;
2736 struct xhci_input_control_ctx *ctrl_ctx;
2737 struct xhci_slot_ctx *slot_ctx;
2738 struct xhci_command *command;
2740 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2743 xhci = hcd_to_xhci(hcd);
2744 if (xhci->xhc_state & XHCI_STATE_DYING)
2747 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2748 virt_dev = xhci->devs[udev->slot_id];
2750 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2754 command->in_ctx = virt_dev->in_ctx;
2756 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2757 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2759 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2762 goto command_cleanup;
2764 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2765 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2766 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2768 /* Don't issue the command if there's no endpoints to update. */
2769 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2770 ctrl_ctx->drop_flags == 0) {
2772 goto command_cleanup;
2774 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2775 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2776 for (i = 31; i >= 1; i--) {
2777 __le32 le32 = cpu_to_le32(BIT(i));
2779 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2780 || (ctrl_ctx->add_flags & le32) || i == 1) {
2781 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2782 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2786 xhci_dbg(xhci, "New Input Control Context:\n");
2787 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2788 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2790 ret = xhci_configure_endpoint(xhci, udev, command,
2793 /* Callee should call reset_bandwidth() */
2794 goto command_cleanup;
2796 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2797 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2798 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2800 /* Free any rings that were dropped, but not changed. */
2801 for (i = 1; i < 31; ++i) {
2802 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2803 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2804 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2805 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2808 xhci_zero_in_ctx(xhci, virt_dev);
2810 * Install any rings for completely new endpoints or changed endpoints,
2811 * and free or cache any old rings from changed endpoints.
2813 for (i = 1; i < 31; ++i) {
2814 if (!virt_dev->eps[i].new_ring)
2816 /* Only cache or free the old ring if it exists.
2817 * It may not if this is the first add of an endpoint.
2819 if (virt_dev->eps[i].ring) {
2820 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2822 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2823 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2824 virt_dev->eps[i].new_ring = NULL;
2827 kfree(command->completion);
2833 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2835 struct xhci_hcd *xhci;
2836 struct xhci_virt_device *virt_dev;
2839 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2842 xhci = hcd_to_xhci(hcd);
2844 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2845 virt_dev = xhci->devs[udev->slot_id];
2846 /* Free any rings allocated for added endpoints */
2847 for (i = 0; i < 31; ++i) {
2848 if (virt_dev->eps[i].new_ring) {
2849 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2850 virt_dev->eps[i].new_ring = NULL;
2853 xhci_zero_in_ctx(xhci, virt_dev);
2856 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2857 struct xhci_container_ctx *in_ctx,
2858 struct xhci_container_ctx *out_ctx,
2859 struct xhci_input_control_ctx *ctrl_ctx,
2860 u32 add_flags, u32 drop_flags)
2862 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2863 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2864 xhci_slot_copy(xhci, in_ctx, out_ctx);
2865 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2867 xhci_dbg(xhci, "Input Context:\n");
2868 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2871 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2872 unsigned int slot_id, unsigned int ep_index,
2873 struct xhci_dequeue_state *deq_state)
2875 struct xhci_input_control_ctx *ctrl_ctx;
2876 struct xhci_container_ctx *in_ctx;
2877 struct xhci_ep_ctx *ep_ctx;
2881 in_ctx = xhci->devs[slot_id]->in_ctx;
2882 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2884 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2889 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2890 xhci->devs[slot_id]->out_ctx, ep_index);
2891 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2892 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2893 deq_state->new_deq_ptr);
2895 xhci_warn(xhci, "WARN Cannot submit config ep after "
2896 "reset ep command\n");
2897 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2898 deq_state->new_deq_seg,
2899 deq_state->new_deq_ptr);
2902 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2904 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2905 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2906 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2907 added_ctxs, added_ctxs);
2910 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2911 unsigned int ep_index, struct xhci_td *td)
2913 struct xhci_dequeue_state deq_state;
2914 struct xhci_virt_ep *ep;
2915 struct usb_device *udev = td->urb->dev;
2917 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2918 "Cleaning up stalled endpoint ring");
2919 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2920 /* We need to move the HW's dequeue pointer past this TD,
2921 * or it will attempt to resend it on the next doorbell ring.
2923 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2924 ep_index, ep->stopped_stream, td, &deq_state);
2926 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2929 /* HW with the reset endpoint quirk will use the saved dequeue state to
2930 * issue a configure endpoint command later.
2932 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2933 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2934 "Queueing new dequeue state");
2935 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2936 ep_index, ep->stopped_stream, &deq_state);
2938 /* Better hope no one uses the input context between now and the
2939 * reset endpoint completion!
2940 * XXX: No idea how this hardware will react when stream rings
2943 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2944 "Setting up input context for "
2945 "configure endpoint command");
2946 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2947 ep_index, &deq_state);
2951 /* Called when clearing halted device. The core should have sent the control
2952 * message to clear the device halt condition. The host side of the halt should
2953 * already be cleared with a reset endpoint command issued when the STALL tx
2954 * event was received.
2956 * Context: in_interrupt
2959 void xhci_endpoint_reset(struct usb_hcd *hcd,
2960 struct usb_host_endpoint *ep)
2962 struct xhci_hcd *xhci;
2964 xhci = hcd_to_xhci(hcd);
2967 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2968 * The Reset Endpoint Command may only be issued to endpoints in the
2969 * Halted state. If software wishes reset the Data Toggle or Sequence
2970 * Number of an endpoint that isn't in the Halted state, then software
2971 * may issue a Configure Endpoint Command with the Drop and Add bits set
2972 * for the target endpoint. that is in the Stopped state.
2975 /* For now just print debug to follow the situation */
2976 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2977 ep->desc.bEndpointAddress);
2980 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2981 struct usb_device *udev, struct usb_host_endpoint *ep,
2982 unsigned int slot_id)
2985 unsigned int ep_index;
2986 unsigned int ep_state;
2990 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2993 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2994 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2995 " descriptor for ep 0x%x does not support streams\n",
2996 ep->desc.bEndpointAddress);
3000 ep_index = xhci_get_endpoint_index(&ep->desc);
3001 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3002 if (ep_state & EP_HAS_STREAMS ||
3003 ep_state & EP_GETTING_STREAMS) {
3004 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3005 "already has streams set up.\n",
3006 ep->desc.bEndpointAddress);
3007 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3008 "dynamic stream context array reallocation.\n");
3011 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3012 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3013 "endpoint 0x%x; URBs are pending.\n",
3014 ep->desc.bEndpointAddress);
3020 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3021 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3023 unsigned int max_streams;
3025 /* The stream context array size must be a power of two */
3026 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3028 * Find out how many primary stream array entries the host controller
3029 * supports. Later we may use secondary stream arrays (similar to 2nd
3030 * level page entries), but that's an optional feature for xHCI host
3031 * controllers. xHCs must support at least 4 stream IDs.
3033 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3034 if (*num_stream_ctxs > max_streams) {
3035 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3037 *num_stream_ctxs = max_streams;
3038 *num_streams = max_streams;
3042 /* Returns an error code if one of the endpoint already has streams.
3043 * This does not change any data structures, it only checks and gathers
3046 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3047 struct usb_device *udev,
3048 struct usb_host_endpoint **eps, unsigned int num_eps,
3049 unsigned int *num_streams, u32 *changed_ep_bitmask)
3051 unsigned int max_streams;
3052 unsigned int endpoint_flag;
3056 for (i = 0; i < num_eps; i++) {
3057 ret = xhci_check_streams_endpoint(xhci, udev,
3058 eps[i], udev->slot_id);
3062 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3063 if (max_streams < (*num_streams - 1)) {
3064 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3065 eps[i]->desc.bEndpointAddress,
3067 *num_streams = max_streams+1;
3070 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3071 if (*changed_ep_bitmask & endpoint_flag)
3073 *changed_ep_bitmask |= endpoint_flag;
3078 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3079 struct usb_device *udev,
3080 struct usb_host_endpoint **eps, unsigned int num_eps)
3082 u32 changed_ep_bitmask = 0;
3083 unsigned int slot_id;
3084 unsigned int ep_index;
3085 unsigned int ep_state;
3088 slot_id = udev->slot_id;
3089 if (!xhci->devs[slot_id])
3092 for (i = 0; i < num_eps; i++) {
3093 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3094 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3095 /* Are streams already being freed for the endpoint? */
3096 if (ep_state & EP_GETTING_NO_STREAMS) {
3097 xhci_warn(xhci, "WARN Can't disable streams for "
3099 "streams are being disabled already\n",
3100 eps[i]->desc.bEndpointAddress);
3103 /* Are there actually any streams to free? */
3104 if (!(ep_state & EP_HAS_STREAMS) &&
3105 !(ep_state & EP_GETTING_STREAMS)) {
3106 xhci_warn(xhci, "WARN Can't disable streams for "
3108 "streams are already disabled!\n",
3109 eps[i]->desc.bEndpointAddress);
3110 xhci_warn(xhci, "WARN xhci_free_streams() called "
3111 "with non-streams endpoint\n");
3114 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3116 return changed_ep_bitmask;
3120 * The USB device drivers use this function (through the HCD interface in USB
3121 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3122 * coordinate mass storage command queueing across multiple endpoints (basically
3123 * a stream ID == a task ID).
3125 * Setting up streams involves allocating the same size stream context array
3126 * for each endpoint and issuing a configure endpoint command for all endpoints.
3128 * Don't allow the call to succeed if one endpoint only supports one stream
3129 * (which means it doesn't support streams at all).
3131 * Drivers may get less stream IDs than they asked for, if the host controller
3132 * hardware or endpoints claim they can't support the number of requested
3135 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3136 struct usb_host_endpoint **eps, unsigned int num_eps,
3137 unsigned int num_streams, gfp_t mem_flags)
3140 struct xhci_hcd *xhci;
3141 struct xhci_virt_device *vdev;
3142 struct xhci_command *config_cmd;
3143 struct xhci_input_control_ctx *ctrl_ctx;
3144 unsigned int ep_index;
3145 unsigned int num_stream_ctxs;
3146 unsigned long flags;
3147 u32 changed_ep_bitmask = 0;
3152 /* Add one to the number of streams requested to account for
3153 * stream 0 that is reserved for xHCI usage.
3156 xhci = hcd_to_xhci(hcd);
3157 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3160 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3161 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3162 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3163 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3167 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3169 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3172 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3174 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3176 xhci_free_command(xhci, config_cmd);
3180 /* Check to make sure all endpoints are not already configured for
3181 * streams. While we're at it, find the maximum number of streams that
3182 * all the endpoints will support and check for duplicate endpoints.
3184 spin_lock_irqsave(&xhci->lock, flags);
3185 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3186 num_eps, &num_streams, &changed_ep_bitmask);
3188 xhci_free_command(xhci, config_cmd);
3189 spin_unlock_irqrestore(&xhci->lock, flags);
3192 if (num_streams <= 1) {
3193 xhci_warn(xhci, "WARN: endpoints can't handle "
3194 "more than one stream.\n");
3195 xhci_free_command(xhci, config_cmd);
3196 spin_unlock_irqrestore(&xhci->lock, flags);
3199 vdev = xhci->devs[udev->slot_id];
3200 /* Mark each endpoint as being in transition, so
3201 * xhci_urb_enqueue() will reject all URBs.
3203 for (i = 0; i < num_eps; i++) {
3204 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3205 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3207 spin_unlock_irqrestore(&xhci->lock, flags);
3209 /* Setup internal data structures and allocate HW data structures for
3210 * streams (but don't install the HW structures in the input context
3211 * until we're sure all memory allocation succeeded).
3213 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3214 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3215 num_stream_ctxs, num_streams);
3217 for (i = 0; i < num_eps; i++) {
3218 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3219 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3221 num_streams, mem_flags);
3222 if (!vdev->eps[ep_index].stream_info)
3224 /* Set maxPstreams in endpoint context and update deq ptr to
3225 * point to stream context array. FIXME
3229 /* Set up the input context for a configure endpoint command. */
3230 for (i = 0; i < num_eps; i++) {
3231 struct xhci_ep_ctx *ep_ctx;
3233 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3234 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3236 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3237 vdev->out_ctx, ep_index);
3238 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3239 vdev->eps[ep_index].stream_info);
3241 /* Tell the HW to drop its old copy of the endpoint context info
3242 * and add the updated copy from the input context.
3244 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3245 vdev->out_ctx, ctrl_ctx,
3246 changed_ep_bitmask, changed_ep_bitmask);
3248 /* Issue and wait for the configure endpoint command */
3249 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3252 /* xHC rejected the configure endpoint command for some reason, so we
3253 * leave the old ring intact and free our internal streams data
3259 spin_lock_irqsave(&xhci->lock, flags);
3260 for (i = 0; i < num_eps; i++) {
3261 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3262 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3263 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3264 udev->slot_id, ep_index);
3265 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3267 xhci_free_command(xhci, config_cmd);
3268 spin_unlock_irqrestore(&xhci->lock, flags);
3270 /* Subtract 1 for stream 0, which drivers can't use */
3271 return num_streams - 1;
3274 /* If it didn't work, free the streams! */
3275 for (i = 0; i < num_eps; i++) {
3276 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3277 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3278 vdev->eps[ep_index].stream_info = NULL;
3279 /* FIXME Unset maxPstreams in endpoint context and
3280 * update deq ptr to point to normal string ring.
3282 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3283 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3284 xhci_endpoint_zero(xhci, vdev, eps[i]);
3286 xhci_free_command(xhci, config_cmd);
3290 /* Transition the endpoint from using streams to being a "normal" endpoint
3293 * Modify the endpoint context state, submit a configure endpoint command,
3294 * and free all endpoint rings for streams if that completes successfully.
3296 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3297 struct usb_host_endpoint **eps, unsigned int num_eps,
3301 struct xhci_hcd *xhci;
3302 struct xhci_virt_device *vdev;
3303 struct xhci_command *command;
3304 struct xhci_input_control_ctx *ctrl_ctx;
3305 unsigned int ep_index;
3306 unsigned long flags;
3307 u32 changed_ep_bitmask;
3309 xhci = hcd_to_xhci(hcd);
3310 vdev = xhci->devs[udev->slot_id];
3312 /* Set up a configure endpoint command to remove the streams rings */
3313 spin_lock_irqsave(&xhci->lock, flags);
3314 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3315 udev, eps, num_eps);
3316 if (changed_ep_bitmask == 0) {
3317 spin_unlock_irqrestore(&xhci->lock, flags);
3321 /* Use the xhci_command structure from the first endpoint. We may have
3322 * allocated too many, but the driver may call xhci_free_streams() for
3323 * each endpoint it grouped into one call to xhci_alloc_streams().
3325 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3326 command = vdev->eps[ep_index].stream_info->free_streams_command;
3327 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3329 spin_unlock_irqrestore(&xhci->lock, flags);
3330 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3335 for (i = 0; i < num_eps; i++) {
3336 struct xhci_ep_ctx *ep_ctx;
3338 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3339 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3340 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3341 EP_GETTING_NO_STREAMS;
3343 xhci_endpoint_copy(xhci, command->in_ctx,
3344 vdev->out_ctx, ep_index);
3345 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3346 &vdev->eps[ep_index]);
3348 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3349 vdev->out_ctx, ctrl_ctx,
3350 changed_ep_bitmask, changed_ep_bitmask);
3351 spin_unlock_irqrestore(&xhci->lock, flags);
3353 /* Issue and wait for the configure endpoint command,
3354 * which must succeed.
3356 ret = xhci_configure_endpoint(xhci, udev, command,
3359 /* xHC rejected the configure endpoint command for some reason, so we
3360 * leave the streams rings intact.
3365 spin_lock_irqsave(&xhci->lock, flags);
3366 for (i = 0; i < num_eps; i++) {
3367 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3368 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3369 vdev->eps[ep_index].stream_info = NULL;
3370 /* FIXME Unset maxPstreams in endpoint context and
3371 * update deq ptr to point to normal string ring.
3373 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3374 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3376 spin_unlock_irqrestore(&xhci->lock, flags);
3382 * Deletes endpoint resources for endpoints that were active before a Reset
3383 * Device command, or a Disable Slot command. The Reset Device command leaves
3384 * the control endpoint intact, whereas the Disable Slot command deletes it.
3386 * Must be called with xhci->lock held.
3388 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3389 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3392 unsigned int num_dropped_eps = 0;
3393 unsigned int drop_flags = 0;
3395 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3396 if (virt_dev->eps[i].ring) {
3397 drop_flags |= 1 << i;
3401 xhci->num_active_eps -= num_dropped_eps;
3402 if (num_dropped_eps)
3403 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3404 "Dropped %u ep ctxs, flags = 0x%x, "
3406 num_dropped_eps, drop_flags,
3407 xhci->num_active_eps);
3411 * This submits a Reset Device Command, which will set the device state to 0,
3412 * set the device address to 0, and disable all the endpoints except the default
3413 * control endpoint. The USB core should come back and call
3414 * xhci_address_device(), and then re-set up the configuration. If this is
3415 * called because of a usb_reset_and_verify_device(), then the old alternate
3416 * settings will be re-installed through the normal bandwidth allocation
3419 * Wait for the Reset Device command to finish. Remove all structures
3420 * associated with the endpoints that were disabled. Clear the input device
3421 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3423 * If the virt_dev to be reset does not exist or does not match the udev,
3424 * it means the device is lost, possibly due to the xHC restore error and
3425 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3426 * re-allocate the device.
3428 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3431 unsigned long flags;
3432 struct xhci_hcd *xhci;
3433 unsigned int slot_id;
3434 struct xhci_virt_device *virt_dev;
3435 struct xhci_command *reset_device_cmd;
3436 int last_freed_endpoint;
3437 struct xhci_slot_ctx *slot_ctx;
3438 int old_active_eps = 0;
3440 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3443 xhci = hcd_to_xhci(hcd);
3444 slot_id = udev->slot_id;
3445 virt_dev = xhci->devs[slot_id];
3447 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3448 "not exist. Re-allocate the device\n", slot_id);
3449 ret = xhci_alloc_dev(hcd, udev);
3456 if (virt_dev->tt_info)
3457 old_active_eps = virt_dev->tt_info->active_eps;
3459 if (virt_dev->udev != udev) {
3460 /* If the virt_dev and the udev does not match, this virt_dev
3461 * may belong to another udev.
3462 * Re-allocate the device.
3464 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3465 "not match the udev. Re-allocate the device\n",
3467 ret = xhci_alloc_dev(hcd, udev);
3474 /* If device is not setup, there is no point in resetting it */
3475 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3476 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3477 SLOT_STATE_DISABLED)
3480 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3481 /* Allocate the command structure that holds the struct completion.
3482 * Assume we're in process context, since the normal device reset
3483 * process has to wait for the device anyway. Storage devices are
3484 * reset as part of error handling, so use GFP_NOIO instead of
3487 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3488 if (!reset_device_cmd) {
3489 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3493 /* Attempt to submit the Reset Device command to the command ring */
3494 spin_lock_irqsave(&xhci->lock, flags);
3496 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3498 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3499 spin_unlock_irqrestore(&xhci->lock, flags);
3500 goto command_cleanup;
3502 xhci_ring_cmd_db(xhci);
3503 spin_unlock_irqrestore(&xhci->lock, flags);
3505 /* Wait for the Reset Device command to finish */
3506 wait_for_completion(reset_device_cmd->completion);
3508 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3509 * unless we tried to reset a slot ID that wasn't enabled,
3510 * or the device wasn't in the addressed or configured state.
3512 ret = reset_device_cmd->status;
3514 case COMP_CMD_ABORT:
3516 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3518 goto command_cleanup;
3519 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3520 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3521 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3523 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3524 xhci_dbg(xhci, "Not freeing device rings.\n");
3525 /* Don't treat this as an error. May change my mind later. */
3527 goto command_cleanup;
3529 xhci_dbg(xhci, "Successful reset device command.\n");
3532 if (xhci_is_vendor_info_code(xhci, ret))
3534 xhci_warn(xhci, "Unknown completion code %u for "
3535 "reset device command.\n", ret);
3537 goto command_cleanup;
3540 /* Free up host controller endpoint resources */
3541 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3542 spin_lock_irqsave(&xhci->lock, flags);
3543 /* Don't delete the default control endpoint resources */
3544 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3545 spin_unlock_irqrestore(&xhci->lock, flags);
3548 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3549 last_freed_endpoint = 1;
3550 for (i = 1; i < 31; ++i) {
3551 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3553 if (ep->ep_state & EP_HAS_STREAMS) {
3554 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3555 xhci_get_endpoint_address(i));
3556 xhci_free_stream_info(xhci, ep->stream_info);
3557 ep->stream_info = NULL;
3558 ep->ep_state &= ~EP_HAS_STREAMS;
3562 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3563 last_freed_endpoint = i;
3565 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3566 xhci_drop_ep_from_interval_table(xhci,
3567 &virt_dev->eps[i].bw_info,
3572 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3574 /* If necessary, update the number of active TTs on this root port */
3575 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3577 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3578 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3582 xhci_free_command(xhci, reset_device_cmd);
3587 * At this point, the struct usb_device is about to go away, the device has
3588 * disconnected, and all traffic has been stopped and the endpoints have been
3589 * disabled. Free any HC data structures associated with that device.
3591 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3593 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3594 struct xhci_virt_device *virt_dev;
3595 unsigned long flags;
3598 struct xhci_command *command;
3600 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3604 #ifndef CONFIG_USB_DEFAULT_PERSIST
3606 * We called pm_runtime_get_noresume when the device was attached.
3607 * Decrement the counter here to allow controller to runtime suspend
3608 * if no devices remain.
3610 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3611 pm_runtime_put_noidle(hcd->self.controller);
3614 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3615 /* If the host is halted due to driver unload, we still need to free the
3618 if (ret <= 0 && ret != -ENODEV) {
3623 virt_dev = xhci->devs[udev->slot_id];
3625 /* Stop any wayward timer functions (which may grab the lock) */
3626 for (i = 0; i < 31; ++i) {
3627 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3628 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3631 spin_lock_irqsave(&xhci->lock, flags);
3632 /* Don't disable the slot if the host controller is dead. */
3633 state = readl(&xhci->op_regs->status);
3634 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3635 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3636 xhci_free_virt_device(xhci, udev->slot_id);
3637 spin_unlock_irqrestore(&xhci->lock, flags);
3642 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3644 spin_unlock_irqrestore(&xhci->lock, flags);
3645 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3648 xhci_ring_cmd_db(xhci);
3649 spin_unlock_irqrestore(&xhci->lock, flags);
3652 * Event command completion handler will free any data structures
3653 * associated with the slot. XXX Can free sleep?
3658 * Checks if we have enough host controller resources for the default control
3661 * Must be called with xhci->lock held.
3663 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3665 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3666 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3667 "Not enough ep ctxs: "
3668 "%u active, need to add 1, limit is %u.",
3669 xhci->num_active_eps, xhci->limit_active_eps);
3672 xhci->num_active_eps += 1;
3673 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3674 "Adding 1 ep ctx, %u now active.",
3675 xhci->num_active_eps);
3681 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3682 * timed out, or allocating memory failed. Returns 1 on success.
3684 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3686 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3687 unsigned long flags;
3689 struct xhci_command *command;
3691 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3695 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3696 mutex_lock(&xhci->mutex);
3697 spin_lock_irqsave(&xhci->lock, flags);
3698 command->completion = &xhci->addr_dev;
3699 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3701 spin_unlock_irqrestore(&xhci->lock, flags);
3702 mutex_unlock(&xhci->mutex);
3703 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3707 xhci_ring_cmd_db(xhci);
3708 spin_unlock_irqrestore(&xhci->lock, flags);
3710 wait_for_completion(command->completion);
3711 slot_id = xhci->slot_id;
3712 mutex_unlock(&xhci->mutex);
3714 if (!slot_id || command->status != COMP_SUCCESS) {
3715 xhci_err(xhci, "Error while assigning device slot ID\n");
3716 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3718 readl(&xhci->cap_regs->hcs_params1)));
3723 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3724 spin_lock_irqsave(&xhci->lock, flags);
3725 ret = xhci_reserve_host_control_ep_resources(xhci);
3727 spin_unlock_irqrestore(&xhci->lock, flags);
3728 xhci_warn(xhci, "Not enough host resources, "
3729 "active endpoint contexts = %u\n",
3730 xhci->num_active_eps);
3733 spin_unlock_irqrestore(&xhci->lock, flags);
3735 /* Use GFP_NOIO, since this function can be called from
3736 * xhci_discover_or_reset_device(), which may be called as part of
3737 * mass storage driver error handling.
3739 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3740 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3743 udev->slot_id = slot_id;
3745 #ifndef CONFIG_USB_DEFAULT_PERSIST
3747 * If resetting upon resume, we can't put the controller into runtime
3748 * suspend if there is a device attached.
3750 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3751 pm_runtime_get_noresume(hcd->self.controller);
3756 /* Is this a LS or FS device under a HS hub? */
3757 /* Hub or peripherial? */
3761 /* Disable slot, if we can do it without mem alloc */
3762 spin_lock_irqsave(&xhci->lock, flags);
3763 command->completion = NULL;
3764 command->status = 0;
3765 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3767 xhci_ring_cmd_db(xhci);
3768 spin_unlock_irqrestore(&xhci->lock, flags);
3773 * Issue an Address Device command and optionally send a corresponding
3774 * SetAddress request to the device.
3776 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3777 enum xhci_setup_dev setup)
3779 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3780 unsigned long flags;
3781 struct xhci_virt_device *virt_dev;
3783 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3784 struct xhci_slot_ctx *slot_ctx;
3785 struct xhci_input_control_ctx *ctrl_ctx;
3787 struct xhci_command *command = NULL;
3789 mutex_lock(&xhci->mutex);
3791 if (xhci->xhc_state) /* dying or halted */
3794 if (!udev->slot_id) {
3795 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3796 "Bad Slot ID %d", udev->slot_id);
3801 virt_dev = xhci->devs[udev->slot_id];
3803 if (WARN_ON(!virt_dev)) {
3805 * In plug/unplug torture test with an NEC controller,
3806 * a zero-dereference was observed once due to virt_dev = 0.
3807 * Print useful debug rather than crash if it is observed again!
3809 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3815 if (setup == SETUP_CONTEXT_ONLY) {
3816 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3817 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3818 SLOT_STATE_DEFAULT) {
3819 xhci_dbg(xhci, "Slot already in default state\n");
3824 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3830 command->in_ctx = virt_dev->in_ctx;
3831 command->completion = &xhci->addr_dev;
3833 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3834 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3836 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3842 * If this is the first Set Address since device plug-in or
3843 * virt_device realloaction after a resume with an xHCI power loss,
3844 * then set up the slot context.
3846 if (!slot_ctx->dev_info)
3847 xhci_setup_addressable_virt_dev(xhci, udev);
3848 /* Otherwise, update the control endpoint ring enqueue pointer. */
3850 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3851 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3852 ctrl_ctx->drop_flags = 0;
3854 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3855 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3856 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3857 le32_to_cpu(slot_ctx->dev_info) >> 27);
3859 spin_lock_irqsave(&xhci->lock, flags);
3860 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3861 udev->slot_id, setup);
3863 spin_unlock_irqrestore(&xhci->lock, flags);
3864 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3865 "FIXME: allocate a command ring segment");
3868 xhci_ring_cmd_db(xhci);
3869 spin_unlock_irqrestore(&xhci->lock, flags);
3871 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3872 wait_for_completion(command->completion);
3874 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3875 * the SetAddress() "recovery interval" required by USB and aborting the
3876 * command on a timeout.
3878 switch (command->status) {
3879 case COMP_CMD_ABORT:
3881 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3884 case COMP_CTX_STATE:
3886 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3887 act, udev->slot_id);
3891 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3895 dev_warn(&udev->dev,
3896 "ERROR: Incompatible device for setup %s command\n", act);
3900 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3901 "Successful setup %s command", act);
3905 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3906 act, command->status);
3907 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3908 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3909 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3915 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3916 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3917 "Op regs DCBAA ptr = %#016llx", temp_64);
3918 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3919 "Slot ID %d dcbaa entry @%p = %#016llx",
3921 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3922 (unsigned long long)
3923 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3924 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3925 "Output Context DMA address = %#08llx",
3926 (unsigned long long)virt_dev->out_ctx->dma);
3927 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3928 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3929 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3930 le32_to_cpu(slot_ctx->dev_info) >> 27);
3931 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3932 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3934 * USB core uses address 1 for the roothubs, so we add one to the
3935 * address given back to us by the HC.
3937 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3938 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3939 le32_to_cpu(slot_ctx->dev_info) >> 27);
3940 /* Zero the input context control for later use */
3941 ctrl_ctx->add_flags = 0;
3942 ctrl_ctx->drop_flags = 0;
3944 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3945 "Internal device address = %d",
3946 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3948 mutex_unlock(&xhci->mutex);
3953 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3955 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3958 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3960 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3964 * Transfer the port index into real index in the HW port status
3965 * registers. Caculate offset between the port's PORTSC register
3966 * and port status base. Divide the number of per port register
3967 * to get the real index. The raw port number bases 1.
3969 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3971 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3972 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3973 __le32 __iomem *addr;
3976 if (hcd->speed < HCD_USB3)
3977 addr = xhci->usb2_ports[port1 - 1];
3979 addr = xhci->usb3_ports[port1 - 1];
3981 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3986 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3987 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3989 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3990 struct usb_device *udev, u16 max_exit_latency)
3992 struct xhci_virt_device *virt_dev;
3993 struct xhci_command *command;
3994 struct xhci_input_control_ctx *ctrl_ctx;
3995 struct xhci_slot_ctx *slot_ctx;
3996 unsigned long flags;
3999 spin_lock_irqsave(&xhci->lock, flags);
4001 virt_dev = xhci->devs[udev->slot_id];
4004 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4005 * xHC was re-initialized. Exit latency will be set later after
4006 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4009 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4010 spin_unlock_irqrestore(&xhci->lock, flags);
4014 /* Attempt to issue an Evaluate Context command to change the MEL. */
4015 command = xhci->lpm_command;
4016 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4018 spin_unlock_irqrestore(&xhci->lock, flags);
4019 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4024 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4025 spin_unlock_irqrestore(&xhci->lock, flags);
4027 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4028 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4029 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4030 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4031 slot_ctx->dev_state = 0;
4033 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4034 "Set up evaluate context for LPM MEL change.");
4035 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4036 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4038 /* Issue and wait for the evaluate context command. */
4039 ret = xhci_configure_endpoint(xhci, udev, command,
4041 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4042 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4045 spin_lock_irqsave(&xhci->lock, flags);
4046 virt_dev->current_mel = max_exit_latency;
4047 spin_unlock_irqrestore(&xhci->lock, flags);
4054 /* BESL to HIRD Encoding array for USB2 LPM */
4055 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4056 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4058 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4059 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4060 struct usb_device *udev)
4062 int u2del, besl, besl_host;
4063 int besl_device = 0;
4066 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4067 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4069 if (field & USB_BESL_SUPPORT) {
4070 for (besl_host = 0; besl_host < 16; besl_host++) {
4071 if (xhci_besl_encoding[besl_host] >= u2del)
4074 /* Use baseline BESL value as default */
4075 if (field & USB_BESL_BASELINE_VALID)
4076 besl_device = USB_GET_BESL_BASELINE(field);
4077 else if (field & USB_BESL_DEEP_VALID)
4078 besl_device = USB_GET_BESL_DEEP(field);
4083 besl_host = (u2del - 51) / 75 + 1;
4086 besl = besl_host + besl_device;
4093 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4094 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4101 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4103 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4104 l1 = udev->l1_params.timeout / 256;
4106 /* device has preferred BESLD */
4107 if (field & USB_BESL_DEEP_VALID) {
4108 besld = USB_GET_BESL_DEEP(field);
4112 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4115 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4116 struct usb_device *udev, int enable)
4118 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4119 __le32 __iomem **port_array;
4120 __le32 __iomem *pm_addr, *hlpm_addr;
4121 u32 pm_val, hlpm_val, field;
4122 unsigned int port_num;
4123 unsigned long flags;
4124 int hird, exit_latency;
4127 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4131 if (!udev->parent || udev->parent->parent ||
4132 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4135 if (udev->usb2_hw_lpm_capable != 1)
4138 spin_lock_irqsave(&xhci->lock, flags);
4140 port_array = xhci->usb2_ports;
4141 port_num = udev->portnum - 1;
4142 pm_addr = port_array[port_num] + PORTPMSC;
4143 pm_val = readl(pm_addr);
4144 hlpm_addr = port_array[port_num] + PORTHLPMC;
4145 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4147 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4148 enable ? "enable" : "disable", port_num + 1);
4151 /* Host supports BESL timeout instead of HIRD */
4152 if (udev->usb2_hw_lpm_besl_capable) {
4153 /* if device doesn't have a preferred BESL value use a
4154 * default one which works with mixed HIRD and BESL
4155 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4157 if ((field & USB_BESL_SUPPORT) &&
4158 (field & USB_BESL_BASELINE_VALID))
4159 hird = USB_GET_BESL_BASELINE(field);
4161 hird = udev->l1_params.besl;
4163 exit_latency = xhci_besl_encoding[hird];
4164 spin_unlock_irqrestore(&xhci->lock, flags);
4166 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4167 * input context for link powermanagement evaluate
4168 * context commands. It is protected by hcd->bandwidth
4169 * mutex and is shared by all devices. We need to set
4170 * the max ext latency in USB 2 BESL LPM as well, so
4171 * use the same mutex and xhci_change_max_exit_latency()
4173 mutex_lock(hcd->bandwidth_mutex);
4174 ret = xhci_change_max_exit_latency(xhci, udev,
4176 mutex_unlock(hcd->bandwidth_mutex);
4180 spin_lock_irqsave(&xhci->lock, flags);
4182 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4183 writel(hlpm_val, hlpm_addr);
4187 hird = xhci_calculate_hird_besl(xhci, udev);
4190 pm_val &= ~PORT_HIRD_MASK;
4191 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4192 writel(pm_val, pm_addr);
4193 pm_val = readl(pm_addr);
4195 writel(pm_val, pm_addr);
4199 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4200 writel(pm_val, pm_addr);
4203 if (udev->usb2_hw_lpm_besl_capable) {
4204 spin_unlock_irqrestore(&xhci->lock, flags);
4205 mutex_lock(hcd->bandwidth_mutex);
4206 xhci_change_max_exit_latency(xhci, udev, 0);
4207 mutex_unlock(hcd->bandwidth_mutex);
4212 spin_unlock_irqrestore(&xhci->lock, flags);
4216 /* check if a usb2 port supports a given extened capability protocol
4217 * only USB2 ports extended protocol capability values are cached.
4218 * Return 1 if capability is supported
4220 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4221 unsigned capability)
4223 u32 port_offset, port_count;
4226 for (i = 0; i < xhci->num_ext_caps; i++) {
4227 if (xhci->ext_caps[i] & capability) {
4228 /* port offsets starts at 1 */
4229 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4230 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4231 if (port >= port_offset &&
4232 port < port_offset + port_count)
4239 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4241 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4242 int portnum = udev->portnum - 1;
4244 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4248 /* we only support lpm for non-hub device connected to root hub yet */
4249 if (!udev->parent || udev->parent->parent ||
4250 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4253 if (xhci->hw_lpm_support == 1 &&
4254 xhci_check_usb2_port_capability(
4255 xhci, portnum, XHCI_HLC)) {
4256 udev->usb2_hw_lpm_capable = 1;
4257 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4258 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4259 if (xhci_check_usb2_port_capability(xhci, portnum,
4261 udev->usb2_hw_lpm_besl_capable = 1;
4267 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4269 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4270 static unsigned long long xhci_service_interval_to_ns(
4271 struct usb_endpoint_descriptor *desc)
4273 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4276 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4277 enum usb3_link_state state)
4279 unsigned long long sel;
4280 unsigned long long pel;
4281 unsigned int max_sel_pel;
4286 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4287 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4288 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4289 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4293 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4294 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4295 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4299 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4301 return USB3_LPM_DISABLED;
4304 if (sel <= max_sel_pel && pel <= max_sel_pel)
4305 return USB3_LPM_DEVICE_INITIATED;
4307 if (sel > max_sel_pel)
4308 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4309 "due to long SEL %llu ms\n",
4312 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4313 "due to long PEL %llu ms\n",
4315 return USB3_LPM_DISABLED;
4318 /* The U1 timeout should be the maximum of the following values:
4319 * - For control endpoints, U1 system exit latency (SEL) * 3
4320 * - For bulk endpoints, U1 SEL * 5
4321 * - For interrupt endpoints:
4322 * - Notification EPs, U1 SEL * 3
4323 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4324 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4326 static unsigned long long xhci_calculate_intel_u1_timeout(
4327 struct usb_device *udev,
4328 struct usb_endpoint_descriptor *desc)
4330 unsigned long long timeout_ns;
4334 ep_type = usb_endpoint_type(desc);
4336 case USB_ENDPOINT_XFER_CONTROL:
4337 timeout_ns = udev->u1_params.sel * 3;
4339 case USB_ENDPOINT_XFER_BULK:
4340 timeout_ns = udev->u1_params.sel * 5;
4342 case USB_ENDPOINT_XFER_INT:
4343 intr_type = usb_endpoint_interrupt_type(desc);
4344 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4345 timeout_ns = udev->u1_params.sel * 3;
4348 /* Otherwise the calculation is the same as isoc eps */
4349 case USB_ENDPOINT_XFER_ISOC:
4350 timeout_ns = xhci_service_interval_to_ns(desc);
4351 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4352 if (timeout_ns < udev->u1_params.sel * 2)
4353 timeout_ns = udev->u1_params.sel * 2;
4362 /* Returns the hub-encoded U1 timeout value. */
4363 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4364 struct usb_device *udev,
4365 struct usb_endpoint_descriptor *desc)
4367 unsigned long long timeout_ns;
4369 if (xhci->quirks & XHCI_INTEL_HOST)
4370 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4372 timeout_ns = udev->u1_params.sel;
4374 /* The U1 timeout is encoded in 1us intervals.
4375 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4377 if (timeout_ns == USB3_LPM_DISABLED)
4380 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4382 /* If the necessary timeout value is bigger than what we can set in the
4383 * USB 3.0 hub, we have to disable hub-initiated U1.
4385 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4387 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4388 "due to long timeout %llu ms\n", timeout_ns);
4389 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4392 /* The U2 timeout should be the maximum of:
4393 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4394 * - largest bInterval of any active periodic endpoint (to avoid going
4395 * into lower power link states between intervals).
4396 * - the U2 Exit Latency of the device
4398 static unsigned long long xhci_calculate_intel_u2_timeout(
4399 struct usb_device *udev,
4400 struct usb_endpoint_descriptor *desc)
4402 unsigned long long timeout_ns;
4403 unsigned long long u2_del_ns;
4405 timeout_ns = 10 * 1000 * 1000;
4407 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4408 (xhci_service_interval_to_ns(desc) > timeout_ns))
4409 timeout_ns = xhci_service_interval_to_ns(desc);
4411 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4412 if (u2_del_ns > timeout_ns)
4413 timeout_ns = u2_del_ns;
4418 /* Returns the hub-encoded U2 timeout value. */
4419 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4420 struct usb_device *udev,
4421 struct usb_endpoint_descriptor *desc)
4423 unsigned long long timeout_ns;
4425 if (xhci->quirks & XHCI_INTEL_HOST)
4426 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4428 timeout_ns = udev->u2_params.sel;
4430 /* The U2 timeout is encoded in 256us intervals */
4431 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4432 /* If the necessary timeout value is bigger than what we can set in the
4433 * USB 3.0 hub, we have to disable hub-initiated U2.
4435 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4437 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4438 "due to long timeout %llu ms\n", timeout_ns);
4439 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4442 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4443 struct usb_device *udev,
4444 struct usb_endpoint_descriptor *desc,
4445 enum usb3_link_state state,
4448 if (state == USB3_LPM_U1)
4449 return xhci_calculate_u1_timeout(xhci, udev, desc);
4450 else if (state == USB3_LPM_U2)
4451 return xhci_calculate_u2_timeout(xhci, udev, desc);
4453 return USB3_LPM_DISABLED;
4456 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4457 struct usb_device *udev,
4458 struct usb_endpoint_descriptor *desc,
4459 enum usb3_link_state state,
4464 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4465 desc, state, timeout);
4467 /* If we found we can't enable hub-initiated LPM, or
4468 * the U1 or U2 exit latency was too high to allow
4469 * device-initiated LPM as well, just stop searching.
4471 if (alt_timeout == USB3_LPM_DISABLED ||
4472 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4473 *timeout = alt_timeout;
4476 if (alt_timeout > *timeout)
4477 *timeout = alt_timeout;
4481 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4482 struct usb_device *udev,
4483 struct usb_host_interface *alt,
4484 enum usb3_link_state state,
4489 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4490 if (xhci_update_timeout_for_endpoint(xhci, udev,
4491 &alt->endpoint[j].desc, state, timeout))
4498 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4499 enum usb3_link_state state)
4501 struct usb_device *parent;
4502 unsigned int num_hubs;
4504 if (state == USB3_LPM_U2)
4507 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4508 for (parent = udev->parent, num_hubs = 0; parent->parent;
4509 parent = parent->parent)
4515 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4516 " below second-tier hub.\n");
4517 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4518 "to decrease power consumption.\n");
4522 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4523 struct usb_device *udev,
4524 enum usb3_link_state state)
4526 if (xhci->quirks & XHCI_INTEL_HOST)
4527 return xhci_check_intel_tier_policy(udev, state);
4532 /* Returns the U1 or U2 timeout that should be enabled.
4533 * If the tier check or timeout setting functions return with a non-zero exit
4534 * code, that means the timeout value has been finalized and we shouldn't look
4535 * at any more endpoints.
4537 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4538 struct usb_device *udev, enum usb3_link_state state)
4540 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4541 struct usb_host_config *config;
4544 u16 timeout = USB3_LPM_DISABLED;
4546 if (state == USB3_LPM_U1)
4548 else if (state == USB3_LPM_U2)
4551 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4556 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4559 /* Gather some information about the currently installed configuration
4560 * and alternate interface settings.
4562 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4566 config = udev->actconfig;
4570 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4571 struct usb_driver *driver;
4572 struct usb_interface *intf = config->interface[i];
4577 /* Check if any currently bound drivers want hub-initiated LPM
4580 if (intf->dev.driver) {
4581 driver = to_usb_driver(intf->dev.driver);
4582 if (driver && driver->disable_hub_initiated_lpm) {
4583 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4584 "at request of driver %s\n",
4585 state_name, driver->name);
4586 return xhci_get_timeout_no_hub_lpm(udev, state);
4590 /* Not sure how this could happen... */
4591 if (!intf->cur_altsetting)
4594 if (xhci_update_timeout_for_interface(xhci, udev,
4595 intf->cur_altsetting,
4602 static int calculate_max_exit_latency(struct usb_device *udev,
4603 enum usb3_link_state state_changed,
4604 u16 hub_encoded_timeout)
4606 unsigned long long u1_mel_us = 0;
4607 unsigned long long u2_mel_us = 0;
4608 unsigned long long mel_us = 0;
4614 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4615 hub_encoded_timeout == USB3_LPM_DISABLED);
4616 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4617 hub_encoded_timeout == USB3_LPM_DISABLED);
4619 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4620 hub_encoded_timeout != USB3_LPM_DISABLED);
4621 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4622 hub_encoded_timeout != USB3_LPM_DISABLED);
4624 /* If U1 was already enabled and we're not disabling it,
4625 * or we're going to enable U1, account for the U1 max exit latency.
4627 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4629 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4630 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4632 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4634 if (u1_mel_us > u2_mel_us)
4638 /* xHCI host controller max exit latency field is only 16 bits wide. */
4639 if (mel_us > MAX_EXIT) {
4640 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4641 "is too big.\n", mel_us);
4647 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4648 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4649 struct usb_device *udev, enum usb3_link_state state)
4651 struct xhci_hcd *xhci;
4652 u16 hub_encoded_timeout;
4656 xhci = hcd_to_xhci(hcd);
4657 /* The LPM timeout values are pretty host-controller specific, so don't
4658 * enable hub-initiated timeouts unless the vendor has provided
4659 * information about their timeout algorithm.
4661 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4662 !xhci->devs[udev->slot_id])
4663 return USB3_LPM_DISABLED;
4665 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4666 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4668 /* Max Exit Latency is too big, disable LPM. */
4669 hub_encoded_timeout = USB3_LPM_DISABLED;
4673 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4676 return hub_encoded_timeout;
4679 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4680 struct usb_device *udev, enum usb3_link_state state)
4682 struct xhci_hcd *xhci;
4685 xhci = hcd_to_xhci(hcd);
4686 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4687 !xhci->devs[udev->slot_id])
4690 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4691 return xhci_change_max_exit_latency(xhci, udev, mel);
4693 #else /* CONFIG_PM */
4695 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4696 struct usb_device *udev, int enable)
4701 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4706 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4707 struct usb_device *udev, enum usb3_link_state state)
4709 return USB3_LPM_DISABLED;
4712 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4713 struct usb_device *udev, enum usb3_link_state state)
4717 #endif /* CONFIG_PM */
4719 /*-------------------------------------------------------------------------*/
4721 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4722 * internal data structures for the device.
4724 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4725 struct usb_tt *tt, gfp_t mem_flags)
4727 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4728 struct xhci_virt_device *vdev;
4729 struct xhci_command *config_cmd;
4730 struct xhci_input_control_ctx *ctrl_ctx;
4731 struct xhci_slot_ctx *slot_ctx;
4732 unsigned long flags;
4733 unsigned think_time;
4736 /* Ignore root hubs */
4740 vdev = xhci->devs[hdev->slot_id];
4742 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4745 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4747 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4750 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4752 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4754 xhci_free_command(xhci, config_cmd);
4758 spin_lock_irqsave(&xhci->lock, flags);
4759 if (hdev->speed == USB_SPEED_HIGH &&
4760 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4761 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4762 xhci_free_command(xhci, config_cmd);
4763 spin_unlock_irqrestore(&xhci->lock, flags);
4767 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4768 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4769 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4770 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4772 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4773 if (xhci->hci_version > 0x95) {
4774 xhci_dbg(xhci, "xHCI version %x needs hub "
4775 "TT think time and number of ports\n",
4776 (unsigned int) xhci->hci_version);
4777 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4778 /* Set TT think time - convert from ns to FS bit times.
4779 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4780 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4782 * xHCI 1.0: this field shall be 0 if the device is not a
4785 think_time = tt->think_time;
4786 if (think_time != 0)
4787 think_time = (think_time / 666) - 1;
4788 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4789 slot_ctx->tt_info |=
4790 cpu_to_le32(TT_THINK_TIME(think_time));
4792 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4793 "TT think time or number of ports\n",
4794 (unsigned int) xhci->hci_version);
4796 slot_ctx->dev_state = 0;
4797 spin_unlock_irqrestore(&xhci->lock, flags);
4799 xhci_dbg(xhci, "Set up %s for hub device.\n",
4800 (xhci->hci_version > 0x95) ?
4801 "configure endpoint" : "evaluate context");
4802 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4803 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4805 /* Issue and wait for the configure endpoint or
4806 * evaluate context command.
4808 if (xhci->hci_version > 0x95)
4809 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4812 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4815 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4816 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4818 xhci_free_command(xhci, config_cmd);
4822 int xhci_get_frame(struct usb_hcd *hcd)
4824 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4825 /* EHCI mods by the periodic size. Why? */
4826 return readl(&xhci->run_regs->microframe_index) >> 3;
4829 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4831 struct xhci_hcd *xhci;
4832 struct device *dev = hcd->self.controller;
4835 /* Accept arbitrarily long scatter-gather lists */
4836 hcd->self.sg_tablesize = ~0;
4838 /* support to build packet from discontinuous buffers */
4839 hcd->self.no_sg_constraint = 1;
4841 /* XHCI controllers don't stop the ep queue on short packets :| */
4842 hcd->self.no_stop_on_short = 1;
4844 xhci = hcd_to_xhci(hcd);
4846 if (usb_hcd_is_primary_hcd(hcd)) {
4847 xhci->main_hcd = hcd;
4848 /* Mark the first roothub as being USB 2.0.
4849 * The xHCI driver will register the USB 3.0 roothub.
4851 hcd->speed = HCD_USB2;
4852 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4854 * USB 2.0 roothub under xHCI has an integrated TT,
4855 * (rate matching hub) as opposed to having an OHCI/UHCI
4856 * companion controller.
4860 if (xhci->sbrn == 0x31) {
4861 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4862 hcd->speed = HCD_USB31;
4864 /* xHCI private pointer was set in xhci_pci_probe for the second
4865 * registered roothub.
4870 mutex_init(&xhci->mutex);
4871 xhci->cap_regs = hcd->regs;
4872 xhci->op_regs = hcd->regs +
4873 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4874 xhci->run_regs = hcd->regs +
4875 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4876 /* Cache read-only capability registers */
4877 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4878 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4879 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4880 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4881 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4882 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4883 if (xhci->hci_version > 0x100)
4884 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4885 xhci_print_registers(xhci);
4887 xhci->quirks = quirks;
4889 get_quirks(dev, xhci);
4891 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4892 * success event after a short transfer. This quirk will ignore such
4895 if (xhci->hci_version > 0x96)
4896 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4898 /* Make sure the HC is halted. */
4899 retval = xhci_halt(xhci);
4903 xhci_dbg(xhci, "Resetting HCD\n");
4904 /* Reset the internal HC memory state and registers. */
4905 retval = xhci_reset(xhci);
4908 xhci_dbg(xhci, "Reset complete\n");
4910 /* Set dma_mask and coherent_dma_mask to 64-bits,
4911 * if xHC supports 64-bit addressing */
4912 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4913 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4914 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4915 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4918 * This is to avoid error in cases where a 32-bit USB
4919 * controller is used on a 64-bit capable system.
4921 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4924 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4925 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4928 xhci_dbg(xhci, "Calling HCD init\n");
4929 /* Initialize HCD and host controller data structures. */
4930 retval = xhci_init(hcd);
4933 xhci_dbg(xhci, "Called HCD init\n");
4935 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4936 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4940 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4942 static const struct hc_driver xhci_hc_driver = {
4943 .description = "xhci-hcd",
4944 .product_desc = "xHCI Host Controller",
4945 .hcd_priv_size = sizeof(struct xhci_hcd *),
4948 * generic hardware linkage
4951 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4954 * basic lifecycle operations
4956 .reset = NULL, /* set in xhci_init_driver() */
4959 .shutdown = xhci_shutdown,
4962 * managing i/o requests and associated device resources
4964 .urb_enqueue = xhci_urb_enqueue,
4965 .urb_dequeue = xhci_urb_dequeue,
4966 .alloc_dev = xhci_alloc_dev,
4967 .free_dev = xhci_free_dev,
4968 .alloc_streams = xhci_alloc_streams,
4969 .free_streams = xhci_free_streams,
4970 .add_endpoint = xhci_add_endpoint,
4971 .drop_endpoint = xhci_drop_endpoint,
4972 .endpoint_reset = xhci_endpoint_reset,
4973 .check_bandwidth = xhci_check_bandwidth,
4974 .reset_bandwidth = xhci_reset_bandwidth,
4975 .address_device = xhci_address_device,
4976 .enable_device = xhci_enable_device,
4977 .update_hub_device = xhci_update_hub_device,
4978 .reset_device = xhci_discover_or_reset_device,
4981 * scheduling support
4983 .get_frame_number = xhci_get_frame,
4988 .hub_control = xhci_hub_control,
4989 .hub_status_data = xhci_hub_status_data,
4990 .bus_suspend = xhci_bus_suspend,
4991 .bus_resume = xhci_bus_resume,
4994 * call back when device connected and addressed
4996 .update_device = xhci_update_device,
4997 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4998 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4999 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
5000 .find_raw_port_number = xhci_find_raw_port_number,
5003 void xhci_init_driver(struct hc_driver *drv,
5004 const struct xhci_driver_overrides *over)
5008 /* Copy the generic table to drv then apply the overrides */
5009 *drv = xhci_hc_driver;
5012 drv->hcd_priv_size += over->extra_priv_size;
5014 drv->reset = over->reset;
5016 drv->start = over->start;
5019 EXPORT_SYMBOL_GPL(xhci_init_driver);
5021 MODULE_DESCRIPTION(DRIVER_DESC);
5022 MODULE_AUTHOR(DRIVER_AUTHOR);
5023 MODULE_LICENSE("GPL");
5025 static int __init xhci_hcd_init(void)
5028 * Check the compiler generated sizes of structures that must be laid
5029 * out in specific ways for hardware access.
5031 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5032 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5033 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5034 /* xhci_device_control has eight fields, and also
5035 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5037 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5038 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5039 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5040 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5041 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5042 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5043 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5048 * If an init function is provided, an exit function must also be provided
5049 * to allow module unload.
5051 static void __exit xhci_hcd_fini(void) { }
5053 module_init(xhci_hcd_init);
5054 module_exit(xhci_hcd_fini);