2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
32 #include "xhci-trace.h"
34 #define DRIVER_AUTHOR "Sarah Sharp"
35 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
37 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
38 static int link_quirk;
39 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
40 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
42 /* TODO: copied from ehci-hcd.c - can this be refactored? */
44 * xhci_handshake - spin reading hc until handshake completes or fails
45 * @ptr: address of hc register to be read
46 * @mask: bits to look at in result of read
47 * @done: value of those bits when handshake succeeds
48 * @usec: timeout in microseconds
50 * Returns negative errno, or zero on success
52 * Success happens when the "mask" bits have the specified value (hardware
53 * handshake done). There are two failure modes: "usec" have passed (major
54 * hardware flakeout), or the register reads as all-ones (hardware removed).
56 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
57 u32 mask, u32 done, int usec)
62 result = xhci_readl(xhci, ptr);
63 if (result == ~(u32)0) /* card removed */
75 * Disable interrupts and begin the xHCI halting process.
77 void xhci_quiesce(struct xhci_hcd *xhci)
84 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
88 cmd = xhci_readl(xhci, &xhci->op_regs->command);
90 xhci_writel(xhci, cmd, &xhci->op_regs->command);
94 * Force HC into halt state.
96 * Disable any IRQs and clear the run/stop bit.
97 * HC will complete any current and actively pipelined transactions, and
98 * should halt within 16 ms of the run/stop bit being cleared.
99 * Read HC Halted bit in the status register to see when the HC is finished.
101 int xhci_halt(struct xhci_hcd *xhci)
104 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
107 ret = xhci_handshake(xhci, &xhci->op_regs->status,
108 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110 xhci->xhc_state |= XHCI_STATE_HALTED;
111 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
113 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
119 * Set the run bit and wait for the host to be running.
121 static int xhci_start(struct xhci_hcd *xhci)
126 temp = xhci_readl(xhci, &xhci->op_regs->command);
128 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
130 xhci_writel(xhci, temp, &xhci->op_regs->command);
133 * Wait for the HCHalted Status bit to be 0 to indicate the host is
136 ret = xhci_handshake(xhci, &xhci->op_regs->status,
137 STS_HALT, 0, XHCI_MAX_HALT_USEC);
138 if (ret == -ETIMEDOUT)
139 xhci_err(xhci, "Host took too long to start, "
140 "waited %u microseconds.\n",
143 xhci->xhc_state &= ~XHCI_STATE_HALTED;
150 * This resets pipelines, timers, counters, state machines, etc.
151 * Transactions will be terminated immediately, and operational registers
152 * will be set to their defaults.
154 int xhci_reset(struct xhci_hcd *xhci)
160 state = xhci_readl(xhci, &xhci->op_regs->status);
161 if ((state & STS_HALT) == 0) {
162 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
166 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
167 command = xhci_readl(xhci, &xhci->op_regs->command);
168 command |= CMD_RESET;
169 xhci_writel(xhci, command, &xhci->op_regs->command);
171 ret = xhci_handshake(xhci, &xhci->op_regs->command,
172 CMD_RESET, 0, 10 * 1000 * 1000);
176 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
177 "Wait for controller to be ready for doorbell rings");
179 * xHCI cannot write to any doorbells or operational registers other
180 * than status until the "Controller Not Ready" flag is cleared.
182 ret = xhci_handshake(xhci, &xhci->op_regs->status,
183 STS_CNR, 0, 10 * 1000 * 1000);
185 for (i = 0; i < 2; ++i) {
186 xhci->bus_state[i].port_c_suspend = 0;
187 xhci->bus_state[i].suspended_ports = 0;
188 xhci->bus_state[i].resuming_ports = 0;
195 static int xhci_free_msi(struct xhci_hcd *xhci)
199 if (!xhci->msix_entries)
202 for (i = 0; i < xhci->msix_count; i++)
203 if (xhci->msix_entries[i].vector)
204 free_irq(xhci->msix_entries[i].vector,
212 static int xhci_setup_msi(struct xhci_hcd *xhci)
215 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
217 ret = pci_enable_msi(pdev);
219 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
220 "failed to allocate MSI entry");
224 ret = request_irq(pdev->irq, xhci_msi_irq,
225 0, "xhci_hcd", xhci_to_hcd(xhci));
227 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
228 "disable MSI interrupt");
229 pci_disable_msi(pdev);
237 * free all IRQs request
239 static void xhci_free_irq(struct xhci_hcd *xhci)
241 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
244 /* return if using legacy interrupt */
245 if (xhci_to_hcd(xhci)->irq > 0)
248 ret = xhci_free_msi(xhci);
252 free_irq(pdev->irq, xhci_to_hcd(xhci));
260 static int xhci_setup_msix(struct xhci_hcd *xhci)
263 struct usb_hcd *hcd = xhci_to_hcd(xhci);
264 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
267 * calculate number of msi-x vectors supported.
268 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
269 * with max number of interrupters based on the xhci HCSPARAMS1.
270 * - num_online_cpus: maximum msi-x vectors per CPUs core.
271 * Add additional 1 vector to ensure always available interrupt.
273 xhci->msix_count = min(num_online_cpus() + 1,
274 HCS_MAX_INTRS(xhci->hcs_params1));
277 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
279 if (!xhci->msix_entries) {
280 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
284 for (i = 0; i < xhci->msix_count; i++) {
285 xhci->msix_entries[i].entry = i;
286 xhci->msix_entries[i].vector = 0;
289 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
291 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
292 "Failed to enable MSI-X");
296 for (i = 0; i < xhci->msix_count; i++) {
297 ret = request_irq(xhci->msix_entries[i].vector,
299 0, "xhci_hcd", xhci_to_hcd(xhci));
304 hcd->msix_enabled = 1;
308 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
310 pci_disable_msix(pdev);
312 kfree(xhci->msix_entries);
313 xhci->msix_entries = NULL;
317 /* Free any IRQs and disable MSI-X */
318 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
320 struct usb_hcd *hcd = xhci_to_hcd(xhci);
321 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
325 if (xhci->msix_entries) {
326 pci_disable_msix(pdev);
327 kfree(xhci->msix_entries);
328 xhci->msix_entries = NULL;
330 pci_disable_msi(pdev);
333 hcd->msix_enabled = 0;
337 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
341 if (xhci->msix_entries) {
342 for (i = 0; i < xhci->msix_count; i++)
343 synchronize_irq(xhci->msix_entries[i].vector);
347 static int xhci_try_enable_msi(struct usb_hcd *hcd)
349 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
350 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
354 * Some Fresco Logic host controllers advertise MSI, but fail to
355 * generate interrupts. Don't even try to enable MSI.
357 if (xhci->quirks & XHCI_BROKEN_MSI)
360 /* unregister the legacy interrupt */
362 free_irq(hcd->irq, hcd);
365 ret = xhci_setup_msix(xhci);
367 /* fall back to msi*/
368 ret = xhci_setup_msi(xhci);
371 /* hcd->irq is 0, we have MSI */
375 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
380 /* fall back to legacy interrupt*/
381 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
382 hcd->irq_descr, hcd);
384 xhci_err(xhci, "request interrupt %d failed\n",
388 hcd->irq = pdev->irq;
394 static int xhci_try_enable_msi(struct usb_hcd *hcd)
399 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
403 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
409 static void compliance_mode_recovery(unsigned long arg)
411 struct xhci_hcd *xhci;
416 xhci = (struct xhci_hcd *)arg;
418 for (i = 0; i < xhci->num_usb3_ports; i++) {
419 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
420 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
422 * Compliance Mode Detected. Letting USB Core
423 * handle the Warm Reset
425 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
426 "Compliance mode detected->port %d",
428 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
429 "Attempting compliance mode recovery");
430 hcd = xhci->shared_hcd;
432 if (hcd->state == HC_STATE_SUSPENDED)
433 usb_hcd_resume_root_hub(hcd);
435 usb_hcd_poll_rh_status(hcd);
439 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
440 mod_timer(&xhci->comp_mode_recovery_timer,
441 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
445 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
446 * that causes ports behind that hardware to enter compliance mode sometimes.
447 * The quirk creates a timer that polls every 2 seconds the link state of
448 * each host controller's port and recovers it by issuing a Warm reset
449 * if Compliance mode is detected, otherwise the port will become "dead" (no
450 * device connections or disconnections will be detected anymore). Becasue no
451 * status event is generated when entering compliance mode (per xhci spec),
452 * this quirk is needed on systems that have the failing hardware installed.
454 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
456 xhci->port_status_u0 = 0;
457 init_timer(&xhci->comp_mode_recovery_timer);
459 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
460 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
461 xhci->comp_mode_recovery_timer.expires = jiffies +
462 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
464 set_timer_slack(&xhci->comp_mode_recovery_timer,
465 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
466 add_timer(&xhci->comp_mode_recovery_timer);
467 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
468 "Compliance mode recovery timer initialized");
472 * This function identifies the systems that have installed the SN65LVPE502CP
473 * USB3.0 re-driver and that need the Compliance Mode Quirk.
475 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
477 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
479 const char *dmi_product_name, *dmi_sys_vendor;
481 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
482 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
483 if (!dmi_product_name || !dmi_sys_vendor)
486 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
489 if (strstr(dmi_product_name, "Z420") ||
490 strstr(dmi_product_name, "Z620") ||
491 strstr(dmi_product_name, "Z820") ||
492 strstr(dmi_product_name, "Z1 Workstation"))
498 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
500 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
505 * Initialize memory for HCD and xHC (one-time init).
507 * Program the PAGESIZE register, initialize the device context array, create
508 * device contexts (?), set up a command ring segment (or two?), create event
509 * ring (one for now).
511 int xhci_init(struct usb_hcd *hcd)
513 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
516 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
517 spin_lock_init(&xhci->lock);
518 if (xhci->hci_version == 0x95 && link_quirk) {
519 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
520 "QUIRK: Not clearing Link TRB chain bits.");
521 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
523 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
524 "xHCI doesn't need link TRB QUIRK");
526 retval = xhci_mem_init(xhci, GFP_KERNEL);
527 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
529 /* Initializing Compliance Mode Recovery Data If Needed */
530 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
531 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
532 compliance_mode_recovery_timer_init(xhci);
538 /*-------------------------------------------------------------------------*/
541 static int xhci_run_finished(struct xhci_hcd *xhci)
543 if (xhci_start(xhci)) {
547 xhci->shared_hcd->state = HC_STATE_RUNNING;
548 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
550 if (xhci->quirks & XHCI_NEC_HOST)
551 xhci_ring_cmd_db(xhci);
553 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
554 "Finished xhci_run for USB3 roothub");
559 * Start the HC after it was halted.
561 * This function is called by the USB core when the HC driver is added.
562 * Its opposite is xhci_stop().
564 * xhci_init() must be called once before this function can be called.
565 * Reset the HC, enable device slot contexts, program DCBAAP, and
566 * set command ring pointer and event ring pointer.
568 * Setup MSI-X vectors and enable interrupts.
570 int xhci_run(struct usb_hcd *hcd)
575 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
577 /* Start the xHCI host controller running only after the USB 2.0 roothub
581 hcd->uses_new_polling = 1;
582 if (!usb_hcd_is_primary_hcd(hcd))
583 return xhci_run_finished(xhci);
585 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
587 ret = xhci_try_enable_msi(hcd);
591 xhci_dbg(xhci, "Command ring memory map follows:\n");
592 xhci_debug_ring(xhci, xhci->cmd_ring);
593 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
594 xhci_dbg_cmd_ptrs(xhci);
596 xhci_dbg(xhci, "ERST memory map follows:\n");
597 xhci_dbg_erst(xhci, &xhci->erst);
598 xhci_dbg(xhci, "Event ring:\n");
599 xhci_debug_ring(xhci, xhci->event_ring);
600 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
601 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
602 temp_64 &= ~ERST_PTR_MASK;
603 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
604 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
606 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
607 "// Set the interrupt modulation register");
608 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
609 temp &= ~ER_IRQ_INTERVAL_MASK;
611 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
613 /* Set the HCD state before we enable the irqs */
614 temp = xhci_readl(xhci, &xhci->op_regs->command);
616 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
617 "// Enable interrupts, cmd = 0x%x.", temp);
618 xhci_writel(xhci, temp, &xhci->op_regs->command);
620 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
621 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
622 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
623 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
624 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
625 &xhci->ir_set->irq_pending);
626 xhci_print_ir_set(xhci, 0);
628 if (xhci->quirks & XHCI_NEC_HOST)
629 xhci_queue_vendor_command(xhci, 0, 0, 0,
630 TRB_TYPE(TRB_NEC_GET_FW));
632 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
633 "Finished xhci_run for USB2 roothub");
637 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
639 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
641 spin_lock_irq(&xhci->lock);
644 /* The shared_hcd is going to be deallocated shortly (the USB core only
645 * calls this function when allocation fails in usb_add_hcd(), or
646 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
648 xhci->shared_hcd = NULL;
649 spin_unlock_irq(&xhci->lock);
655 * This function is called by the USB core when the HC driver is removed.
656 * Its opposite is xhci_run().
658 * Disable device contexts, disable IRQs, and quiesce the HC.
659 * Reset the HC, finish any completed transactions, and cleanup memory.
661 void xhci_stop(struct usb_hcd *hcd)
664 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
666 if (!usb_hcd_is_primary_hcd(hcd)) {
667 xhci_only_stop_hcd(xhci->shared_hcd);
671 spin_lock_irq(&xhci->lock);
672 /* Make sure the xHC is halted for a USB3 roothub
673 * (xhci_stop() could be called as part of failed init).
677 spin_unlock_irq(&xhci->lock);
679 xhci_cleanup_msix(xhci);
681 /* Deleting Compliance Mode Recovery Timer */
682 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
683 (!(xhci_all_ports_seen_u0(xhci)))) {
684 del_timer_sync(&xhci->comp_mode_recovery_timer);
685 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
686 "%s: compliance mode recovery timer deleted",
690 if (xhci->quirks & XHCI_AMD_PLL_FIX)
693 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
694 "// Disabling event ring interrupts");
695 temp = xhci_readl(xhci, &xhci->op_regs->status);
696 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
697 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
698 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
699 &xhci->ir_set->irq_pending);
700 xhci_print_ir_set(xhci, 0);
702 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
703 xhci_mem_cleanup(xhci);
704 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
705 "xhci_stop completed - status = %x",
706 xhci_readl(xhci, &xhci->op_regs->status));
710 * Shutdown HC (not bus-specific)
712 * This is called when the machine is rebooting or halting. We assume that the
713 * machine will be powered off, and the HC's internal state will be reset.
714 * Don't bother to free memory.
716 * This will only ever be called with the main usb_hcd (the USB3 roothub).
718 void xhci_shutdown(struct usb_hcd *hcd)
720 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
722 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
723 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
725 spin_lock_irq(&xhci->lock);
727 spin_unlock_irq(&xhci->lock);
729 xhci_cleanup_msix(xhci);
731 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
732 "xhci_shutdown completed - status = %x",
733 xhci_readl(xhci, &xhci->op_regs->status));
737 static void xhci_save_registers(struct xhci_hcd *xhci)
739 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
740 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
741 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
742 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
743 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
744 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
745 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
746 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
747 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
750 static void xhci_restore_registers(struct xhci_hcd *xhci)
752 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
753 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
754 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
755 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
756 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
757 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
758 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
759 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
760 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
763 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
767 /* step 2: initialize command ring buffer */
768 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
769 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
770 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
771 xhci->cmd_ring->dequeue) &
772 (u64) ~CMD_RING_RSVD_BITS) |
773 xhci->cmd_ring->cycle_state;
774 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
775 "// Setting command ring address to 0x%llx",
776 (long unsigned long) val_64);
777 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
781 * The whole command ring must be cleared to zero when we suspend the host.
783 * The host doesn't save the command ring pointer in the suspend well, so we
784 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
785 * aligned, because of the reserved bits in the command ring dequeue pointer
786 * register. Therefore, we can't just set the dequeue pointer back in the
787 * middle of the ring (TRBs are 16-byte aligned).
789 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
791 struct xhci_ring *ring;
792 struct xhci_segment *seg;
794 ring = xhci->cmd_ring;
798 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
799 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
800 cpu_to_le32(~TRB_CYCLE);
802 } while (seg != ring->deq_seg);
804 /* Reset the software enqueue and dequeue pointers */
805 ring->deq_seg = ring->first_seg;
806 ring->dequeue = ring->first_seg->trbs;
807 ring->enq_seg = ring->deq_seg;
808 ring->enqueue = ring->dequeue;
810 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
812 * Ring is now zeroed, so the HW should look for change of ownership
813 * when the cycle bit is set to 1.
815 ring->cycle_state = 1;
818 * Reset the hardware dequeue pointer.
819 * Yes, this will need to be re-written after resume, but we're paranoid
820 * and want to make sure the hardware doesn't access bogus memory
821 * because, say, the BIOS or an SMI started the host without changing
822 * the command ring pointers.
824 xhci_set_cmd_ring_deq(xhci);
828 * Stop HC (not bus-specific)
830 * This is called when the machine transition into S3/S4 mode.
833 int xhci_suspend(struct xhci_hcd *xhci)
836 struct usb_hcd *hcd = xhci_to_hcd(xhci);
839 if (hcd->state != HC_STATE_SUSPENDED ||
840 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
843 /* Don't poll the roothubs on bus suspend. */
844 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
845 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
846 del_timer_sync(&hcd->rh_timer);
848 spin_lock_irq(&xhci->lock);
849 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
850 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
851 /* step 1: stop endpoint */
852 /* skipped assuming that port suspend has done */
854 /* step 2: clear Run/Stop bit */
855 command = xhci_readl(xhci, &xhci->op_regs->command);
857 xhci_writel(xhci, command, &xhci->op_regs->command);
858 if (xhci_handshake(xhci, &xhci->op_regs->status,
859 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
860 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
861 spin_unlock_irq(&xhci->lock);
864 xhci_clear_command_ring(xhci);
866 /* step 3: save registers */
867 xhci_save_registers(xhci);
869 /* step 4: set CSS flag */
870 command = xhci_readl(xhci, &xhci->op_regs->command);
872 xhci_writel(xhci, command, &xhci->op_regs->command);
873 if (xhci_handshake(xhci, &xhci->op_regs->status,
874 STS_SAVE, 0, 10 * 1000)) {
875 xhci_warn(xhci, "WARN: xHC save state timeout\n");
876 spin_unlock_irq(&xhci->lock);
879 spin_unlock_irq(&xhci->lock);
882 * Deleting Compliance Mode Recovery Timer because the xHCI Host
883 * is about to be suspended.
885 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
886 (!(xhci_all_ports_seen_u0(xhci)))) {
887 del_timer_sync(&xhci->comp_mode_recovery_timer);
888 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
889 "%s: compliance mode recovery timer deleted",
893 /* step 5: remove core well power */
894 /* synchronize irq when using MSI-X */
895 xhci_msix_sync_irqs(xhci);
901 * start xHC (not bus-specific)
903 * This is called when the machine transition from S3/S4 mode.
906 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
908 u32 command, temp = 0;
909 struct usb_hcd *hcd = xhci_to_hcd(xhci);
910 struct usb_hcd *secondary_hcd;
912 bool comp_timer_running = false;
914 /* Wait a bit if either of the roothubs need to settle from the
915 * transition into bus suspend.
917 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
919 xhci->bus_state[1].next_statechange))
922 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
923 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
925 spin_lock_irq(&xhci->lock);
926 if (xhci->quirks & XHCI_RESET_ON_RESUME)
930 /* step 1: restore register */
931 xhci_restore_registers(xhci);
932 /* step 2: initialize command ring buffer */
933 xhci_set_cmd_ring_deq(xhci);
934 /* step 3: restore state and start state*/
935 /* step 3: set CRS flag */
936 command = xhci_readl(xhci, &xhci->op_regs->command);
938 xhci_writel(xhci, command, &xhci->op_regs->command);
939 if (xhci_handshake(xhci, &xhci->op_regs->status,
940 STS_RESTORE, 0, 10 * 1000)) {
941 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
942 spin_unlock_irq(&xhci->lock);
945 temp = xhci_readl(xhci, &xhci->op_regs->status);
948 /* If restore operation fails, re-initialize the HC during resume */
949 if ((temp & STS_SRE) || hibernated) {
951 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
952 !(xhci_all_ports_seen_u0(xhci))) {
953 del_timer_sync(&xhci->comp_mode_recovery_timer);
954 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
955 "Compliance Mode Recovery Timer deleted!");
958 /* Let the USB core know _both_ roothubs lost power. */
959 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
960 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
962 xhci_dbg(xhci, "Stop HCD\n");
965 spin_unlock_irq(&xhci->lock);
966 xhci_cleanup_msix(xhci);
968 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
969 temp = xhci_readl(xhci, &xhci->op_regs->status);
970 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
971 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
972 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
973 &xhci->ir_set->irq_pending);
974 xhci_print_ir_set(xhci, 0);
976 xhci_dbg(xhci, "cleaning up memory\n");
977 xhci_mem_cleanup(xhci);
978 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
979 xhci_readl(xhci, &xhci->op_regs->status));
981 /* USB core calls the PCI reinit and start functions twice:
982 * first with the primary HCD, and then with the secondary HCD.
983 * If we don't do the same, the host will never be started.
985 if (!usb_hcd_is_primary_hcd(hcd))
988 secondary_hcd = xhci->shared_hcd;
990 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
991 retval = xhci_init(hcd->primary_hcd);
994 comp_timer_running = true;
996 xhci_dbg(xhci, "Start the primary HCD\n");
997 retval = xhci_run(hcd->primary_hcd);
999 xhci_dbg(xhci, "Start the secondary HCD\n");
1000 retval = xhci_run(secondary_hcd);
1002 hcd->state = HC_STATE_SUSPENDED;
1003 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1007 /* step 4: set Run/Stop bit */
1008 command = xhci_readl(xhci, &xhci->op_regs->command);
1010 xhci_writel(xhci, command, &xhci->op_regs->command);
1011 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1014 /* step 5: walk topology and initialize portsc,
1015 * portpmsc and portli
1017 /* this is done in bus_resume */
1019 /* step 6: restart each of the previously
1020 * Running endpoints by ringing their doorbells
1023 spin_unlock_irq(&xhci->lock);
1027 usb_hcd_resume_root_hub(hcd);
1028 usb_hcd_resume_root_hub(xhci->shared_hcd);
1032 * If system is subject to the Quirk, Compliance Mode Timer needs to
1033 * be re-initialized Always after a system resume. Ports are subject
1034 * to suffer the Compliance Mode issue again. It doesn't matter if
1035 * ports have entered previously to U0 before system's suspension.
1037 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1038 compliance_mode_recovery_timer_init(xhci);
1040 /* Re-enable port polling. */
1041 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1042 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1043 usb_hcd_poll_rh_status(hcd);
1047 #endif /* CONFIG_PM */
1049 /*-------------------------------------------------------------------------*/
1052 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1053 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1054 * value to right shift 1 for the bitmask.
1056 * Index = (epnum * 2) + direction - 1,
1057 * where direction = 0 for OUT, 1 for IN.
1058 * For control endpoints, the IN index is used (OUT index is unused), so
1059 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1061 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1064 if (usb_endpoint_xfer_control(desc))
1065 index = (unsigned int) (usb_endpoint_num(desc)*2);
1067 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1068 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1072 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1073 * address from the XHCI endpoint index.
1075 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1077 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1078 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1079 return direction | number;
1082 /* Find the flag for this endpoint (for use in the control context). Use the
1083 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1086 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1088 return 1 << (xhci_get_endpoint_index(desc) + 1);
1091 /* Find the flag for this endpoint (for use in the control context). Use the
1092 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1095 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1097 return 1 << (ep_index + 1);
1100 /* Compute the last valid endpoint context index. Basically, this is the
1101 * endpoint index plus one. For slot contexts with more than valid endpoint,
1102 * we find the most significant bit set in the added contexts flags.
1103 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1104 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1106 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1108 return fls(added_ctxs) - 1;
1111 /* Returns 1 if the arguments are OK;
1112 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1114 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1115 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1117 struct xhci_hcd *xhci;
1118 struct xhci_virt_device *virt_dev;
1120 if (!hcd || (check_ep && !ep) || !udev) {
1121 pr_debug("xHCI %s called with invalid args\n", func);
1124 if (!udev->parent) {
1125 pr_debug("xHCI %s called for root hub\n", func);
1129 xhci = hcd_to_xhci(hcd);
1130 if (check_virt_dev) {
1131 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1132 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1137 virt_dev = xhci->devs[udev->slot_id];
1138 if (virt_dev->udev != udev) {
1139 xhci_dbg(xhci, "xHCI %s called with udev and "
1140 "virt_dev does not match\n", func);
1145 if (xhci->xhc_state & XHCI_STATE_HALTED)
1151 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1152 struct usb_device *udev, struct xhci_command *command,
1153 bool ctx_change, bool must_succeed);
1156 * Full speed devices may have a max packet size greater than 8 bytes, but the
1157 * USB core doesn't know that until it reads the first 8 bytes of the
1158 * descriptor. If the usb_device's max packet size changes after that point,
1159 * we need to issue an evaluate context command and wait on it.
1161 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1162 unsigned int ep_index, struct urb *urb)
1164 struct xhci_container_ctx *in_ctx;
1165 struct xhci_container_ctx *out_ctx;
1166 struct xhci_input_control_ctx *ctrl_ctx;
1167 struct xhci_ep_ctx *ep_ctx;
1168 int max_packet_size;
1169 int hw_max_packet_size;
1172 out_ctx = xhci->devs[slot_id]->out_ctx;
1173 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1174 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1175 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1176 if (hw_max_packet_size != max_packet_size) {
1177 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1178 "Max Packet Size for ep 0 changed.");
1179 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1180 "Max packet size in usb_device = %d",
1182 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1183 "Max packet size in xHCI HW = %d",
1184 hw_max_packet_size);
1185 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1186 "Issuing evaluate context command.");
1188 /* Set up the input context flags for the command */
1189 /* FIXME: This won't work if a non-default control endpoint
1190 * changes max packet sizes.
1192 in_ctx = xhci->devs[slot_id]->in_ctx;
1193 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1195 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1199 /* Set up the modified control endpoint 0 */
1200 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1201 xhci->devs[slot_id]->out_ctx, ep_index);
1203 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1204 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1205 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1207 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1208 ctrl_ctx->drop_flags = 0;
1210 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1211 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1212 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1213 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1215 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1218 /* Clean up the input context for later use by bandwidth
1221 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1227 * non-error returns are a promise to giveback() the urb later
1228 * we drop ownership so next owner (or urb unlink) can get it
1230 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1232 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1233 struct xhci_td *buffer;
1234 unsigned long flags;
1236 unsigned int slot_id, ep_index;
1237 struct urb_priv *urb_priv;
1240 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1241 true, true, __func__) <= 0)
1244 slot_id = urb->dev->slot_id;
1245 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1247 if (!HCD_HW_ACCESSIBLE(hcd)) {
1248 if (!in_interrupt())
1249 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1254 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1255 size = urb->number_of_packets;
1259 urb_priv = kzalloc(sizeof(struct urb_priv) +
1260 size * sizeof(struct xhci_td *), mem_flags);
1264 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1270 for (i = 0; i < size; i++) {
1271 urb_priv->td[i] = buffer;
1275 urb_priv->length = size;
1276 urb_priv->td_cnt = 0;
1277 urb->hcpriv = urb_priv;
1279 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1280 /* Check to see if the max packet size for the default control
1281 * endpoint changed during FS device enumeration
1283 if (urb->dev->speed == USB_SPEED_FULL) {
1284 ret = xhci_check_maxpacket(xhci, slot_id,
1287 xhci_urb_free_priv(xhci, urb_priv);
1293 /* We have a spinlock and interrupts disabled, so we must pass
1294 * atomic context to this function, which may allocate memory.
1296 spin_lock_irqsave(&xhci->lock, flags);
1297 if (xhci->xhc_state & XHCI_STATE_DYING)
1299 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1303 spin_unlock_irqrestore(&xhci->lock, flags);
1304 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1305 spin_lock_irqsave(&xhci->lock, flags);
1306 if (xhci->xhc_state & XHCI_STATE_DYING)
1308 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1309 EP_GETTING_STREAMS) {
1310 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1311 "is transitioning to using streams.\n");
1313 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1314 EP_GETTING_NO_STREAMS) {
1315 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1316 "is transitioning to "
1317 "not having streams.\n");
1320 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1325 spin_unlock_irqrestore(&xhci->lock, flags);
1326 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1327 spin_lock_irqsave(&xhci->lock, flags);
1328 if (xhci->xhc_state & XHCI_STATE_DYING)
1330 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1334 spin_unlock_irqrestore(&xhci->lock, flags);
1336 spin_lock_irqsave(&xhci->lock, flags);
1337 if (xhci->xhc_state & XHCI_STATE_DYING)
1339 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1343 spin_unlock_irqrestore(&xhci->lock, flags);
1348 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1349 "non-responsive xHCI host.\n",
1350 urb->ep->desc.bEndpointAddress, urb);
1353 xhci_urb_free_priv(xhci, urb_priv);
1355 spin_unlock_irqrestore(&xhci->lock, flags);
1359 /* Get the right ring for the given URB.
1360 * If the endpoint supports streams, boundary check the URB's stream ID.
1361 * If the endpoint doesn't support streams, return the singular endpoint ring.
1363 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1366 unsigned int slot_id;
1367 unsigned int ep_index;
1368 unsigned int stream_id;
1369 struct xhci_virt_ep *ep;
1371 slot_id = urb->dev->slot_id;
1372 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1373 stream_id = urb->stream_id;
1374 ep = &xhci->devs[slot_id]->eps[ep_index];
1375 /* Common case: no streams */
1376 if (!(ep->ep_state & EP_HAS_STREAMS))
1379 if (stream_id == 0) {
1381 "WARN: Slot ID %u, ep index %u has streams, "
1382 "but URB has no stream ID.\n",
1387 if (stream_id < ep->stream_info->num_streams)
1388 return ep->stream_info->stream_rings[stream_id];
1391 "WARN: Slot ID %u, ep index %u has "
1392 "stream IDs 1 to %u allocated, "
1393 "but stream ID %u is requested.\n",
1395 ep->stream_info->num_streams - 1,
1401 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1402 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1403 * should pick up where it left off in the TD, unless a Set Transfer Ring
1404 * Dequeue Pointer is issued.
1406 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1407 * the ring. Since the ring is a contiguous structure, they can't be physically
1408 * removed. Instead, there are two options:
1410 * 1) If the HC is in the middle of processing the URB to be canceled, we
1411 * simply move the ring's dequeue pointer past those TRBs using the Set
1412 * Transfer Ring Dequeue Pointer command. This will be the common case,
1413 * when drivers timeout on the last submitted URB and attempt to cancel.
1415 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1416 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1417 * HC will need to invalidate the any TRBs it has cached after the stop
1418 * endpoint command, as noted in the xHCI 0.95 errata.
1420 * 3) The TD may have completed by the time the Stop Endpoint Command
1421 * completes, so software needs to handle that case too.
1423 * This function should protect against the TD enqueueing code ringing the
1424 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1425 * It also needs to account for multiple cancellations on happening at the same
1426 * time for the same endpoint.
1428 * Note that this function can be called in any context, or so says
1429 * usb_hcd_unlink_urb()
1431 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1433 unsigned long flags;
1436 struct xhci_hcd *xhci;
1437 struct urb_priv *urb_priv;
1439 unsigned int ep_index;
1440 struct xhci_ring *ep_ring;
1441 struct xhci_virt_ep *ep;
1443 xhci = hcd_to_xhci(hcd);
1444 spin_lock_irqsave(&xhci->lock, flags);
1445 /* Make sure the URB hasn't completed or been unlinked already */
1446 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1447 if (ret || !urb->hcpriv)
1449 temp = xhci_readl(xhci, &xhci->op_regs->status);
1450 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1451 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1452 "HW died, freeing TD.");
1453 urb_priv = urb->hcpriv;
1454 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1455 td = urb_priv->td[i];
1456 if (!list_empty(&td->td_list))
1457 list_del_init(&td->td_list);
1458 if (!list_empty(&td->cancelled_td_list))
1459 list_del_init(&td->cancelled_td_list);
1462 usb_hcd_unlink_urb_from_ep(hcd, urb);
1463 spin_unlock_irqrestore(&xhci->lock, flags);
1464 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1465 xhci_urb_free_priv(xhci, urb_priv);
1468 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1469 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1470 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1471 "Ep 0x%x: URB %p to be canceled on "
1472 "non-responsive xHCI host.",
1473 urb->ep->desc.bEndpointAddress, urb);
1474 /* Let the stop endpoint command watchdog timer (which set this
1475 * state) finish cleaning up the endpoint TD lists. We must
1476 * have caught it in the middle of dropping a lock and giving
1482 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1483 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1484 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1490 urb_priv = urb->hcpriv;
1491 i = urb_priv->td_cnt;
1492 if (i < urb_priv->length)
1493 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1494 "Cancel URB %p, dev %s, ep 0x%x, "
1495 "starting at offset 0x%llx",
1496 urb, urb->dev->devpath,
1497 urb->ep->desc.bEndpointAddress,
1498 (unsigned long long) xhci_trb_virt_to_dma(
1499 urb_priv->td[i]->start_seg,
1500 urb_priv->td[i]->first_trb));
1502 for (; i < urb_priv->length; i++) {
1503 td = urb_priv->td[i];
1504 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1507 /* Queue a stop endpoint command, but only if this is
1508 * the first cancellation to be handled.
1510 if (!(ep->ep_state & EP_HALT_PENDING)) {
1511 ep->ep_state |= EP_HALT_PENDING;
1512 ep->stop_cmds_pending++;
1513 ep->stop_cmd_timer.expires = jiffies +
1514 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1515 add_timer(&ep->stop_cmd_timer);
1516 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1517 xhci_ring_cmd_db(xhci);
1520 spin_unlock_irqrestore(&xhci->lock, flags);
1524 /* Drop an endpoint from a new bandwidth configuration for this device.
1525 * Only one call to this function is allowed per endpoint before
1526 * check_bandwidth() or reset_bandwidth() must be called.
1527 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1528 * add the endpoint to the schedule with possibly new parameters denoted by a
1529 * different endpoint descriptor in usb_host_endpoint.
1530 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1533 * The USB core will not allow URBs to be queued to an endpoint that is being
1534 * disabled, so there's no need for mutual exclusion to protect
1535 * the xhci->devs[slot_id] structure.
1537 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1538 struct usb_host_endpoint *ep)
1540 struct xhci_hcd *xhci;
1541 struct xhci_container_ctx *in_ctx, *out_ctx;
1542 struct xhci_input_control_ctx *ctrl_ctx;
1543 struct xhci_slot_ctx *slot_ctx;
1544 unsigned int last_ctx;
1545 unsigned int ep_index;
1546 struct xhci_ep_ctx *ep_ctx;
1548 u32 new_add_flags, new_drop_flags, new_slot_info;
1551 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1554 xhci = hcd_to_xhci(hcd);
1555 if (xhci->xhc_state & XHCI_STATE_DYING)
1558 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1559 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1560 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1561 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1562 __func__, drop_flag);
1566 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1567 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1568 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1570 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1575 ep_index = xhci_get_endpoint_index(&ep->desc);
1576 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1577 /* If the HC already knows the endpoint is disabled,
1578 * or the HCD has noted it is disabled, ignore this request
1580 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1581 cpu_to_le32(EP_STATE_DISABLED)) ||
1582 le32_to_cpu(ctrl_ctx->drop_flags) &
1583 xhci_get_endpoint_flag(&ep->desc)) {
1584 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1589 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1590 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1592 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1593 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1595 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1596 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1597 /* Update the last valid endpoint context, if we deleted the last one */
1598 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1599 LAST_CTX(last_ctx)) {
1600 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1601 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1603 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1605 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1607 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1608 (unsigned int) ep->desc.bEndpointAddress,
1610 (unsigned int) new_drop_flags,
1611 (unsigned int) new_add_flags,
1612 (unsigned int) new_slot_info);
1616 /* Add an endpoint to a new possible bandwidth configuration for this device.
1617 * Only one call to this function is allowed per endpoint before
1618 * check_bandwidth() or reset_bandwidth() must be called.
1619 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1620 * add the endpoint to the schedule with possibly new parameters denoted by a
1621 * different endpoint descriptor in usb_host_endpoint.
1622 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1625 * The USB core will not allow URBs to be queued to an endpoint until the
1626 * configuration or alt setting is installed in the device, so there's no need
1627 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1629 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1630 struct usb_host_endpoint *ep)
1632 struct xhci_hcd *xhci;
1633 struct xhci_container_ctx *in_ctx, *out_ctx;
1634 unsigned int ep_index;
1635 struct xhci_slot_ctx *slot_ctx;
1636 struct xhci_input_control_ctx *ctrl_ctx;
1638 unsigned int last_ctx;
1639 u32 new_add_flags, new_drop_flags, new_slot_info;
1640 struct xhci_virt_device *virt_dev;
1643 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1645 /* So we won't queue a reset ep command for a root hub */
1649 xhci = hcd_to_xhci(hcd);
1650 if (xhci->xhc_state & XHCI_STATE_DYING)
1653 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1654 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1655 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1656 /* FIXME when we have to issue an evaluate endpoint command to
1657 * deal with ep0 max packet size changing once we get the
1660 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1661 __func__, added_ctxs);
1665 virt_dev = xhci->devs[udev->slot_id];
1666 in_ctx = virt_dev->in_ctx;
1667 out_ctx = virt_dev->out_ctx;
1668 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1670 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1675 ep_index = xhci_get_endpoint_index(&ep->desc);
1676 /* If this endpoint is already in use, and the upper layers are trying
1677 * to add it again without dropping it, reject the addition.
1679 if (virt_dev->eps[ep_index].ring &&
1680 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1681 xhci_get_endpoint_flag(&ep->desc))) {
1682 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1683 "without dropping it.\n",
1684 (unsigned int) ep->desc.bEndpointAddress);
1688 /* If the HCD has already noted the endpoint is enabled,
1689 * ignore this request.
1691 if (le32_to_cpu(ctrl_ctx->add_flags) &
1692 xhci_get_endpoint_flag(&ep->desc)) {
1693 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1699 * Configuration and alternate setting changes must be done in
1700 * process context, not interrupt context (or so documenation
1701 * for usb_set_interface() and usb_set_configuration() claim).
1703 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1704 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1705 __func__, ep->desc.bEndpointAddress);
1709 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1710 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1712 /* If xhci_endpoint_disable() was called for this endpoint, but the
1713 * xHC hasn't been notified yet through the check_bandwidth() call,
1714 * this re-adds a new state for the endpoint from the new endpoint
1715 * descriptors. We must drop and re-add this endpoint, so we leave the
1718 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1720 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1721 /* Update the last valid endpoint context, if we just added one past */
1722 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1723 LAST_CTX(last_ctx)) {
1724 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1725 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1727 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1729 /* Store the usb_device pointer for later use */
1732 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1733 (unsigned int) ep->desc.bEndpointAddress,
1735 (unsigned int) new_drop_flags,
1736 (unsigned int) new_add_flags,
1737 (unsigned int) new_slot_info);
1741 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1743 struct xhci_input_control_ctx *ctrl_ctx;
1744 struct xhci_ep_ctx *ep_ctx;
1745 struct xhci_slot_ctx *slot_ctx;
1748 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1750 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1755 /* When a device's add flag and drop flag are zero, any subsequent
1756 * configure endpoint command will leave that endpoint's state
1757 * untouched. Make sure we don't leave any old state in the input
1758 * endpoint contexts.
1760 ctrl_ctx->drop_flags = 0;
1761 ctrl_ctx->add_flags = 0;
1762 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1763 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1764 /* Endpoint 0 is always valid */
1765 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1766 for (i = 1; i < 31; ++i) {
1767 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1768 ep_ctx->ep_info = 0;
1769 ep_ctx->ep_info2 = 0;
1771 ep_ctx->tx_info = 0;
1775 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1776 struct usb_device *udev, u32 *cmd_status)
1780 switch (*cmd_status) {
1782 dev_warn(&udev->dev, "Not enough host controller resources "
1783 "for new device state.\n");
1785 /* FIXME: can we allocate more resources for the HC? */
1788 case COMP_2ND_BW_ERR:
1789 dev_warn(&udev->dev, "Not enough bandwidth "
1790 "for new device state.\n");
1792 /* FIXME: can we go back to the old state? */
1795 /* the HCD set up something wrong */
1796 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1798 "and endpoint is not disabled.\n");
1802 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1803 "configure command.\n");
1807 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1808 "Successful Endpoint Configure command");
1812 xhci_err(xhci, "ERROR: unexpected command completion "
1813 "code 0x%x.\n", *cmd_status);
1820 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1821 struct usb_device *udev, u32 *cmd_status)
1824 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1826 switch (*cmd_status) {
1828 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1829 "context command.\n");
1833 dev_warn(&udev->dev, "WARN: slot not enabled for"
1834 "evaluate context command.\n");
1837 case COMP_CTX_STATE:
1838 dev_warn(&udev->dev, "WARN: invalid context state for "
1839 "evaluate context command.\n");
1840 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1844 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1845 "context command.\n");
1849 /* Max Exit Latency too large error */
1850 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1854 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1855 "Successful evaluate context command");
1859 xhci_err(xhci, "ERROR: unexpected command completion "
1860 "code 0x%x.\n", *cmd_status);
1867 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1868 struct xhci_input_control_ctx *ctrl_ctx)
1870 u32 valid_add_flags;
1871 u32 valid_drop_flags;
1873 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1874 * (bit 1). The default control endpoint is added during the Address
1875 * Device command and is never removed until the slot is disabled.
1877 valid_add_flags = ctrl_ctx->add_flags >> 2;
1878 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1880 /* Use hweight32 to count the number of ones in the add flags, or
1881 * number of endpoints added. Don't count endpoints that are changed
1882 * (both added and dropped).
1884 return hweight32(valid_add_flags) -
1885 hweight32(valid_add_flags & valid_drop_flags);
1888 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1889 struct xhci_input_control_ctx *ctrl_ctx)
1891 u32 valid_add_flags;
1892 u32 valid_drop_flags;
1894 valid_add_flags = ctrl_ctx->add_flags >> 2;
1895 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1897 return hweight32(valid_drop_flags) -
1898 hweight32(valid_add_flags & valid_drop_flags);
1902 * We need to reserve the new number of endpoints before the configure endpoint
1903 * command completes. We can't subtract the dropped endpoints from the number
1904 * of active endpoints until the command completes because we can oversubscribe
1905 * the host in this case:
1907 * - the first configure endpoint command drops more endpoints than it adds
1908 * - a second configure endpoint command that adds more endpoints is queued
1909 * - the first configure endpoint command fails, so the config is unchanged
1910 * - the second command may succeed, even though there isn't enough resources
1912 * Must be called with xhci->lock held.
1914 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1915 struct xhci_input_control_ctx *ctrl_ctx)
1919 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1920 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1921 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1922 "Not enough ep ctxs: "
1923 "%u active, need to add %u, limit is %u.",
1924 xhci->num_active_eps, added_eps,
1925 xhci->limit_active_eps);
1928 xhci->num_active_eps += added_eps;
1929 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1930 "Adding %u ep ctxs, %u now active.", added_eps,
1931 xhci->num_active_eps);
1936 * The configure endpoint was failed by the xHC for some other reason, so we
1937 * need to revert the resources that failed configuration would have used.
1939 * Must be called with xhci->lock held.
1941 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1942 struct xhci_input_control_ctx *ctrl_ctx)
1946 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1947 xhci->num_active_eps -= num_failed_eps;
1948 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1949 "Removing %u failed ep ctxs, %u now active.",
1951 xhci->num_active_eps);
1955 * Now that the command has completed, clean up the active endpoint count by
1956 * subtracting out the endpoints that were dropped (but not changed).
1958 * Must be called with xhci->lock held.
1960 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1961 struct xhci_input_control_ctx *ctrl_ctx)
1963 u32 num_dropped_eps;
1965 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1966 xhci->num_active_eps -= num_dropped_eps;
1967 if (num_dropped_eps)
1968 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1969 "Removing %u dropped ep ctxs, %u now active.",
1971 xhci->num_active_eps);
1974 static unsigned int xhci_get_block_size(struct usb_device *udev)
1976 switch (udev->speed) {
1978 case USB_SPEED_FULL:
1980 case USB_SPEED_HIGH:
1982 case USB_SPEED_SUPER:
1984 case USB_SPEED_UNKNOWN:
1985 case USB_SPEED_WIRELESS:
1987 /* Should never happen */
1993 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1995 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1997 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2002 /* If we are changing a LS/FS device under a HS hub,
2003 * make sure (if we are activating a new TT) that the HS bus has enough
2004 * bandwidth for this new TT.
2006 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2007 struct xhci_virt_device *virt_dev,
2010 struct xhci_interval_bw_table *bw_table;
2011 struct xhci_tt_bw_info *tt_info;
2013 /* Find the bandwidth table for the root port this TT is attached to. */
2014 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2015 tt_info = virt_dev->tt_info;
2016 /* If this TT already had active endpoints, the bandwidth for this TT
2017 * has already been added. Removing all periodic endpoints (and thus
2018 * making the TT enactive) will only decrease the bandwidth used.
2022 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2023 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2027 /* Not sure why we would have no new active endpoints...
2029 * Maybe because of an Evaluate Context change for a hub update or a
2030 * control endpoint 0 max packet size change?
2031 * FIXME: skip the bandwidth calculation in that case.
2036 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2037 struct xhci_virt_device *virt_dev)
2039 unsigned int bw_reserved;
2041 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2042 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2045 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2046 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2053 * This algorithm is a very conservative estimate of the worst-case scheduling
2054 * scenario for any one interval. The hardware dynamically schedules the
2055 * packets, so we can't tell which microframe could be the limiting factor in
2056 * the bandwidth scheduling. This only takes into account periodic endpoints.
2058 * Obviously, we can't solve an NP complete problem to find the minimum worst
2059 * case scenario. Instead, we come up with an estimate that is no less than
2060 * the worst case bandwidth used for any one microframe, but may be an
2063 * We walk the requirements for each endpoint by interval, starting with the
2064 * smallest interval, and place packets in the schedule where there is only one
2065 * possible way to schedule packets for that interval. In order to simplify
2066 * this algorithm, we record the largest max packet size for each interval, and
2067 * assume all packets will be that size.
2069 * For interval 0, we obviously must schedule all packets for each interval.
2070 * The bandwidth for interval 0 is just the amount of data to be transmitted
2071 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2072 * the number of packets).
2074 * For interval 1, we have two possible microframes to schedule those packets
2075 * in. For this algorithm, if we can schedule the same number of packets for
2076 * each possible scheduling opportunity (each microframe), we will do so. The
2077 * remaining number of packets will be saved to be transmitted in the gaps in
2078 * the next interval's scheduling sequence.
2080 * As we move those remaining packets to be scheduled with interval 2 packets,
2081 * we have to double the number of remaining packets to transmit. This is
2082 * because the intervals are actually powers of 2, and we would be transmitting
2083 * the previous interval's packets twice in this interval. We also have to be
2084 * sure that when we look at the largest max packet size for this interval, we
2085 * also look at the largest max packet size for the remaining packets and take
2086 * the greater of the two.
2088 * The algorithm continues to evenly distribute packets in each scheduling
2089 * opportunity, and push the remaining packets out, until we get to the last
2090 * interval. Then those packets and their associated overhead are just added
2091 * to the bandwidth used.
2093 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2094 struct xhci_virt_device *virt_dev,
2097 unsigned int bw_reserved;
2098 unsigned int max_bandwidth;
2099 unsigned int bw_used;
2100 unsigned int block_size;
2101 struct xhci_interval_bw_table *bw_table;
2102 unsigned int packet_size = 0;
2103 unsigned int overhead = 0;
2104 unsigned int packets_transmitted = 0;
2105 unsigned int packets_remaining = 0;
2108 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2109 return xhci_check_ss_bw(xhci, virt_dev);
2111 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2112 max_bandwidth = HS_BW_LIMIT;
2113 /* Convert percent of bus BW reserved to blocks reserved */
2114 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2116 max_bandwidth = FS_BW_LIMIT;
2117 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2120 bw_table = virt_dev->bw_table;
2121 /* We need to translate the max packet size and max ESIT payloads into
2122 * the units the hardware uses.
2124 block_size = xhci_get_block_size(virt_dev->udev);
2126 /* If we are manipulating a LS/FS device under a HS hub, double check
2127 * that the HS bus has enough bandwidth if we are activing a new TT.
2129 if (virt_dev->tt_info) {
2130 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2131 "Recalculating BW for rootport %u",
2132 virt_dev->real_port);
2133 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2134 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2135 "newly activated TT.\n");
2138 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2139 "Recalculating BW for TT slot %u port %u",
2140 virt_dev->tt_info->slot_id,
2141 virt_dev->tt_info->ttport);
2143 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2144 "Recalculating BW for rootport %u",
2145 virt_dev->real_port);
2148 /* Add in how much bandwidth will be used for interval zero, or the
2149 * rounded max ESIT payload + number of packets * largest overhead.
2151 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2152 bw_table->interval_bw[0].num_packets *
2153 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2155 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2156 unsigned int bw_added;
2157 unsigned int largest_mps;
2158 unsigned int interval_overhead;
2161 * How many packets could we transmit in this interval?
2162 * If packets didn't fit in the previous interval, we will need
2163 * to transmit that many packets twice within this interval.
2165 packets_remaining = 2 * packets_remaining +
2166 bw_table->interval_bw[i].num_packets;
2168 /* Find the largest max packet size of this or the previous
2171 if (list_empty(&bw_table->interval_bw[i].endpoints))
2174 struct xhci_virt_ep *virt_ep;
2175 struct list_head *ep_entry;
2177 ep_entry = bw_table->interval_bw[i].endpoints.next;
2178 virt_ep = list_entry(ep_entry,
2179 struct xhci_virt_ep, bw_endpoint_list);
2180 /* Convert to blocks, rounding up */
2181 largest_mps = DIV_ROUND_UP(
2182 virt_ep->bw_info.max_packet_size,
2185 if (largest_mps > packet_size)
2186 packet_size = largest_mps;
2188 /* Use the larger overhead of this or the previous interval. */
2189 interval_overhead = xhci_get_largest_overhead(
2190 &bw_table->interval_bw[i]);
2191 if (interval_overhead > overhead)
2192 overhead = interval_overhead;
2194 /* How many packets can we evenly distribute across
2195 * (1 << (i + 1)) possible scheduling opportunities?
2197 packets_transmitted = packets_remaining >> (i + 1);
2199 /* Add in the bandwidth used for those scheduled packets */
2200 bw_added = packets_transmitted * (overhead + packet_size);
2202 /* How many packets do we have remaining to transmit? */
2203 packets_remaining = packets_remaining % (1 << (i + 1));
2205 /* What largest max packet size should those packets have? */
2206 /* If we've transmitted all packets, don't carry over the
2207 * largest packet size.
2209 if (packets_remaining == 0) {
2212 } else if (packets_transmitted > 0) {
2213 /* Otherwise if we do have remaining packets, and we've
2214 * scheduled some packets in this interval, take the
2215 * largest max packet size from endpoints with this
2218 packet_size = largest_mps;
2219 overhead = interval_overhead;
2221 /* Otherwise carry over packet_size and overhead from the last
2222 * time we had a remainder.
2224 bw_used += bw_added;
2225 if (bw_used > max_bandwidth) {
2226 xhci_warn(xhci, "Not enough bandwidth. "
2227 "Proposed: %u, Max: %u\n",
2228 bw_used, max_bandwidth);
2233 * Ok, we know we have some packets left over after even-handedly
2234 * scheduling interval 15. We don't know which microframes they will
2235 * fit into, so we over-schedule and say they will be scheduled every
2238 if (packets_remaining > 0)
2239 bw_used += overhead + packet_size;
2241 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2242 unsigned int port_index = virt_dev->real_port - 1;
2244 /* OK, we're manipulating a HS device attached to a
2245 * root port bandwidth domain. Include the number of active TTs
2246 * in the bandwidth used.
2248 bw_used += TT_HS_OVERHEAD *
2249 xhci->rh_bw[port_index].num_active_tts;
2252 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2253 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2254 "Available: %u " "percent",
2255 bw_used, max_bandwidth, bw_reserved,
2256 (max_bandwidth - bw_used - bw_reserved) * 100 /
2259 bw_used += bw_reserved;
2260 if (bw_used > max_bandwidth) {
2261 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2262 bw_used, max_bandwidth);
2266 bw_table->bw_used = bw_used;
2270 static bool xhci_is_async_ep(unsigned int ep_type)
2272 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2273 ep_type != ISOC_IN_EP &&
2274 ep_type != INT_IN_EP);
2277 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2279 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2282 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2284 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2286 if (ep_bw->ep_interval == 0)
2287 return SS_OVERHEAD_BURST +
2288 (ep_bw->mult * ep_bw->num_packets *
2289 (SS_OVERHEAD + mps));
2290 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2291 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2292 1 << ep_bw->ep_interval);
2296 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2297 struct xhci_bw_info *ep_bw,
2298 struct xhci_interval_bw_table *bw_table,
2299 struct usb_device *udev,
2300 struct xhci_virt_ep *virt_ep,
2301 struct xhci_tt_bw_info *tt_info)
2303 struct xhci_interval_bw *interval_bw;
2304 int normalized_interval;
2306 if (xhci_is_async_ep(ep_bw->type))
2309 if (udev->speed == USB_SPEED_SUPER) {
2310 if (xhci_is_sync_in_ep(ep_bw->type))
2311 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2312 xhci_get_ss_bw_consumed(ep_bw);
2314 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2315 xhci_get_ss_bw_consumed(ep_bw);
2319 /* SuperSpeed endpoints never get added to intervals in the table, so
2320 * this check is only valid for HS/FS/LS devices.
2322 if (list_empty(&virt_ep->bw_endpoint_list))
2324 /* For LS/FS devices, we need to translate the interval expressed in
2325 * microframes to frames.
2327 if (udev->speed == USB_SPEED_HIGH)
2328 normalized_interval = ep_bw->ep_interval;
2330 normalized_interval = ep_bw->ep_interval - 3;
2332 if (normalized_interval == 0)
2333 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2334 interval_bw = &bw_table->interval_bw[normalized_interval];
2335 interval_bw->num_packets -= ep_bw->num_packets;
2336 switch (udev->speed) {
2338 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2340 case USB_SPEED_FULL:
2341 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2343 case USB_SPEED_HIGH:
2344 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2346 case USB_SPEED_SUPER:
2347 case USB_SPEED_UNKNOWN:
2348 case USB_SPEED_WIRELESS:
2349 /* Should never happen because only LS/FS/HS endpoints will get
2350 * added to the endpoint list.
2355 tt_info->active_eps -= 1;
2356 list_del_init(&virt_ep->bw_endpoint_list);
2359 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2360 struct xhci_bw_info *ep_bw,
2361 struct xhci_interval_bw_table *bw_table,
2362 struct usb_device *udev,
2363 struct xhci_virt_ep *virt_ep,
2364 struct xhci_tt_bw_info *tt_info)
2366 struct xhci_interval_bw *interval_bw;
2367 struct xhci_virt_ep *smaller_ep;
2368 int normalized_interval;
2370 if (xhci_is_async_ep(ep_bw->type))
2373 if (udev->speed == USB_SPEED_SUPER) {
2374 if (xhci_is_sync_in_ep(ep_bw->type))
2375 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2376 xhci_get_ss_bw_consumed(ep_bw);
2378 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2379 xhci_get_ss_bw_consumed(ep_bw);
2383 /* For LS/FS devices, we need to translate the interval expressed in
2384 * microframes to frames.
2386 if (udev->speed == USB_SPEED_HIGH)
2387 normalized_interval = ep_bw->ep_interval;
2389 normalized_interval = ep_bw->ep_interval - 3;
2391 if (normalized_interval == 0)
2392 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2393 interval_bw = &bw_table->interval_bw[normalized_interval];
2394 interval_bw->num_packets += ep_bw->num_packets;
2395 switch (udev->speed) {
2397 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2399 case USB_SPEED_FULL:
2400 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2402 case USB_SPEED_HIGH:
2403 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2405 case USB_SPEED_SUPER:
2406 case USB_SPEED_UNKNOWN:
2407 case USB_SPEED_WIRELESS:
2408 /* Should never happen because only LS/FS/HS endpoints will get
2409 * added to the endpoint list.
2415 tt_info->active_eps += 1;
2416 /* Insert the endpoint into the list, largest max packet size first. */
2417 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2419 if (ep_bw->max_packet_size >=
2420 smaller_ep->bw_info.max_packet_size) {
2421 /* Add the new ep before the smaller endpoint */
2422 list_add_tail(&virt_ep->bw_endpoint_list,
2423 &smaller_ep->bw_endpoint_list);
2427 /* Add the new endpoint at the end of the list. */
2428 list_add_tail(&virt_ep->bw_endpoint_list,
2429 &interval_bw->endpoints);
2432 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2433 struct xhci_virt_device *virt_dev,
2436 struct xhci_root_port_bw_info *rh_bw_info;
2437 if (!virt_dev->tt_info)
2440 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2441 if (old_active_eps == 0 &&
2442 virt_dev->tt_info->active_eps != 0) {
2443 rh_bw_info->num_active_tts += 1;
2444 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2445 } else if (old_active_eps != 0 &&
2446 virt_dev->tt_info->active_eps == 0) {
2447 rh_bw_info->num_active_tts -= 1;
2448 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2452 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2453 struct xhci_virt_device *virt_dev,
2454 struct xhci_container_ctx *in_ctx)
2456 struct xhci_bw_info ep_bw_info[31];
2458 struct xhci_input_control_ctx *ctrl_ctx;
2459 int old_active_eps = 0;
2461 if (virt_dev->tt_info)
2462 old_active_eps = virt_dev->tt_info->active_eps;
2464 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2466 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2471 for (i = 0; i < 31; i++) {
2472 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2475 /* Make a copy of the BW info in case we need to revert this */
2476 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2477 sizeof(ep_bw_info[i]));
2478 /* Drop the endpoint from the interval table if the endpoint is
2479 * being dropped or changed.
2481 if (EP_IS_DROPPED(ctrl_ctx, i))
2482 xhci_drop_ep_from_interval_table(xhci,
2483 &virt_dev->eps[i].bw_info,
2489 /* Overwrite the information stored in the endpoints' bw_info */
2490 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2491 for (i = 0; i < 31; i++) {
2492 /* Add any changed or added endpoints to the interval table */
2493 if (EP_IS_ADDED(ctrl_ctx, i))
2494 xhci_add_ep_to_interval_table(xhci,
2495 &virt_dev->eps[i].bw_info,
2502 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2503 /* Ok, this fits in the bandwidth we have.
2504 * Update the number of active TTs.
2506 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2510 /* We don't have enough bandwidth for this, revert the stored info. */
2511 for (i = 0; i < 31; i++) {
2512 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2515 /* Drop the new copies of any added or changed endpoints from
2516 * the interval table.
2518 if (EP_IS_ADDED(ctrl_ctx, i)) {
2519 xhci_drop_ep_from_interval_table(xhci,
2520 &virt_dev->eps[i].bw_info,
2526 /* Revert the endpoint back to its old information */
2527 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2528 sizeof(ep_bw_info[i]));
2529 /* Add any changed or dropped endpoints back into the table */
2530 if (EP_IS_DROPPED(ctrl_ctx, i))
2531 xhci_add_ep_to_interval_table(xhci,
2532 &virt_dev->eps[i].bw_info,
2542 /* Issue a configure endpoint command or evaluate context command
2543 * and wait for it to finish.
2545 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2546 struct usb_device *udev,
2547 struct xhci_command *command,
2548 bool ctx_change, bool must_succeed)
2552 unsigned long flags;
2553 struct xhci_container_ctx *in_ctx;
2554 struct xhci_input_control_ctx *ctrl_ctx;
2555 struct completion *cmd_completion;
2557 struct xhci_virt_device *virt_dev;
2558 union xhci_trb *cmd_trb;
2560 spin_lock_irqsave(&xhci->lock, flags);
2561 virt_dev = xhci->devs[udev->slot_id];
2564 in_ctx = command->in_ctx;
2566 in_ctx = virt_dev->in_ctx;
2567 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2569 spin_unlock_irqrestore(&xhci->lock, flags);
2570 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2575 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2576 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2577 spin_unlock_irqrestore(&xhci->lock, flags);
2578 xhci_warn(xhci, "Not enough host resources, "
2579 "active endpoint contexts = %u\n",
2580 xhci->num_active_eps);
2583 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2584 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2585 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2586 xhci_free_host_resources(xhci, ctrl_ctx);
2587 spin_unlock_irqrestore(&xhci->lock, flags);
2588 xhci_warn(xhci, "Not enough bandwidth\n");
2593 cmd_completion = command->completion;
2594 cmd_status = &command->status;
2595 command->command_trb = xhci->cmd_ring->enqueue;
2597 /* Enqueue pointer can be left pointing to the link TRB,
2598 * we must handle that
2600 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2601 command->command_trb =
2602 xhci->cmd_ring->enq_seg->next->trbs;
2604 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2606 cmd_completion = &virt_dev->cmd_completion;
2607 cmd_status = &virt_dev->cmd_status;
2609 init_completion(cmd_completion);
2611 cmd_trb = xhci->cmd_ring->dequeue;
2613 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2614 udev->slot_id, must_succeed);
2616 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2617 udev->slot_id, must_succeed);
2620 list_del(&command->cmd_list);
2621 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2622 xhci_free_host_resources(xhci, ctrl_ctx);
2623 spin_unlock_irqrestore(&xhci->lock, flags);
2624 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2625 "FIXME allocate a new ring segment");
2628 xhci_ring_cmd_db(xhci);
2629 spin_unlock_irqrestore(&xhci->lock, flags);
2631 /* Wait for the configure endpoint command to complete */
2632 timeleft = wait_for_completion_interruptible_timeout(
2634 XHCI_CMD_DEFAULT_TIMEOUT);
2635 if (timeleft <= 0) {
2636 xhci_warn(xhci, "%s while waiting for %s command\n",
2637 timeleft == 0 ? "Timeout" : "Signal",
2639 "configure endpoint" :
2640 "evaluate context");
2641 /* cancel the configure endpoint command */
2642 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2649 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2651 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2653 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2654 spin_lock_irqsave(&xhci->lock, flags);
2655 /* If the command failed, remove the reserved resources.
2656 * Otherwise, clean up the estimate to include dropped eps.
2659 xhci_free_host_resources(xhci, ctrl_ctx);
2661 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2662 spin_unlock_irqrestore(&xhci->lock, flags);
2667 /* Called after one or more calls to xhci_add_endpoint() or
2668 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2669 * to call xhci_reset_bandwidth().
2671 * Since we are in the middle of changing either configuration or
2672 * installing a new alt setting, the USB core won't allow URBs to be
2673 * enqueued for any endpoint on the old config or interface. Nothing
2674 * else should be touching the xhci->devs[slot_id] structure, so we
2675 * don't need to take the xhci->lock for manipulating that.
2677 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2681 struct xhci_hcd *xhci;
2682 struct xhci_virt_device *virt_dev;
2683 struct xhci_input_control_ctx *ctrl_ctx;
2684 struct xhci_slot_ctx *slot_ctx;
2686 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2689 xhci = hcd_to_xhci(hcd);
2690 if (xhci->xhc_state & XHCI_STATE_DYING)
2693 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2694 virt_dev = xhci->devs[udev->slot_id];
2696 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2697 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2699 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2703 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2704 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2705 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2707 /* Don't issue the command if there's no endpoints to update. */
2708 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2709 ctrl_ctx->drop_flags == 0)
2712 xhci_dbg(xhci, "New Input Control Context:\n");
2713 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2714 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2715 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2717 ret = xhci_configure_endpoint(xhci, udev, NULL,
2720 /* Callee should call reset_bandwidth() */
2724 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2725 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2726 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2728 /* Free any rings that were dropped, but not changed. */
2729 for (i = 1; i < 31; ++i) {
2730 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2731 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2732 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2734 xhci_zero_in_ctx(xhci, virt_dev);
2736 * Install any rings for completely new endpoints or changed endpoints,
2737 * and free or cache any old rings from changed endpoints.
2739 for (i = 1; i < 31; ++i) {
2740 if (!virt_dev->eps[i].new_ring)
2742 /* Only cache or free the old ring if it exists.
2743 * It may not if this is the first add of an endpoint.
2745 if (virt_dev->eps[i].ring) {
2746 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2748 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2749 virt_dev->eps[i].new_ring = NULL;
2755 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2757 struct xhci_hcd *xhci;
2758 struct xhci_virt_device *virt_dev;
2761 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2764 xhci = hcd_to_xhci(hcd);
2766 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2767 virt_dev = xhci->devs[udev->slot_id];
2768 /* Free any rings allocated for added endpoints */
2769 for (i = 0; i < 31; ++i) {
2770 if (virt_dev->eps[i].new_ring) {
2771 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2772 virt_dev->eps[i].new_ring = NULL;
2775 xhci_zero_in_ctx(xhci, virt_dev);
2778 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2779 struct xhci_container_ctx *in_ctx,
2780 struct xhci_container_ctx *out_ctx,
2781 struct xhci_input_control_ctx *ctrl_ctx,
2782 u32 add_flags, u32 drop_flags)
2784 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2785 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2786 xhci_slot_copy(xhci, in_ctx, out_ctx);
2787 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2789 xhci_dbg(xhci, "Input Context:\n");
2790 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2793 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2794 unsigned int slot_id, unsigned int ep_index,
2795 struct xhci_dequeue_state *deq_state)
2797 struct xhci_input_control_ctx *ctrl_ctx;
2798 struct xhci_container_ctx *in_ctx;
2799 struct xhci_ep_ctx *ep_ctx;
2803 in_ctx = xhci->devs[slot_id]->in_ctx;
2804 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2806 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2811 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2812 xhci->devs[slot_id]->out_ctx, ep_index);
2813 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2814 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2815 deq_state->new_deq_ptr);
2817 xhci_warn(xhci, "WARN Cannot submit config ep after "
2818 "reset ep command\n");
2819 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2820 deq_state->new_deq_seg,
2821 deq_state->new_deq_ptr);
2824 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2826 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2827 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2828 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2829 added_ctxs, added_ctxs);
2832 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2833 struct usb_device *udev, unsigned int ep_index)
2835 struct xhci_dequeue_state deq_state;
2836 struct xhci_virt_ep *ep;
2838 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2839 "Cleaning up stalled endpoint ring");
2840 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2841 /* We need to move the HW's dequeue pointer past this TD,
2842 * or it will attempt to resend it on the next doorbell ring.
2844 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2845 ep_index, ep->stopped_stream, ep->stopped_td,
2848 /* HW with the reset endpoint quirk will use the saved dequeue state to
2849 * issue a configure endpoint command later.
2851 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2852 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2853 "Queueing new dequeue state");
2854 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2855 ep_index, ep->stopped_stream, &deq_state);
2857 /* Better hope no one uses the input context between now and the
2858 * reset endpoint completion!
2859 * XXX: No idea how this hardware will react when stream rings
2862 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2863 "Setting up input context for "
2864 "configure endpoint command");
2865 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2866 ep_index, &deq_state);
2870 /* Deal with stalled endpoints. The core should have sent the control message
2871 * to clear the halt condition. However, we need to make the xHCI hardware
2872 * reset its sequence number, since a device will expect a sequence number of
2873 * zero after the halt condition is cleared.
2874 * Context: in_interrupt
2876 void xhci_endpoint_reset(struct usb_hcd *hcd,
2877 struct usb_host_endpoint *ep)
2879 struct xhci_hcd *xhci;
2880 struct usb_device *udev;
2881 unsigned int ep_index;
2882 unsigned long flags;
2884 struct xhci_virt_ep *virt_ep;
2886 xhci = hcd_to_xhci(hcd);
2887 udev = (struct usb_device *) ep->hcpriv;
2888 /* Called with a root hub endpoint (or an endpoint that wasn't added
2889 * with xhci_add_endpoint()
2893 ep_index = xhci_get_endpoint_index(&ep->desc);
2894 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2895 if (!virt_ep->stopped_td) {
2896 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2897 "Endpoint 0x%x not halted, refusing to reset.",
2898 ep->desc.bEndpointAddress);
2901 if (usb_endpoint_xfer_control(&ep->desc)) {
2902 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2903 "Control endpoint stall already handled.");
2907 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2908 "Queueing reset endpoint command");
2909 spin_lock_irqsave(&xhci->lock, flags);
2910 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2912 * Can't change the ring dequeue pointer until it's transitioned to the
2913 * stopped state, which is only upon a successful reset endpoint
2914 * command. Better hope that last command worked!
2917 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2918 kfree(virt_ep->stopped_td);
2919 xhci_ring_cmd_db(xhci);
2921 virt_ep->stopped_td = NULL;
2922 virt_ep->stopped_trb = NULL;
2923 virt_ep->stopped_stream = 0;
2924 spin_unlock_irqrestore(&xhci->lock, flags);
2927 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2930 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2931 struct usb_device *udev, struct usb_host_endpoint *ep,
2932 unsigned int slot_id)
2935 unsigned int ep_index;
2936 unsigned int ep_state;
2940 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2943 if (ep->ss_ep_comp.bmAttributes == 0) {
2944 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2945 " descriptor for ep 0x%x does not support streams\n",
2946 ep->desc.bEndpointAddress);
2950 ep_index = xhci_get_endpoint_index(&ep->desc);
2951 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2952 if (ep_state & EP_HAS_STREAMS ||
2953 ep_state & EP_GETTING_STREAMS) {
2954 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2955 "already has streams set up.\n",
2956 ep->desc.bEndpointAddress);
2957 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2958 "dynamic stream context array reallocation.\n");
2961 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2962 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2963 "endpoint 0x%x; URBs are pending.\n",
2964 ep->desc.bEndpointAddress);
2970 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2971 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2973 unsigned int max_streams;
2975 /* The stream context array size must be a power of two */
2976 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2978 * Find out how many primary stream array entries the host controller
2979 * supports. Later we may use secondary stream arrays (similar to 2nd
2980 * level page entries), but that's an optional feature for xHCI host
2981 * controllers. xHCs must support at least 4 stream IDs.
2983 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2984 if (*num_stream_ctxs > max_streams) {
2985 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2987 *num_stream_ctxs = max_streams;
2988 *num_streams = max_streams;
2992 /* Returns an error code if one of the endpoint already has streams.
2993 * This does not change any data structures, it only checks and gathers
2996 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2997 struct usb_device *udev,
2998 struct usb_host_endpoint **eps, unsigned int num_eps,
2999 unsigned int *num_streams, u32 *changed_ep_bitmask)
3001 unsigned int max_streams;
3002 unsigned int endpoint_flag;
3006 for (i = 0; i < num_eps; i++) {
3007 ret = xhci_check_streams_endpoint(xhci, udev,
3008 eps[i], udev->slot_id);
3012 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3013 if (max_streams < (*num_streams - 1)) {
3014 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3015 eps[i]->desc.bEndpointAddress,
3017 *num_streams = max_streams+1;
3020 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3021 if (*changed_ep_bitmask & endpoint_flag)
3023 *changed_ep_bitmask |= endpoint_flag;
3028 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3029 struct usb_device *udev,
3030 struct usb_host_endpoint **eps, unsigned int num_eps)
3032 u32 changed_ep_bitmask = 0;
3033 unsigned int slot_id;
3034 unsigned int ep_index;
3035 unsigned int ep_state;
3038 slot_id = udev->slot_id;
3039 if (!xhci->devs[slot_id])
3042 for (i = 0; i < num_eps; i++) {
3043 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3044 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3045 /* Are streams already being freed for the endpoint? */
3046 if (ep_state & EP_GETTING_NO_STREAMS) {
3047 xhci_warn(xhci, "WARN Can't disable streams for "
3049 "streams are being disabled already\n",
3050 eps[i]->desc.bEndpointAddress);
3053 /* Are there actually any streams to free? */
3054 if (!(ep_state & EP_HAS_STREAMS) &&
3055 !(ep_state & EP_GETTING_STREAMS)) {
3056 xhci_warn(xhci, "WARN Can't disable streams for "
3058 "streams are already disabled!\n",
3059 eps[i]->desc.bEndpointAddress);
3060 xhci_warn(xhci, "WARN xhci_free_streams() called "
3061 "with non-streams endpoint\n");
3064 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3066 return changed_ep_bitmask;
3070 * The USB device drivers use this function (though the HCD interface in USB
3071 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3072 * coordinate mass storage command queueing across multiple endpoints (basically
3073 * a stream ID == a task ID).
3075 * Setting up streams involves allocating the same size stream context array
3076 * for each endpoint and issuing a configure endpoint command for all endpoints.
3078 * Don't allow the call to succeed if one endpoint only supports one stream
3079 * (which means it doesn't support streams at all).
3081 * Drivers may get less stream IDs than they asked for, if the host controller
3082 * hardware or endpoints claim they can't support the number of requested
3085 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3086 struct usb_host_endpoint **eps, unsigned int num_eps,
3087 unsigned int num_streams, gfp_t mem_flags)
3090 struct xhci_hcd *xhci;
3091 struct xhci_virt_device *vdev;
3092 struct xhci_command *config_cmd;
3093 struct xhci_input_control_ctx *ctrl_ctx;
3094 unsigned int ep_index;
3095 unsigned int num_stream_ctxs;
3096 unsigned long flags;
3097 u32 changed_ep_bitmask = 0;
3102 /* Add one to the number of streams requested to account for
3103 * stream 0 that is reserved for xHCI usage.
3106 xhci = hcd_to_xhci(hcd);
3107 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3110 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3112 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3115 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3117 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3119 xhci_free_command(xhci, config_cmd);
3123 /* Check to make sure all endpoints are not already configured for
3124 * streams. While we're at it, find the maximum number of streams that
3125 * all the endpoints will support and check for duplicate endpoints.
3127 spin_lock_irqsave(&xhci->lock, flags);
3128 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3129 num_eps, &num_streams, &changed_ep_bitmask);
3131 xhci_free_command(xhci, config_cmd);
3132 spin_unlock_irqrestore(&xhci->lock, flags);
3135 if (num_streams <= 1) {
3136 xhci_warn(xhci, "WARN: endpoints can't handle "
3137 "more than one stream.\n");
3138 xhci_free_command(xhci, config_cmd);
3139 spin_unlock_irqrestore(&xhci->lock, flags);
3142 vdev = xhci->devs[udev->slot_id];
3143 /* Mark each endpoint as being in transition, so
3144 * xhci_urb_enqueue() will reject all URBs.
3146 for (i = 0; i < num_eps; i++) {
3147 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3148 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3150 spin_unlock_irqrestore(&xhci->lock, flags);
3152 /* Setup internal data structures and allocate HW data structures for
3153 * streams (but don't install the HW structures in the input context
3154 * until we're sure all memory allocation succeeded).
3156 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3157 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3158 num_stream_ctxs, num_streams);
3160 for (i = 0; i < num_eps; i++) {
3161 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3162 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3164 num_streams, mem_flags);
3165 if (!vdev->eps[ep_index].stream_info)
3167 /* Set maxPstreams in endpoint context and update deq ptr to
3168 * point to stream context array. FIXME
3172 /* Set up the input context for a configure endpoint command. */
3173 for (i = 0; i < num_eps; i++) {
3174 struct xhci_ep_ctx *ep_ctx;
3176 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3177 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3179 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3180 vdev->out_ctx, ep_index);
3181 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3182 vdev->eps[ep_index].stream_info);
3184 /* Tell the HW to drop its old copy of the endpoint context info
3185 * and add the updated copy from the input context.
3187 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3188 vdev->out_ctx, ctrl_ctx,
3189 changed_ep_bitmask, changed_ep_bitmask);
3191 /* Issue and wait for the configure endpoint command */
3192 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3195 /* xHC rejected the configure endpoint command for some reason, so we
3196 * leave the old ring intact and free our internal streams data
3202 spin_lock_irqsave(&xhci->lock, flags);
3203 for (i = 0; i < num_eps; i++) {
3204 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3205 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3206 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3207 udev->slot_id, ep_index);
3208 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3210 xhci_free_command(xhci, config_cmd);
3211 spin_unlock_irqrestore(&xhci->lock, flags);
3213 /* Subtract 1 for stream 0, which drivers can't use */
3214 return num_streams - 1;
3217 /* If it didn't work, free the streams! */
3218 for (i = 0; i < num_eps; i++) {
3219 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3220 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3221 vdev->eps[ep_index].stream_info = NULL;
3222 /* FIXME Unset maxPstreams in endpoint context and
3223 * update deq ptr to point to normal string ring.
3225 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3226 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3227 xhci_endpoint_zero(xhci, vdev, eps[i]);
3229 xhci_free_command(xhci, config_cmd);
3233 /* Transition the endpoint from using streams to being a "normal" endpoint
3236 * Modify the endpoint context state, submit a configure endpoint command,
3237 * and free all endpoint rings for streams if that completes successfully.
3239 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3240 struct usb_host_endpoint **eps, unsigned int num_eps,
3244 struct xhci_hcd *xhci;
3245 struct xhci_virt_device *vdev;
3246 struct xhci_command *command;
3247 struct xhci_input_control_ctx *ctrl_ctx;
3248 unsigned int ep_index;
3249 unsigned long flags;
3250 u32 changed_ep_bitmask;
3252 xhci = hcd_to_xhci(hcd);
3253 vdev = xhci->devs[udev->slot_id];
3255 /* Set up a configure endpoint command to remove the streams rings */
3256 spin_lock_irqsave(&xhci->lock, flags);
3257 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3258 udev, eps, num_eps);
3259 if (changed_ep_bitmask == 0) {
3260 spin_unlock_irqrestore(&xhci->lock, flags);
3264 /* Use the xhci_command structure from the first endpoint. We may have
3265 * allocated too many, but the driver may call xhci_free_streams() for
3266 * each endpoint it grouped into one call to xhci_alloc_streams().
3268 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3269 command = vdev->eps[ep_index].stream_info->free_streams_command;
3270 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3272 spin_unlock_irqrestore(&xhci->lock, flags);
3273 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3278 for (i = 0; i < num_eps; i++) {
3279 struct xhci_ep_ctx *ep_ctx;
3281 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3282 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3283 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3284 EP_GETTING_NO_STREAMS;
3286 xhci_endpoint_copy(xhci, command->in_ctx,
3287 vdev->out_ctx, ep_index);
3288 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3289 &vdev->eps[ep_index]);
3291 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3292 vdev->out_ctx, ctrl_ctx,
3293 changed_ep_bitmask, changed_ep_bitmask);
3294 spin_unlock_irqrestore(&xhci->lock, flags);
3296 /* Issue and wait for the configure endpoint command,
3297 * which must succeed.
3299 ret = xhci_configure_endpoint(xhci, udev, command,
3302 /* xHC rejected the configure endpoint command for some reason, so we
3303 * leave the streams rings intact.
3308 spin_lock_irqsave(&xhci->lock, flags);
3309 for (i = 0; i < num_eps; i++) {
3310 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3311 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3312 vdev->eps[ep_index].stream_info = NULL;
3313 /* FIXME Unset maxPstreams in endpoint context and
3314 * update deq ptr to point to normal string ring.
3316 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3317 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3319 spin_unlock_irqrestore(&xhci->lock, flags);
3325 * Deletes endpoint resources for endpoints that were active before a Reset
3326 * Device command, or a Disable Slot command. The Reset Device command leaves
3327 * the control endpoint intact, whereas the Disable Slot command deletes it.
3329 * Must be called with xhci->lock held.
3331 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3332 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3335 unsigned int num_dropped_eps = 0;
3336 unsigned int drop_flags = 0;
3338 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3339 if (virt_dev->eps[i].ring) {
3340 drop_flags |= 1 << i;
3344 xhci->num_active_eps -= num_dropped_eps;
3345 if (num_dropped_eps)
3346 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3347 "Dropped %u ep ctxs, flags = 0x%x, "
3349 num_dropped_eps, drop_flags,
3350 xhci->num_active_eps);
3354 * This submits a Reset Device Command, which will set the device state to 0,
3355 * set the device address to 0, and disable all the endpoints except the default
3356 * control endpoint. The USB core should come back and call
3357 * xhci_address_device(), and then re-set up the configuration. If this is
3358 * called because of a usb_reset_and_verify_device(), then the old alternate
3359 * settings will be re-installed through the normal bandwidth allocation
3362 * Wait for the Reset Device command to finish. Remove all structures
3363 * associated with the endpoints that were disabled. Clear the input device
3364 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3366 * If the virt_dev to be reset does not exist or does not match the udev,
3367 * it means the device is lost, possibly due to the xHC restore error and
3368 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3369 * re-allocate the device.
3371 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3374 unsigned long flags;
3375 struct xhci_hcd *xhci;
3376 unsigned int slot_id;
3377 struct xhci_virt_device *virt_dev;
3378 struct xhci_command *reset_device_cmd;
3380 int last_freed_endpoint;
3381 struct xhci_slot_ctx *slot_ctx;
3382 int old_active_eps = 0;
3384 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3387 xhci = hcd_to_xhci(hcd);
3388 slot_id = udev->slot_id;
3389 virt_dev = xhci->devs[slot_id];
3391 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3392 "not exist. Re-allocate the device\n", slot_id);
3393 ret = xhci_alloc_dev(hcd, udev);
3400 if (virt_dev->udev != udev) {
3401 /* If the virt_dev and the udev does not match, this virt_dev
3402 * may belong to another udev.
3403 * Re-allocate the device.
3405 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3406 "not match the udev. Re-allocate the device\n",
3408 ret = xhci_alloc_dev(hcd, udev);
3415 /* If device is not setup, there is no point in resetting it */
3416 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3417 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3418 SLOT_STATE_DISABLED)
3421 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3422 /* Allocate the command structure that holds the struct completion.
3423 * Assume we're in process context, since the normal device reset
3424 * process has to wait for the device anyway. Storage devices are
3425 * reset as part of error handling, so use GFP_NOIO instead of
3428 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3429 if (!reset_device_cmd) {
3430 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3434 /* Attempt to submit the Reset Device command to the command ring */
3435 spin_lock_irqsave(&xhci->lock, flags);
3436 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3438 /* Enqueue pointer can be left pointing to the link TRB,
3439 * we must handle that
3441 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3442 reset_device_cmd->command_trb =
3443 xhci->cmd_ring->enq_seg->next->trbs;
3445 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3446 ret = xhci_queue_reset_device(xhci, slot_id);
3448 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3449 list_del(&reset_device_cmd->cmd_list);
3450 spin_unlock_irqrestore(&xhci->lock, flags);
3451 goto command_cleanup;
3453 xhci_ring_cmd_db(xhci);
3454 spin_unlock_irqrestore(&xhci->lock, flags);
3456 /* Wait for the Reset Device command to finish */
3457 timeleft = wait_for_completion_interruptible_timeout(
3458 reset_device_cmd->completion,
3459 USB_CTRL_SET_TIMEOUT);
3460 if (timeleft <= 0) {
3461 xhci_warn(xhci, "%s while waiting for reset device command\n",
3462 timeleft == 0 ? "Timeout" : "Signal");
3463 spin_lock_irqsave(&xhci->lock, flags);
3464 /* The timeout might have raced with the event ring handler, so
3465 * only delete from the list if the item isn't poisoned.
3467 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3468 list_del(&reset_device_cmd->cmd_list);
3469 spin_unlock_irqrestore(&xhci->lock, flags);
3471 goto command_cleanup;
3474 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3475 * unless we tried to reset a slot ID that wasn't enabled,
3476 * or the device wasn't in the addressed or configured state.
3478 ret = reset_device_cmd->status;
3480 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3481 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3482 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3484 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3485 xhci_dbg(xhci, "Not freeing device rings.\n");
3486 /* Don't treat this as an error. May change my mind later. */
3488 goto command_cleanup;
3490 xhci_dbg(xhci, "Successful reset device command.\n");
3493 if (xhci_is_vendor_info_code(xhci, ret))
3495 xhci_warn(xhci, "Unknown completion code %u for "
3496 "reset device command.\n", ret);
3498 goto command_cleanup;
3501 /* Free up host controller endpoint resources */
3502 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3503 spin_lock_irqsave(&xhci->lock, flags);
3504 /* Don't delete the default control endpoint resources */
3505 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3506 spin_unlock_irqrestore(&xhci->lock, flags);
3509 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3510 last_freed_endpoint = 1;
3511 for (i = 1; i < 31; ++i) {
3512 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3514 if (ep->ep_state & EP_HAS_STREAMS) {
3515 xhci_free_stream_info(xhci, ep->stream_info);
3516 ep->stream_info = NULL;
3517 ep->ep_state &= ~EP_HAS_STREAMS;
3521 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3522 last_freed_endpoint = i;
3524 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3525 xhci_drop_ep_from_interval_table(xhci,
3526 &virt_dev->eps[i].bw_info,
3531 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3533 /* If necessary, update the number of active TTs on this root port */
3534 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3536 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3537 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3541 xhci_free_command(xhci, reset_device_cmd);
3546 * At this point, the struct usb_device is about to go away, the device has
3547 * disconnected, and all traffic has been stopped and the endpoints have been
3548 * disabled. Free any HC data structures associated with that device.
3550 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3552 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3553 struct xhci_virt_device *virt_dev;
3554 unsigned long flags;
3558 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3559 /* If the host is halted due to driver unload, we still need to free the
3562 if (ret <= 0 && ret != -ENODEV)
3565 virt_dev = xhci->devs[udev->slot_id];
3567 /* Stop any wayward timer functions (which may grab the lock) */
3568 for (i = 0; i < 31; ++i) {
3569 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3570 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3573 if (udev->usb2_hw_lpm_enabled) {
3574 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3575 udev->usb2_hw_lpm_enabled = 0;
3578 spin_lock_irqsave(&xhci->lock, flags);
3579 /* Don't disable the slot if the host controller is dead. */
3580 state = xhci_readl(xhci, &xhci->op_regs->status);
3581 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3582 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3583 xhci_free_virt_device(xhci, udev->slot_id);
3584 spin_unlock_irqrestore(&xhci->lock, flags);
3588 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3589 spin_unlock_irqrestore(&xhci->lock, flags);
3590 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3593 xhci_ring_cmd_db(xhci);
3594 spin_unlock_irqrestore(&xhci->lock, flags);
3596 * Event command completion handler will free any data structures
3597 * associated with the slot. XXX Can free sleep?
3602 * Checks if we have enough host controller resources for the default control
3605 * Must be called with xhci->lock held.
3607 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3609 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3610 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3611 "Not enough ep ctxs: "
3612 "%u active, need to add 1, limit is %u.",
3613 xhci->num_active_eps, xhci->limit_active_eps);
3616 xhci->num_active_eps += 1;
3617 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3618 "Adding 1 ep ctx, %u now active.",
3619 xhci->num_active_eps);
3625 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3626 * timed out, or allocating memory failed. Returns 1 on success.
3628 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3630 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3631 unsigned long flags;
3634 union xhci_trb *cmd_trb;
3636 spin_lock_irqsave(&xhci->lock, flags);
3637 cmd_trb = xhci->cmd_ring->dequeue;
3638 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3640 spin_unlock_irqrestore(&xhci->lock, flags);
3641 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3644 xhci_ring_cmd_db(xhci);
3645 spin_unlock_irqrestore(&xhci->lock, flags);
3647 /* XXX: how much time for xHC slot assignment? */
3648 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3649 XHCI_CMD_DEFAULT_TIMEOUT);
3650 if (timeleft <= 0) {
3651 xhci_warn(xhci, "%s while waiting for a slot\n",
3652 timeleft == 0 ? "Timeout" : "Signal");
3653 /* cancel the enable slot request */
3654 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3657 if (!xhci->slot_id) {
3658 xhci_err(xhci, "Error while assigning device slot ID\n");
3662 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3663 spin_lock_irqsave(&xhci->lock, flags);
3664 ret = xhci_reserve_host_control_ep_resources(xhci);
3666 spin_unlock_irqrestore(&xhci->lock, flags);
3667 xhci_warn(xhci, "Not enough host resources, "
3668 "active endpoint contexts = %u\n",
3669 xhci->num_active_eps);
3672 spin_unlock_irqrestore(&xhci->lock, flags);
3674 /* Use GFP_NOIO, since this function can be called from
3675 * xhci_discover_or_reset_device(), which may be called as part of
3676 * mass storage driver error handling.
3678 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3679 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3682 udev->slot_id = xhci->slot_id;
3683 /* Is this a LS or FS device under a HS hub? */
3684 /* Hub or peripherial? */
3688 /* Disable slot, if we can do it without mem alloc */
3689 spin_lock_irqsave(&xhci->lock, flags);
3690 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3691 xhci_ring_cmd_db(xhci);
3692 spin_unlock_irqrestore(&xhci->lock, flags);
3697 * Issue an Address Device command (which will issue a SetAddress request to
3699 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3700 * we should only issue and wait on one address command at the same time.
3702 * We add one to the device address issued by the hardware because the USB core
3703 * uses address 1 for the root hubs (even though they're not really devices).
3705 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3707 unsigned long flags;
3709 struct xhci_virt_device *virt_dev;
3711 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3712 struct xhci_slot_ctx *slot_ctx;
3713 struct xhci_input_control_ctx *ctrl_ctx;
3715 union xhci_trb *cmd_trb;
3717 if (!udev->slot_id) {
3718 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3719 "Bad Slot ID %d", udev->slot_id);
3723 virt_dev = xhci->devs[udev->slot_id];
3725 if (WARN_ON(!virt_dev)) {
3727 * In plug/unplug torture test with an NEC controller,
3728 * a zero-dereference was observed once due to virt_dev = 0.
3729 * Print useful debug rather than crash if it is observed again!
3731 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3736 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3737 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3739 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3744 * If this is the first Set Address since device plug-in or
3745 * virt_device realloaction after a resume with an xHCI power loss,
3746 * then set up the slot context.
3748 if (!slot_ctx->dev_info)
3749 xhci_setup_addressable_virt_dev(xhci, udev);
3750 /* Otherwise, update the control endpoint ring enqueue pointer. */
3752 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3753 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3754 ctrl_ctx->drop_flags = 0;
3756 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3757 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3758 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3759 slot_ctx->dev_info >> 27);
3761 spin_lock_irqsave(&xhci->lock, flags);
3762 cmd_trb = xhci->cmd_ring->dequeue;
3763 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3766 spin_unlock_irqrestore(&xhci->lock, flags);
3767 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3768 "FIXME: allocate a command ring segment");
3771 xhci_ring_cmd_db(xhci);
3772 spin_unlock_irqrestore(&xhci->lock, flags);
3774 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3775 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3776 XHCI_CMD_DEFAULT_TIMEOUT);
3777 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3778 * the SetAddress() "recovery interval" required by USB and aborting the
3779 * command on a timeout.
3781 if (timeleft <= 0) {
3782 xhci_warn(xhci, "%s while waiting for address device command\n",
3783 timeleft == 0 ? "Timeout" : "Signal");
3784 /* cancel the address device command */
3785 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3791 switch (virt_dev->cmd_status) {
3792 case COMP_CTX_STATE:
3794 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3799 dev_warn(&udev->dev, "Device not responding to set address.\n");
3803 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3804 "device command.\n");
3808 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3809 "Successful Address Device command");
3812 xhci_err(xhci, "ERROR: unexpected command completion "
3813 "code 0x%x.\n", virt_dev->cmd_status);
3814 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3815 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3816 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3823 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3824 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3825 "Op regs DCBAA ptr = %#016llx", temp_64);
3826 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3827 "Slot ID %d dcbaa entry @%p = %#016llx",
3829 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3830 (unsigned long long)
3831 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3832 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3833 "Output Context DMA address = %#08llx",
3834 (unsigned long long)virt_dev->out_ctx->dma);
3835 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3836 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3837 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3838 slot_ctx->dev_info >> 27);
3839 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3840 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3842 * USB core uses address 1 for the roothubs, so we add one to the
3843 * address given back to us by the HC.
3845 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3846 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3847 slot_ctx->dev_info >> 27);
3848 /* Use kernel assigned address for devices; store xHC assigned
3849 * address locally. */
3850 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3852 /* Zero the input context control for later use */
3853 ctrl_ctx->add_flags = 0;
3854 ctrl_ctx->drop_flags = 0;
3856 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3857 "Internal device address = %d", virt_dev->address);
3863 * Transfer the port index into real index in the HW port status
3864 * registers. Caculate offset between the port's PORTSC register
3865 * and port status base. Divide the number of per port register
3866 * to get the real index. The raw port number bases 1.
3868 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3870 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3871 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3872 __le32 __iomem *addr;
3875 if (hcd->speed != HCD_USB3)
3876 addr = xhci->usb2_ports[port1 - 1];
3878 addr = xhci->usb3_ports[port1 - 1];
3880 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3885 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3886 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3888 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3889 struct usb_device *udev, u16 max_exit_latency)
3891 struct xhci_virt_device *virt_dev;
3892 struct xhci_command *command;
3893 struct xhci_input_control_ctx *ctrl_ctx;
3894 struct xhci_slot_ctx *slot_ctx;
3895 unsigned long flags;
3898 spin_lock_irqsave(&xhci->lock, flags);
3899 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3900 spin_unlock_irqrestore(&xhci->lock, flags);
3904 /* Attempt to issue an Evaluate Context command to change the MEL. */
3905 virt_dev = xhci->devs[udev->slot_id];
3906 command = xhci->lpm_command;
3907 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3909 spin_unlock_irqrestore(&xhci->lock, flags);
3910 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3915 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3916 spin_unlock_irqrestore(&xhci->lock, flags);
3918 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3919 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3920 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3921 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3923 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3924 "Set up evaluate context for LPM MEL change.");
3925 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3926 xhci_dbg_ctx(xhci, command->in_ctx, 0);
3928 /* Issue and wait for the evaluate context command. */
3929 ret = xhci_configure_endpoint(xhci, udev, command,
3931 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3932 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3935 spin_lock_irqsave(&xhci->lock, flags);
3936 virt_dev->current_mel = max_exit_latency;
3937 spin_unlock_irqrestore(&xhci->lock, flags);
3942 #ifdef CONFIG_PM_RUNTIME
3944 /* BESL to HIRD Encoding array for USB2 LPM */
3945 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3946 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3948 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3949 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3950 struct usb_device *udev)
3952 int u2del, besl, besl_host;
3953 int besl_device = 0;
3956 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3957 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3959 if (field & USB_BESL_SUPPORT) {
3960 for (besl_host = 0; besl_host < 16; besl_host++) {
3961 if (xhci_besl_encoding[besl_host] >= u2del)
3964 /* Use baseline BESL value as default */
3965 if (field & USB_BESL_BASELINE_VALID)
3966 besl_device = USB_GET_BESL_BASELINE(field);
3967 else if (field & USB_BESL_DEEP_VALID)
3968 besl_device = USB_GET_BESL_DEEP(field);
3973 besl_host = (u2del - 51) / 75 + 1;
3976 besl = besl_host + besl_device;
3983 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3984 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
3991 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3993 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
3994 l1 = udev->l1_params.timeout / 256;
3996 /* device has preferred BESLD */
3997 if (field & USB_BESL_DEEP_VALID) {
3998 besld = USB_GET_BESL_DEEP(field);
4002 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4005 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
4006 struct usb_device *udev)
4008 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4009 struct dev_info *dev_info;
4010 __le32 __iomem **port_array;
4011 __le32 __iomem *addr, *pm_addr;
4013 unsigned int port_num;
4014 unsigned long flags;
4018 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4022 /* we only support lpm for non-hub device connected to root hub yet */
4023 if (!udev->parent || udev->parent->parent ||
4024 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4027 spin_lock_irqsave(&xhci->lock, flags);
4029 /* Look for devices in lpm_failed_devs list */
4030 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
4031 le16_to_cpu(udev->descriptor.idProduct);
4032 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
4033 if (dev_info->dev_id == dev_id) {
4039 port_array = xhci->usb2_ports;
4040 port_num = udev->portnum - 1;
4042 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
4043 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
4049 * Test USB 2.0 software LPM.
4050 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4051 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4052 * in the June 2011 errata release.
4054 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
4056 * Set L1 Device Slot and HIRD/BESL.
4057 * Check device's USB 2.0 extension descriptor to determine whether
4058 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4060 pm_addr = port_array[port_num] + PORTPMSC;
4061 hird = xhci_calculate_hird_besl(xhci, udev);
4062 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
4063 xhci_writel(xhci, temp, pm_addr);
4065 /* Set port link state to U2(L1) */
4066 addr = port_array[port_num];
4067 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
4070 spin_unlock_irqrestore(&xhci->lock, flags);
4072 spin_lock_irqsave(&xhci->lock, flags);
4074 /* Check L1 Status */
4075 ret = xhci_handshake(xhci, pm_addr,
4076 PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
4077 if (ret != -ETIMEDOUT) {
4078 /* enter L1 successfully */
4079 temp = xhci_readl(xhci, addr);
4080 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
4084 temp = xhci_readl(xhci, pm_addr);
4085 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
4086 port_num, temp & PORT_L1S_MASK);
4090 /* Resume the port */
4091 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
4093 spin_unlock_irqrestore(&xhci->lock, flags);
4095 spin_lock_irqsave(&xhci->lock, flags);
4098 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
4100 /* Check PORTSC to make sure the device is in the right state */
4102 temp = xhci_readl(xhci, addr);
4103 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
4104 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
4105 (temp & PORT_PLS_MASK) != XDEV_U0) {
4106 xhci_dbg(xhci, "port L1 resume fail\n");
4112 /* Insert dev to lpm_failed_devs list */
4113 xhci_warn(xhci, "device LPM test failed, may disconnect and "
4115 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4120 dev_info->dev_id = dev_id;
4121 INIT_LIST_HEAD(&dev_info->list);
4122 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4124 xhci_ring_device(xhci, udev->slot_id);
4128 spin_unlock_irqrestore(&xhci->lock, flags);
4132 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4133 struct usb_device *udev, int enable)
4135 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4136 __le32 __iomem **port_array;
4137 __le32 __iomem *pm_addr, *hlpm_addr;
4138 u32 pm_val, hlpm_val, field;
4139 unsigned int port_num;
4140 unsigned long flags;
4141 int hird, exit_latency;
4144 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4148 if (!udev->parent || udev->parent->parent ||
4149 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4152 if (udev->usb2_hw_lpm_capable != 1)
4155 spin_lock_irqsave(&xhci->lock, flags);
4157 port_array = xhci->usb2_ports;
4158 port_num = udev->portnum - 1;
4159 pm_addr = port_array[port_num] + PORTPMSC;
4160 pm_val = xhci_readl(xhci, pm_addr);
4161 hlpm_addr = port_array[port_num] + PORTHLPMC;
4162 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4164 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4165 enable ? "enable" : "disable", port_num);
4168 /* Host supports BESL timeout instead of HIRD */
4169 if (udev->usb2_hw_lpm_besl_capable) {
4170 /* if device doesn't have a preferred BESL value use a
4171 * default one which works with mixed HIRD and BESL
4172 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4174 if ((field & USB_BESL_SUPPORT) &&
4175 (field & USB_BESL_BASELINE_VALID))
4176 hird = USB_GET_BESL_BASELINE(field);
4178 hird = udev->l1_params.besl;
4180 exit_latency = xhci_besl_encoding[hird];
4181 spin_unlock_irqrestore(&xhci->lock, flags);
4183 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4184 * input context for link powermanagement evaluate
4185 * context commands. It is protected by hcd->bandwidth
4186 * mutex and is shared by all devices. We need to set
4187 * the max ext latency in USB 2 BESL LPM as well, so
4188 * use the same mutex and xhci_change_max_exit_latency()
4190 mutex_lock(hcd->bandwidth_mutex);
4191 ret = xhci_change_max_exit_latency(xhci, udev,
4193 mutex_unlock(hcd->bandwidth_mutex);
4197 spin_lock_irqsave(&xhci->lock, flags);
4199 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4200 xhci_writel(xhci, hlpm_val, hlpm_addr);
4202 xhci_readl(xhci, hlpm_addr);
4204 hird = xhci_calculate_hird_besl(xhci, udev);
4207 pm_val &= ~PORT_HIRD_MASK;
4208 pm_val |= PORT_HIRD(hird) | PORT_RWE;
4209 xhci_writel(xhci, pm_val, pm_addr);
4210 pm_val = xhci_readl(xhci, pm_addr);
4212 xhci_writel(xhci, pm_val, pm_addr);
4214 xhci_readl(xhci, pm_addr);
4216 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4217 xhci_writel(xhci, pm_val, pm_addr);
4219 xhci_readl(xhci, pm_addr);
4220 if (udev->usb2_hw_lpm_besl_capable) {
4221 spin_unlock_irqrestore(&xhci->lock, flags);
4222 mutex_lock(hcd->bandwidth_mutex);
4223 xhci_change_max_exit_latency(xhci, udev, 0);
4224 mutex_unlock(hcd->bandwidth_mutex);
4229 spin_unlock_irqrestore(&xhci->lock, flags);
4233 /* check if a usb2 port supports a given extened capability protocol
4234 * only USB2 ports extended protocol capability values are cached.
4235 * Return 1 if capability is supported
4237 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4238 unsigned capability)
4240 u32 port_offset, port_count;
4243 for (i = 0; i < xhci->num_ext_caps; i++) {
4244 if (xhci->ext_caps[i] & capability) {
4245 /* port offsets starts at 1 */
4246 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4247 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4248 if (port >= port_offset &&
4249 port < port_offset + port_count)
4256 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4258 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4260 int portnum = udev->portnum - 1;
4262 ret = xhci_usb2_software_lpm_test(hcd, udev);
4264 xhci_dbg(xhci, "software LPM test succeed\n");
4265 if (xhci->hw_lpm_support == 1 &&
4266 xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
4267 udev->usb2_hw_lpm_capable = 1;
4268 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4269 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4270 if (xhci_check_usb2_port_capability(xhci, portnum,
4272 udev->usb2_hw_lpm_besl_capable = 1;
4273 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4275 udev->usb2_hw_lpm_enabled = 1;
4284 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4285 struct usb_device *udev, int enable)
4290 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4295 #endif /* CONFIG_PM_RUNTIME */
4297 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4300 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4301 static unsigned long long xhci_service_interval_to_ns(
4302 struct usb_endpoint_descriptor *desc)
4304 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4307 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4308 enum usb3_link_state state)
4310 unsigned long long sel;
4311 unsigned long long pel;
4312 unsigned int max_sel_pel;
4317 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4318 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4319 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4320 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4324 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4325 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4326 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4330 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4332 return USB3_LPM_DISABLED;
4335 if (sel <= max_sel_pel && pel <= max_sel_pel)
4336 return USB3_LPM_DEVICE_INITIATED;
4338 if (sel > max_sel_pel)
4339 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4340 "due to long SEL %llu ms\n",
4343 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4344 "due to long PEL %llu ms\n",
4346 return USB3_LPM_DISABLED;
4349 /* Returns the hub-encoded U1 timeout value.
4350 * The U1 timeout should be the maximum of the following values:
4351 * - For control endpoints, U1 system exit latency (SEL) * 3
4352 * - For bulk endpoints, U1 SEL * 5
4353 * - For interrupt endpoints:
4354 * - Notification EPs, U1 SEL * 3
4355 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4356 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4358 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4359 struct usb_endpoint_descriptor *desc)
4361 unsigned long long timeout_ns;
4365 ep_type = usb_endpoint_type(desc);
4367 case USB_ENDPOINT_XFER_CONTROL:
4368 timeout_ns = udev->u1_params.sel * 3;
4370 case USB_ENDPOINT_XFER_BULK:
4371 timeout_ns = udev->u1_params.sel * 5;
4373 case USB_ENDPOINT_XFER_INT:
4374 intr_type = usb_endpoint_interrupt_type(desc);
4375 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4376 timeout_ns = udev->u1_params.sel * 3;
4379 /* Otherwise the calculation is the same as isoc eps */
4380 case USB_ENDPOINT_XFER_ISOC:
4381 timeout_ns = xhci_service_interval_to_ns(desc);
4382 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4383 if (timeout_ns < udev->u1_params.sel * 2)
4384 timeout_ns = udev->u1_params.sel * 2;
4390 /* The U1 timeout is encoded in 1us intervals. */
4391 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4392 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4393 if (timeout_ns == USB3_LPM_DISABLED)
4396 /* If the necessary timeout value is bigger than what we can set in the
4397 * USB 3.0 hub, we have to disable hub-initiated U1.
4399 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4401 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4402 "due to long timeout %llu ms\n", timeout_ns);
4403 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4406 /* Returns the hub-encoded U2 timeout value.
4407 * The U2 timeout should be the maximum of:
4408 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4409 * - largest bInterval of any active periodic endpoint (to avoid going
4410 * into lower power link states between intervals).
4411 * - the U2 Exit Latency of the device
4413 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4414 struct usb_endpoint_descriptor *desc)
4416 unsigned long long timeout_ns;
4417 unsigned long long u2_del_ns;
4419 timeout_ns = 10 * 1000 * 1000;
4421 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4422 (xhci_service_interval_to_ns(desc) > timeout_ns))
4423 timeout_ns = xhci_service_interval_to_ns(desc);
4425 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4426 if (u2_del_ns > timeout_ns)
4427 timeout_ns = u2_del_ns;
4429 /* The U2 timeout is encoded in 256us intervals */
4430 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4431 /* If the necessary timeout value is bigger than what we can set in the
4432 * USB 3.0 hub, we have to disable hub-initiated U2.
4434 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4436 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4437 "due to long timeout %llu ms\n", timeout_ns);
4438 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4441 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4442 struct usb_device *udev,
4443 struct usb_endpoint_descriptor *desc,
4444 enum usb3_link_state state,
4447 if (state == USB3_LPM_U1) {
4448 if (xhci->quirks & XHCI_INTEL_HOST)
4449 return xhci_calculate_intel_u1_timeout(udev, desc);
4451 if (xhci->quirks & XHCI_INTEL_HOST)
4452 return xhci_calculate_intel_u2_timeout(udev, desc);
4455 return USB3_LPM_DISABLED;
4458 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4459 struct usb_device *udev,
4460 struct usb_endpoint_descriptor *desc,
4461 enum usb3_link_state state,
4466 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4467 desc, state, timeout);
4469 /* If we found we can't enable hub-initiated LPM, or
4470 * the U1 or U2 exit latency was too high to allow
4471 * device-initiated LPM as well, just stop searching.
4473 if (alt_timeout == USB3_LPM_DISABLED ||
4474 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4475 *timeout = alt_timeout;
4478 if (alt_timeout > *timeout)
4479 *timeout = alt_timeout;
4483 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4484 struct usb_device *udev,
4485 struct usb_host_interface *alt,
4486 enum usb3_link_state state,
4491 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4492 if (xhci_update_timeout_for_endpoint(xhci, udev,
4493 &alt->endpoint[j].desc, state, timeout))
4500 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4501 enum usb3_link_state state)
4503 struct usb_device *parent;
4504 unsigned int num_hubs;
4506 if (state == USB3_LPM_U2)
4509 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4510 for (parent = udev->parent, num_hubs = 0; parent->parent;
4511 parent = parent->parent)
4517 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4518 " below second-tier hub.\n");
4519 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4520 "to decrease power consumption.\n");
4524 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4525 struct usb_device *udev,
4526 enum usb3_link_state state)
4528 if (xhci->quirks & XHCI_INTEL_HOST)
4529 return xhci_check_intel_tier_policy(udev, state);
4533 /* Returns the U1 or U2 timeout that should be enabled.
4534 * If the tier check or timeout setting functions return with a non-zero exit
4535 * code, that means the timeout value has been finalized and we shouldn't look
4536 * at any more endpoints.
4538 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4539 struct usb_device *udev, enum usb3_link_state state)
4541 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4542 struct usb_host_config *config;
4545 u16 timeout = USB3_LPM_DISABLED;
4547 if (state == USB3_LPM_U1)
4549 else if (state == USB3_LPM_U2)
4552 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4557 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4560 /* Gather some information about the currently installed configuration
4561 * and alternate interface settings.
4563 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4567 config = udev->actconfig;
4571 for (i = 0; i < USB_MAXINTERFACES; i++) {
4572 struct usb_driver *driver;
4573 struct usb_interface *intf = config->interface[i];
4578 /* Check if any currently bound drivers want hub-initiated LPM
4581 if (intf->dev.driver) {
4582 driver = to_usb_driver(intf->dev.driver);
4583 if (driver && driver->disable_hub_initiated_lpm) {
4584 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4585 "at request of driver %s\n",
4586 state_name, driver->name);
4587 return xhci_get_timeout_no_hub_lpm(udev, state);
4591 /* Not sure how this could happen... */
4592 if (!intf->cur_altsetting)
4595 if (xhci_update_timeout_for_interface(xhci, udev,
4596 intf->cur_altsetting,
4603 static int calculate_max_exit_latency(struct usb_device *udev,
4604 enum usb3_link_state state_changed,
4605 u16 hub_encoded_timeout)
4607 unsigned long long u1_mel_us = 0;
4608 unsigned long long u2_mel_us = 0;
4609 unsigned long long mel_us = 0;
4615 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4616 hub_encoded_timeout == USB3_LPM_DISABLED);
4617 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4618 hub_encoded_timeout == USB3_LPM_DISABLED);
4620 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4621 hub_encoded_timeout != USB3_LPM_DISABLED);
4622 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4623 hub_encoded_timeout != USB3_LPM_DISABLED);
4625 /* If U1 was already enabled and we're not disabling it,
4626 * or we're going to enable U1, account for the U1 max exit latency.
4628 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4630 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4631 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4633 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4635 if (u1_mel_us > u2_mel_us)
4639 /* xHCI host controller max exit latency field is only 16 bits wide. */
4640 if (mel_us > MAX_EXIT) {
4641 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4642 "is too big.\n", mel_us);
4648 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4649 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4650 struct usb_device *udev, enum usb3_link_state state)
4652 struct xhci_hcd *xhci;
4653 u16 hub_encoded_timeout;
4657 xhci = hcd_to_xhci(hcd);
4658 /* The LPM timeout values are pretty host-controller specific, so don't
4659 * enable hub-initiated timeouts unless the vendor has provided
4660 * information about their timeout algorithm.
4662 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4663 !xhci->devs[udev->slot_id])
4664 return USB3_LPM_DISABLED;
4666 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4667 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4669 /* Max Exit Latency is too big, disable LPM. */
4670 hub_encoded_timeout = USB3_LPM_DISABLED;
4674 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4677 return hub_encoded_timeout;
4680 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4681 struct usb_device *udev, enum usb3_link_state state)
4683 struct xhci_hcd *xhci;
4687 xhci = hcd_to_xhci(hcd);
4688 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4689 !xhci->devs[udev->slot_id])
4692 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4693 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4698 #else /* CONFIG_PM */
4700 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4701 struct usb_device *udev, enum usb3_link_state state)
4703 return USB3_LPM_DISABLED;
4706 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4707 struct usb_device *udev, enum usb3_link_state state)
4711 #endif /* CONFIG_PM */
4713 /*-------------------------------------------------------------------------*/
4715 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4716 * internal data structures for the device.
4718 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4719 struct usb_tt *tt, gfp_t mem_flags)
4721 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4722 struct xhci_virt_device *vdev;
4723 struct xhci_command *config_cmd;
4724 struct xhci_input_control_ctx *ctrl_ctx;
4725 struct xhci_slot_ctx *slot_ctx;
4726 unsigned long flags;
4727 unsigned think_time;
4730 /* Ignore root hubs */
4734 vdev = xhci->devs[hdev->slot_id];
4736 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4739 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4741 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4744 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4746 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4748 xhci_free_command(xhci, config_cmd);
4752 spin_lock_irqsave(&xhci->lock, flags);
4753 if (hdev->speed == USB_SPEED_HIGH &&
4754 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4755 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4756 xhci_free_command(xhci, config_cmd);
4757 spin_unlock_irqrestore(&xhci->lock, flags);
4761 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4762 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4763 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4764 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4766 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4767 if (xhci->hci_version > 0x95) {
4768 xhci_dbg(xhci, "xHCI version %x needs hub "
4769 "TT think time and number of ports\n",
4770 (unsigned int) xhci->hci_version);
4771 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4772 /* Set TT think time - convert from ns to FS bit times.
4773 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4774 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4776 * xHCI 1.0: this field shall be 0 if the device is not a
4779 think_time = tt->think_time;
4780 if (think_time != 0)
4781 think_time = (think_time / 666) - 1;
4782 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4783 slot_ctx->tt_info |=
4784 cpu_to_le32(TT_THINK_TIME(think_time));
4786 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4787 "TT think time or number of ports\n",
4788 (unsigned int) xhci->hci_version);
4790 slot_ctx->dev_state = 0;
4791 spin_unlock_irqrestore(&xhci->lock, flags);
4793 xhci_dbg(xhci, "Set up %s for hub device.\n",
4794 (xhci->hci_version > 0x95) ?
4795 "configure endpoint" : "evaluate context");
4796 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4797 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4799 /* Issue and wait for the configure endpoint or
4800 * evaluate context command.
4802 if (xhci->hci_version > 0x95)
4803 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4806 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4809 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4810 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4812 xhci_free_command(xhci, config_cmd);
4816 int xhci_get_frame(struct usb_hcd *hcd)
4818 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4819 /* EHCI mods by the periodic size. Why? */
4820 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4823 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4825 struct xhci_hcd *xhci;
4826 struct device *dev = hcd->self.controller;
4829 /* Accept arbitrarily long scatter-gather lists */
4830 hcd->self.sg_tablesize = ~0;
4832 /* support to build packet from discontinuous buffers */
4833 hcd->self.no_sg_constraint = 1;
4835 /* XHCI controllers don't stop the ep queue on short packets :| */
4836 hcd->self.no_stop_on_short = 1;
4838 if (usb_hcd_is_primary_hcd(hcd)) {
4839 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4842 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4843 xhci->main_hcd = hcd;
4844 /* Mark the first roothub as being USB 2.0.
4845 * The xHCI driver will register the USB 3.0 roothub.
4847 hcd->speed = HCD_USB2;
4848 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4850 * USB 2.0 roothub under xHCI has an integrated TT,
4851 * (rate matching hub) as opposed to having an OHCI/UHCI
4852 * companion controller.
4856 /* xHCI private pointer was set in xhci_pci_probe for the second
4857 * registered roothub.
4862 xhci->cap_regs = hcd->regs;
4863 xhci->op_regs = hcd->regs +
4864 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4865 xhci->run_regs = hcd->regs +
4866 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4867 /* Cache read-only capability registers */
4868 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4869 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4870 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4871 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4872 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4873 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4874 xhci_print_registers(xhci);
4876 get_quirks(dev, xhci);
4878 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4879 * success event after a short transfer. This quirk will ignore such
4882 if (xhci->hci_version > 0x96)
4883 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4885 /* Make sure the HC is halted. */
4886 retval = xhci_halt(xhci);
4890 xhci_dbg(xhci, "Resetting HCD\n");
4891 /* Reset the internal HC memory state and registers. */
4892 retval = xhci_reset(xhci);
4895 xhci_dbg(xhci, "Reset complete\n");
4897 /* Set dma_mask and coherent_dma_mask to 64-bits,
4898 * if xHC supports 64-bit addressing */
4899 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4900 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4901 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4902 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4905 xhci_dbg(xhci, "Calling HCD init\n");
4906 /* Initialize HCD and host controller data structures. */
4907 retval = xhci_init(hcd);
4910 xhci_dbg(xhci, "Called HCD init\n");
4917 MODULE_DESCRIPTION(DRIVER_DESC);
4918 MODULE_AUTHOR(DRIVER_AUTHOR);
4919 MODULE_LICENSE("GPL");
4921 static int __init xhci_hcd_init(void)
4925 retval = xhci_register_pci();
4927 pr_debug("Problem registering PCI driver.\n");
4930 retval = xhci_register_plat();
4932 pr_debug("Problem registering platform driver.\n");
4936 * Check the compiler generated sizes of structures that must be laid
4937 * out in specific ways for hardware access.
4939 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4940 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4941 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4942 /* xhci_device_control has eight fields, and also
4943 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4945 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4946 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4947 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4948 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4949 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4950 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4951 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4954 xhci_unregister_pci();
4957 module_init(xhci_hcd_init);
4959 static void __exit xhci_hcd_cleanup(void)
4961 xhci_unregister_pci();
4962 xhci_unregister_plat();
4964 module_exit(xhci_hcd_cleanup);