2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
45 * xhci_handshake - spin reading hc until handshake completes or fails
46 * @ptr: address of hc register to be read
47 * @mask: bits to look at in result of read
48 * @done: value of those bits when handshake succeeds
49 * @usec: timeout in microseconds
51 * Returns negative errno, or zero on success
53 * Success happens when the "mask" bits have the specified value (hardware
54 * handshake done). There are two failure modes: "usec" have passed (major
55 * hardware flakeout), or the register reads as all-ones (hardware removed).
57 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
58 u32 mask, u32 done, int usec)
63 result = xhci_readl(xhci, ptr);
64 if (result == ~(u32)0) /* card removed */
76 * Disable interrupts and begin the xHCI halting process.
78 void xhci_quiesce(struct xhci_hcd *xhci)
85 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
89 cmd = xhci_readl(xhci, &xhci->op_regs->command);
91 xhci_writel(xhci, cmd, &xhci->op_regs->command);
95 * Force HC into halt state.
97 * Disable any IRQs and clear the run/stop bit.
98 * HC will complete any current and actively pipelined transactions, and
99 * should halt within 16 ms of the run/stop bit being cleared.
100 * Read HC Halted bit in the status register to see when the HC is finished.
102 int xhci_halt(struct xhci_hcd *xhci)
105 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
108 ret = xhci_handshake(xhci, &xhci->op_regs->status,
109 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
111 xhci->xhc_state |= XHCI_STATE_HALTED;
112 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
114 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
120 * Set the run bit and wait for the host to be running.
122 static int xhci_start(struct xhci_hcd *xhci)
127 temp = xhci_readl(xhci, &xhci->op_regs->command);
129 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
131 xhci_writel(xhci, temp, &xhci->op_regs->command);
134 * Wait for the HCHalted Status bit to be 0 to indicate the host is
137 ret = xhci_handshake(xhci, &xhci->op_regs->status,
138 STS_HALT, 0, XHCI_MAX_HALT_USEC);
139 if (ret == -ETIMEDOUT)
140 xhci_err(xhci, "Host took too long to start, "
141 "waited %u microseconds.\n",
144 xhci->xhc_state &= ~XHCI_STATE_HALTED;
151 * This resets pipelines, timers, counters, state machines, etc.
152 * Transactions will be terminated immediately, and operational registers
153 * will be set to their defaults.
155 int xhci_reset(struct xhci_hcd *xhci)
161 state = xhci_readl(xhci, &xhci->op_regs->status);
162 if ((state & STS_HALT) == 0) {
163 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
167 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
168 command = xhci_readl(xhci, &xhci->op_regs->command);
169 command |= CMD_RESET;
170 xhci_writel(xhci, command, &xhci->op_regs->command);
172 ret = xhci_handshake(xhci, &xhci->op_regs->command,
173 CMD_RESET, 0, 10 * 1000 * 1000);
177 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
178 "Wait for controller to be ready for doorbell rings");
180 * xHCI cannot write to any doorbells or operational registers other
181 * than status until the "Controller Not Ready" flag is cleared.
183 ret = xhci_handshake(xhci, &xhci->op_regs->status,
184 STS_CNR, 0, 10 * 1000 * 1000);
186 for (i = 0; i < 2; ++i) {
187 xhci->bus_state[i].port_c_suspend = 0;
188 xhci->bus_state[i].suspended_ports = 0;
189 xhci->bus_state[i].resuming_ports = 0;
196 static int xhci_free_msi(struct xhci_hcd *xhci)
200 if (!xhci->msix_entries)
203 for (i = 0; i < xhci->msix_count; i++)
204 if (xhci->msix_entries[i].vector)
205 free_irq(xhci->msix_entries[i].vector,
213 static int xhci_setup_msi(struct xhci_hcd *xhci)
216 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
218 ret = pci_enable_msi(pdev);
220 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
221 "failed to allocate MSI entry");
225 ret = request_irq(pdev->irq, xhci_msi_irq,
226 0, "xhci_hcd", xhci_to_hcd(xhci));
228 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
229 "disable MSI interrupt");
230 pci_disable_msi(pdev);
238 * free all IRQs request
240 static void xhci_free_irq(struct xhci_hcd *xhci)
242 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
245 /* return if using legacy interrupt */
246 if (xhci_to_hcd(xhci)->irq > 0)
249 ret = xhci_free_msi(xhci);
253 free_irq(pdev->irq, xhci_to_hcd(xhci));
261 static int xhci_setup_msix(struct xhci_hcd *xhci)
264 struct usb_hcd *hcd = xhci_to_hcd(xhci);
265 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
268 * calculate number of msi-x vectors supported.
269 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
270 * with max number of interrupters based on the xhci HCSPARAMS1.
271 * - num_online_cpus: maximum msi-x vectors per CPUs core.
272 * Add additional 1 vector to ensure always available interrupt.
274 xhci->msix_count = min(num_online_cpus() + 1,
275 HCS_MAX_INTRS(xhci->hcs_params1));
278 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
280 if (!xhci->msix_entries) {
281 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
285 for (i = 0; i < xhci->msix_count; i++) {
286 xhci->msix_entries[i].entry = i;
287 xhci->msix_entries[i].vector = 0;
290 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
292 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
293 "Failed to enable MSI-X");
297 for (i = 0; i < xhci->msix_count; i++) {
298 ret = request_irq(xhci->msix_entries[i].vector,
300 0, "xhci_hcd", xhci_to_hcd(xhci));
305 hcd->msix_enabled = 1;
309 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
311 pci_disable_msix(pdev);
313 kfree(xhci->msix_entries);
314 xhci->msix_entries = NULL;
318 /* Free any IRQs and disable MSI-X */
319 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
321 struct usb_hcd *hcd = xhci_to_hcd(xhci);
322 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
326 if (xhci->msix_entries) {
327 pci_disable_msix(pdev);
328 kfree(xhci->msix_entries);
329 xhci->msix_entries = NULL;
331 pci_disable_msi(pdev);
334 hcd->msix_enabled = 0;
338 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
342 if (xhci->msix_entries) {
343 for (i = 0; i < xhci->msix_count; i++)
344 synchronize_irq(xhci->msix_entries[i].vector);
348 static int xhci_try_enable_msi(struct usb_hcd *hcd)
350 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
351 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
355 * Some Fresco Logic host controllers advertise MSI, but fail to
356 * generate interrupts. Don't even try to enable MSI.
358 if (xhci->quirks & XHCI_BROKEN_MSI)
361 /* unregister the legacy interrupt */
363 free_irq(hcd->irq, hcd);
366 ret = xhci_setup_msix(xhci);
368 /* fall back to msi*/
369 ret = xhci_setup_msi(xhci);
372 /* hcd->irq is 0, we have MSI */
376 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
381 /* fall back to legacy interrupt*/
382 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
383 hcd->irq_descr, hcd);
385 xhci_err(xhci, "request interrupt %d failed\n",
389 hcd->irq = pdev->irq;
395 static int xhci_try_enable_msi(struct usb_hcd *hcd)
400 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
404 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
410 static void compliance_mode_recovery(unsigned long arg)
412 struct xhci_hcd *xhci;
417 xhci = (struct xhci_hcd *)arg;
419 for (i = 0; i < xhci->num_usb3_ports; i++) {
420 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
421 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
423 * Compliance Mode Detected. Letting USB Core
424 * handle the Warm Reset
426 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
427 "Compliance mode detected->port %d",
429 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
430 "Attempting compliance mode recovery");
431 hcd = xhci->shared_hcd;
433 if (hcd->state == HC_STATE_SUSPENDED)
434 usb_hcd_resume_root_hub(hcd);
436 usb_hcd_poll_rh_status(hcd);
440 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
441 mod_timer(&xhci->comp_mode_recovery_timer,
442 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
446 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
447 * that causes ports behind that hardware to enter compliance mode sometimes.
448 * The quirk creates a timer that polls every 2 seconds the link state of
449 * each host controller's port and recovers it by issuing a Warm reset
450 * if Compliance mode is detected, otherwise the port will become "dead" (no
451 * device connections or disconnections will be detected anymore). Becasue no
452 * status event is generated when entering compliance mode (per xhci spec),
453 * this quirk is needed on systems that have the failing hardware installed.
455 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
457 xhci->port_status_u0 = 0;
458 init_timer(&xhci->comp_mode_recovery_timer);
460 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
461 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
462 xhci->comp_mode_recovery_timer.expires = jiffies +
463 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
465 set_timer_slack(&xhci->comp_mode_recovery_timer,
466 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
467 add_timer(&xhci->comp_mode_recovery_timer);
468 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
469 "Compliance mode recovery timer initialized");
473 * This function identifies the systems that have installed the SN65LVPE502CP
474 * USB3.0 re-driver and that need the Compliance Mode Quirk.
476 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
478 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
480 const char *dmi_product_name, *dmi_sys_vendor;
482 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
483 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
484 if (!dmi_product_name || !dmi_sys_vendor)
487 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
490 if (strstr(dmi_product_name, "Z420") ||
491 strstr(dmi_product_name, "Z620") ||
492 strstr(dmi_product_name, "Z820") ||
493 strstr(dmi_product_name, "Z1 Workstation"))
499 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
501 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
506 * Initialize memory for HCD and xHC (one-time init).
508 * Program the PAGESIZE register, initialize the device context array, create
509 * device contexts (?), set up a command ring segment (or two?), create event
510 * ring (one for now).
512 int xhci_init(struct usb_hcd *hcd)
514 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
517 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
518 spin_lock_init(&xhci->lock);
519 if (xhci->hci_version == 0x95 && link_quirk) {
520 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
521 "QUIRK: Not clearing Link TRB chain bits.");
522 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
524 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
525 "xHCI doesn't need link TRB QUIRK");
527 retval = xhci_mem_init(xhci, GFP_KERNEL);
528 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
530 /* Initializing Compliance Mode Recovery Data If Needed */
531 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
532 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
533 compliance_mode_recovery_timer_init(xhci);
539 /*-------------------------------------------------------------------------*/
542 static int xhci_run_finished(struct xhci_hcd *xhci)
544 if (xhci_start(xhci)) {
548 xhci->shared_hcd->state = HC_STATE_RUNNING;
549 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
551 if (xhci->quirks & XHCI_NEC_HOST)
552 xhci_ring_cmd_db(xhci);
554 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
555 "Finished xhci_run for USB3 roothub");
560 * Start the HC after it was halted.
562 * This function is called by the USB core when the HC driver is added.
563 * Its opposite is xhci_stop().
565 * xhci_init() must be called once before this function can be called.
566 * Reset the HC, enable device slot contexts, program DCBAAP, and
567 * set command ring pointer and event ring pointer.
569 * Setup MSI-X vectors and enable interrupts.
571 int xhci_run(struct usb_hcd *hcd)
576 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
578 /* Start the xHCI host controller running only after the USB 2.0 roothub
582 hcd->uses_new_polling = 1;
583 if (!usb_hcd_is_primary_hcd(hcd))
584 return xhci_run_finished(xhci);
586 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
588 ret = xhci_try_enable_msi(hcd);
592 xhci_dbg(xhci, "Command ring memory map follows:\n");
593 xhci_debug_ring(xhci, xhci->cmd_ring);
594 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
595 xhci_dbg_cmd_ptrs(xhci);
597 xhci_dbg(xhci, "ERST memory map follows:\n");
598 xhci_dbg_erst(xhci, &xhci->erst);
599 xhci_dbg(xhci, "Event ring:\n");
600 xhci_debug_ring(xhci, xhci->event_ring);
601 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
602 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
603 temp_64 &= ~ERST_PTR_MASK;
604 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
605 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
607 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
608 "// Set the interrupt modulation register");
609 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
610 temp &= ~ER_IRQ_INTERVAL_MASK;
612 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
614 /* Set the HCD state before we enable the irqs */
615 temp = xhci_readl(xhci, &xhci->op_regs->command);
617 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
618 "// Enable interrupts, cmd = 0x%x.", temp);
619 xhci_writel(xhci, temp, &xhci->op_regs->command);
621 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
622 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
623 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
624 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
625 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
626 &xhci->ir_set->irq_pending);
627 xhci_print_ir_set(xhci, 0);
629 if (xhci->quirks & XHCI_NEC_HOST)
630 xhci_queue_vendor_command(xhci, 0, 0, 0,
631 TRB_TYPE(TRB_NEC_GET_FW));
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "Finished xhci_run for USB2 roothub");
638 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
640 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
642 spin_lock_irq(&xhci->lock);
645 /* The shared_hcd is going to be deallocated shortly (the USB core only
646 * calls this function when allocation fails in usb_add_hcd(), or
647 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
649 xhci->shared_hcd = NULL;
650 spin_unlock_irq(&xhci->lock);
656 * This function is called by the USB core when the HC driver is removed.
657 * Its opposite is xhci_run().
659 * Disable device contexts, disable IRQs, and quiesce the HC.
660 * Reset the HC, finish any completed transactions, and cleanup memory.
662 void xhci_stop(struct usb_hcd *hcd)
665 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
667 if (!usb_hcd_is_primary_hcd(hcd)) {
668 xhci_only_stop_hcd(xhci->shared_hcd);
672 spin_lock_irq(&xhci->lock);
673 /* Make sure the xHC is halted for a USB3 roothub
674 * (xhci_stop() could be called as part of failed init).
678 spin_unlock_irq(&xhci->lock);
680 xhci_cleanup_msix(xhci);
682 /* Deleting Compliance Mode Recovery Timer */
683 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
684 (!(xhci_all_ports_seen_u0(xhci)))) {
685 del_timer_sync(&xhci->comp_mode_recovery_timer);
686 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
687 "%s: compliance mode recovery timer deleted",
691 if (xhci->quirks & XHCI_AMD_PLL_FIX)
694 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
695 "// Disabling event ring interrupts");
696 temp = xhci_readl(xhci, &xhci->op_regs->status);
697 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
698 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
699 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
700 &xhci->ir_set->irq_pending);
701 xhci_print_ir_set(xhci, 0);
703 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
704 xhci_mem_cleanup(xhci);
705 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
706 "xhci_stop completed - status = %x",
707 xhci_readl(xhci, &xhci->op_regs->status));
711 * Shutdown HC (not bus-specific)
713 * This is called when the machine is rebooting or halting. We assume that the
714 * machine will be powered off, and the HC's internal state will be reset.
715 * Don't bother to free memory.
717 * This will only ever be called with the main usb_hcd (the USB3 roothub).
719 void xhci_shutdown(struct usb_hcd *hcd)
721 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
723 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
724 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
726 spin_lock_irq(&xhci->lock);
728 spin_unlock_irq(&xhci->lock);
730 xhci_cleanup_msix(xhci);
732 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
733 "xhci_shutdown completed - status = %x",
734 xhci_readl(xhci, &xhci->op_regs->status));
738 static void xhci_save_registers(struct xhci_hcd *xhci)
740 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
741 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
742 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
743 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
744 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
745 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
746 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
747 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
748 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
751 static void xhci_restore_registers(struct xhci_hcd *xhci)
753 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
754 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
755 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
756 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
757 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
758 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
759 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
760 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
761 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
764 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
768 /* step 2: initialize command ring buffer */
769 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
770 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
771 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
772 xhci->cmd_ring->dequeue) &
773 (u64) ~CMD_RING_RSVD_BITS) |
774 xhci->cmd_ring->cycle_state;
775 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
776 "// Setting command ring address to 0x%llx",
777 (long unsigned long) val_64);
778 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
782 * The whole command ring must be cleared to zero when we suspend the host.
784 * The host doesn't save the command ring pointer in the suspend well, so we
785 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
786 * aligned, because of the reserved bits in the command ring dequeue pointer
787 * register. Therefore, we can't just set the dequeue pointer back in the
788 * middle of the ring (TRBs are 16-byte aligned).
790 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
792 struct xhci_ring *ring;
793 struct xhci_segment *seg;
795 ring = xhci->cmd_ring;
799 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
800 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
801 cpu_to_le32(~TRB_CYCLE);
803 } while (seg != ring->deq_seg);
805 /* Reset the software enqueue and dequeue pointers */
806 ring->deq_seg = ring->first_seg;
807 ring->dequeue = ring->first_seg->trbs;
808 ring->enq_seg = ring->deq_seg;
809 ring->enqueue = ring->dequeue;
811 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
813 * Ring is now zeroed, so the HW should look for change of ownership
814 * when the cycle bit is set to 1.
816 ring->cycle_state = 1;
819 * Reset the hardware dequeue pointer.
820 * Yes, this will need to be re-written after resume, but we're paranoid
821 * and want to make sure the hardware doesn't access bogus memory
822 * because, say, the BIOS or an SMI started the host without changing
823 * the command ring pointers.
825 xhci_set_cmd_ring_deq(xhci);
829 * Stop HC (not bus-specific)
831 * This is called when the machine transition into S3/S4 mode.
834 int xhci_suspend(struct xhci_hcd *xhci)
837 struct usb_hcd *hcd = xhci_to_hcd(xhci);
840 if (hcd->state != HC_STATE_SUSPENDED ||
841 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
844 /* Don't poll the roothubs on bus suspend. */
845 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
846 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
847 del_timer_sync(&hcd->rh_timer);
849 spin_lock_irq(&xhci->lock);
850 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
851 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
852 /* step 1: stop endpoint */
853 /* skipped assuming that port suspend has done */
855 /* step 2: clear Run/Stop bit */
856 command = xhci_readl(xhci, &xhci->op_regs->command);
858 xhci_writel(xhci, command, &xhci->op_regs->command);
859 if (xhci_handshake(xhci, &xhci->op_regs->status,
860 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
861 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
862 spin_unlock_irq(&xhci->lock);
865 xhci_clear_command_ring(xhci);
867 /* step 3: save registers */
868 xhci_save_registers(xhci);
870 /* step 4: set CSS flag */
871 command = xhci_readl(xhci, &xhci->op_regs->command);
873 xhci_writel(xhci, command, &xhci->op_regs->command);
874 if (xhci_handshake(xhci, &xhci->op_regs->status,
875 STS_SAVE, 0, 10 * 1000)) {
876 xhci_warn(xhci, "WARN: xHC save state timeout\n");
877 spin_unlock_irq(&xhci->lock);
880 spin_unlock_irq(&xhci->lock);
883 * Deleting Compliance Mode Recovery Timer because the xHCI Host
884 * is about to be suspended.
886 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
887 (!(xhci_all_ports_seen_u0(xhci)))) {
888 del_timer_sync(&xhci->comp_mode_recovery_timer);
889 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
890 "%s: compliance mode recovery timer deleted",
894 /* step 5: remove core well power */
895 /* synchronize irq when using MSI-X */
896 xhci_msix_sync_irqs(xhci);
902 * start xHC (not bus-specific)
904 * This is called when the machine transition from S3/S4 mode.
907 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
909 u32 command, temp = 0;
910 struct usb_hcd *hcd = xhci_to_hcd(xhci);
911 struct usb_hcd *secondary_hcd;
913 bool comp_timer_running = false;
915 /* Wait a bit if either of the roothubs need to settle from the
916 * transition into bus suspend.
918 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
920 xhci->bus_state[1].next_statechange))
923 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
924 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
926 spin_lock_irq(&xhci->lock);
927 if (xhci->quirks & XHCI_RESET_ON_RESUME)
931 /* step 1: restore register */
932 xhci_restore_registers(xhci);
933 /* step 2: initialize command ring buffer */
934 xhci_set_cmd_ring_deq(xhci);
935 /* step 3: restore state and start state*/
936 /* step 3: set CRS flag */
937 command = xhci_readl(xhci, &xhci->op_regs->command);
939 xhci_writel(xhci, command, &xhci->op_regs->command);
940 if (xhci_handshake(xhci, &xhci->op_regs->status,
941 STS_RESTORE, 0, 10 * 1000)) {
942 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
943 spin_unlock_irq(&xhci->lock);
946 temp = xhci_readl(xhci, &xhci->op_regs->status);
949 /* If restore operation fails, re-initialize the HC during resume */
950 if ((temp & STS_SRE) || hibernated) {
952 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
953 !(xhci_all_ports_seen_u0(xhci))) {
954 del_timer_sync(&xhci->comp_mode_recovery_timer);
955 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
956 "Compliance Mode Recovery Timer deleted!");
959 /* Let the USB core know _both_ roothubs lost power. */
960 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
961 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
963 xhci_dbg(xhci, "Stop HCD\n");
966 spin_unlock_irq(&xhci->lock);
967 xhci_cleanup_msix(xhci);
969 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
970 temp = xhci_readl(xhci, &xhci->op_regs->status);
971 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
972 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
973 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
974 &xhci->ir_set->irq_pending);
975 xhci_print_ir_set(xhci, 0);
977 xhci_dbg(xhci, "cleaning up memory\n");
978 xhci_mem_cleanup(xhci);
979 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
980 xhci_readl(xhci, &xhci->op_regs->status));
982 /* USB core calls the PCI reinit and start functions twice:
983 * first with the primary HCD, and then with the secondary HCD.
984 * If we don't do the same, the host will never be started.
986 if (!usb_hcd_is_primary_hcd(hcd))
989 secondary_hcd = xhci->shared_hcd;
991 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
992 retval = xhci_init(hcd->primary_hcd);
995 comp_timer_running = true;
997 xhci_dbg(xhci, "Start the primary HCD\n");
998 retval = xhci_run(hcd->primary_hcd);
1000 xhci_dbg(xhci, "Start the secondary HCD\n");
1001 retval = xhci_run(secondary_hcd);
1003 hcd->state = HC_STATE_SUSPENDED;
1004 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1008 /* step 4: set Run/Stop bit */
1009 command = xhci_readl(xhci, &xhci->op_regs->command);
1011 xhci_writel(xhci, command, &xhci->op_regs->command);
1012 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1015 /* step 5: walk topology and initialize portsc,
1016 * portpmsc and portli
1018 /* this is done in bus_resume */
1020 /* step 6: restart each of the previously
1021 * Running endpoints by ringing their doorbells
1024 spin_unlock_irq(&xhci->lock);
1028 usb_hcd_resume_root_hub(hcd);
1029 usb_hcd_resume_root_hub(xhci->shared_hcd);
1033 * If system is subject to the Quirk, Compliance Mode Timer needs to
1034 * be re-initialized Always after a system resume. Ports are subject
1035 * to suffer the Compliance Mode issue again. It doesn't matter if
1036 * ports have entered previously to U0 before system's suspension.
1038 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1039 compliance_mode_recovery_timer_init(xhci);
1041 /* Re-enable port polling. */
1042 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1043 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1044 usb_hcd_poll_rh_status(hcd);
1048 #endif /* CONFIG_PM */
1050 /*-------------------------------------------------------------------------*/
1053 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1054 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1055 * value to right shift 1 for the bitmask.
1057 * Index = (epnum * 2) + direction - 1,
1058 * where direction = 0 for OUT, 1 for IN.
1059 * For control endpoints, the IN index is used (OUT index is unused), so
1060 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1062 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1065 if (usb_endpoint_xfer_control(desc))
1066 index = (unsigned int) (usb_endpoint_num(desc)*2);
1068 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1069 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1073 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1074 * address from the XHCI endpoint index.
1076 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1078 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1079 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1080 return direction | number;
1083 /* Find the flag for this endpoint (for use in the control context). Use the
1084 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1087 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1089 return 1 << (xhci_get_endpoint_index(desc) + 1);
1092 /* Find the flag for this endpoint (for use in the control context). Use the
1093 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1096 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1098 return 1 << (ep_index + 1);
1101 /* Compute the last valid endpoint context index. Basically, this is the
1102 * endpoint index plus one. For slot contexts with more than valid endpoint,
1103 * we find the most significant bit set in the added contexts flags.
1104 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1105 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1107 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1109 return fls(added_ctxs) - 1;
1112 /* Returns 1 if the arguments are OK;
1113 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1115 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1116 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1118 struct xhci_hcd *xhci;
1119 struct xhci_virt_device *virt_dev;
1121 if (!hcd || (check_ep && !ep) || !udev) {
1122 pr_debug("xHCI %s called with invalid args\n", func);
1125 if (!udev->parent) {
1126 pr_debug("xHCI %s called for root hub\n", func);
1130 xhci = hcd_to_xhci(hcd);
1131 if (check_virt_dev) {
1132 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1133 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1138 virt_dev = xhci->devs[udev->slot_id];
1139 if (virt_dev->udev != udev) {
1140 xhci_dbg(xhci, "xHCI %s called with udev and "
1141 "virt_dev does not match\n", func);
1146 if (xhci->xhc_state & XHCI_STATE_HALTED)
1152 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1153 struct usb_device *udev, struct xhci_command *command,
1154 bool ctx_change, bool must_succeed);
1157 * Full speed devices may have a max packet size greater than 8 bytes, but the
1158 * USB core doesn't know that until it reads the first 8 bytes of the
1159 * descriptor. If the usb_device's max packet size changes after that point,
1160 * we need to issue an evaluate context command and wait on it.
1162 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1163 unsigned int ep_index, struct urb *urb)
1165 struct xhci_container_ctx *in_ctx;
1166 struct xhci_container_ctx *out_ctx;
1167 struct xhci_input_control_ctx *ctrl_ctx;
1168 struct xhci_ep_ctx *ep_ctx;
1169 int max_packet_size;
1170 int hw_max_packet_size;
1173 out_ctx = xhci->devs[slot_id]->out_ctx;
1174 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1175 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1176 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1177 if (hw_max_packet_size != max_packet_size) {
1178 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1179 "Max Packet Size for ep 0 changed.");
1180 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1181 "Max packet size in usb_device = %d",
1183 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1184 "Max packet size in xHCI HW = %d",
1185 hw_max_packet_size);
1186 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1187 "Issuing evaluate context command.");
1189 /* Set up the input context flags for the command */
1190 /* FIXME: This won't work if a non-default control endpoint
1191 * changes max packet sizes.
1193 in_ctx = xhci->devs[slot_id]->in_ctx;
1194 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1196 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1200 /* Set up the modified control endpoint 0 */
1201 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1202 xhci->devs[slot_id]->out_ctx, ep_index);
1204 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1205 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1206 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1208 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1209 ctrl_ctx->drop_flags = 0;
1211 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1212 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1213 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1214 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1216 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1219 /* Clean up the input context for later use by bandwidth
1222 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1228 * non-error returns are a promise to giveback() the urb later
1229 * we drop ownership so next owner (or urb unlink) can get it
1231 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1233 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1234 struct xhci_td *buffer;
1235 unsigned long flags;
1237 unsigned int slot_id, ep_index;
1238 struct urb_priv *urb_priv;
1241 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1242 true, true, __func__) <= 0)
1245 slot_id = urb->dev->slot_id;
1246 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1248 if (!HCD_HW_ACCESSIBLE(hcd)) {
1249 if (!in_interrupt())
1250 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1255 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1256 size = urb->number_of_packets;
1260 urb_priv = kzalloc(sizeof(struct urb_priv) +
1261 size * sizeof(struct xhci_td *), mem_flags);
1265 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1271 for (i = 0; i < size; i++) {
1272 urb_priv->td[i] = buffer;
1276 urb_priv->length = size;
1277 urb_priv->td_cnt = 0;
1278 urb->hcpriv = urb_priv;
1280 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1281 /* Check to see if the max packet size for the default control
1282 * endpoint changed during FS device enumeration
1284 if (urb->dev->speed == USB_SPEED_FULL) {
1285 ret = xhci_check_maxpacket(xhci, slot_id,
1288 xhci_urb_free_priv(xhci, urb_priv);
1294 /* We have a spinlock and interrupts disabled, so we must pass
1295 * atomic context to this function, which may allocate memory.
1297 spin_lock_irqsave(&xhci->lock, flags);
1298 if (xhci->xhc_state & XHCI_STATE_DYING)
1300 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1304 spin_unlock_irqrestore(&xhci->lock, flags);
1305 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1306 spin_lock_irqsave(&xhci->lock, flags);
1307 if (xhci->xhc_state & XHCI_STATE_DYING)
1309 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1310 EP_GETTING_STREAMS) {
1311 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1312 "is transitioning to using streams.\n");
1314 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1315 EP_GETTING_NO_STREAMS) {
1316 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1317 "is transitioning to "
1318 "not having streams.\n");
1321 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1326 spin_unlock_irqrestore(&xhci->lock, flags);
1327 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1328 spin_lock_irqsave(&xhci->lock, flags);
1329 if (xhci->xhc_state & XHCI_STATE_DYING)
1331 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1335 spin_unlock_irqrestore(&xhci->lock, flags);
1337 spin_lock_irqsave(&xhci->lock, flags);
1338 if (xhci->xhc_state & XHCI_STATE_DYING)
1340 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1344 spin_unlock_irqrestore(&xhci->lock, flags);
1349 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1350 "non-responsive xHCI host.\n",
1351 urb->ep->desc.bEndpointAddress, urb);
1354 xhci_urb_free_priv(xhci, urb_priv);
1356 spin_unlock_irqrestore(&xhci->lock, flags);
1360 /* Get the right ring for the given URB.
1361 * If the endpoint supports streams, boundary check the URB's stream ID.
1362 * If the endpoint doesn't support streams, return the singular endpoint ring.
1364 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1367 unsigned int slot_id;
1368 unsigned int ep_index;
1369 unsigned int stream_id;
1370 struct xhci_virt_ep *ep;
1372 slot_id = urb->dev->slot_id;
1373 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1374 stream_id = urb->stream_id;
1375 ep = &xhci->devs[slot_id]->eps[ep_index];
1376 /* Common case: no streams */
1377 if (!(ep->ep_state & EP_HAS_STREAMS))
1380 if (stream_id == 0) {
1382 "WARN: Slot ID %u, ep index %u has streams, "
1383 "but URB has no stream ID.\n",
1388 if (stream_id < ep->stream_info->num_streams)
1389 return ep->stream_info->stream_rings[stream_id];
1392 "WARN: Slot ID %u, ep index %u has "
1393 "stream IDs 1 to %u allocated, "
1394 "but stream ID %u is requested.\n",
1396 ep->stream_info->num_streams - 1,
1402 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1403 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1404 * should pick up where it left off in the TD, unless a Set Transfer Ring
1405 * Dequeue Pointer is issued.
1407 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1408 * the ring. Since the ring is a contiguous structure, they can't be physically
1409 * removed. Instead, there are two options:
1411 * 1) If the HC is in the middle of processing the URB to be canceled, we
1412 * simply move the ring's dequeue pointer past those TRBs using the Set
1413 * Transfer Ring Dequeue Pointer command. This will be the common case,
1414 * when drivers timeout on the last submitted URB and attempt to cancel.
1416 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1417 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1418 * HC will need to invalidate the any TRBs it has cached after the stop
1419 * endpoint command, as noted in the xHCI 0.95 errata.
1421 * 3) The TD may have completed by the time the Stop Endpoint Command
1422 * completes, so software needs to handle that case too.
1424 * This function should protect against the TD enqueueing code ringing the
1425 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1426 * It also needs to account for multiple cancellations on happening at the same
1427 * time for the same endpoint.
1429 * Note that this function can be called in any context, or so says
1430 * usb_hcd_unlink_urb()
1432 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1434 unsigned long flags;
1437 struct xhci_hcd *xhci;
1438 struct urb_priv *urb_priv;
1440 unsigned int ep_index;
1441 struct xhci_ring *ep_ring;
1442 struct xhci_virt_ep *ep;
1444 xhci = hcd_to_xhci(hcd);
1445 spin_lock_irqsave(&xhci->lock, flags);
1446 /* Make sure the URB hasn't completed or been unlinked already */
1447 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1448 if (ret || !urb->hcpriv)
1450 temp = xhci_readl(xhci, &xhci->op_regs->status);
1451 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1452 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1453 "HW died, freeing TD.");
1454 urb_priv = urb->hcpriv;
1455 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1456 td = urb_priv->td[i];
1457 if (!list_empty(&td->td_list))
1458 list_del_init(&td->td_list);
1459 if (!list_empty(&td->cancelled_td_list))
1460 list_del_init(&td->cancelled_td_list);
1463 usb_hcd_unlink_urb_from_ep(hcd, urb);
1464 spin_unlock_irqrestore(&xhci->lock, flags);
1465 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1466 xhci_urb_free_priv(xhci, urb_priv);
1469 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1470 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1471 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1472 "Ep 0x%x: URB %p to be canceled on "
1473 "non-responsive xHCI host.",
1474 urb->ep->desc.bEndpointAddress, urb);
1475 /* Let the stop endpoint command watchdog timer (which set this
1476 * state) finish cleaning up the endpoint TD lists. We must
1477 * have caught it in the middle of dropping a lock and giving
1483 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1484 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1485 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1491 urb_priv = urb->hcpriv;
1492 i = urb_priv->td_cnt;
1493 if (i < urb_priv->length)
1494 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1495 "Cancel URB %p, dev %s, ep 0x%x, "
1496 "starting at offset 0x%llx",
1497 urb, urb->dev->devpath,
1498 urb->ep->desc.bEndpointAddress,
1499 (unsigned long long) xhci_trb_virt_to_dma(
1500 urb_priv->td[i]->start_seg,
1501 urb_priv->td[i]->first_trb));
1503 for (; i < urb_priv->length; i++) {
1504 td = urb_priv->td[i];
1505 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1508 /* Queue a stop endpoint command, but only if this is
1509 * the first cancellation to be handled.
1511 if (!(ep->ep_state & EP_HALT_PENDING)) {
1512 ep->ep_state |= EP_HALT_PENDING;
1513 ep->stop_cmds_pending++;
1514 ep->stop_cmd_timer.expires = jiffies +
1515 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1516 add_timer(&ep->stop_cmd_timer);
1517 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1518 xhci_ring_cmd_db(xhci);
1521 spin_unlock_irqrestore(&xhci->lock, flags);
1525 /* Drop an endpoint from a new bandwidth configuration for this device.
1526 * Only one call to this function is allowed per endpoint before
1527 * check_bandwidth() or reset_bandwidth() must be called.
1528 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1529 * add the endpoint to the schedule with possibly new parameters denoted by a
1530 * different endpoint descriptor in usb_host_endpoint.
1531 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1534 * The USB core will not allow URBs to be queued to an endpoint that is being
1535 * disabled, so there's no need for mutual exclusion to protect
1536 * the xhci->devs[slot_id] structure.
1538 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1539 struct usb_host_endpoint *ep)
1541 struct xhci_hcd *xhci;
1542 struct xhci_container_ctx *in_ctx, *out_ctx;
1543 struct xhci_input_control_ctx *ctrl_ctx;
1544 struct xhci_slot_ctx *slot_ctx;
1545 unsigned int last_ctx;
1546 unsigned int ep_index;
1547 struct xhci_ep_ctx *ep_ctx;
1549 u32 new_add_flags, new_drop_flags, new_slot_info;
1552 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1555 xhci = hcd_to_xhci(hcd);
1556 if (xhci->xhc_state & XHCI_STATE_DYING)
1559 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1560 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1561 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1562 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1563 __func__, drop_flag);
1567 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1568 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1569 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1571 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1576 ep_index = xhci_get_endpoint_index(&ep->desc);
1577 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1578 /* If the HC already knows the endpoint is disabled,
1579 * or the HCD has noted it is disabled, ignore this request
1581 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1582 cpu_to_le32(EP_STATE_DISABLED)) ||
1583 le32_to_cpu(ctrl_ctx->drop_flags) &
1584 xhci_get_endpoint_flag(&ep->desc)) {
1585 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1590 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1591 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1593 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1594 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1596 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1597 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1598 /* Update the last valid endpoint context, if we deleted the last one */
1599 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1600 LAST_CTX(last_ctx)) {
1601 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1602 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1604 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1606 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1608 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1609 (unsigned int) ep->desc.bEndpointAddress,
1611 (unsigned int) new_drop_flags,
1612 (unsigned int) new_add_flags,
1613 (unsigned int) new_slot_info);
1617 /* Add an endpoint to a new possible bandwidth configuration for this device.
1618 * Only one call to this function is allowed per endpoint before
1619 * check_bandwidth() or reset_bandwidth() must be called.
1620 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1621 * add the endpoint to the schedule with possibly new parameters denoted by a
1622 * different endpoint descriptor in usb_host_endpoint.
1623 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1626 * The USB core will not allow URBs to be queued to an endpoint until the
1627 * configuration or alt setting is installed in the device, so there's no need
1628 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1630 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1631 struct usb_host_endpoint *ep)
1633 struct xhci_hcd *xhci;
1634 struct xhci_container_ctx *in_ctx, *out_ctx;
1635 unsigned int ep_index;
1636 struct xhci_slot_ctx *slot_ctx;
1637 struct xhci_input_control_ctx *ctrl_ctx;
1639 unsigned int last_ctx;
1640 u32 new_add_flags, new_drop_flags, new_slot_info;
1641 struct xhci_virt_device *virt_dev;
1644 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1646 /* So we won't queue a reset ep command for a root hub */
1650 xhci = hcd_to_xhci(hcd);
1651 if (xhci->xhc_state & XHCI_STATE_DYING)
1654 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1655 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1656 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1657 /* FIXME when we have to issue an evaluate endpoint command to
1658 * deal with ep0 max packet size changing once we get the
1661 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1662 __func__, added_ctxs);
1666 virt_dev = xhci->devs[udev->slot_id];
1667 in_ctx = virt_dev->in_ctx;
1668 out_ctx = virt_dev->out_ctx;
1669 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1671 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1676 ep_index = xhci_get_endpoint_index(&ep->desc);
1677 /* If this endpoint is already in use, and the upper layers are trying
1678 * to add it again without dropping it, reject the addition.
1680 if (virt_dev->eps[ep_index].ring &&
1681 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1682 xhci_get_endpoint_flag(&ep->desc))) {
1683 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1684 "without dropping it.\n",
1685 (unsigned int) ep->desc.bEndpointAddress);
1689 /* If the HCD has already noted the endpoint is enabled,
1690 * ignore this request.
1692 if (le32_to_cpu(ctrl_ctx->add_flags) &
1693 xhci_get_endpoint_flag(&ep->desc)) {
1694 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1700 * Configuration and alternate setting changes must be done in
1701 * process context, not interrupt context (or so documenation
1702 * for usb_set_interface() and usb_set_configuration() claim).
1704 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1705 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1706 __func__, ep->desc.bEndpointAddress);
1710 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1711 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1713 /* If xhci_endpoint_disable() was called for this endpoint, but the
1714 * xHC hasn't been notified yet through the check_bandwidth() call,
1715 * this re-adds a new state for the endpoint from the new endpoint
1716 * descriptors. We must drop and re-add this endpoint, so we leave the
1719 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1721 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1722 /* Update the last valid endpoint context, if we just added one past */
1723 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1724 LAST_CTX(last_ctx)) {
1725 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1726 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1728 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1730 /* Store the usb_device pointer for later use */
1733 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1734 (unsigned int) ep->desc.bEndpointAddress,
1736 (unsigned int) new_drop_flags,
1737 (unsigned int) new_add_flags,
1738 (unsigned int) new_slot_info);
1742 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1744 struct xhci_input_control_ctx *ctrl_ctx;
1745 struct xhci_ep_ctx *ep_ctx;
1746 struct xhci_slot_ctx *slot_ctx;
1749 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1751 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1756 /* When a device's add flag and drop flag are zero, any subsequent
1757 * configure endpoint command will leave that endpoint's state
1758 * untouched. Make sure we don't leave any old state in the input
1759 * endpoint contexts.
1761 ctrl_ctx->drop_flags = 0;
1762 ctrl_ctx->add_flags = 0;
1763 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1764 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1765 /* Endpoint 0 is always valid */
1766 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1767 for (i = 1; i < 31; ++i) {
1768 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1769 ep_ctx->ep_info = 0;
1770 ep_ctx->ep_info2 = 0;
1772 ep_ctx->tx_info = 0;
1776 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1777 struct usb_device *udev, u32 *cmd_status)
1781 switch (*cmd_status) {
1783 dev_warn(&udev->dev, "Not enough host controller resources "
1784 "for new device state.\n");
1786 /* FIXME: can we allocate more resources for the HC? */
1789 case COMP_2ND_BW_ERR:
1790 dev_warn(&udev->dev, "Not enough bandwidth "
1791 "for new device state.\n");
1793 /* FIXME: can we go back to the old state? */
1796 /* the HCD set up something wrong */
1797 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1799 "and endpoint is not disabled.\n");
1803 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1804 "configure command.\n");
1808 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1809 "Successful Endpoint Configure command");
1813 xhci_err(xhci, "ERROR: unexpected command completion "
1814 "code 0x%x.\n", *cmd_status);
1821 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1822 struct usb_device *udev, u32 *cmd_status)
1825 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1827 switch (*cmd_status) {
1829 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1830 "context command.\n");
1834 dev_warn(&udev->dev, "WARN: slot not enabled for"
1835 "evaluate context command.\n");
1838 case COMP_CTX_STATE:
1839 dev_warn(&udev->dev, "WARN: invalid context state for "
1840 "evaluate context command.\n");
1841 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1845 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1846 "context command.\n");
1850 /* Max Exit Latency too large error */
1851 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1855 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1856 "Successful evaluate context command");
1860 xhci_err(xhci, "ERROR: unexpected command completion "
1861 "code 0x%x.\n", *cmd_status);
1868 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1869 struct xhci_input_control_ctx *ctrl_ctx)
1871 u32 valid_add_flags;
1872 u32 valid_drop_flags;
1874 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1875 * (bit 1). The default control endpoint is added during the Address
1876 * Device command and is never removed until the slot is disabled.
1878 valid_add_flags = ctrl_ctx->add_flags >> 2;
1879 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1881 /* Use hweight32 to count the number of ones in the add flags, or
1882 * number of endpoints added. Don't count endpoints that are changed
1883 * (both added and dropped).
1885 return hweight32(valid_add_flags) -
1886 hweight32(valid_add_flags & valid_drop_flags);
1889 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1890 struct xhci_input_control_ctx *ctrl_ctx)
1892 u32 valid_add_flags;
1893 u32 valid_drop_flags;
1895 valid_add_flags = ctrl_ctx->add_flags >> 2;
1896 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1898 return hweight32(valid_drop_flags) -
1899 hweight32(valid_add_flags & valid_drop_flags);
1903 * We need to reserve the new number of endpoints before the configure endpoint
1904 * command completes. We can't subtract the dropped endpoints from the number
1905 * of active endpoints until the command completes because we can oversubscribe
1906 * the host in this case:
1908 * - the first configure endpoint command drops more endpoints than it adds
1909 * - a second configure endpoint command that adds more endpoints is queued
1910 * - the first configure endpoint command fails, so the config is unchanged
1911 * - the second command may succeed, even though there isn't enough resources
1913 * Must be called with xhci->lock held.
1915 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1916 struct xhci_input_control_ctx *ctrl_ctx)
1920 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1921 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1922 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1923 "Not enough ep ctxs: "
1924 "%u active, need to add %u, limit is %u.",
1925 xhci->num_active_eps, added_eps,
1926 xhci->limit_active_eps);
1929 xhci->num_active_eps += added_eps;
1930 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1931 "Adding %u ep ctxs, %u now active.", added_eps,
1932 xhci->num_active_eps);
1937 * The configure endpoint was failed by the xHC for some other reason, so we
1938 * need to revert the resources that failed configuration would have used.
1940 * Must be called with xhci->lock held.
1942 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1943 struct xhci_input_control_ctx *ctrl_ctx)
1947 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1948 xhci->num_active_eps -= num_failed_eps;
1949 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1950 "Removing %u failed ep ctxs, %u now active.",
1952 xhci->num_active_eps);
1956 * Now that the command has completed, clean up the active endpoint count by
1957 * subtracting out the endpoints that were dropped (but not changed).
1959 * Must be called with xhci->lock held.
1961 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1962 struct xhci_input_control_ctx *ctrl_ctx)
1964 u32 num_dropped_eps;
1966 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1967 xhci->num_active_eps -= num_dropped_eps;
1968 if (num_dropped_eps)
1969 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1970 "Removing %u dropped ep ctxs, %u now active.",
1972 xhci->num_active_eps);
1975 static unsigned int xhci_get_block_size(struct usb_device *udev)
1977 switch (udev->speed) {
1979 case USB_SPEED_FULL:
1981 case USB_SPEED_HIGH:
1983 case USB_SPEED_SUPER:
1985 case USB_SPEED_UNKNOWN:
1986 case USB_SPEED_WIRELESS:
1988 /* Should never happen */
1994 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1996 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1998 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2003 /* If we are changing a LS/FS device under a HS hub,
2004 * make sure (if we are activating a new TT) that the HS bus has enough
2005 * bandwidth for this new TT.
2007 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2008 struct xhci_virt_device *virt_dev,
2011 struct xhci_interval_bw_table *bw_table;
2012 struct xhci_tt_bw_info *tt_info;
2014 /* Find the bandwidth table for the root port this TT is attached to. */
2015 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2016 tt_info = virt_dev->tt_info;
2017 /* If this TT already had active endpoints, the bandwidth for this TT
2018 * has already been added. Removing all periodic endpoints (and thus
2019 * making the TT enactive) will only decrease the bandwidth used.
2023 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2024 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2028 /* Not sure why we would have no new active endpoints...
2030 * Maybe because of an Evaluate Context change for a hub update or a
2031 * control endpoint 0 max packet size change?
2032 * FIXME: skip the bandwidth calculation in that case.
2037 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2038 struct xhci_virt_device *virt_dev)
2040 unsigned int bw_reserved;
2042 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2043 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2046 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2047 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2054 * This algorithm is a very conservative estimate of the worst-case scheduling
2055 * scenario for any one interval. The hardware dynamically schedules the
2056 * packets, so we can't tell which microframe could be the limiting factor in
2057 * the bandwidth scheduling. This only takes into account periodic endpoints.
2059 * Obviously, we can't solve an NP complete problem to find the minimum worst
2060 * case scenario. Instead, we come up with an estimate that is no less than
2061 * the worst case bandwidth used for any one microframe, but may be an
2064 * We walk the requirements for each endpoint by interval, starting with the
2065 * smallest interval, and place packets in the schedule where there is only one
2066 * possible way to schedule packets for that interval. In order to simplify
2067 * this algorithm, we record the largest max packet size for each interval, and
2068 * assume all packets will be that size.
2070 * For interval 0, we obviously must schedule all packets for each interval.
2071 * The bandwidth for interval 0 is just the amount of data to be transmitted
2072 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2073 * the number of packets).
2075 * For interval 1, we have two possible microframes to schedule those packets
2076 * in. For this algorithm, if we can schedule the same number of packets for
2077 * each possible scheduling opportunity (each microframe), we will do so. The
2078 * remaining number of packets will be saved to be transmitted in the gaps in
2079 * the next interval's scheduling sequence.
2081 * As we move those remaining packets to be scheduled with interval 2 packets,
2082 * we have to double the number of remaining packets to transmit. This is
2083 * because the intervals are actually powers of 2, and we would be transmitting
2084 * the previous interval's packets twice in this interval. We also have to be
2085 * sure that when we look at the largest max packet size for this interval, we
2086 * also look at the largest max packet size for the remaining packets and take
2087 * the greater of the two.
2089 * The algorithm continues to evenly distribute packets in each scheduling
2090 * opportunity, and push the remaining packets out, until we get to the last
2091 * interval. Then those packets and their associated overhead are just added
2092 * to the bandwidth used.
2094 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2095 struct xhci_virt_device *virt_dev,
2098 unsigned int bw_reserved;
2099 unsigned int max_bandwidth;
2100 unsigned int bw_used;
2101 unsigned int block_size;
2102 struct xhci_interval_bw_table *bw_table;
2103 unsigned int packet_size = 0;
2104 unsigned int overhead = 0;
2105 unsigned int packets_transmitted = 0;
2106 unsigned int packets_remaining = 0;
2109 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2110 return xhci_check_ss_bw(xhci, virt_dev);
2112 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2113 max_bandwidth = HS_BW_LIMIT;
2114 /* Convert percent of bus BW reserved to blocks reserved */
2115 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2117 max_bandwidth = FS_BW_LIMIT;
2118 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2121 bw_table = virt_dev->bw_table;
2122 /* We need to translate the max packet size and max ESIT payloads into
2123 * the units the hardware uses.
2125 block_size = xhci_get_block_size(virt_dev->udev);
2127 /* If we are manipulating a LS/FS device under a HS hub, double check
2128 * that the HS bus has enough bandwidth if we are activing a new TT.
2130 if (virt_dev->tt_info) {
2131 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2132 "Recalculating BW for rootport %u",
2133 virt_dev->real_port);
2134 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2135 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2136 "newly activated TT.\n");
2139 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2140 "Recalculating BW for TT slot %u port %u",
2141 virt_dev->tt_info->slot_id,
2142 virt_dev->tt_info->ttport);
2144 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2145 "Recalculating BW for rootport %u",
2146 virt_dev->real_port);
2149 /* Add in how much bandwidth will be used for interval zero, or the
2150 * rounded max ESIT payload + number of packets * largest overhead.
2152 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2153 bw_table->interval_bw[0].num_packets *
2154 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2156 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2157 unsigned int bw_added;
2158 unsigned int largest_mps;
2159 unsigned int interval_overhead;
2162 * How many packets could we transmit in this interval?
2163 * If packets didn't fit in the previous interval, we will need
2164 * to transmit that many packets twice within this interval.
2166 packets_remaining = 2 * packets_remaining +
2167 bw_table->interval_bw[i].num_packets;
2169 /* Find the largest max packet size of this or the previous
2172 if (list_empty(&bw_table->interval_bw[i].endpoints))
2175 struct xhci_virt_ep *virt_ep;
2176 struct list_head *ep_entry;
2178 ep_entry = bw_table->interval_bw[i].endpoints.next;
2179 virt_ep = list_entry(ep_entry,
2180 struct xhci_virt_ep, bw_endpoint_list);
2181 /* Convert to blocks, rounding up */
2182 largest_mps = DIV_ROUND_UP(
2183 virt_ep->bw_info.max_packet_size,
2186 if (largest_mps > packet_size)
2187 packet_size = largest_mps;
2189 /* Use the larger overhead of this or the previous interval. */
2190 interval_overhead = xhci_get_largest_overhead(
2191 &bw_table->interval_bw[i]);
2192 if (interval_overhead > overhead)
2193 overhead = interval_overhead;
2195 /* How many packets can we evenly distribute across
2196 * (1 << (i + 1)) possible scheduling opportunities?
2198 packets_transmitted = packets_remaining >> (i + 1);
2200 /* Add in the bandwidth used for those scheduled packets */
2201 bw_added = packets_transmitted * (overhead + packet_size);
2203 /* How many packets do we have remaining to transmit? */
2204 packets_remaining = packets_remaining % (1 << (i + 1));
2206 /* What largest max packet size should those packets have? */
2207 /* If we've transmitted all packets, don't carry over the
2208 * largest packet size.
2210 if (packets_remaining == 0) {
2213 } else if (packets_transmitted > 0) {
2214 /* Otherwise if we do have remaining packets, and we've
2215 * scheduled some packets in this interval, take the
2216 * largest max packet size from endpoints with this
2219 packet_size = largest_mps;
2220 overhead = interval_overhead;
2222 /* Otherwise carry over packet_size and overhead from the last
2223 * time we had a remainder.
2225 bw_used += bw_added;
2226 if (bw_used > max_bandwidth) {
2227 xhci_warn(xhci, "Not enough bandwidth. "
2228 "Proposed: %u, Max: %u\n",
2229 bw_used, max_bandwidth);
2234 * Ok, we know we have some packets left over after even-handedly
2235 * scheduling interval 15. We don't know which microframes they will
2236 * fit into, so we over-schedule and say they will be scheduled every
2239 if (packets_remaining > 0)
2240 bw_used += overhead + packet_size;
2242 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2243 unsigned int port_index = virt_dev->real_port - 1;
2245 /* OK, we're manipulating a HS device attached to a
2246 * root port bandwidth domain. Include the number of active TTs
2247 * in the bandwidth used.
2249 bw_used += TT_HS_OVERHEAD *
2250 xhci->rh_bw[port_index].num_active_tts;
2253 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2254 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2255 "Available: %u " "percent",
2256 bw_used, max_bandwidth, bw_reserved,
2257 (max_bandwidth - bw_used - bw_reserved) * 100 /
2260 bw_used += bw_reserved;
2261 if (bw_used > max_bandwidth) {
2262 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2263 bw_used, max_bandwidth);
2267 bw_table->bw_used = bw_used;
2271 static bool xhci_is_async_ep(unsigned int ep_type)
2273 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2274 ep_type != ISOC_IN_EP &&
2275 ep_type != INT_IN_EP);
2278 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2280 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2283 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2285 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2287 if (ep_bw->ep_interval == 0)
2288 return SS_OVERHEAD_BURST +
2289 (ep_bw->mult * ep_bw->num_packets *
2290 (SS_OVERHEAD + mps));
2291 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2292 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2293 1 << ep_bw->ep_interval);
2297 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2298 struct xhci_bw_info *ep_bw,
2299 struct xhci_interval_bw_table *bw_table,
2300 struct usb_device *udev,
2301 struct xhci_virt_ep *virt_ep,
2302 struct xhci_tt_bw_info *tt_info)
2304 struct xhci_interval_bw *interval_bw;
2305 int normalized_interval;
2307 if (xhci_is_async_ep(ep_bw->type))
2310 if (udev->speed == USB_SPEED_SUPER) {
2311 if (xhci_is_sync_in_ep(ep_bw->type))
2312 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2313 xhci_get_ss_bw_consumed(ep_bw);
2315 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2316 xhci_get_ss_bw_consumed(ep_bw);
2320 /* SuperSpeed endpoints never get added to intervals in the table, so
2321 * this check is only valid for HS/FS/LS devices.
2323 if (list_empty(&virt_ep->bw_endpoint_list))
2325 /* For LS/FS devices, we need to translate the interval expressed in
2326 * microframes to frames.
2328 if (udev->speed == USB_SPEED_HIGH)
2329 normalized_interval = ep_bw->ep_interval;
2331 normalized_interval = ep_bw->ep_interval - 3;
2333 if (normalized_interval == 0)
2334 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2335 interval_bw = &bw_table->interval_bw[normalized_interval];
2336 interval_bw->num_packets -= ep_bw->num_packets;
2337 switch (udev->speed) {
2339 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2341 case USB_SPEED_FULL:
2342 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2344 case USB_SPEED_HIGH:
2345 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2347 case USB_SPEED_SUPER:
2348 case USB_SPEED_UNKNOWN:
2349 case USB_SPEED_WIRELESS:
2350 /* Should never happen because only LS/FS/HS endpoints will get
2351 * added to the endpoint list.
2356 tt_info->active_eps -= 1;
2357 list_del_init(&virt_ep->bw_endpoint_list);
2360 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2361 struct xhci_bw_info *ep_bw,
2362 struct xhci_interval_bw_table *bw_table,
2363 struct usb_device *udev,
2364 struct xhci_virt_ep *virt_ep,
2365 struct xhci_tt_bw_info *tt_info)
2367 struct xhci_interval_bw *interval_bw;
2368 struct xhci_virt_ep *smaller_ep;
2369 int normalized_interval;
2371 if (xhci_is_async_ep(ep_bw->type))
2374 if (udev->speed == USB_SPEED_SUPER) {
2375 if (xhci_is_sync_in_ep(ep_bw->type))
2376 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2377 xhci_get_ss_bw_consumed(ep_bw);
2379 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2380 xhci_get_ss_bw_consumed(ep_bw);
2384 /* For LS/FS devices, we need to translate the interval expressed in
2385 * microframes to frames.
2387 if (udev->speed == USB_SPEED_HIGH)
2388 normalized_interval = ep_bw->ep_interval;
2390 normalized_interval = ep_bw->ep_interval - 3;
2392 if (normalized_interval == 0)
2393 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2394 interval_bw = &bw_table->interval_bw[normalized_interval];
2395 interval_bw->num_packets += ep_bw->num_packets;
2396 switch (udev->speed) {
2398 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2400 case USB_SPEED_FULL:
2401 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2403 case USB_SPEED_HIGH:
2404 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2406 case USB_SPEED_SUPER:
2407 case USB_SPEED_UNKNOWN:
2408 case USB_SPEED_WIRELESS:
2409 /* Should never happen because only LS/FS/HS endpoints will get
2410 * added to the endpoint list.
2416 tt_info->active_eps += 1;
2417 /* Insert the endpoint into the list, largest max packet size first. */
2418 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2420 if (ep_bw->max_packet_size >=
2421 smaller_ep->bw_info.max_packet_size) {
2422 /* Add the new ep before the smaller endpoint */
2423 list_add_tail(&virt_ep->bw_endpoint_list,
2424 &smaller_ep->bw_endpoint_list);
2428 /* Add the new endpoint at the end of the list. */
2429 list_add_tail(&virt_ep->bw_endpoint_list,
2430 &interval_bw->endpoints);
2433 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2434 struct xhci_virt_device *virt_dev,
2437 struct xhci_root_port_bw_info *rh_bw_info;
2438 if (!virt_dev->tt_info)
2441 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2442 if (old_active_eps == 0 &&
2443 virt_dev->tt_info->active_eps != 0) {
2444 rh_bw_info->num_active_tts += 1;
2445 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2446 } else if (old_active_eps != 0 &&
2447 virt_dev->tt_info->active_eps == 0) {
2448 rh_bw_info->num_active_tts -= 1;
2449 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2453 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2454 struct xhci_virt_device *virt_dev,
2455 struct xhci_container_ctx *in_ctx)
2457 struct xhci_bw_info ep_bw_info[31];
2459 struct xhci_input_control_ctx *ctrl_ctx;
2460 int old_active_eps = 0;
2462 if (virt_dev->tt_info)
2463 old_active_eps = virt_dev->tt_info->active_eps;
2465 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2467 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2472 for (i = 0; i < 31; i++) {
2473 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2476 /* Make a copy of the BW info in case we need to revert this */
2477 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2478 sizeof(ep_bw_info[i]));
2479 /* Drop the endpoint from the interval table if the endpoint is
2480 * being dropped or changed.
2482 if (EP_IS_DROPPED(ctrl_ctx, i))
2483 xhci_drop_ep_from_interval_table(xhci,
2484 &virt_dev->eps[i].bw_info,
2490 /* Overwrite the information stored in the endpoints' bw_info */
2491 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2492 for (i = 0; i < 31; i++) {
2493 /* Add any changed or added endpoints to the interval table */
2494 if (EP_IS_ADDED(ctrl_ctx, i))
2495 xhci_add_ep_to_interval_table(xhci,
2496 &virt_dev->eps[i].bw_info,
2503 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2504 /* Ok, this fits in the bandwidth we have.
2505 * Update the number of active TTs.
2507 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2511 /* We don't have enough bandwidth for this, revert the stored info. */
2512 for (i = 0; i < 31; i++) {
2513 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2516 /* Drop the new copies of any added or changed endpoints from
2517 * the interval table.
2519 if (EP_IS_ADDED(ctrl_ctx, i)) {
2520 xhci_drop_ep_from_interval_table(xhci,
2521 &virt_dev->eps[i].bw_info,
2527 /* Revert the endpoint back to its old information */
2528 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2529 sizeof(ep_bw_info[i]));
2530 /* Add any changed or dropped endpoints back into the table */
2531 if (EP_IS_DROPPED(ctrl_ctx, i))
2532 xhci_add_ep_to_interval_table(xhci,
2533 &virt_dev->eps[i].bw_info,
2543 /* Issue a configure endpoint command or evaluate context command
2544 * and wait for it to finish.
2546 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2547 struct usb_device *udev,
2548 struct xhci_command *command,
2549 bool ctx_change, bool must_succeed)
2553 unsigned long flags;
2554 struct xhci_container_ctx *in_ctx;
2555 struct xhci_input_control_ctx *ctrl_ctx;
2556 struct completion *cmd_completion;
2558 struct xhci_virt_device *virt_dev;
2559 union xhci_trb *cmd_trb;
2561 spin_lock_irqsave(&xhci->lock, flags);
2562 virt_dev = xhci->devs[udev->slot_id];
2565 in_ctx = command->in_ctx;
2567 in_ctx = virt_dev->in_ctx;
2568 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2570 spin_unlock_irqrestore(&xhci->lock, flags);
2571 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2576 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2577 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2578 spin_unlock_irqrestore(&xhci->lock, flags);
2579 xhci_warn(xhci, "Not enough host resources, "
2580 "active endpoint contexts = %u\n",
2581 xhci->num_active_eps);
2584 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2585 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2586 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2587 xhci_free_host_resources(xhci, ctrl_ctx);
2588 spin_unlock_irqrestore(&xhci->lock, flags);
2589 xhci_warn(xhci, "Not enough bandwidth\n");
2594 cmd_completion = command->completion;
2595 cmd_status = &command->status;
2596 command->command_trb = xhci->cmd_ring->enqueue;
2598 /* Enqueue pointer can be left pointing to the link TRB,
2599 * we must handle that
2601 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2602 command->command_trb =
2603 xhci->cmd_ring->enq_seg->next->trbs;
2605 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2607 cmd_completion = &virt_dev->cmd_completion;
2608 cmd_status = &virt_dev->cmd_status;
2610 init_completion(cmd_completion);
2612 cmd_trb = xhci->cmd_ring->dequeue;
2614 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2615 udev->slot_id, must_succeed);
2617 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2618 udev->slot_id, must_succeed);
2621 list_del(&command->cmd_list);
2622 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2623 xhci_free_host_resources(xhci, ctrl_ctx);
2624 spin_unlock_irqrestore(&xhci->lock, flags);
2625 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2626 "FIXME allocate a new ring segment");
2629 xhci_ring_cmd_db(xhci);
2630 spin_unlock_irqrestore(&xhci->lock, flags);
2632 /* Wait for the configure endpoint command to complete */
2633 timeleft = wait_for_completion_interruptible_timeout(
2635 XHCI_CMD_DEFAULT_TIMEOUT);
2636 if (timeleft <= 0) {
2637 xhci_warn(xhci, "%s while waiting for %s command\n",
2638 timeleft == 0 ? "Timeout" : "Signal",
2640 "configure endpoint" :
2641 "evaluate context");
2642 /* cancel the configure endpoint command */
2643 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2650 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2652 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2654 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2655 spin_lock_irqsave(&xhci->lock, flags);
2656 /* If the command failed, remove the reserved resources.
2657 * Otherwise, clean up the estimate to include dropped eps.
2660 xhci_free_host_resources(xhci, ctrl_ctx);
2662 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2663 spin_unlock_irqrestore(&xhci->lock, flags);
2668 /* Called after one or more calls to xhci_add_endpoint() or
2669 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2670 * to call xhci_reset_bandwidth().
2672 * Since we are in the middle of changing either configuration or
2673 * installing a new alt setting, the USB core won't allow URBs to be
2674 * enqueued for any endpoint on the old config or interface. Nothing
2675 * else should be touching the xhci->devs[slot_id] structure, so we
2676 * don't need to take the xhci->lock for manipulating that.
2678 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2682 struct xhci_hcd *xhci;
2683 struct xhci_virt_device *virt_dev;
2684 struct xhci_input_control_ctx *ctrl_ctx;
2685 struct xhci_slot_ctx *slot_ctx;
2687 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2690 xhci = hcd_to_xhci(hcd);
2691 if (xhci->xhc_state & XHCI_STATE_DYING)
2694 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2695 virt_dev = xhci->devs[udev->slot_id];
2697 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2698 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2700 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2704 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2705 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2706 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2708 /* Don't issue the command if there's no endpoints to update. */
2709 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2710 ctrl_ctx->drop_flags == 0)
2713 xhci_dbg(xhci, "New Input Control Context:\n");
2714 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2715 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2716 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2718 ret = xhci_configure_endpoint(xhci, udev, NULL,
2721 /* Callee should call reset_bandwidth() */
2725 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2726 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2727 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2729 /* Free any rings that were dropped, but not changed. */
2730 for (i = 1; i < 31; ++i) {
2731 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2732 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2733 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2735 xhci_zero_in_ctx(xhci, virt_dev);
2737 * Install any rings for completely new endpoints or changed endpoints,
2738 * and free or cache any old rings from changed endpoints.
2740 for (i = 1; i < 31; ++i) {
2741 if (!virt_dev->eps[i].new_ring)
2743 /* Only cache or free the old ring if it exists.
2744 * It may not if this is the first add of an endpoint.
2746 if (virt_dev->eps[i].ring) {
2747 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2749 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2750 virt_dev->eps[i].new_ring = NULL;
2756 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2758 struct xhci_hcd *xhci;
2759 struct xhci_virt_device *virt_dev;
2762 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2765 xhci = hcd_to_xhci(hcd);
2767 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2768 virt_dev = xhci->devs[udev->slot_id];
2769 /* Free any rings allocated for added endpoints */
2770 for (i = 0; i < 31; ++i) {
2771 if (virt_dev->eps[i].new_ring) {
2772 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2773 virt_dev->eps[i].new_ring = NULL;
2776 xhci_zero_in_ctx(xhci, virt_dev);
2779 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2780 struct xhci_container_ctx *in_ctx,
2781 struct xhci_container_ctx *out_ctx,
2782 struct xhci_input_control_ctx *ctrl_ctx,
2783 u32 add_flags, u32 drop_flags)
2785 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2786 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2787 xhci_slot_copy(xhci, in_ctx, out_ctx);
2788 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2790 xhci_dbg(xhci, "Input Context:\n");
2791 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2794 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2795 unsigned int slot_id, unsigned int ep_index,
2796 struct xhci_dequeue_state *deq_state)
2798 struct xhci_input_control_ctx *ctrl_ctx;
2799 struct xhci_container_ctx *in_ctx;
2800 struct xhci_ep_ctx *ep_ctx;
2804 in_ctx = xhci->devs[slot_id]->in_ctx;
2805 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2807 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2812 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2813 xhci->devs[slot_id]->out_ctx, ep_index);
2814 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2815 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2816 deq_state->new_deq_ptr);
2818 xhci_warn(xhci, "WARN Cannot submit config ep after "
2819 "reset ep command\n");
2820 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2821 deq_state->new_deq_seg,
2822 deq_state->new_deq_ptr);
2825 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2827 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2828 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2829 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2830 added_ctxs, added_ctxs);
2833 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2834 struct usb_device *udev, unsigned int ep_index)
2836 struct xhci_dequeue_state deq_state;
2837 struct xhci_virt_ep *ep;
2839 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2840 "Cleaning up stalled endpoint ring");
2841 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2842 /* We need to move the HW's dequeue pointer past this TD,
2843 * or it will attempt to resend it on the next doorbell ring.
2845 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2846 ep_index, ep->stopped_stream, ep->stopped_td,
2849 /* HW with the reset endpoint quirk will use the saved dequeue state to
2850 * issue a configure endpoint command later.
2852 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2853 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2854 "Queueing new dequeue state");
2855 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2856 ep_index, ep->stopped_stream, &deq_state);
2858 /* Better hope no one uses the input context between now and the
2859 * reset endpoint completion!
2860 * XXX: No idea how this hardware will react when stream rings
2863 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2864 "Setting up input context for "
2865 "configure endpoint command");
2866 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2867 ep_index, &deq_state);
2871 /* Deal with stalled endpoints. The core should have sent the control message
2872 * to clear the halt condition. However, we need to make the xHCI hardware
2873 * reset its sequence number, since a device will expect a sequence number of
2874 * zero after the halt condition is cleared.
2875 * Context: in_interrupt
2877 void xhci_endpoint_reset(struct usb_hcd *hcd,
2878 struct usb_host_endpoint *ep)
2880 struct xhci_hcd *xhci;
2881 struct usb_device *udev;
2882 unsigned int ep_index;
2883 unsigned long flags;
2885 struct xhci_virt_ep *virt_ep;
2887 xhci = hcd_to_xhci(hcd);
2888 udev = (struct usb_device *) ep->hcpriv;
2889 /* Called with a root hub endpoint (or an endpoint that wasn't added
2890 * with xhci_add_endpoint()
2894 ep_index = xhci_get_endpoint_index(&ep->desc);
2895 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2896 if (!virt_ep->stopped_td) {
2897 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2898 "Endpoint 0x%x not halted, refusing to reset.",
2899 ep->desc.bEndpointAddress);
2902 if (usb_endpoint_xfer_control(&ep->desc)) {
2903 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2904 "Control endpoint stall already handled.");
2908 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2909 "Queueing reset endpoint command");
2910 spin_lock_irqsave(&xhci->lock, flags);
2911 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2913 * Can't change the ring dequeue pointer until it's transitioned to the
2914 * stopped state, which is only upon a successful reset endpoint
2915 * command. Better hope that last command worked!
2918 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2919 kfree(virt_ep->stopped_td);
2920 xhci_ring_cmd_db(xhci);
2922 virt_ep->stopped_td = NULL;
2923 virt_ep->stopped_trb = NULL;
2924 virt_ep->stopped_stream = 0;
2925 spin_unlock_irqrestore(&xhci->lock, flags);
2928 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2931 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2932 struct usb_device *udev, struct usb_host_endpoint *ep,
2933 unsigned int slot_id)
2936 unsigned int ep_index;
2937 unsigned int ep_state;
2941 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2944 if (ep->ss_ep_comp.bmAttributes == 0) {
2945 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2946 " descriptor for ep 0x%x does not support streams\n",
2947 ep->desc.bEndpointAddress);
2951 ep_index = xhci_get_endpoint_index(&ep->desc);
2952 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2953 if (ep_state & EP_HAS_STREAMS ||
2954 ep_state & EP_GETTING_STREAMS) {
2955 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2956 "already has streams set up.\n",
2957 ep->desc.bEndpointAddress);
2958 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2959 "dynamic stream context array reallocation.\n");
2962 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2963 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2964 "endpoint 0x%x; URBs are pending.\n",
2965 ep->desc.bEndpointAddress);
2971 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2972 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2974 unsigned int max_streams;
2976 /* The stream context array size must be a power of two */
2977 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2979 * Find out how many primary stream array entries the host controller
2980 * supports. Later we may use secondary stream arrays (similar to 2nd
2981 * level page entries), but that's an optional feature for xHCI host
2982 * controllers. xHCs must support at least 4 stream IDs.
2984 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2985 if (*num_stream_ctxs > max_streams) {
2986 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2988 *num_stream_ctxs = max_streams;
2989 *num_streams = max_streams;
2993 /* Returns an error code if one of the endpoint already has streams.
2994 * This does not change any data structures, it only checks and gathers
2997 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2998 struct usb_device *udev,
2999 struct usb_host_endpoint **eps, unsigned int num_eps,
3000 unsigned int *num_streams, u32 *changed_ep_bitmask)
3002 unsigned int max_streams;
3003 unsigned int endpoint_flag;
3007 for (i = 0; i < num_eps; i++) {
3008 ret = xhci_check_streams_endpoint(xhci, udev,
3009 eps[i], udev->slot_id);
3013 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3014 if (max_streams < (*num_streams - 1)) {
3015 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3016 eps[i]->desc.bEndpointAddress,
3018 *num_streams = max_streams+1;
3021 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3022 if (*changed_ep_bitmask & endpoint_flag)
3024 *changed_ep_bitmask |= endpoint_flag;
3029 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3030 struct usb_device *udev,
3031 struct usb_host_endpoint **eps, unsigned int num_eps)
3033 u32 changed_ep_bitmask = 0;
3034 unsigned int slot_id;
3035 unsigned int ep_index;
3036 unsigned int ep_state;
3039 slot_id = udev->slot_id;
3040 if (!xhci->devs[slot_id])
3043 for (i = 0; i < num_eps; i++) {
3044 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3045 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3046 /* Are streams already being freed for the endpoint? */
3047 if (ep_state & EP_GETTING_NO_STREAMS) {
3048 xhci_warn(xhci, "WARN Can't disable streams for "
3050 "streams are being disabled already\n",
3051 eps[i]->desc.bEndpointAddress);
3054 /* Are there actually any streams to free? */
3055 if (!(ep_state & EP_HAS_STREAMS) &&
3056 !(ep_state & EP_GETTING_STREAMS)) {
3057 xhci_warn(xhci, "WARN Can't disable streams for "
3059 "streams are already disabled!\n",
3060 eps[i]->desc.bEndpointAddress);
3061 xhci_warn(xhci, "WARN xhci_free_streams() called "
3062 "with non-streams endpoint\n");
3065 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3067 return changed_ep_bitmask;
3071 * The USB device drivers use this function (though the HCD interface in USB
3072 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3073 * coordinate mass storage command queueing across multiple endpoints (basically
3074 * a stream ID == a task ID).
3076 * Setting up streams involves allocating the same size stream context array
3077 * for each endpoint and issuing a configure endpoint command for all endpoints.
3079 * Don't allow the call to succeed if one endpoint only supports one stream
3080 * (which means it doesn't support streams at all).
3082 * Drivers may get less stream IDs than they asked for, if the host controller
3083 * hardware or endpoints claim they can't support the number of requested
3086 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3087 struct usb_host_endpoint **eps, unsigned int num_eps,
3088 unsigned int num_streams, gfp_t mem_flags)
3091 struct xhci_hcd *xhci;
3092 struct xhci_virt_device *vdev;
3093 struct xhci_command *config_cmd;
3094 struct xhci_input_control_ctx *ctrl_ctx;
3095 unsigned int ep_index;
3096 unsigned int num_stream_ctxs;
3097 unsigned long flags;
3098 u32 changed_ep_bitmask = 0;
3103 /* Add one to the number of streams requested to account for
3104 * stream 0 that is reserved for xHCI usage.
3107 xhci = hcd_to_xhci(hcd);
3108 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3111 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3113 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3116 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3118 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3120 xhci_free_command(xhci, config_cmd);
3124 /* Check to make sure all endpoints are not already configured for
3125 * streams. While we're at it, find the maximum number of streams that
3126 * all the endpoints will support and check for duplicate endpoints.
3128 spin_lock_irqsave(&xhci->lock, flags);
3129 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3130 num_eps, &num_streams, &changed_ep_bitmask);
3132 xhci_free_command(xhci, config_cmd);
3133 spin_unlock_irqrestore(&xhci->lock, flags);
3136 if (num_streams <= 1) {
3137 xhci_warn(xhci, "WARN: endpoints can't handle "
3138 "more than one stream.\n");
3139 xhci_free_command(xhci, config_cmd);
3140 spin_unlock_irqrestore(&xhci->lock, flags);
3143 vdev = xhci->devs[udev->slot_id];
3144 /* Mark each endpoint as being in transition, so
3145 * xhci_urb_enqueue() will reject all URBs.
3147 for (i = 0; i < num_eps; i++) {
3148 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3149 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3151 spin_unlock_irqrestore(&xhci->lock, flags);
3153 /* Setup internal data structures and allocate HW data structures for
3154 * streams (but don't install the HW structures in the input context
3155 * until we're sure all memory allocation succeeded).
3157 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3158 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3159 num_stream_ctxs, num_streams);
3161 for (i = 0; i < num_eps; i++) {
3162 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3163 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3165 num_streams, mem_flags);
3166 if (!vdev->eps[ep_index].stream_info)
3168 /* Set maxPstreams in endpoint context and update deq ptr to
3169 * point to stream context array. FIXME
3173 /* Set up the input context for a configure endpoint command. */
3174 for (i = 0; i < num_eps; i++) {
3175 struct xhci_ep_ctx *ep_ctx;
3177 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3178 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3180 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3181 vdev->out_ctx, ep_index);
3182 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3183 vdev->eps[ep_index].stream_info);
3185 /* Tell the HW to drop its old copy of the endpoint context info
3186 * and add the updated copy from the input context.
3188 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3189 vdev->out_ctx, ctrl_ctx,
3190 changed_ep_bitmask, changed_ep_bitmask);
3192 /* Issue and wait for the configure endpoint command */
3193 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3196 /* xHC rejected the configure endpoint command for some reason, so we
3197 * leave the old ring intact and free our internal streams data
3203 spin_lock_irqsave(&xhci->lock, flags);
3204 for (i = 0; i < num_eps; i++) {
3205 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3206 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3207 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3208 udev->slot_id, ep_index);
3209 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3211 xhci_free_command(xhci, config_cmd);
3212 spin_unlock_irqrestore(&xhci->lock, flags);
3214 /* Subtract 1 for stream 0, which drivers can't use */
3215 return num_streams - 1;
3218 /* If it didn't work, free the streams! */
3219 for (i = 0; i < num_eps; i++) {
3220 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3221 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3222 vdev->eps[ep_index].stream_info = NULL;
3223 /* FIXME Unset maxPstreams in endpoint context and
3224 * update deq ptr to point to normal string ring.
3226 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3227 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3228 xhci_endpoint_zero(xhci, vdev, eps[i]);
3230 xhci_free_command(xhci, config_cmd);
3234 /* Transition the endpoint from using streams to being a "normal" endpoint
3237 * Modify the endpoint context state, submit a configure endpoint command,
3238 * and free all endpoint rings for streams if that completes successfully.
3240 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3241 struct usb_host_endpoint **eps, unsigned int num_eps,
3245 struct xhci_hcd *xhci;
3246 struct xhci_virt_device *vdev;
3247 struct xhci_command *command;
3248 struct xhci_input_control_ctx *ctrl_ctx;
3249 unsigned int ep_index;
3250 unsigned long flags;
3251 u32 changed_ep_bitmask;
3253 xhci = hcd_to_xhci(hcd);
3254 vdev = xhci->devs[udev->slot_id];
3256 /* Set up a configure endpoint command to remove the streams rings */
3257 spin_lock_irqsave(&xhci->lock, flags);
3258 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3259 udev, eps, num_eps);
3260 if (changed_ep_bitmask == 0) {
3261 spin_unlock_irqrestore(&xhci->lock, flags);
3265 /* Use the xhci_command structure from the first endpoint. We may have
3266 * allocated too many, but the driver may call xhci_free_streams() for
3267 * each endpoint it grouped into one call to xhci_alloc_streams().
3269 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3270 command = vdev->eps[ep_index].stream_info->free_streams_command;
3271 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3273 spin_unlock_irqrestore(&xhci->lock, flags);
3274 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3279 for (i = 0; i < num_eps; i++) {
3280 struct xhci_ep_ctx *ep_ctx;
3282 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3283 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3284 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3285 EP_GETTING_NO_STREAMS;
3287 xhci_endpoint_copy(xhci, command->in_ctx,
3288 vdev->out_ctx, ep_index);
3289 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3290 &vdev->eps[ep_index]);
3292 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3293 vdev->out_ctx, ctrl_ctx,
3294 changed_ep_bitmask, changed_ep_bitmask);
3295 spin_unlock_irqrestore(&xhci->lock, flags);
3297 /* Issue and wait for the configure endpoint command,
3298 * which must succeed.
3300 ret = xhci_configure_endpoint(xhci, udev, command,
3303 /* xHC rejected the configure endpoint command for some reason, so we
3304 * leave the streams rings intact.
3309 spin_lock_irqsave(&xhci->lock, flags);
3310 for (i = 0; i < num_eps; i++) {
3311 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3312 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3313 vdev->eps[ep_index].stream_info = NULL;
3314 /* FIXME Unset maxPstreams in endpoint context and
3315 * update deq ptr to point to normal string ring.
3317 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3318 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3320 spin_unlock_irqrestore(&xhci->lock, flags);
3326 * Deletes endpoint resources for endpoints that were active before a Reset
3327 * Device command, or a Disable Slot command. The Reset Device command leaves
3328 * the control endpoint intact, whereas the Disable Slot command deletes it.
3330 * Must be called with xhci->lock held.
3332 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3333 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3336 unsigned int num_dropped_eps = 0;
3337 unsigned int drop_flags = 0;
3339 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3340 if (virt_dev->eps[i].ring) {
3341 drop_flags |= 1 << i;
3345 xhci->num_active_eps -= num_dropped_eps;
3346 if (num_dropped_eps)
3347 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3348 "Dropped %u ep ctxs, flags = 0x%x, "
3350 num_dropped_eps, drop_flags,
3351 xhci->num_active_eps);
3355 * This submits a Reset Device Command, which will set the device state to 0,
3356 * set the device address to 0, and disable all the endpoints except the default
3357 * control endpoint. The USB core should come back and call
3358 * xhci_address_device(), and then re-set up the configuration. If this is
3359 * called because of a usb_reset_and_verify_device(), then the old alternate
3360 * settings will be re-installed through the normal bandwidth allocation
3363 * Wait for the Reset Device command to finish. Remove all structures
3364 * associated with the endpoints that were disabled. Clear the input device
3365 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3367 * If the virt_dev to be reset does not exist or does not match the udev,
3368 * it means the device is lost, possibly due to the xHC restore error and
3369 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3370 * re-allocate the device.
3372 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3375 unsigned long flags;
3376 struct xhci_hcd *xhci;
3377 unsigned int slot_id;
3378 struct xhci_virt_device *virt_dev;
3379 struct xhci_command *reset_device_cmd;
3381 int last_freed_endpoint;
3382 struct xhci_slot_ctx *slot_ctx;
3383 int old_active_eps = 0;
3385 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3388 xhci = hcd_to_xhci(hcd);
3389 slot_id = udev->slot_id;
3390 virt_dev = xhci->devs[slot_id];
3392 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3393 "not exist. Re-allocate the device\n", slot_id);
3394 ret = xhci_alloc_dev(hcd, udev);
3401 if (virt_dev->udev != udev) {
3402 /* If the virt_dev and the udev does not match, this virt_dev
3403 * may belong to another udev.
3404 * Re-allocate the device.
3406 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3407 "not match the udev. Re-allocate the device\n",
3409 ret = xhci_alloc_dev(hcd, udev);
3416 /* If device is not setup, there is no point in resetting it */
3417 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3418 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3419 SLOT_STATE_DISABLED)
3422 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3423 /* Allocate the command structure that holds the struct completion.
3424 * Assume we're in process context, since the normal device reset
3425 * process has to wait for the device anyway. Storage devices are
3426 * reset as part of error handling, so use GFP_NOIO instead of
3429 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3430 if (!reset_device_cmd) {
3431 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3435 /* Attempt to submit the Reset Device command to the command ring */
3436 spin_lock_irqsave(&xhci->lock, flags);
3437 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3439 /* Enqueue pointer can be left pointing to the link TRB,
3440 * we must handle that
3442 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3443 reset_device_cmd->command_trb =
3444 xhci->cmd_ring->enq_seg->next->trbs;
3446 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3447 ret = xhci_queue_reset_device(xhci, slot_id);
3449 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3450 list_del(&reset_device_cmd->cmd_list);
3451 spin_unlock_irqrestore(&xhci->lock, flags);
3452 goto command_cleanup;
3454 xhci_ring_cmd_db(xhci);
3455 spin_unlock_irqrestore(&xhci->lock, flags);
3457 /* Wait for the Reset Device command to finish */
3458 timeleft = wait_for_completion_interruptible_timeout(
3459 reset_device_cmd->completion,
3460 USB_CTRL_SET_TIMEOUT);
3461 if (timeleft <= 0) {
3462 xhci_warn(xhci, "%s while waiting for reset device command\n",
3463 timeleft == 0 ? "Timeout" : "Signal");
3464 spin_lock_irqsave(&xhci->lock, flags);
3465 /* The timeout might have raced with the event ring handler, so
3466 * only delete from the list if the item isn't poisoned.
3468 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3469 list_del(&reset_device_cmd->cmd_list);
3470 spin_unlock_irqrestore(&xhci->lock, flags);
3472 goto command_cleanup;
3475 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3476 * unless we tried to reset a slot ID that wasn't enabled,
3477 * or the device wasn't in the addressed or configured state.
3479 ret = reset_device_cmd->status;
3481 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3482 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3483 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3485 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3486 xhci_dbg(xhci, "Not freeing device rings.\n");
3487 /* Don't treat this as an error. May change my mind later. */
3489 goto command_cleanup;
3491 xhci_dbg(xhci, "Successful reset device command.\n");
3494 if (xhci_is_vendor_info_code(xhci, ret))
3496 xhci_warn(xhci, "Unknown completion code %u for "
3497 "reset device command.\n", ret);
3499 goto command_cleanup;
3502 /* Free up host controller endpoint resources */
3503 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3504 spin_lock_irqsave(&xhci->lock, flags);
3505 /* Don't delete the default control endpoint resources */
3506 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3507 spin_unlock_irqrestore(&xhci->lock, flags);
3510 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3511 last_freed_endpoint = 1;
3512 for (i = 1; i < 31; ++i) {
3513 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3515 if (ep->ep_state & EP_HAS_STREAMS) {
3516 xhci_free_stream_info(xhci, ep->stream_info);
3517 ep->stream_info = NULL;
3518 ep->ep_state &= ~EP_HAS_STREAMS;
3522 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3523 last_freed_endpoint = i;
3525 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3526 xhci_drop_ep_from_interval_table(xhci,
3527 &virt_dev->eps[i].bw_info,
3532 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3534 /* If necessary, update the number of active TTs on this root port */
3535 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3537 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3538 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3542 xhci_free_command(xhci, reset_device_cmd);
3547 * At this point, the struct usb_device is about to go away, the device has
3548 * disconnected, and all traffic has been stopped and the endpoints have been
3549 * disabled. Free any HC data structures associated with that device.
3551 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3553 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3554 struct xhci_virt_device *virt_dev;
3555 unsigned long flags;
3559 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3560 /* If the host is halted due to driver unload, we still need to free the
3563 if (ret <= 0 && ret != -ENODEV)
3566 virt_dev = xhci->devs[udev->slot_id];
3568 /* Stop any wayward timer functions (which may grab the lock) */
3569 for (i = 0; i < 31; ++i) {
3570 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3571 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3574 if (udev->usb2_hw_lpm_enabled) {
3575 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3576 udev->usb2_hw_lpm_enabled = 0;
3579 spin_lock_irqsave(&xhci->lock, flags);
3580 /* Don't disable the slot if the host controller is dead. */
3581 state = xhci_readl(xhci, &xhci->op_regs->status);
3582 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3583 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3584 xhci_free_virt_device(xhci, udev->slot_id);
3585 spin_unlock_irqrestore(&xhci->lock, flags);
3589 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3590 spin_unlock_irqrestore(&xhci->lock, flags);
3591 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3594 xhci_ring_cmd_db(xhci);
3595 spin_unlock_irqrestore(&xhci->lock, flags);
3597 * Event command completion handler will free any data structures
3598 * associated with the slot. XXX Can free sleep?
3603 * Checks if we have enough host controller resources for the default control
3606 * Must be called with xhci->lock held.
3608 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3610 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3611 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3612 "Not enough ep ctxs: "
3613 "%u active, need to add 1, limit is %u.",
3614 xhci->num_active_eps, xhci->limit_active_eps);
3617 xhci->num_active_eps += 1;
3618 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3619 "Adding 1 ep ctx, %u now active.",
3620 xhci->num_active_eps);
3626 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3627 * timed out, or allocating memory failed. Returns 1 on success.
3629 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3631 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3632 unsigned long flags;
3635 union xhci_trb *cmd_trb;
3637 spin_lock_irqsave(&xhci->lock, flags);
3638 cmd_trb = xhci->cmd_ring->dequeue;
3639 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3641 spin_unlock_irqrestore(&xhci->lock, flags);
3642 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3645 xhci_ring_cmd_db(xhci);
3646 spin_unlock_irqrestore(&xhci->lock, flags);
3648 /* XXX: how much time for xHC slot assignment? */
3649 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3650 XHCI_CMD_DEFAULT_TIMEOUT);
3651 if (timeleft <= 0) {
3652 xhci_warn(xhci, "%s while waiting for a slot\n",
3653 timeleft == 0 ? "Timeout" : "Signal");
3654 /* cancel the enable slot request */
3655 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3658 if (!xhci->slot_id) {
3659 xhci_err(xhci, "Error while assigning device slot ID\n");
3663 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3664 spin_lock_irqsave(&xhci->lock, flags);
3665 ret = xhci_reserve_host_control_ep_resources(xhci);
3667 spin_unlock_irqrestore(&xhci->lock, flags);
3668 xhci_warn(xhci, "Not enough host resources, "
3669 "active endpoint contexts = %u\n",
3670 xhci->num_active_eps);
3673 spin_unlock_irqrestore(&xhci->lock, flags);
3675 /* Use GFP_NOIO, since this function can be called from
3676 * xhci_discover_or_reset_device(), which may be called as part of
3677 * mass storage driver error handling.
3679 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3680 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3683 udev->slot_id = xhci->slot_id;
3684 /* Is this a LS or FS device under a HS hub? */
3685 /* Hub or peripherial? */
3689 /* Disable slot, if we can do it without mem alloc */
3690 spin_lock_irqsave(&xhci->lock, flags);
3691 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3692 xhci_ring_cmd_db(xhci);
3693 spin_unlock_irqrestore(&xhci->lock, flags);
3698 * Issue an Address Device command (which will issue a SetAddress request to
3700 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3701 * we should only issue and wait on one address command at the same time.
3703 * We add one to the device address issued by the hardware because the USB core
3704 * uses address 1 for the root hubs (even though they're not really devices).
3706 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3708 unsigned long flags;
3710 struct xhci_virt_device *virt_dev;
3712 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3713 struct xhci_slot_ctx *slot_ctx;
3714 struct xhci_input_control_ctx *ctrl_ctx;
3716 union xhci_trb *cmd_trb;
3718 if (!udev->slot_id) {
3719 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3720 "Bad Slot ID %d", udev->slot_id);
3724 virt_dev = xhci->devs[udev->slot_id];
3726 if (WARN_ON(!virt_dev)) {
3728 * In plug/unplug torture test with an NEC controller,
3729 * a zero-dereference was observed once due to virt_dev = 0.
3730 * Print useful debug rather than crash if it is observed again!
3732 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3737 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3738 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3740 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3745 * If this is the first Set Address since device plug-in or
3746 * virt_device realloaction after a resume with an xHCI power loss,
3747 * then set up the slot context.
3749 if (!slot_ctx->dev_info)
3750 xhci_setup_addressable_virt_dev(xhci, udev);
3751 /* Otherwise, update the control endpoint ring enqueue pointer. */
3753 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3754 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3755 ctrl_ctx->drop_flags = 0;
3757 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3758 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3759 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3760 slot_ctx->dev_info >> 27);
3762 spin_lock_irqsave(&xhci->lock, flags);
3763 cmd_trb = xhci->cmd_ring->dequeue;
3764 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3767 spin_unlock_irqrestore(&xhci->lock, flags);
3768 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3769 "FIXME: allocate a command ring segment");
3772 xhci_ring_cmd_db(xhci);
3773 spin_unlock_irqrestore(&xhci->lock, flags);
3775 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3776 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3777 XHCI_CMD_DEFAULT_TIMEOUT);
3778 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3779 * the SetAddress() "recovery interval" required by USB and aborting the
3780 * command on a timeout.
3782 if (timeleft <= 0) {
3783 xhci_warn(xhci, "%s while waiting for address device command\n",
3784 timeleft == 0 ? "Timeout" : "Signal");
3785 /* cancel the address device command */
3786 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3792 switch (virt_dev->cmd_status) {
3793 case COMP_CTX_STATE:
3795 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3800 dev_warn(&udev->dev, "Device not responding to set address.\n");
3804 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3805 "device command.\n");
3809 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3810 "Successful Address Device command");
3813 xhci_err(xhci, "ERROR: unexpected command completion "
3814 "code 0x%x.\n", virt_dev->cmd_status);
3815 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3816 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3817 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3824 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3825 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3826 "Op regs DCBAA ptr = %#016llx", temp_64);
3827 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3828 "Slot ID %d dcbaa entry @%p = %#016llx",
3830 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3831 (unsigned long long)
3832 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3833 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3834 "Output Context DMA address = %#08llx",
3835 (unsigned long long)virt_dev->out_ctx->dma);
3836 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3837 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3838 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3839 slot_ctx->dev_info >> 27);
3840 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3841 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3843 * USB core uses address 1 for the roothubs, so we add one to the
3844 * address given back to us by the HC.
3846 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3847 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3848 slot_ctx->dev_info >> 27);
3849 /* Use kernel assigned address for devices; store xHC assigned
3850 * address locally. */
3851 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3853 /* Zero the input context control for later use */
3854 ctrl_ctx->add_flags = 0;
3855 ctrl_ctx->drop_flags = 0;
3857 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3858 "Internal device address = %d", virt_dev->address);
3864 * Transfer the port index into real index in the HW port status
3865 * registers. Caculate offset between the port's PORTSC register
3866 * and port status base. Divide the number of per port register
3867 * to get the real index. The raw port number bases 1.
3869 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3871 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3872 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3873 __le32 __iomem *addr;
3876 if (hcd->speed != HCD_USB3)
3877 addr = xhci->usb2_ports[port1 - 1];
3879 addr = xhci->usb3_ports[port1 - 1];
3881 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3886 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3887 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3889 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3890 struct usb_device *udev, u16 max_exit_latency)
3892 struct xhci_virt_device *virt_dev;
3893 struct xhci_command *command;
3894 struct xhci_input_control_ctx *ctrl_ctx;
3895 struct xhci_slot_ctx *slot_ctx;
3896 unsigned long flags;
3899 spin_lock_irqsave(&xhci->lock, flags);
3900 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3901 spin_unlock_irqrestore(&xhci->lock, flags);
3905 /* Attempt to issue an Evaluate Context command to change the MEL. */
3906 virt_dev = xhci->devs[udev->slot_id];
3907 command = xhci->lpm_command;
3908 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3910 spin_unlock_irqrestore(&xhci->lock, flags);
3911 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3916 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3917 spin_unlock_irqrestore(&xhci->lock, flags);
3919 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3920 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3921 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3922 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3924 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3925 "Set up evaluate context for LPM MEL change.");
3926 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3927 xhci_dbg_ctx(xhci, command->in_ctx, 0);
3929 /* Issue and wait for the evaluate context command. */
3930 ret = xhci_configure_endpoint(xhci, udev, command,
3932 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3933 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3936 spin_lock_irqsave(&xhci->lock, flags);
3937 virt_dev->current_mel = max_exit_latency;
3938 spin_unlock_irqrestore(&xhci->lock, flags);
3943 #ifdef CONFIG_PM_RUNTIME
3945 /* BESL to HIRD Encoding array for USB2 LPM */
3946 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3947 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3949 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3950 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3951 struct usb_device *udev)
3953 int u2del, besl, besl_host;
3954 int besl_device = 0;
3957 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3958 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3960 if (field & USB_BESL_SUPPORT) {
3961 for (besl_host = 0; besl_host < 16; besl_host++) {
3962 if (xhci_besl_encoding[besl_host] >= u2del)
3965 /* Use baseline BESL value as default */
3966 if (field & USB_BESL_BASELINE_VALID)
3967 besl_device = USB_GET_BESL_BASELINE(field);
3968 else if (field & USB_BESL_DEEP_VALID)
3969 besl_device = USB_GET_BESL_DEEP(field);
3974 besl_host = (u2del - 51) / 75 + 1;
3977 besl = besl_host + besl_device;
3984 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3985 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
3992 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3994 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
3995 l1 = udev->l1_params.timeout / 256;
3997 /* device has preferred BESLD */
3998 if (field & USB_BESL_DEEP_VALID) {
3999 besld = USB_GET_BESL_DEEP(field);
4003 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4006 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
4007 struct usb_device *udev)
4009 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4010 struct dev_info *dev_info;
4011 __le32 __iomem **port_array;
4012 __le32 __iomem *addr, *pm_addr;
4014 unsigned int port_num;
4015 unsigned long flags;
4019 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4023 /* we only support lpm for non-hub device connected to root hub yet */
4024 if (!udev->parent || udev->parent->parent ||
4025 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4028 spin_lock_irqsave(&xhci->lock, flags);
4030 /* Look for devices in lpm_failed_devs list */
4031 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
4032 le16_to_cpu(udev->descriptor.idProduct);
4033 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
4034 if (dev_info->dev_id == dev_id) {
4040 port_array = xhci->usb2_ports;
4041 port_num = udev->portnum - 1;
4043 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
4044 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
4050 * Test USB 2.0 software LPM.
4051 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4052 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4053 * in the June 2011 errata release.
4055 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
4057 * Set L1 Device Slot and HIRD/BESL.
4058 * Check device's USB 2.0 extension descriptor to determine whether
4059 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4061 pm_addr = port_array[port_num] + PORTPMSC;
4062 hird = xhci_calculate_hird_besl(xhci, udev);
4063 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
4064 xhci_writel(xhci, temp, pm_addr);
4066 /* Set port link state to U2(L1) */
4067 addr = port_array[port_num];
4068 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
4071 spin_unlock_irqrestore(&xhci->lock, flags);
4073 spin_lock_irqsave(&xhci->lock, flags);
4075 /* Check L1 Status */
4076 ret = xhci_handshake(xhci, pm_addr,
4077 PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
4078 if (ret != -ETIMEDOUT) {
4079 /* enter L1 successfully */
4080 temp = xhci_readl(xhci, addr);
4081 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
4085 temp = xhci_readl(xhci, pm_addr);
4086 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
4087 port_num, temp & PORT_L1S_MASK);
4091 /* Resume the port */
4092 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
4094 spin_unlock_irqrestore(&xhci->lock, flags);
4096 spin_lock_irqsave(&xhci->lock, flags);
4099 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
4101 /* Check PORTSC to make sure the device is in the right state */
4103 temp = xhci_readl(xhci, addr);
4104 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
4105 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
4106 (temp & PORT_PLS_MASK) != XDEV_U0) {
4107 xhci_dbg(xhci, "port L1 resume fail\n");
4113 /* Insert dev to lpm_failed_devs list */
4114 xhci_warn(xhci, "device LPM test failed, may disconnect and "
4116 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4121 dev_info->dev_id = dev_id;
4122 INIT_LIST_HEAD(&dev_info->list);
4123 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4125 xhci_ring_device(xhci, udev->slot_id);
4129 spin_unlock_irqrestore(&xhci->lock, flags);
4133 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4134 struct usb_device *udev, int enable)
4136 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4137 __le32 __iomem **port_array;
4138 __le32 __iomem *pm_addr, *hlpm_addr;
4139 u32 pm_val, hlpm_val, field;
4140 unsigned int port_num;
4141 unsigned long flags;
4142 int hird, exit_latency;
4145 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4149 if (!udev->parent || udev->parent->parent ||
4150 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4153 if (udev->usb2_hw_lpm_capable != 1)
4156 spin_lock_irqsave(&xhci->lock, flags);
4158 port_array = xhci->usb2_ports;
4159 port_num = udev->portnum - 1;
4160 pm_addr = port_array[port_num] + PORTPMSC;
4161 pm_val = xhci_readl(xhci, pm_addr);
4162 hlpm_addr = port_array[port_num] + PORTHLPMC;
4163 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4165 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4166 enable ? "enable" : "disable", port_num);
4169 /* Host supports BESL timeout instead of HIRD */
4170 if (udev->usb2_hw_lpm_besl_capable) {
4171 /* if device doesn't have a preferred BESL value use a
4172 * default one which works with mixed HIRD and BESL
4173 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4175 if ((field & USB_BESL_SUPPORT) &&
4176 (field & USB_BESL_BASELINE_VALID))
4177 hird = USB_GET_BESL_BASELINE(field);
4179 hird = udev->l1_params.besl;
4181 exit_latency = xhci_besl_encoding[hird];
4182 spin_unlock_irqrestore(&xhci->lock, flags);
4184 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4185 * input context for link powermanagement evaluate
4186 * context commands. It is protected by hcd->bandwidth
4187 * mutex and is shared by all devices. We need to set
4188 * the max ext latency in USB 2 BESL LPM as well, so
4189 * use the same mutex and xhci_change_max_exit_latency()
4191 mutex_lock(hcd->bandwidth_mutex);
4192 ret = xhci_change_max_exit_latency(xhci, udev,
4194 mutex_unlock(hcd->bandwidth_mutex);
4198 spin_lock_irqsave(&xhci->lock, flags);
4200 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4201 xhci_writel(xhci, hlpm_val, hlpm_addr);
4203 xhci_readl(xhci, hlpm_addr);
4205 hird = xhci_calculate_hird_besl(xhci, udev);
4208 pm_val &= ~PORT_HIRD_MASK;
4209 pm_val |= PORT_HIRD(hird) | PORT_RWE;
4210 xhci_writel(xhci, pm_val, pm_addr);
4211 pm_val = xhci_readl(xhci, pm_addr);
4213 xhci_writel(xhci, pm_val, pm_addr);
4215 xhci_readl(xhci, pm_addr);
4217 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4218 xhci_writel(xhci, pm_val, pm_addr);
4220 xhci_readl(xhci, pm_addr);
4221 if (udev->usb2_hw_lpm_besl_capable) {
4222 spin_unlock_irqrestore(&xhci->lock, flags);
4223 mutex_lock(hcd->bandwidth_mutex);
4224 xhci_change_max_exit_latency(xhci, udev, 0);
4225 mutex_unlock(hcd->bandwidth_mutex);
4230 spin_unlock_irqrestore(&xhci->lock, flags);
4234 /* check if a usb2 port supports a given extened capability protocol
4235 * only USB2 ports extended protocol capability values are cached.
4236 * Return 1 if capability is supported
4238 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4239 unsigned capability)
4241 u32 port_offset, port_count;
4244 for (i = 0; i < xhci->num_ext_caps; i++) {
4245 if (xhci->ext_caps[i] & capability) {
4246 /* port offsets starts at 1 */
4247 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4248 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4249 if (port >= port_offset &&
4250 port < port_offset + port_count)
4257 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4259 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4261 int portnum = udev->portnum - 1;
4263 ret = xhci_usb2_software_lpm_test(hcd, udev);
4265 xhci_dbg(xhci, "software LPM test succeed\n");
4266 if (xhci->hw_lpm_support == 1 &&
4267 xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
4268 udev->usb2_hw_lpm_capable = 1;
4269 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4270 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4271 if (xhci_check_usb2_port_capability(xhci, portnum,
4273 udev->usb2_hw_lpm_besl_capable = 1;
4274 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4276 udev->usb2_hw_lpm_enabled = 1;
4285 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4286 struct usb_device *udev, int enable)
4291 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4296 #endif /* CONFIG_PM_RUNTIME */
4298 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4301 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4302 static unsigned long long xhci_service_interval_to_ns(
4303 struct usb_endpoint_descriptor *desc)
4305 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4308 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4309 enum usb3_link_state state)
4311 unsigned long long sel;
4312 unsigned long long pel;
4313 unsigned int max_sel_pel;
4318 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4319 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4320 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4321 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4325 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4326 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4327 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4331 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4333 return USB3_LPM_DISABLED;
4336 if (sel <= max_sel_pel && pel <= max_sel_pel)
4337 return USB3_LPM_DEVICE_INITIATED;
4339 if (sel > max_sel_pel)
4340 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4341 "due to long SEL %llu ms\n",
4344 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4345 "due to long PEL %llu ms\n",
4347 return USB3_LPM_DISABLED;
4350 /* Returns the hub-encoded U1 timeout value.
4351 * The U1 timeout should be the maximum of the following values:
4352 * - For control endpoints, U1 system exit latency (SEL) * 3
4353 * - For bulk endpoints, U1 SEL * 5
4354 * - For interrupt endpoints:
4355 * - Notification EPs, U1 SEL * 3
4356 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4357 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4359 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4360 struct usb_endpoint_descriptor *desc)
4362 unsigned long long timeout_ns;
4366 ep_type = usb_endpoint_type(desc);
4368 case USB_ENDPOINT_XFER_CONTROL:
4369 timeout_ns = udev->u1_params.sel * 3;
4371 case USB_ENDPOINT_XFER_BULK:
4372 timeout_ns = udev->u1_params.sel * 5;
4374 case USB_ENDPOINT_XFER_INT:
4375 intr_type = usb_endpoint_interrupt_type(desc);
4376 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4377 timeout_ns = udev->u1_params.sel * 3;
4380 /* Otherwise the calculation is the same as isoc eps */
4381 case USB_ENDPOINT_XFER_ISOC:
4382 timeout_ns = xhci_service_interval_to_ns(desc);
4383 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4384 if (timeout_ns < udev->u1_params.sel * 2)
4385 timeout_ns = udev->u1_params.sel * 2;
4391 /* The U1 timeout is encoded in 1us intervals. */
4392 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4393 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4394 if (timeout_ns == USB3_LPM_DISABLED)
4397 /* If the necessary timeout value is bigger than what we can set in the
4398 * USB 3.0 hub, we have to disable hub-initiated U1.
4400 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4402 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4403 "due to long timeout %llu ms\n", timeout_ns);
4404 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4407 /* Returns the hub-encoded U2 timeout value.
4408 * The U2 timeout should be the maximum of:
4409 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4410 * - largest bInterval of any active periodic endpoint (to avoid going
4411 * into lower power link states between intervals).
4412 * - the U2 Exit Latency of the device
4414 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4415 struct usb_endpoint_descriptor *desc)
4417 unsigned long long timeout_ns;
4418 unsigned long long u2_del_ns;
4420 timeout_ns = 10 * 1000 * 1000;
4422 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4423 (xhci_service_interval_to_ns(desc) > timeout_ns))
4424 timeout_ns = xhci_service_interval_to_ns(desc);
4426 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4427 if (u2_del_ns > timeout_ns)
4428 timeout_ns = u2_del_ns;
4430 /* The U2 timeout is encoded in 256us intervals */
4431 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4432 /* If the necessary timeout value is bigger than what we can set in the
4433 * USB 3.0 hub, we have to disable hub-initiated U2.
4435 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4437 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4438 "due to long timeout %llu ms\n", timeout_ns);
4439 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4442 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4443 struct usb_device *udev,
4444 struct usb_endpoint_descriptor *desc,
4445 enum usb3_link_state state,
4448 if (state == USB3_LPM_U1) {
4449 if (xhci->quirks & XHCI_INTEL_HOST)
4450 return xhci_calculate_intel_u1_timeout(udev, desc);
4452 if (xhci->quirks & XHCI_INTEL_HOST)
4453 return xhci_calculate_intel_u2_timeout(udev, desc);
4456 return USB3_LPM_DISABLED;
4459 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4460 struct usb_device *udev,
4461 struct usb_endpoint_descriptor *desc,
4462 enum usb3_link_state state,
4467 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4468 desc, state, timeout);
4470 /* If we found we can't enable hub-initiated LPM, or
4471 * the U1 or U2 exit latency was too high to allow
4472 * device-initiated LPM as well, just stop searching.
4474 if (alt_timeout == USB3_LPM_DISABLED ||
4475 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4476 *timeout = alt_timeout;
4479 if (alt_timeout > *timeout)
4480 *timeout = alt_timeout;
4484 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4485 struct usb_device *udev,
4486 struct usb_host_interface *alt,
4487 enum usb3_link_state state,
4492 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4493 if (xhci_update_timeout_for_endpoint(xhci, udev,
4494 &alt->endpoint[j].desc, state, timeout))
4501 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4502 enum usb3_link_state state)
4504 struct usb_device *parent;
4505 unsigned int num_hubs;
4507 if (state == USB3_LPM_U2)
4510 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4511 for (parent = udev->parent, num_hubs = 0; parent->parent;
4512 parent = parent->parent)
4518 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4519 " below second-tier hub.\n");
4520 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4521 "to decrease power consumption.\n");
4525 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4526 struct usb_device *udev,
4527 enum usb3_link_state state)
4529 if (xhci->quirks & XHCI_INTEL_HOST)
4530 return xhci_check_intel_tier_policy(udev, state);
4534 /* Returns the U1 or U2 timeout that should be enabled.
4535 * If the tier check or timeout setting functions return with a non-zero exit
4536 * code, that means the timeout value has been finalized and we shouldn't look
4537 * at any more endpoints.
4539 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4540 struct usb_device *udev, enum usb3_link_state state)
4542 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4543 struct usb_host_config *config;
4546 u16 timeout = USB3_LPM_DISABLED;
4548 if (state == USB3_LPM_U1)
4550 else if (state == USB3_LPM_U2)
4553 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4558 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4561 /* Gather some information about the currently installed configuration
4562 * and alternate interface settings.
4564 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4568 config = udev->actconfig;
4572 for (i = 0; i < USB_MAXINTERFACES; i++) {
4573 struct usb_driver *driver;
4574 struct usb_interface *intf = config->interface[i];
4579 /* Check if any currently bound drivers want hub-initiated LPM
4582 if (intf->dev.driver) {
4583 driver = to_usb_driver(intf->dev.driver);
4584 if (driver && driver->disable_hub_initiated_lpm) {
4585 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4586 "at request of driver %s\n",
4587 state_name, driver->name);
4588 return xhci_get_timeout_no_hub_lpm(udev, state);
4592 /* Not sure how this could happen... */
4593 if (!intf->cur_altsetting)
4596 if (xhci_update_timeout_for_interface(xhci, udev,
4597 intf->cur_altsetting,
4604 static int calculate_max_exit_latency(struct usb_device *udev,
4605 enum usb3_link_state state_changed,
4606 u16 hub_encoded_timeout)
4608 unsigned long long u1_mel_us = 0;
4609 unsigned long long u2_mel_us = 0;
4610 unsigned long long mel_us = 0;
4616 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4617 hub_encoded_timeout == USB3_LPM_DISABLED);
4618 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4619 hub_encoded_timeout == USB3_LPM_DISABLED);
4621 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4622 hub_encoded_timeout != USB3_LPM_DISABLED);
4623 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4624 hub_encoded_timeout != USB3_LPM_DISABLED);
4626 /* If U1 was already enabled and we're not disabling it,
4627 * or we're going to enable U1, account for the U1 max exit latency.
4629 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4631 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4632 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4634 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4636 if (u1_mel_us > u2_mel_us)
4640 /* xHCI host controller max exit latency field is only 16 bits wide. */
4641 if (mel_us > MAX_EXIT) {
4642 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4643 "is too big.\n", mel_us);
4649 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4650 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4651 struct usb_device *udev, enum usb3_link_state state)
4653 struct xhci_hcd *xhci;
4654 u16 hub_encoded_timeout;
4658 xhci = hcd_to_xhci(hcd);
4659 /* The LPM timeout values are pretty host-controller specific, so don't
4660 * enable hub-initiated timeouts unless the vendor has provided
4661 * information about their timeout algorithm.
4663 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4664 !xhci->devs[udev->slot_id])
4665 return USB3_LPM_DISABLED;
4667 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4668 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4670 /* Max Exit Latency is too big, disable LPM. */
4671 hub_encoded_timeout = USB3_LPM_DISABLED;
4675 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4678 return hub_encoded_timeout;
4681 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4682 struct usb_device *udev, enum usb3_link_state state)
4684 struct xhci_hcd *xhci;
4688 xhci = hcd_to_xhci(hcd);
4689 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4690 !xhci->devs[udev->slot_id])
4693 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4694 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4699 #else /* CONFIG_PM */
4701 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4702 struct usb_device *udev, enum usb3_link_state state)
4704 return USB3_LPM_DISABLED;
4707 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4708 struct usb_device *udev, enum usb3_link_state state)
4712 #endif /* CONFIG_PM */
4714 /*-------------------------------------------------------------------------*/
4716 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4717 * internal data structures for the device.
4719 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4720 struct usb_tt *tt, gfp_t mem_flags)
4722 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4723 struct xhci_virt_device *vdev;
4724 struct xhci_command *config_cmd;
4725 struct xhci_input_control_ctx *ctrl_ctx;
4726 struct xhci_slot_ctx *slot_ctx;
4727 unsigned long flags;
4728 unsigned think_time;
4731 /* Ignore root hubs */
4735 vdev = xhci->devs[hdev->slot_id];
4737 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4740 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4742 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4745 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4747 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4749 xhci_free_command(xhci, config_cmd);
4753 spin_lock_irqsave(&xhci->lock, flags);
4754 if (hdev->speed == USB_SPEED_HIGH &&
4755 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4756 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4757 xhci_free_command(xhci, config_cmd);
4758 spin_unlock_irqrestore(&xhci->lock, flags);
4762 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4763 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4764 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4765 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4767 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4768 if (xhci->hci_version > 0x95) {
4769 xhci_dbg(xhci, "xHCI version %x needs hub "
4770 "TT think time and number of ports\n",
4771 (unsigned int) xhci->hci_version);
4772 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4773 /* Set TT think time - convert from ns to FS bit times.
4774 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4775 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4777 * xHCI 1.0: this field shall be 0 if the device is not a
4780 think_time = tt->think_time;
4781 if (think_time != 0)
4782 think_time = (think_time / 666) - 1;
4783 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4784 slot_ctx->tt_info |=
4785 cpu_to_le32(TT_THINK_TIME(think_time));
4787 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4788 "TT think time or number of ports\n",
4789 (unsigned int) xhci->hci_version);
4791 slot_ctx->dev_state = 0;
4792 spin_unlock_irqrestore(&xhci->lock, flags);
4794 xhci_dbg(xhci, "Set up %s for hub device.\n",
4795 (xhci->hci_version > 0x95) ?
4796 "configure endpoint" : "evaluate context");
4797 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4798 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4800 /* Issue and wait for the configure endpoint or
4801 * evaluate context command.
4803 if (xhci->hci_version > 0x95)
4804 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4807 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4810 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4811 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4813 xhci_free_command(xhci, config_cmd);
4817 int xhci_get_frame(struct usb_hcd *hcd)
4819 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4820 /* EHCI mods by the periodic size. Why? */
4821 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4824 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4826 struct xhci_hcd *xhci;
4827 struct device *dev = hcd->self.controller;
4830 /* Accept arbitrarily long scatter-gather lists */
4831 hcd->self.sg_tablesize = ~0;
4833 /* support to build packet from discontinuous buffers */
4834 hcd->self.no_sg_constraint = 1;
4836 /* XHCI controllers don't stop the ep queue on short packets :| */
4837 hcd->self.no_stop_on_short = 1;
4839 if (usb_hcd_is_primary_hcd(hcd)) {
4840 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4843 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4844 xhci->main_hcd = hcd;
4845 /* Mark the first roothub as being USB 2.0.
4846 * The xHCI driver will register the USB 3.0 roothub.
4848 hcd->speed = HCD_USB2;
4849 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4851 * USB 2.0 roothub under xHCI has an integrated TT,
4852 * (rate matching hub) as opposed to having an OHCI/UHCI
4853 * companion controller.
4857 /* xHCI private pointer was set in xhci_pci_probe for the second
4858 * registered roothub.
4863 xhci->cap_regs = hcd->regs;
4864 xhci->op_regs = hcd->regs +
4865 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4866 xhci->run_regs = hcd->regs +
4867 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4868 /* Cache read-only capability registers */
4869 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4870 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4871 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4872 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4873 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4874 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4875 xhci_print_registers(xhci);
4877 get_quirks(dev, xhci);
4879 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4880 * success event after a short transfer. This quirk will ignore such
4883 if (xhci->hci_version > 0x96)
4884 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4886 /* Make sure the HC is halted. */
4887 retval = xhci_halt(xhci);
4891 xhci_dbg(xhci, "Resetting HCD\n");
4892 /* Reset the internal HC memory state and registers. */
4893 retval = xhci_reset(xhci);
4896 xhci_dbg(xhci, "Reset complete\n");
4898 /* Set dma_mask and coherent_dma_mask to 64-bits,
4899 * if xHC supports 64-bit addressing */
4900 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4901 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4902 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4903 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4906 xhci_dbg(xhci, "Calling HCD init\n");
4907 /* Initialize HCD and host controller data structures. */
4908 retval = xhci_init(hcd);
4911 xhci_dbg(xhci, "Called HCD init\n");
4918 MODULE_DESCRIPTION(DRIVER_DESC);
4919 MODULE_AUTHOR(DRIVER_AUTHOR);
4920 MODULE_LICENSE("GPL");
4922 static int __init xhci_hcd_init(void)
4926 retval = xhci_register_pci();
4928 pr_debug("Problem registering PCI driver.\n");
4931 retval = xhci_register_plat();
4933 pr_debug("Problem registering platform driver.\n");
4937 * Check the compiler generated sizes of structures that must be laid
4938 * out in specific ways for hardware access.
4940 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4941 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4942 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4943 /* xhci_device_control has eight fields, and also
4944 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4946 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4947 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4948 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4949 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4950 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4951 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4952 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4955 xhci_unregister_pci();
4958 module_init(xhci_hcd_init);
4960 static void __exit xhci_hcd_cleanup(void)
4962 xhci_unregister_pci();
4963 xhci_unregister_plat();
4965 module_exit(xhci_hcd_cleanup);