2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 static unsigned int quirks;
44 module_param(quirks, uint, S_IRUGO);
45 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
47 /* TODO: copied from ehci-hcd.c - can this be refactored? */
49 * xhci_handshake - spin reading hc until handshake completes or fails
50 * @ptr: address of hc register to be read
51 * @mask: bits to look at in result of read
52 * @done: value of those bits when handshake succeeds
53 * @usec: timeout in microseconds
55 * Returns negative errno, or zero on success
57 * Success happens when the "mask" bits have the specified value (hardware
58 * handshake done). There are two failure modes: "usec" have passed (major
59 * hardware flakeout), or the register reads as all-ones (hardware removed).
61 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
62 u32 mask, u32 done, int usec)
68 if (result == ~(u32)0) /* card removed */
80 * Disable interrupts and begin the xHCI halting process.
82 void xhci_quiesce(struct xhci_hcd *xhci)
89 halted = readl(&xhci->op_regs->status) & STS_HALT;
93 cmd = readl(&xhci->op_regs->command);
95 writel(cmd, &xhci->op_regs->command);
99 * Force HC into halt state.
101 * Disable any IRQs and clear the run/stop bit.
102 * HC will complete any current and actively pipelined transactions, and
103 * should halt within 16 ms of the run/stop bit being cleared.
104 * Read HC Halted bit in the status register to see when the HC is finished.
106 int xhci_halt(struct xhci_hcd *xhci)
109 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
112 ret = xhci_handshake(xhci, &xhci->op_regs->status,
113 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
115 xhci->xhc_state |= XHCI_STATE_HALTED;
116 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
118 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
124 * Set the run bit and wait for the host to be running.
126 static int xhci_start(struct xhci_hcd *xhci)
131 temp = readl(&xhci->op_regs->command);
133 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
135 writel(temp, &xhci->op_regs->command);
138 * Wait for the HCHalted Status bit to be 0 to indicate the host is
141 ret = xhci_handshake(xhci, &xhci->op_regs->status,
142 STS_HALT, 0, XHCI_MAX_HALT_USEC);
143 if (ret == -ETIMEDOUT)
144 xhci_err(xhci, "Host took too long to start, "
145 "waited %u microseconds.\n",
148 xhci->xhc_state &= ~XHCI_STATE_HALTED;
155 * This resets pipelines, timers, counters, state machines, etc.
156 * Transactions will be terminated immediately, and operational registers
157 * will be set to their defaults.
159 int xhci_reset(struct xhci_hcd *xhci)
165 state = readl(&xhci->op_regs->status);
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 ret = xhci_handshake(xhci, &xhci->op_regs->command,
177 CMD_RESET, 0, 10 * 1000 * 1000);
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
182 "Wait for controller to be ready for doorbell rings");
184 * xHCI cannot write to any doorbells or operational registers other
185 * than status until the "Controller Not Ready" flag is cleared.
187 ret = xhci_handshake(xhci, &xhci->op_regs->status,
188 STS_CNR, 0, 10 * 1000 * 1000);
190 for (i = 0; i < 2; ++i) {
191 xhci->bus_state[i].port_c_suspend = 0;
192 xhci->bus_state[i].suspended_ports = 0;
193 xhci->bus_state[i].resuming_ports = 0;
200 static int xhci_free_msi(struct xhci_hcd *xhci)
204 if (!xhci->msix_entries)
207 for (i = 0; i < xhci->msix_count; i++)
208 if (xhci->msix_entries[i].vector)
209 free_irq(xhci->msix_entries[i].vector,
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
220 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222 ret = pci_enable_msi(pdev);
224 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
225 "failed to allocate MSI entry");
229 ret = request_irq(pdev->irq, xhci_msi_irq,
230 0, "xhci_hcd", xhci_to_hcd(xhci));
232 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
233 "disable MSI interrupt");
234 pci_disable_msi(pdev);
242 * free all IRQs request
244 static void xhci_free_irq(struct xhci_hcd *xhci)
246 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
249 /* return if using legacy interrupt */
250 if (xhci_to_hcd(xhci)->irq > 0)
253 ret = xhci_free_msi(xhci);
257 free_irq(pdev->irq, xhci_to_hcd(xhci));
265 static int xhci_setup_msix(struct xhci_hcd *xhci)
268 struct usb_hcd *hcd = xhci_to_hcd(xhci);
269 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272 * calculate number of msi-x vectors supported.
273 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
274 * with max number of interrupters based on the xhci HCSPARAMS1.
275 * - num_online_cpus: maximum msi-x vectors per CPUs core.
276 * Add additional 1 vector to ensure always available interrupt.
278 xhci->msix_count = min(num_online_cpus() + 1,
279 HCS_MAX_INTRS(xhci->hcs_params1));
282 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
284 if (!xhci->msix_entries) {
285 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
289 for (i = 0; i < xhci->msix_count; i++) {
290 xhci->msix_entries[i].entry = i;
291 xhci->msix_entries[i].vector = 0;
294 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
296 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
297 "Failed to enable MSI-X");
301 for (i = 0; i < xhci->msix_count; i++) {
302 ret = request_irq(xhci->msix_entries[i].vector,
304 0, "xhci_hcd", xhci_to_hcd(xhci));
309 hcd->msix_enabled = 1;
313 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
315 pci_disable_msix(pdev);
317 kfree(xhci->msix_entries);
318 xhci->msix_entries = NULL;
322 /* Free any IRQs and disable MSI-X */
323 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 struct usb_hcd *hcd = xhci_to_hcd(xhci);
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328 if (xhci->quirks & XHCI_PLAT)
333 if (xhci->msix_entries) {
334 pci_disable_msix(pdev);
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
338 pci_disable_msi(pdev);
341 hcd->msix_enabled = 0;
345 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
349 if (xhci->msix_entries) {
350 for (i = 0; i < xhci->msix_count; i++)
351 synchronize_irq(xhci->msix_entries[i].vector);
355 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358 struct pci_dev *pdev;
361 /* The xhci platform device has set up IRQs through usb_add_hcd. */
362 if (xhci->quirks & XHCI_PLAT)
365 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367 * Some Fresco Logic host controllers advertise MSI, but fail to
368 * generate interrupts. Don't even try to enable MSI.
370 if (xhci->quirks & XHCI_BROKEN_MSI)
373 /* unregister the legacy interrupt */
375 free_irq(hcd->irq, hcd);
378 ret = xhci_setup_msix(xhci);
380 /* fall back to msi*/
381 ret = xhci_setup_msi(xhci);
384 /* hcd->irq is 0, we have MSI */
388 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
393 if (!strlen(hcd->irq_descr))
394 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
395 hcd->driver->description, hcd->self.busnum);
397 /* fall back to legacy interrupt*/
398 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
399 hcd->irq_descr, hcd);
401 xhci_err(xhci, "request interrupt %d failed\n",
405 hcd->irq = pdev->irq;
411 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
416 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
420 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
426 static void compliance_mode_recovery(unsigned long arg)
428 struct xhci_hcd *xhci;
433 xhci = (struct xhci_hcd *)arg;
435 for (i = 0; i < xhci->num_usb3_ports; i++) {
436 temp = readl(xhci->usb3_ports[i]);
437 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
439 * Compliance Mode Detected. Letting USB Core
440 * handle the Warm Reset
442 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
443 "Compliance mode detected->port %d",
445 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
446 "Attempting compliance mode recovery");
447 hcd = xhci->shared_hcd;
449 if (hcd->state == HC_STATE_SUSPENDED)
450 usb_hcd_resume_root_hub(hcd);
452 usb_hcd_poll_rh_status(hcd);
456 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
457 mod_timer(&xhci->comp_mode_recovery_timer,
458 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
462 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
463 * that causes ports behind that hardware to enter compliance mode sometimes.
464 * The quirk creates a timer that polls every 2 seconds the link state of
465 * each host controller's port and recovers it by issuing a Warm reset
466 * if Compliance mode is detected, otherwise the port will become "dead" (no
467 * device connections or disconnections will be detected anymore). Becasue no
468 * status event is generated when entering compliance mode (per xhci spec),
469 * this quirk is needed on systems that have the failing hardware installed.
471 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
473 xhci->port_status_u0 = 0;
474 init_timer(&xhci->comp_mode_recovery_timer);
476 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
477 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
478 xhci->comp_mode_recovery_timer.expires = jiffies +
479 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
481 set_timer_slack(&xhci->comp_mode_recovery_timer,
482 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
483 add_timer(&xhci->comp_mode_recovery_timer);
484 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
485 "Compliance mode recovery timer initialized");
489 * This function identifies the systems that have installed the SN65LVPE502CP
490 * USB3.0 re-driver and that need the Compliance Mode Quirk.
492 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
494 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
496 const char *dmi_product_name, *dmi_sys_vendor;
498 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
499 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
500 if (!dmi_product_name || !dmi_sys_vendor)
503 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
506 if (strstr(dmi_product_name, "Z420") ||
507 strstr(dmi_product_name, "Z620") ||
508 strstr(dmi_product_name, "Z820") ||
509 strstr(dmi_product_name, "Z1 Workstation"))
515 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
517 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
522 * Initialize memory for HCD and xHC (one-time init).
524 * Program the PAGESIZE register, initialize the device context array, create
525 * device contexts (?), set up a command ring segment (or two?), create event
526 * ring (one for now).
528 int xhci_init(struct usb_hcd *hcd)
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
533 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
534 spin_lock_init(&xhci->lock);
535 if (xhci->hci_version == 0x95 && link_quirk) {
536 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
537 "QUIRK: Not clearing Link TRB chain bits.");
538 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
541 "xHCI doesn't need link TRB QUIRK");
543 retval = xhci_mem_init(xhci, GFP_KERNEL);
544 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
546 /* Initializing Compliance Mode Recovery Data If Needed */
547 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
548 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
549 compliance_mode_recovery_timer_init(xhci);
555 /*-------------------------------------------------------------------------*/
558 static int xhci_run_finished(struct xhci_hcd *xhci)
560 if (xhci_start(xhci)) {
564 xhci->shared_hcd->state = HC_STATE_RUNNING;
565 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
567 if (xhci->quirks & XHCI_NEC_HOST)
568 xhci_ring_cmd_db(xhci);
570 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
571 "Finished xhci_run for USB3 roothub");
576 * Start the HC after it was halted.
578 * This function is called by the USB core when the HC driver is added.
579 * Its opposite is xhci_stop().
581 * xhci_init() must be called once before this function can be called.
582 * Reset the HC, enable device slot contexts, program DCBAAP, and
583 * set command ring pointer and event ring pointer.
585 * Setup MSI-X vectors and enable interrupts.
587 int xhci_run(struct usb_hcd *hcd)
592 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 /* Start the xHCI host controller running only after the USB 2.0 roothub
598 hcd->uses_new_polling = 1;
599 if (!usb_hcd_is_primary_hcd(hcd))
600 return xhci_run_finished(xhci);
602 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
604 ret = xhci_try_enable_msi(hcd);
608 xhci_dbg(xhci, "Command ring memory map follows:\n");
609 xhci_debug_ring(xhci, xhci->cmd_ring);
610 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
611 xhci_dbg_cmd_ptrs(xhci);
613 xhci_dbg(xhci, "ERST memory map follows:\n");
614 xhci_dbg_erst(xhci, &xhci->erst);
615 xhci_dbg(xhci, "Event ring:\n");
616 xhci_debug_ring(xhci, xhci->event_ring);
617 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
618 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
619 temp_64 &= ~ERST_PTR_MASK;
620 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
621 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
623 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
624 "// Set the interrupt modulation register");
625 temp = readl(&xhci->ir_set->irq_control);
626 temp &= ~ER_IRQ_INTERVAL_MASK;
628 writel(temp, &xhci->ir_set->irq_control);
630 /* Set the HCD state before we enable the irqs */
631 temp = readl(&xhci->op_regs->command);
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "// Enable interrupts, cmd = 0x%x.", temp);
635 writel(temp, &xhci->op_regs->command);
637 temp = readl(&xhci->ir_set->irq_pending);
638 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
639 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
640 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
641 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
642 xhci_print_ir_set(xhci, 0);
644 if (xhci->quirks & XHCI_NEC_HOST) {
645 struct xhci_command *command;
646 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
649 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
650 TRB_TYPE(TRB_NEC_GET_FW));
652 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
653 "Finished xhci_run for USB2 roothub");
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 spin_lock_irq(&xhci->lock);
664 /* The shared_hcd is going to be deallocated shortly (the USB core only
665 * calls this function when allocation fails in usb_add_hcd(), or
666 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
668 xhci->shared_hcd = NULL;
669 spin_unlock_irq(&xhci->lock);
675 * This function is called by the USB core when the HC driver is removed.
676 * Its opposite is xhci_run().
678 * Disable device contexts, disable IRQs, and quiesce the HC.
679 * Reset the HC, finish any completed transactions, and cleanup memory.
681 void xhci_stop(struct usb_hcd *hcd)
684 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
686 if (!usb_hcd_is_primary_hcd(hcd)) {
687 xhci_only_stop_hcd(xhci->shared_hcd);
691 spin_lock_irq(&xhci->lock);
692 /* Make sure the xHC is halted for a USB3 roothub
693 * (xhci_stop() could be called as part of failed init).
697 spin_unlock_irq(&xhci->lock);
699 xhci_cleanup_msix(xhci);
701 /* Deleting Compliance Mode Recovery Timer */
702 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
703 (!(xhci_all_ports_seen_u0(xhci)))) {
704 del_timer_sync(&xhci->comp_mode_recovery_timer);
705 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
706 "%s: compliance mode recovery timer deleted",
710 if (xhci->quirks & XHCI_AMD_PLL_FIX)
713 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
714 "// Disabling event ring interrupts");
715 temp = readl(&xhci->op_regs->status);
716 writel(temp & ~STS_EINT, &xhci->op_regs->status);
717 temp = readl(&xhci->ir_set->irq_pending);
718 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
719 xhci_print_ir_set(xhci, 0);
721 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
722 xhci_mem_cleanup(xhci);
723 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
724 "xhci_stop completed - status = %x",
725 readl(&xhci->op_regs->status));
729 * Shutdown HC (not bus-specific)
731 * This is called when the machine is rebooting or halting. We assume that the
732 * machine will be powered off, and the HC's internal state will be reset.
733 * Don't bother to free memory.
735 * This will only ever be called with the main usb_hcd (the USB3 roothub).
737 void xhci_shutdown(struct usb_hcd *hcd)
739 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
741 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
742 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
744 spin_lock_irq(&xhci->lock);
746 /* Workaround for spurious wakeups at shutdown with HSW */
747 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
749 spin_unlock_irq(&xhci->lock);
751 xhci_cleanup_msix(xhci);
753 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
754 "xhci_shutdown completed - status = %x",
755 readl(&xhci->op_regs->status));
757 /* Yet another workaround for spurious wakeups at shutdown with HSW */
758 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
759 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
763 static void xhci_save_registers(struct xhci_hcd *xhci)
765 xhci->s3.command = readl(&xhci->op_regs->command);
766 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
767 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
768 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
769 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
770 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
771 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
772 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
773 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
776 static void xhci_restore_registers(struct xhci_hcd *xhci)
778 writel(xhci->s3.command, &xhci->op_regs->command);
779 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
780 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
781 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
782 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
783 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
784 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
785 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
786 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
789 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
793 /* step 2: initialize command ring buffer */
794 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
795 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
796 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
797 xhci->cmd_ring->dequeue) &
798 (u64) ~CMD_RING_RSVD_BITS) |
799 xhci->cmd_ring->cycle_state;
800 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
801 "// Setting command ring address to 0x%llx",
802 (long unsigned long) val_64);
803 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
807 * The whole command ring must be cleared to zero when we suspend the host.
809 * The host doesn't save the command ring pointer in the suspend well, so we
810 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
811 * aligned, because of the reserved bits in the command ring dequeue pointer
812 * register. Therefore, we can't just set the dequeue pointer back in the
813 * middle of the ring (TRBs are 16-byte aligned).
815 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
817 struct xhci_ring *ring;
818 struct xhci_segment *seg;
820 ring = xhci->cmd_ring;
824 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
825 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
826 cpu_to_le32(~TRB_CYCLE);
828 } while (seg != ring->deq_seg);
830 /* Reset the software enqueue and dequeue pointers */
831 ring->deq_seg = ring->first_seg;
832 ring->dequeue = ring->first_seg->trbs;
833 ring->enq_seg = ring->deq_seg;
834 ring->enqueue = ring->dequeue;
836 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
838 * Ring is now zeroed, so the HW should look for change of ownership
839 * when the cycle bit is set to 1.
841 ring->cycle_state = 1;
844 * Reset the hardware dequeue pointer.
845 * Yes, this will need to be re-written after resume, but we're paranoid
846 * and want to make sure the hardware doesn't access bogus memory
847 * because, say, the BIOS or an SMI started the host without changing
848 * the command ring pointers.
850 xhci_set_cmd_ring_deq(xhci);
854 * Stop HC (not bus-specific)
856 * This is called when the machine transition into S3/S4 mode.
859 int xhci_suspend(struct xhci_hcd *xhci)
862 unsigned int delay = XHCI_MAX_HALT_USEC;
863 struct usb_hcd *hcd = xhci_to_hcd(xhci);
866 if (hcd->state != HC_STATE_SUSPENDED ||
867 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
870 /* Don't poll the roothubs on bus suspend. */
871 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
872 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
873 del_timer_sync(&hcd->rh_timer);
875 spin_lock_irq(&xhci->lock);
876 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
877 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
878 /* step 1: stop endpoint */
879 /* skipped assuming that port suspend has done */
881 /* step 2: clear Run/Stop bit */
882 command = readl(&xhci->op_regs->command);
884 writel(command, &xhci->op_regs->command);
886 /* Some chips from Fresco Logic need an extraordinary delay */
887 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
889 if (xhci_handshake(xhci, &xhci->op_regs->status,
890 STS_HALT, STS_HALT, delay)) {
891 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
892 spin_unlock_irq(&xhci->lock);
895 xhci_clear_command_ring(xhci);
897 /* step 3: save registers */
898 xhci_save_registers(xhci);
900 /* step 4: set CSS flag */
901 command = readl(&xhci->op_regs->command);
903 writel(command, &xhci->op_regs->command);
904 if (xhci_handshake(xhci, &xhci->op_regs->status,
905 STS_SAVE, 0, 10 * 1000)) {
906 xhci_warn(xhci, "WARN: xHC save state timeout\n");
907 spin_unlock_irq(&xhci->lock);
910 spin_unlock_irq(&xhci->lock);
913 * Deleting Compliance Mode Recovery Timer because the xHCI Host
914 * is about to be suspended.
916 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
917 (!(xhci_all_ports_seen_u0(xhci)))) {
918 del_timer_sync(&xhci->comp_mode_recovery_timer);
919 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
920 "%s: compliance mode recovery timer deleted",
924 /* step 5: remove core well power */
925 /* synchronize irq when using MSI-X */
926 xhci_msix_sync_irqs(xhci);
932 * start xHC (not bus-specific)
934 * This is called when the machine transition from S3/S4 mode.
937 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
939 u32 command, temp = 0, status;
940 struct usb_hcd *hcd = xhci_to_hcd(xhci);
941 struct usb_hcd *secondary_hcd;
943 bool comp_timer_running = false;
945 /* Wait a bit if either of the roothubs need to settle from the
946 * transition into bus suspend.
948 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
950 xhci->bus_state[1].next_statechange))
953 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
954 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
956 spin_lock_irq(&xhci->lock);
957 if (xhci->quirks & XHCI_RESET_ON_RESUME)
961 /* step 1: restore register */
962 xhci_restore_registers(xhci);
963 /* step 2: initialize command ring buffer */
964 xhci_set_cmd_ring_deq(xhci);
965 /* step 3: restore state and start state*/
966 /* step 3: set CRS flag */
967 command = readl(&xhci->op_regs->command);
969 writel(command, &xhci->op_regs->command);
970 if (xhci_handshake(xhci, &xhci->op_regs->status,
971 STS_RESTORE, 0, 10 * 1000)) {
972 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
973 spin_unlock_irq(&xhci->lock);
976 temp = readl(&xhci->op_regs->status);
979 /* If restore operation fails, re-initialize the HC during resume */
980 if ((temp & STS_SRE) || hibernated) {
982 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
983 !(xhci_all_ports_seen_u0(xhci))) {
984 del_timer_sync(&xhci->comp_mode_recovery_timer);
985 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
986 "Compliance Mode Recovery Timer deleted!");
989 /* Let the USB core know _both_ roothubs lost power. */
990 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
991 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
993 xhci_dbg(xhci, "Stop HCD\n");
996 spin_unlock_irq(&xhci->lock);
997 xhci_cleanup_msix(xhci);
999 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1000 temp = readl(&xhci->op_regs->status);
1001 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1002 temp = readl(&xhci->ir_set->irq_pending);
1003 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1004 xhci_print_ir_set(xhci, 0);
1006 xhci_dbg(xhci, "cleaning up memory\n");
1007 xhci_mem_cleanup(xhci);
1008 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1009 readl(&xhci->op_regs->status));
1011 /* USB core calls the PCI reinit and start functions twice:
1012 * first with the primary HCD, and then with the secondary HCD.
1013 * If we don't do the same, the host will never be started.
1015 if (!usb_hcd_is_primary_hcd(hcd))
1016 secondary_hcd = hcd;
1018 secondary_hcd = xhci->shared_hcd;
1020 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1021 retval = xhci_init(hcd->primary_hcd);
1024 comp_timer_running = true;
1026 xhci_dbg(xhci, "Start the primary HCD\n");
1027 retval = xhci_run(hcd->primary_hcd);
1029 xhci_dbg(xhci, "Start the secondary HCD\n");
1030 retval = xhci_run(secondary_hcd);
1032 hcd->state = HC_STATE_SUSPENDED;
1033 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1037 /* step 4: set Run/Stop bit */
1038 command = readl(&xhci->op_regs->command);
1040 writel(command, &xhci->op_regs->command);
1041 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1044 /* step 5: walk topology and initialize portsc,
1045 * portpmsc and portli
1047 /* this is done in bus_resume */
1049 /* step 6: restart each of the previously
1050 * Running endpoints by ringing their doorbells
1053 spin_unlock_irq(&xhci->lock);
1057 /* Resume root hubs only when have pending events. */
1058 status = readl(&xhci->op_regs->status);
1059 if (status & STS_EINT) {
1060 usb_hcd_resume_root_hub(hcd);
1061 usb_hcd_resume_root_hub(xhci->shared_hcd);
1066 * If system is subject to the Quirk, Compliance Mode Timer needs to
1067 * be re-initialized Always after a system resume. Ports are subject
1068 * to suffer the Compliance Mode issue again. It doesn't matter if
1069 * ports have entered previously to U0 before system's suspension.
1071 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1072 compliance_mode_recovery_timer_init(xhci);
1074 /* Re-enable port polling. */
1075 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1076 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1077 usb_hcd_poll_rh_status(hcd);
1081 #endif /* CONFIG_PM */
1083 /*-------------------------------------------------------------------------*/
1086 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1087 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1088 * value to right shift 1 for the bitmask.
1090 * Index = (epnum * 2) + direction - 1,
1091 * where direction = 0 for OUT, 1 for IN.
1092 * For control endpoints, the IN index is used (OUT index is unused), so
1093 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1095 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1098 if (usb_endpoint_xfer_control(desc))
1099 index = (unsigned int) (usb_endpoint_num(desc)*2);
1101 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1102 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1106 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1107 * address from the XHCI endpoint index.
1109 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1111 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1112 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1113 return direction | number;
1116 /* Find the flag for this endpoint (for use in the control context). Use the
1117 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1120 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1122 return 1 << (xhci_get_endpoint_index(desc) + 1);
1125 /* Find the flag for this endpoint (for use in the control context). Use the
1126 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1129 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1131 return 1 << (ep_index + 1);
1134 /* Compute the last valid endpoint context index. Basically, this is the
1135 * endpoint index plus one. For slot contexts with more than valid endpoint,
1136 * we find the most significant bit set in the added contexts flags.
1137 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1138 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1140 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1142 return fls(added_ctxs) - 1;
1145 /* Returns 1 if the arguments are OK;
1146 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1148 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1149 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1151 struct xhci_hcd *xhci;
1152 struct xhci_virt_device *virt_dev;
1154 if (!hcd || (check_ep && !ep) || !udev) {
1155 pr_debug("xHCI %s called with invalid args\n", func);
1158 if (!udev->parent) {
1159 pr_debug("xHCI %s called for root hub\n", func);
1163 xhci = hcd_to_xhci(hcd);
1164 if (check_virt_dev) {
1165 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1166 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1171 virt_dev = xhci->devs[udev->slot_id];
1172 if (virt_dev->udev != udev) {
1173 xhci_dbg(xhci, "xHCI %s called with udev and "
1174 "virt_dev does not match\n", func);
1179 if (xhci->xhc_state & XHCI_STATE_HALTED)
1185 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1186 struct usb_device *udev, struct xhci_command *command,
1187 bool ctx_change, bool must_succeed);
1190 * Full speed devices may have a max packet size greater than 8 bytes, but the
1191 * USB core doesn't know that until it reads the first 8 bytes of the
1192 * descriptor. If the usb_device's max packet size changes after that point,
1193 * we need to issue an evaluate context command and wait on it.
1195 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1196 unsigned int ep_index, struct urb *urb)
1198 struct xhci_container_ctx *out_ctx;
1199 struct xhci_input_control_ctx *ctrl_ctx;
1200 struct xhci_ep_ctx *ep_ctx;
1201 struct xhci_command *command;
1202 int max_packet_size;
1203 int hw_max_packet_size;
1206 out_ctx = xhci->devs[slot_id]->out_ctx;
1207 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1208 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1209 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1210 if (hw_max_packet_size != max_packet_size) {
1211 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1212 "Max Packet Size for ep 0 changed.");
1213 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1214 "Max packet size in usb_device = %d",
1216 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1217 "Max packet size in xHCI HW = %d",
1218 hw_max_packet_size);
1219 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1220 "Issuing evaluate context command.");
1222 /* Set up the input context flags for the command */
1223 /* FIXME: This won't work if a non-default control endpoint
1224 * changes max packet sizes.
1227 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1231 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1232 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
1234 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1237 goto command_cleanup;
1239 /* Set up the modified control endpoint 0 */
1240 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1241 xhci->devs[slot_id]->out_ctx, ep_index);
1243 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1244 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1245 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1247 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1248 ctrl_ctx->drop_flags = 0;
1250 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1251 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1252 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1253 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1255 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1258 /* Clean up the input context for later use by bandwidth
1261 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1263 kfree(command->completion);
1270 * non-error returns are a promise to giveback() the urb later
1271 * we drop ownership so next owner (or urb unlink) can get it
1273 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1275 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1276 struct xhci_td *buffer;
1277 unsigned long flags;
1279 unsigned int slot_id, ep_index;
1280 struct urb_priv *urb_priv;
1283 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1284 true, true, __func__) <= 0)
1287 slot_id = urb->dev->slot_id;
1288 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1290 if (!HCD_HW_ACCESSIBLE(hcd)) {
1291 if (!in_interrupt())
1292 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1297 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1298 size = urb->number_of_packets;
1302 urb_priv = kzalloc(sizeof(struct urb_priv) +
1303 size * sizeof(struct xhci_td *), mem_flags);
1307 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1313 for (i = 0; i < size; i++) {
1314 urb_priv->td[i] = buffer;
1318 urb_priv->length = size;
1319 urb_priv->td_cnt = 0;
1320 urb->hcpriv = urb_priv;
1322 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1323 /* Check to see if the max packet size for the default control
1324 * endpoint changed during FS device enumeration
1326 if (urb->dev->speed == USB_SPEED_FULL) {
1327 ret = xhci_check_maxpacket(xhci, slot_id,
1330 xhci_urb_free_priv(xhci, urb_priv);
1336 /* We have a spinlock and interrupts disabled, so we must pass
1337 * atomic context to this function, which may allocate memory.
1339 spin_lock_irqsave(&xhci->lock, flags);
1340 if (xhci->xhc_state & XHCI_STATE_DYING)
1342 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1346 spin_unlock_irqrestore(&xhci->lock, flags);
1347 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1348 spin_lock_irqsave(&xhci->lock, flags);
1349 if (xhci->xhc_state & XHCI_STATE_DYING)
1351 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1352 EP_GETTING_STREAMS) {
1353 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1354 "is transitioning to using streams.\n");
1356 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1357 EP_GETTING_NO_STREAMS) {
1358 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1359 "is transitioning to "
1360 "not having streams.\n");
1363 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1368 spin_unlock_irqrestore(&xhci->lock, flags);
1369 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1370 spin_lock_irqsave(&xhci->lock, flags);
1371 if (xhci->xhc_state & XHCI_STATE_DYING)
1373 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1377 spin_unlock_irqrestore(&xhci->lock, flags);
1379 spin_lock_irqsave(&xhci->lock, flags);
1380 if (xhci->xhc_state & XHCI_STATE_DYING)
1382 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1386 spin_unlock_irqrestore(&xhci->lock, flags);
1391 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1392 "non-responsive xHCI host.\n",
1393 urb->ep->desc.bEndpointAddress, urb);
1396 xhci_urb_free_priv(xhci, urb_priv);
1398 spin_unlock_irqrestore(&xhci->lock, flags);
1402 /* Get the right ring for the given URB.
1403 * If the endpoint supports streams, boundary check the URB's stream ID.
1404 * If the endpoint doesn't support streams, return the singular endpoint ring.
1406 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1409 unsigned int slot_id;
1410 unsigned int ep_index;
1411 unsigned int stream_id;
1412 struct xhci_virt_ep *ep;
1414 slot_id = urb->dev->slot_id;
1415 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1416 stream_id = urb->stream_id;
1417 ep = &xhci->devs[slot_id]->eps[ep_index];
1418 /* Common case: no streams */
1419 if (!(ep->ep_state & EP_HAS_STREAMS))
1422 if (stream_id == 0) {
1424 "WARN: Slot ID %u, ep index %u has streams, "
1425 "but URB has no stream ID.\n",
1430 if (stream_id < ep->stream_info->num_streams)
1431 return ep->stream_info->stream_rings[stream_id];
1434 "WARN: Slot ID %u, ep index %u has "
1435 "stream IDs 1 to %u allocated, "
1436 "but stream ID %u is requested.\n",
1438 ep->stream_info->num_streams - 1,
1444 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1445 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1446 * should pick up where it left off in the TD, unless a Set Transfer Ring
1447 * Dequeue Pointer is issued.
1449 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1450 * the ring. Since the ring is a contiguous structure, they can't be physically
1451 * removed. Instead, there are two options:
1453 * 1) If the HC is in the middle of processing the URB to be canceled, we
1454 * simply move the ring's dequeue pointer past those TRBs using the Set
1455 * Transfer Ring Dequeue Pointer command. This will be the common case,
1456 * when drivers timeout on the last submitted URB and attempt to cancel.
1458 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1459 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1460 * HC will need to invalidate the any TRBs it has cached after the stop
1461 * endpoint command, as noted in the xHCI 0.95 errata.
1463 * 3) The TD may have completed by the time the Stop Endpoint Command
1464 * completes, so software needs to handle that case too.
1466 * This function should protect against the TD enqueueing code ringing the
1467 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1468 * It also needs to account for multiple cancellations on happening at the same
1469 * time for the same endpoint.
1471 * Note that this function can be called in any context, or so says
1472 * usb_hcd_unlink_urb()
1474 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1476 unsigned long flags;
1479 struct xhci_hcd *xhci;
1480 struct urb_priv *urb_priv;
1482 unsigned int ep_index;
1483 struct xhci_ring *ep_ring;
1484 struct xhci_virt_ep *ep;
1485 struct xhci_command *command;
1487 xhci = hcd_to_xhci(hcd);
1488 spin_lock_irqsave(&xhci->lock, flags);
1489 /* Make sure the URB hasn't completed or been unlinked already */
1490 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1491 if (ret || !urb->hcpriv)
1493 temp = readl(&xhci->op_regs->status);
1494 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1495 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1496 "HW died, freeing TD.");
1497 urb_priv = urb->hcpriv;
1498 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1499 td = urb_priv->td[i];
1500 if (!list_empty(&td->td_list))
1501 list_del_init(&td->td_list);
1502 if (!list_empty(&td->cancelled_td_list))
1503 list_del_init(&td->cancelled_td_list);
1506 usb_hcd_unlink_urb_from_ep(hcd, urb);
1507 spin_unlock_irqrestore(&xhci->lock, flags);
1508 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1509 xhci_urb_free_priv(xhci, urb_priv);
1512 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1513 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1514 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1515 "Ep 0x%x: URB %p to be canceled on "
1516 "non-responsive xHCI host.",
1517 urb->ep->desc.bEndpointAddress, urb);
1518 /* Let the stop endpoint command watchdog timer (which set this
1519 * state) finish cleaning up the endpoint TD lists. We must
1520 * have caught it in the middle of dropping a lock and giving
1526 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1527 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1528 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1534 urb_priv = urb->hcpriv;
1535 i = urb_priv->td_cnt;
1536 if (i < urb_priv->length)
1537 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1538 "Cancel URB %p, dev %s, ep 0x%x, "
1539 "starting at offset 0x%llx",
1540 urb, urb->dev->devpath,
1541 urb->ep->desc.bEndpointAddress,
1542 (unsigned long long) xhci_trb_virt_to_dma(
1543 urb_priv->td[i]->start_seg,
1544 urb_priv->td[i]->first_trb));
1546 for (; i < urb_priv->length; i++) {
1547 td = urb_priv->td[i];
1548 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1551 /* Queue a stop endpoint command, but only if this is
1552 * the first cancellation to be handled.
1554 if (!(ep->ep_state & EP_HALT_PENDING)) {
1555 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1560 ep->ep_state |= EP_HALT_PENDING;
1561 ep->stop_cmds_pending++;
1562 ep->stop_cmd_timer.expires = jiffies +
1563 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1564 add_timer(&ep->stop_cmd_timer);
1565 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1567 xhci_ring_cmd_db(xhci);
1570 spin_unlock_irqrestore(&xhci->lock, flags);
1574 /* Drop an endpoint from a new bandwidth configuration for this device.
1575 * Only one call to this function is allowed per endpoint before
1576 * check_bandwidth() or reset_bandwidth() must be called.
1577 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1578 * add the endpoint to the schedule with possibly new parameters denoted by a
1579 * different endpoint descriptor in usb_host_endpoint.
1580 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1583 * The USB core will not allow URBs to be queued to an endpoint that is being
1584 * disabled, so there's no need for mutual exclusion to protect
1585 * the xhci->devs[slot_id] structure.
1587 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1588 struct usb_host_endpoint *ep)
1590 struct xhci_hcd *xhci;
1591 struct xhci_container_ctx *in_ctx, *out_ctx;
1592 struct xhci_input_control_ctx *ctrl_ctx;
1593 unsigned int ep_index;
1594 struct xhci_ep_ctx *ep_ctx;
1596 u32 new_add_flags, new_drop_flags;
1599 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1602 xhci = hcd_to_xhci(hcd);
1603 if (xhci->xhc_state & XHCI_STATE_DYING)
1606 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1607 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1608 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1609 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1610 __func__, drop_flag);
1614 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1615 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1616 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1618 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1623 ep_index = xhci_get_endpoint_index(&ep->desc);
1624 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1625 /* If the HC already knows the endpoint is disabled,
1626 * or the HCD has noted it is disabled, ignore this request
1628 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1629 cpu_to_le32(EP_STATE_DISABLED)) ||
1630 le32_to_cpu(ctrl_ctx->drop_flags) &
1631 xhci_get_endpoint_flag(&ep->desc)) {
1632 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1637 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1638 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1640 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1641 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1643 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1645 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1646 (unsigned int) ep->desc.bEndpointAddress,
1648 (unsigned int) new_drop_flags,
1649 (unsigned int) new_add_flags);
1653 /* Add an endpoint to a new possible bandwidth configuration for this device.
1654 * Only one call to this function is allowed per endpoint before
1655 * check_bandwidth() or reset_bandwidth() must be called.
1656 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1657 * add the endpoint to the schedule with possibly new parameters denoted by a
1658 * different endpoint descriptor in usb_host_endpoint.
1659 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1662 * The USB core will not allow URBs to be queued to an endpoint until the
1663 * configuration or alt setting is installed in the device, so there's no need
1664 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1666 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1667 struct usb_host_endpoint *ep)
1669 struct xhci_hcd *xhci;
1670 struct xhci_container_ctx *in_ctx, *out_ctx;
1671 unsigned int ep_index;
1672 struct xhci_input_control_ctx *ctrl_ctx;
1674 u32 new_add_flags, new_drop_flags;
1675 struct xhci_virt_device *virt_dev;
1678 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1680 /* So we won't queue a reset ep command for a root hub */
1684 xhci = hcd_to_xhci(hcd);
1685 if (xhci->xhc_state & XHCI_STATE_DYING)
1688 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1689 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1690 /* FIXME when we have to issue an evaluate endpoint command to
1691 * deal with ep0 max packet size changing once we get the
1694 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1695 __func__, added_ctxs);
1699 virt_dev = xhci->devs[udev->slot_id];
1700 in_ctx = virt_dev->in_ctx;
1701 out_ctx = virt_dev->out_ctx;
1702 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1704 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1709 ep_index = xhci_get_endpoint_index(&ep->desc);
1710 /* If this endpoint is already in use, and the upper layers are trying
1711 * to add it again without dropping it, reject the addition.
1713 if (virt_dev->eps[ep_index].ring &&
1714 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1715 xhci_get_endpoint_flag(&ep->desc))) {
1716 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1717 "without dropping it.\n",
1718 (unsigned int) ep->desc.bEndpointAddress);
1722 /* If the HCD has already noted the endpoint is enabled,
1723 * ignore this request.
1725 if (le32_to_cpu(ctrl_ctx->add_flags) &
1726 xhci_get_endpoint_flag(&ep->desc)) {
1727 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1733 * Configuration and alternate setting changes must be done in
1734 * process context, not interrupt context (or so documenation
1735 * for usb_set_interface() and usb_set_configuration() claim).
1737 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1738 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1739 __func__, ep->desc.bEndpointAddress);
1743 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1744 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1746 /* If xhci_endpoint_disable() was called for this endpoint, but the
1747 * xHC hasn't been notified yet through the check_bandwidth() call,
1748 * this re-adds a new state for the endpoint from the new endpoint
1749 * descriptors. We must drop and re-add this endpoint, so we leave the
1752 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1754 /* Store the usb_device pointer for later use */
1757 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1758 (unsigned int) ep->desc.bEndpointAddress,
1760 (unsigned int) new_drop_flags,
1761 (unsigned int) new_add_flags);
1765 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1767 struct xhci_input_control_ctx *ctrl_ctx;
1768 struct xhci_ep_ctx *ep_ctx;
1769 struct xhci_slot_ctx *slot_ctx;
1772 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1774 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1779 /* When a device's add flag and drop flag are zero, any subsequent
1780 * configure endpoint command will leave that endpoint's state
1781 * untouched. Make sure we don't leave any old state in the input
1782 * endpoint contexts.
1784 ctrl_ctx->drop_flags = 0;
1785 ctrl_ctx->add_flags = 0;
1786 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1787 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1788 /* Endpoint 0 is always valid */
1789 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1790 for (i = 1; i < 31; ++i) {
1791 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1792 ep_ctx->ep_info = 0;
1793 ep_ctx->ep_info2 = 0;
1795 ep_ctx->tx_info = 0;
1799 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1800 struct usb_device *udev, u32 *cmd_status)
1804 switch (*cmd_status) {
1805 case COMP_CMD_ABORT:
1807 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1811 dev_warn(&udev->dev,
1812 "Not enough host controller resources for new device state.\n");
1814 /* FIXME: can we allocate more resources for the HC? */
1817 case COMP_2ND_BW_ERR:
1818 dev_warn(&udev->dev,
1819 "Not enough bandwidth for new device state.\n");
1821 /* FIXME: can we go back to the old state? */
1824 /* the HCD set up something wrong */
1825 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1827 "and endpoint is not disabled.\n");
1831 dev_warn(&udev->dev,
1832 "ERROR: Incompatible device for endpoint configure command.\n");
1836 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1837 "Successful Endpoint Configure command");
1841 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1849 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1850 struct usb_device *udev, u32 *cmd_status)
1853 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1855 switch (*cmd_status) {
1856 case COMP_CMD_ABORT:
1858 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1862 dev_warn(&udev->dev,
1863 "WARN: xHCI driver setup invalid evaluate context command.\n");
1867 dev_warn(&udev->dev,
1868 "WARN: slot not enabled for evaluate context command.\n");
1871 case COMP_CTX_STATE:
1872 dev_warn(&udev->dev,
1873 "WARN: invalid context state for evaluate context command.\n");
1874 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1878 dev_warn(&udev->dev,
1879 "ERROR: Incompatible device for evaluate context command.\n");
1883 /* Max Exit Latency too large error */
1884 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1888 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1889 "Successful evaluate context command");
1893 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1901 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1902 struct xhci_input_control_ctx *ctrl_ctx)
1904 u32 valid_add_flags;
1905 u32 valid_drop_flags;
1907 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1908 * (bit 1). The default control endpoint is added during the Address
1909 * Device command and is never removed until the slot is disabled.
1911 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1912 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1914 /* Use hweight32 to count the number of ones in the add flags, or
1915 * number of endpoints added. Don't count endpoints that are changed
1916 * (both added and dropped).
1918 return hweight32(valid_add_flags) -
1919 hweight32(valid_add_flags & valid_drop_flags);
1922 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1923 struct xhci_input_control_ctx *ctrl_ctx)
1925 u32 valid_add_flags;
1926 u32 valid_drop_flags;
1928 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1929 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1931 return hweight32(valid_drop_flags) -
1932 hweight32(valid_add_flags & valid_drop_flags);
1936 * We need to reserve the new number of endpoints before the configure endpoint
1937 * command completes. We can't subtract the dropped endpoints from the number
1938 * of active endpoints until the command completes because we can oversubscribe
1939 * the host in this case:
1941 * - the first configure endpoint command drops more endpoints than it adds
1942 * - a second configure endpoint command that adds more endpoints is queued
1943 * - the first configure endpoint command fails, so the config is unchanged
1944 * - the second command may succeed, even though there isn't enough resources
1946 * Must be called with xhci->lock held.
1948 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1949 struct xhci_input_control_ctx *ctrl_ctx)
1953 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1954 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1955 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1956 "Not enough ep ctxs: "
1957 "%u active, need to add %u, limit is %u.",
1958 xhci->num_active_eps, added_eps,
1959 xhci->limit_active_eps);
1962 xhci->num_active_eps += added_eps;
1963 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1964 "Adding %u ep ctxs, %u now active.", added_eps,
1965 xhci->num_active_eps);
1970 * The configure endpoint was failed by the xHC for some other reason, so we
1971 * need to revert the resources that failed configuration would have used.
1973 * Must be called with xhci->lock held.
1975 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1976 struct xhci_input_control_ctx *ctrl_ctx)
1980 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1981 xhci->num_active_eps -= num_failed_eps;
1982 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1983 "Removing %u failed ep ctxs, %u now active.",
1985 xhci->num_active_eps);
1989 * Now that the command has completed, clean up the active endpoint count by
1990 * subtracting out the endpoints that were dropped (but not changed).
1992 * Must be called with xhci->lock held.
1994 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1995 struct xhci_input_control_ctx *ctrl_ctx)
1997 u32 num_dropped_eps;
1999 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2000 xhci->num_active_eps -= num_dropped_eps;
2001 if (num_dropped_eps)
2002 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2003 "Removing %u dropped ep ctxs, %u now active.",
2005 xhci->num_active_eps);
2008 static unsigned int xhci_get_block_size(struct usb_device *udev)
2010 switch (udev->speed) {
2012 case USB_SPEED_FULL:
2014 case USB_SPEED_HIGH:
2016 case USB_SPEED_SUPER:
2018 case USB_SPEED_UNKNOWN:
2019 case USB_SPEED_WIRELESS:
2021 /* Should never happen */
2027 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2029 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2031 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2036 /* If we are changing a LS/FS device under a HS hub,
2037 * make sure (if we are activating a new TT) that the HS bus has enough
2038 * bandwidth for this new TT.
2040 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2041 struct xhci_virt_device *virt_dev,
2044 struct xhci_interval_bw_table *bw_table;
2045 struct xhci_tt_bw_info *tt_info;
2047 /* Find the bandwidth table for the root port this TT is attached to. */
2048 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2049 tt_info = virt_dev->tt_info;
2050 /* If this TT already had active endpoints, the bandwidth for this TT
2051 * has already been added. Removing all periodic endpoints (and thus
2052 * making the TT enactive) will only decrease the bandwidth used.
2056 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2057 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2061 /* Not sure why we would have no new active endpoints...
2063 * Maybe because of an Evaluate Context change for a hub update or a
2064 * control endpoint 0 max packet size change?
2065 * FIXME: skip the bandwidth calculation in that case.
2070 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2071 struct xhci_virt_device *virt_dev)
2073 unsigned int bw_reserved;
2075 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2076 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2079 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2080 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2087 * This algorithm is a very conservative estimate of the worst-case scheduling
2088 * scenario for any one interval. The hardware dynamically schedules the
2089 * packets, so we can't tell which microframe could be the limiting factor in
2090 * the bandwidth scheduling. This only takes into account periodic endpoints.
2092 * Obviously, we can't solve an NP complete problem to find the minimum worst
2093 * case scenario. Instead, we come up with an estimate that is no less than
2094 * the worst case bandwidth used for any one microframe, but may be an
2097 * We walk the requirements for each endpoint by interval, starting with the
2098 * smallest interval, and place packets in the schedule where there is only one
2099 * possible way to schedule packets for that interval. In order to simplify
2100 * this algorithm, we record the largest max packet size for each interval, and
2101 * assume all packets will be that size.
2103 * For interval 0, we obviously must schedule all packets for each interval.
2104 * The bandwidth for interval 0 is just the amount of data to be transmitted
2105 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2106 * the number of packets).
2108 * For interval 1, we have two possible microframes to schedule those packets
2109 * in. For this algorithm, if we can schedule the same number of packets for
2110 * each possible scheduling opportunity (each microframe), we will do so. The
2111 * remaining number of packets will be saved to be transmitted in the gaps in
2112 * the next interval's scheduling sequence.
2114 * As we move those remaining packets to be scheduled with interval 2 packets,
2115 * we have to double the number of remaining packets to transmit. This is
2116 * because the intervals are actually powers of 2, and we would be transmitting
2117 * the previous interval's packets twice in this interval. We also have to be
2118 * sure that when we look at the largest max packet size for this interval, we
2119 * also look at the largest max packet size for the remaining packets and take
2120 * the greater of the two.
2122 * The algorithm continues to evenly distribute packets in each scheduling
2123 * opportunity, and push the remaining packets out, until we get to the last
2124 * interval. Then those packets and their associated overhead are just added
2125 * to the bandwidth used.
2127 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2128 struct xhci_virt_device *virt_dev,
2131 unsigned int bw_reserved;
2132 unsigned int max_bandwidth;
2133 unsigned int bw_used;
2134 unsigned int block_size;
2135 struct xhci_interval_bw_table *bw_table;
2136 unsigned int packet_size = 0;
2137 unsigned int overhead = 0;
2138 unsigned int packets_transmitted = 0;
2139 unsigned int packets_remaining = 0;
2142 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2143 return xhci_check_ss_bw(xhci, virt_dev);
2145 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2146 max_bandwidth = HS_BW_LIMIT;
2147 /* Convert percent of bus BW reserved to blocks reserved */
2148 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2150 max_bandwidth = FS_BW_LIMIT;
2151 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2154 bw_table = virt_dev->bw_table;
2155 /* We need to translate the max packet size and max ESIT payloads into
2156 * the units the hardware uses.
2158 block_size = xhci_get_block_size(virt_dev->udev);
2160 /* If we are manipulating a LS/FS device under a HS hub, double check
2161 * that the HS bus has enough bandwidth if we are activing a new TT.
2163 if (virt_dev->tt_info) {
2164 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2165 "Recalculating BW for rootport %u",
2166 virt_dev->real_port);
2167 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2168 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2169 "newly activated TT.\n");
2172 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2173 "Recalculating BW for TT slot %u port %u",
2174 virt_dev->tt_info->slot_id,
2175 virt_dev->tt_info->ttport);
2177 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2178 "Recalculating BW for rootport %u",
2179 virt_dev->real_port);
2182 /* Add in how much bandwidth will be used for interval zero, or the
2183 * rounded max ESIT payload + number of packets * largest overhead.
2185 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2186 bw_table->interval_bw[0].num_packets *
2187 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2189 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2190 unsigned int bw_added;
2191 unsigned int largest_mps;
2192 unsigned int interval_overhead;
2195 * How many packets could we transmit in this interval?
2196 * If packets didn't fit in the previous interval, we will need
2197 * to transmit that many packets twice within this interval.
2199 packets_remaining = 2 * packets_remaining +
2200 bw_table->interval_bw[i].num_packets;
2202 /* Find the largest max packet size of this or the previous
2205 if (list_empty(&bw_table->interval_bw[i].endpoints))
2208 struct xhci_virt_ep *virt_ep;
2209 struct list_head *ep_entry;
2211 ep_entry = bw_table->interval_bw[i].endpoints.next;
2212 virt_ep = list_entry(ep_entry,
2213 struct xhci_virt_ep, bw_endpoint_list);
2214 /* Convert to blocks, rounding up */
2215 largest_mps = DIV_ROUND_UP(
2216 virt_ep->bw_info.max_packet_size,
2219 if (largest_mps > packet_size)
2220 packet_size = largest_mps;
2222 /* Use the larger overhead of this or the previous interval. */
2223 interval_overhead = xhci_get_largest_overhead(
2224 &bw_table->interval_bw[i]);
2225 if (interval_overhead > overhead)
2226 overhead = interval_overhead;
2228 /* How many packets can we evenly distribute across
2229 * (1 << (i + 1)) possible scheduling opportunities?
2231 packets_transmitted = packets_remaining >> (i + 1);
2233 /* Add in the bandwidth used for those scheduled packets */
2234 bw_added = packets_transmitted * (overhead + packet_size);
2236 /* How many packets do we have remaining to transmit? */
2237 packets_remaining = packets_remaining % (1 << (i + 1));
2239 /* What largest max packet size should those packets have? */
2240 /* If we've transmitted all packets, don't carry over the
2241 * largest packet size.
2243 if (packets_remaining == 0) {
2246 } else if (packets_transmitted > 0) {
2247 /* Otherwise if we do have remaining packets, and we've
2248 * scheduled some packets in this interval, take the
2249 * largest max packet size from endpoints with this
2252 packet_size = largest_mps;
2253 overhead = interval_overhead;
2255 /* Otherwise carry over packet_size and overhead from the last
2256 * time we had a remainder.
2258 bw_used += bw_added;
2259 if (bw_used > max_bandwidth) {
2260 xhci_warn(xhci, "Not enough bandwidth. "
2261 "Proposed: %u, Max: %u\n",
2262 bw_used, max_bandwidth);
2267 * Ok, we know we have some packets left over after even-handedly
2268 * scheduling interval 15. We don't know which microframes they will
2269 * fit into, so we over-schedule and say they will be scheduled every
2272 if (packets_remaining > 0)
2273 bw_used += overhead + packet_size;
2275 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2276 unsigned int port_index = virt_dev->real_port - 1;
2278 /* OK, we're manipulating a HS device attached to a
2279 * root port bandwidth domain. Include the number of active TTs
2280 * in the bandwidth used.
2282 bw_used += TT_HS_OVERHEAD *
2283 xhci->rh_bw[port_index].num_active_tts;
2286 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2287 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2288 "Available: %u " "percent",
2289 bw_used, max_bandwidth, bw_reserved,
2290 (max_bandwidth - bw_used - bw_reserved) * 100 /
2293 bw_used += bw_reserved;
2294 if (bw_used > max_bandwidth) {
2295 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2296 bw_used, max_bandwidth);
2300 bw_table->bw_used = bw_used;
2304 static bool xhci_is_async_ep(unsigned int ep_type)
2306 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2307 ep_type != ISOC_IN_EP &&
2308 ep_type != INT_IN_EP);
2311 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2313 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2316 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2318 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2320 if (ep_bw->ep_interval == 0)
2321 return SS_OVERHEAD_BURST +
2322 (ep_bw->mult * ep_bw->num_packets *
2323 (SS_OVERHEAD + mps));
2324 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2325 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2326 1 << ep_bw->ep_interval);
2330 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2331 struct xhci_bw_info *ep_bw,
2332 struct xhci_interval_bw_table *bw_table,
2333 struct usb_device *udev,
2334 struct xhci_virt_ep *virt_ep,
2335 struct xhci_tt_bw_info *tt_info)
2337 struct xhci_interval_bw *interval_bw;
2338 int normalized_interval;
2340 if (xhci_is_async_ep(ep_bw->type))
2343 if (udev->speed == USB_SPEED_SUPER) {
2344 if (xhci_is_sync_in_ep(ep_bw->type))
2345 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2346 xhci_get_ss_bw_consumed(ep_bw);
2348 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2349 xhci_get_ss_bw_consumed(ep_bw);
2353 /* SuperSpeed endpoints never get added to intervals in the table, so
2354 * this check is only valid for HS/FS/LS devices.
2356 if (list_empty(&virt_ep->bw_endpoint_list))
2358 /* For LS/FS devices, we need to translate the interval expressed in
2359 * microframes to frames.
2361 if (udev->speed == USB_SPEED_HIGH)
2362 normalized_interval = ep_bw->ep_interval;
2364 normalized_interval = ep_bw->ep_interval - 3;
2366 if (normalized_interval == 0)
2367 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2368 interval_bw = &bw_table->interval_bw[normalized_interval];
2369 interval_bw->num_packets -= ep_bw->num_packets;
2370 switch (udev->speed) {
2372 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2374 case USB_SPEED_FULL:
2375 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2377 case USB_SPEED_HIGH:
2378 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2380 case USB_SPEED_SUPER:
2381 case USB_SPEED_UNKNOWN:
2382 case USB_SPEED_WIRELESS:
2383 /* Should never happen because only LS/FS/HS endpoints will get
2384 * added to the endpoint list.
2389 tt_info->active_eps -= 1;
2390 list_del_init(&virt_ep->bw_endpoint_list);
2393 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2394 struct xhci_bw_info *ep_bw,
2395 struct xhci_interval_bw_table *bw_table,
2396 struct usb_device *udev,
2397 struct xhci_virt_ep *virt_ep,
2398 struct xhci_tt_bw_info *tt_info)
2400 struct xhci_interval_bw *interval_bw;
2401 struct xhci_virt_ep *smaller_ep;
2402 int normalized_interval;
2404 if (xhci_is_async_ep(ep_bw->type))
2407 if (udev->speed == USB_SPEED_SUPER) {
2408 if (xhci_is_sync_in_ep(ep_bw->type))
2409 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2410 xhci_get_ss_bw_consumed(ep_bw);
2412 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2413 xhci_get_ss_bw_consumed(ep_bw);
2417 /* For LS/FS devices, we need to translate the interval expressed in
2418 * microframes to frames.
2420 if (udev->speed == USB_SPEED_HIGH)
2421 normalized_interval = ep_bw->ep_interval;
2423 normalized_interval = ep_bw->ep_interval - 3;
2425 if (normalized_interval == 0)
2426 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2427 interval_bw = &bw_table->interval_bw[normalized_interval];
2428 interval_bw->num_packets += ep_bw->num_packets;
2429 switch (udev->speed) {
2431 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2433 case USB_SPEED_FULL:
2434 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2436 case USB_SPEED_HIGH:
2437 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2439 case USB_SPEED_SUPER:
2440 case USB_SPEED_UNKNOWN:
2441 case USB_SPEED_WIRELESS:
2442 /* Should never happen because only LS/FS/HS endpoints will get
2443 * added to the endpoint list.
2449 tt_info->active_eps += 1;
2450 /* Insert the endpoint into the list, largest max packet size first. */
2451 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2453 if (ep_bw->max_packet_size >=
2454 smaller_ep->bw_info.max_packet_size) {
2455 /* Add the new ep before the smaller endpoint */
2456 list_add_tail(&virt_ep->bw_endpoint_list,
2457 &smaller_ep->bw_endpoint_list);
2461 /* Add the new endpoint at the end of the list. */
2462 list_add_tail(&virt_ep->bw_endpoint_list,
2463 &interval_bw->endpoints);
2466 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2467 struct xhci_virt_device *virt_dev,
2470 struct xhci_root_port_bw_info *rh_bw_info;
2471 if (!virt_dev->tt_info)
2474 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2475 if (old_active_eps == 0 &&
2476 virt_dev->tt_info->active_eps != 0) {
2477 rh_bw_info->num_active_tts += 1;
2478 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2479 } else if (old_active_eps != 0 &&
2480 virt_dev->tt_info->active_eps == 0) {
2481 rh_bw_info->num_active_tts -= 1;
2482 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2486 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2487 struct xhci_virt_device *virt_dev,
2488 struct xhci_container_ctx *in_ctx)
2490 struct xhci_bw_info ep_bw_info[31];
2492 struct xhci_input_control_ctx *ctrl_ctx;
2493 int old_active_eps = 0;
2495 if (virt_dev->tt_info)
2496 old_active_eps = virt_dev->tt_info->active_eps;
2498 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2500 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2505 for (i = 0; i < 31; i++) {
2506 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2509 /* Make a copy of the BW info in case we need to revert this */
2510 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2511 sizeof(ep_bw_info[i]));
2512 /* Drop the endpoint from the interval table if the endpoint is
2513 * being dropped or changed.
2515 if (EP_IS_DROPPED(ctrl_ctx, i))
2516 xhci_drop_ep_from_interval_table(xhci,
2517 &virt_dev->eps[i].bw_info,
2523 /* Overwrite the information stored in the endpoints' bw_info */
2524 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2525 for (i = 0; i < 31; i++) {
2526 /* Add any changed or added endpoints to the interval table */
2527 if (EP_IS_ADDED(ctrl_ctx, i))
2528 xhci_add_ep_to_interval_table(xhci,
2529 &virt_dev->eps[i].bw_info,
2536 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2537 /* Ok, this fits in the bandwidth we have.
2538 * Update the number of active TTs.
2540 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2544 /* We don't have enough bandwidth for this, revert the stored info. */
2545 for (i = 0; i < 31; i++) {
2546 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2549 /* Drop the new copies of any added or changed endpoints from
2550 * the interval table.
2552 if (EP_IS_ADDED(ctrl_ctx, i)) {
2553 xhci_drop_ep_from_interval_table(xhci,
2554 &virt_dev->eps[i].bw_info,
2560 /* Revert the endpoint back to its old information */
2561 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2562 sizeof(ep_bw_info[i]));
2563 /* Add any changed or dropped endpoints back into the table */
2564 if (EP_IS_DROPPED(ctrl_ctx, i))
2565 xhci_add_ep_to_interval_table(xhci,
2566 &virt_dev->eps[i].bw_info,
2576 /* Issue a configure endpoint command or evaluate context command
2577 * and wait for it to finish.
2579 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2580 struct usb_device *udev,
2581 struct xhci_command *command,
2582 bool ctx_change, bool must_succeed)
2585 unsigned long flags;
2586 struct xhci_input_control_ctx *ctrl_ctx;
2587 struct xhci_virt_device *virt_dev;
2592 spin_lock_irqsave(&xhci->lock, flags);
2593 virt_dev = xhci->devs[udev->slot_id];
2595 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2597 spin_unlock_irqrestore(&xhci->lock, flags);
2598 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2603 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2604 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2605 spin_unlock_irqrestore(&xhci->lock, flags);
2606 xhci_warn(xhci, "Not enough host resources, "
2607 "active endpoint contexts = %u\n",
2608 xhci->num_active_eps);
2611 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2612 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2613 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2614 xhci_free_host_resources(xhci, ctrl_ctx);
2615 spin_unlock_irqrestore(&xhci->lock, flags);
2616 xhci_warn(xhci, "Not enough bandwidth\n");
2621 ret = xhci_queue_configure_endpoint(xhci, command,
2622 command->in_ctx->dma,
2623 udev->slot_id, must_succeed);
2625 ret = xhci_queue_evaluate_context(xhci, command,
2626 command->in_ctx->dma,
2627 udev->slot_id, must_succeed);
2629 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2630 xhci_free_host_resources(xhci, ctrl_ctx);
2631 spin_unlock_irqrestore(&xhci->lock, flags);
2632 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2633 "FIXME allocate a new ring segment");
2636 xhci_ring_cmd_db(xhci);
2637 spin_unlock_irqrestore(&xhci->lock, flags);
2639 /* Wait for the configure endpoint command to complete */
2640 wait_for_completion(command->completion);
2643 ret = xhci_configure_endpoint_result(xhci, udev,
2646 ret = xhci_evaluate_context_result(xhci, udev,
2649 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2650 spin_lock_irqsave(&xhci->lock, flags);
2651 /* If the command failed, remove the reserved resources.
2652 * Otherwise, clean up the estimate to include dropped eps.
2655 xhci_free_host_resources(xhci, ctrl_ctx);
2657 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2658 spin_unlock_irqrestore(&xhci->lock, flags);
2663 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2664 struct xhci_virt_device *vdev, int i)
2666 struct xhci_virt_ep *ep = &vdev->eps[i];
2668 if (ep->ep_state & EP_HAS_STREAMS) {
2669 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2670 xhci_get_endpoint_address(i));
2671 xhci_free_stream_info(xhci, ep->stream_info);
2672 ep->stream_info = NULL;
2673 ep->ep_state &= ~EP_HAS_STREAMS;
2677 /* Called after one or more calls to xhci_add_endpoint() or
2678 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2679 * to call xhci_reset_bandwidth().
2681 * Since we are in the middle of changing either configuration or
2682 * installing a new alt setting, the USB core won't allow URBs to be
2683 * enqueued for any endpoint on the old config or interface. Nothing
2684 * else should be touching the xhci->devs[slot_id] structure, so we
2685 * don't need to take the xhci->lock for manipulating that.
2687 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2691 struct xhci_hcd *xhci;
2692 struct xhci_virt_device *virt_dev;
2693 struct xhci_input_control_ctx *ctrl_ctx;
2694 struct xhci_slot_ctx *slot_ctx;
2695 struct xhci_command *command;
2697 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2700 xhci = hcd_to_xhci(hcd);
2701 if (xhci->xhc_state & XHCI_STATE_DYING)
2704 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2705 virt_dev = xhci->devs[udev->slot_id];
2707 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2711 command->in_ctx = virt_dev->in_ctx;
2713 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2714 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2716 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2719 goto command_cleanup;
2721 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2722 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2723 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2725 /* Don't issue the command if there's no endpoints to update. */
2726 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2727 ctrl_ctx->drop_flags == 0) {
2729 goto command_cleanup;
2731 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2732 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2733 for (i = 31; i >= 1; i--) {
2734 __le32 le32 = cpu_to_le32(BIT(i));
2736 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2737 || (ctrl_ctx->add_flags & le32) || i == 1) {
2738 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2739 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2743 xhci_dbg(xhci, "New Input Control Context:\n");
2744 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2745 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2747 ret = xhci_configure_endpoint(xhci, udev, command,
2750 /* Callee should call reset_bandwidth() */
2751 goto command_cleanup;
2753 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2754 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2755 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2757 /* Free any rings that were dropped, but not changed. */
2758 for (i = 1; i < 31; ++i) {
2759 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2760 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2761 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2762 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2765 xhci_zero_in_ctx(xhci, virt_dev);
2767 * Install any rings for completely new endpoints or changed endpoints,
2768 * and free or cache any old rings from changed endpoints.
2770 for (i = 1; i < 31; ++i) {
2771 if (!virt_dev->eps[i].new_ring)
2773 /* Only cache or free the old ring if it exists.
2774 * It may not if this is the first add of an endpoint.
2776 if (virt_dev->eps[i].ring) {
2777 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2779 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2780 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2781 virt_dev->eps[i].new_ring = NULL;
2784 kfree(command->completion);
2790 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2792 struct xhci_hcd *xhci;
2793 struct xhci_virt_device *virt_dev;
2796 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2799 xhci = hcd_to_xhci(hcd);
2801 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2802 virt_dev = xhci->devs[udev->slot_id];
2803 /* Free any rings allocated for added endpoints */
2804 for (i = 0; i < 31; ++i) {
2805 if (virt_dev->eps[i].new_ring) {
2806 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2807 virt_dev->eps[i].new_ring = NULL;
2810 xhci_zero_in_ctx(xhci, virt_dev);
2813 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2814 struct xhci_container_ctx *in_ctx,
2815 struct xhci_container_ctx *out_ctx,
2816 struct xhci_input_control_ctx *ctrl_ctx,
2817 u32 add_flags, u32 drop_flags)
2819 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2820 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2821 xhci_slot_copy(xhci, in_ctx, out_ctx);
2822 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2824 xhci_dbg(xhci, "Input Context:\n");
2825 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2828 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2829 unsigned int slot_id, unsigned int ep_index,
2830 struct xhci_dequeue_state *deq_state)
2832 struct xhci_input_control_ctx *ctrl_ctx;
2833 struct xhci_container_ctx *in_ctx;
2834 struct xhci_ep_ctx *ep_ctx;
2838 in_ctx = xhci->devs[slot_id]->in_ctx;
2839 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2841 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2846 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2847 xhci->devs[slot_id]->out_ctx, ep_index);
2848 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2849 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2850 deq_state->new_deq_ptr);
2852 xhci_warn(xhci, "WARN Cannot submit config ep after "
2853 "reset ep command\n");
2854 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2855 deq_state->new_deq_seg,
2856 deq_state->new_deq_ptr);
2859 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2861 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2862 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2863 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2864 added_ctxs, added_ctxs);
2867 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2868 struct usb_device *udev, unsigned int ep_index)
2870 struct xhci_dequeue_state deq_state;
2871 struct xhci_virt_ep *ep;
2873 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2874 "Cleaning up stalled endpoint ring");
2875 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2876 /* We need to move the HW's dequeue pointer past this TD,
2877 * or it will attempt to resend it on the next doorbell ring.
2879 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2880 ep_index, ep->stopped_stream, ep->stopped_td,
2883 /* HW with the reset endpoint quirk will use the saved dequeue state to
2884 * issue a configure endpoint command later.
2886 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2887 struct xhci_command *command;
2888 /* Can't sleep if we're called from cleanup_halted_endpoint() */
2889 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2892 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2893 "Queueing new dequeue state");
2894 xhci_queue_new_dequeue_state(xhci, command, udev->slot_id,
2895 ep_index, ep->stopped_stream, &deq_state);
2897 /* Better hope no one uses the input context between now and the
2898 * reset endpoint completion!
2899 * XXX: No idea how this hardware will react when stream rings
2902 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2903 "Setting up input context for "
2904 "configure endpoint command");
2905 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2906 ep_index, &deq_state);
2910 /* Deal with stalled endpoints. The core should have sent the control message
2911 * to clear the halt condition. However, we need to make the xHCI hardware
2912 * reset its sequence number, since a device will expect a sequence number of
2913 * zero after the halt condition is cleared.
2914 * Context: in_interrupt
2916 void xhci_endpoint_reset(struct usb_hcd *hcd,
2917 struct usb_host_endpoint *ep)
2919 struct xhci_hcd *xhci;
2920 struct usb_device *udev;
2921 unsigned int ep_index;
2922 unsigned long flags;
2924 struct xhci_virt_ep *virt_ep;
2925 struct xhci_command *command;
2927 xhci = hcd_to_xhci(hcd);
2928 udev = (struct usb_device *) ep->hcpriv;
2929 /* Called with a root hub endpoint (or an endpoint that wasn't added
2930 * with xhci_add_endpoint()
2934 ep_index = xhci_get_endpoint_index(&ep->desc);
2935 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2936 if (!virt_ep->stopped_td) {
2937 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2938 "Endpoint 0x%x not halted, refusing to reset.",
2939 ep->desc.bEndpointAddress);
2942 if (usb_endpoint_xfer_control(&ep->desc)) {
2943 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2944 "Control endpoint stall already handled.");
2948 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2952 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2953 "Queueing reset endpoint command");
2954 spin_lock_irqsave(&xhci->lock, flags);
2955 ret = xhci_queue_reset_ep(xhci, command, udev->slot_id, ep_index);
2957 * Can't change the ring dequeue pointer until it's transitioned to the
2958 * stopped state, which is only upon a successful reset endpoint
2959 * command. Better hope that last command worked!
2962 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2963 kfree(virt_ep->stopped_td);
2964 xhci_ring_cmd_db(xhci);
2966 virt_ep->stopped_td = NULL;
2967 virt_ep->stopped_stream = 0;
2968 spin_unlock_irqrestore(&xhci->lock, flags);
2971 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2974 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2975 struct usb_device *udev, struct usb_host_endpoint *ep,
2976 unsigned int slot_id)
2979 unsigned int ep_index;
2980 unsigned int ep_state;
2984 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2987 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2988 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2989 " descriptor for ep 0x%x does not support streams\n",
2990 ep->desc.bEndpointAddress);
2994 ep_index = xhci_get_endpoint_index(&ep->desc);
2995 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2996 if (ep_state & EP_HAS_STREAMS ||
2997 ep_state & EP_GETTING_STREAMS) {
2998 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2999 "already has streams set up.\n",
3000 ep->desc.bEndpointAddress);
3001 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3002 "dynamic stream context array reallocation.\n");
3005 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3006 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3007 "endpoint 0x%x; URBs are pending.\n",
3008 ep->desc.bEndpointAddress);
3014 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3015 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3017 unsigned int max_streams;
3019 /* The stream context array size must be a power of two */
3020 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3022 * Find out how many primary stream array entries the host controller
3023 * supports. Later we may use secondary stream arrays (similar to 2nd
3024 * level page entries), but that's an optional feature for xHCI host
3025 * controllers. xHCs must support at least 4 stream IDs.
3027 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3028 if (*num_stream_ctxs > max_streams) {
3029 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3031 *num_stream_ctxs = max_streams;
3032 *num_streams = max_streams;
3036 /* Returns an error code if one of the endpoint already has streams.
3037 * This does not change any data structures, it only checks and gathers
3040 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3041 struct usb_device *udev,
3042 struct usb_host_endpoint **eps, unsigned int num_eps,
3043 unsigned int *num_streams, u32 *changed_ep_bitmask)
3045 unsigned int max_streams;
3046 unsigned int endpoint_flag;
3050 for (i = 0; i < num_eps; i++) {
3051 ret = xhci_check_streams_endpoint(xhci, udev,
3052 eps[i], udev->slot_id);
3056 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3057 if (max_streams < (*num_streams - 1)) {
3058 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3059 eps[i]->desc.bEndpointAddress,
3061 *num_streams = max_streams+1;
3064 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3065 if (*changed_ep_bitmask & endpoint_flag)
3067 *changed_ep_bitmask |= endpoint_flag;
3072 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3073 struct usb_device *udev,
3074 struct usb_host_endpoint **eps, unsigned int num_eps)
3076 u32 changed_ep_bitmask = 0;
3077 unsigned int slot_id;
3078 unsigned int ep_index;
3079 unsigned int ep_state;
3082 slot_id = udev->slot_id;
3083 if (!xhci->devs[slot_id])
3086 for (i = 0; i < num_eps; i++) {
3087 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3088 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3089 /* Are streams already being freed for the endpoint? */
3090 if (ep_state & EP_GETTING_NO_STREAMS) {
3091 xhci_warn(xhci, "WARN Can't disable streams for "
3093 "streams are being disabled already\n",
3094 eps[i]->desc.bEndpointAddress);
3097 /* Are there actually any streams to free? */
3098 if (!(ep_state & EP_HAS_STREAMS) &&
3099 !(ep_state & EP_GETTING_STREAMS)) {
3100 xhci_warn(xhci, "WARN Can't disable streams for "
3102 "streams are already disabled!\n",
3103 eps[i]->desc.bEndpointAddress);
3104 xhci_warn(xhci, "WARN xhci_free_streams() called "
3105 "with non-streams endpoint\n");
3108 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3110 return changed_ep_bitmask;
3114 * The USB device drivers use this function (though the HCD interface in USB
3115 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3116 * coordinate mass storage command queueing across multiple endpoints (basically
3117 * a stream ID == a task ID).
3119 * Setting up streams involves allocating the same size stream context array
3120 * for each endpoint and issuing a configure endpoint command for all endpoints.
3122 * Don't allow the call to succeed if one endpoint only supports one stream
3123 * (which means it doesn't support streams at all).
3125 * Drivers may get less stream IDs than they asked for, if the host controller
3126 * hardware or endpoints claim they can't support the number of requested
3129 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3130 struct usb_host_endpoint **eps, unsigned int num_eps,
3131 unsigned int num_streams, gfp_t mem_flags)
3134 struct xhci_hcd *xhci;
3135 struct xhci_virt_device *vdev;
3136 struct xhci_command *config_cmd;
3137 struct xhci_input_control_ctx *ctrl_ctx;
3138 unsigned int ep_index;
3139 unsigned int num_stream_ctxs;
3140 unsigned long flags;
3141 u32 changed_ep_bitmask = 0;
3146 /* Add one to the number of streams requested to account for
3147 * stream 0 that is reserved for xHCI usage.
3150 xhci = hcd_to_xhci(hcd);
3151 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3154 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3155 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3156 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3157 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3161 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3163 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3166 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3168 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3170 xhci_free_command(xhci, config_cmd);
3174 /* Check to make sure all endpoints are not already configured for
3175 * streams. While we're at it, find the maximum number of streams that
3176 * all the endpoints will support and check for duplicate endpoints.
3178 spin_lock_irqsave(&xhci->lock, flags);
3179 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3180 num_eps, &num_streams, &changed_ep_bitmask);
3182 xhci_free_command(xhci, config_cmd);
3183 spin_unlock_irqrestore(&xhci->lock, flags);
3186 if (num_streams <= 1) {
3187 xhci_warn(xhci, "WARN: endpoints can't handle "
3188 "more than one stream.\n");
3189 xhci_free_command(xhci, config_cmd);
3190 spin_unlock_irqrestore(&xhci->lock, flags);
3193 vdev = xhci->devs[udev->slot_id];
3194 /* Mark each endpoint as being in transition, so
3195 * xhci_urb_enqueue() will reject all URBs.
3197 for (i = 0; i < num_eps; i++) {
3198 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3199 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3201 spin_unlock_irqrestore(&xhci->lock, flags);
3203 /* Setup internal data structures and allocate HW data structures for
3204 * streams (but don't install the HW structures in the input context
3205 * until we're sure all memory allocation succeeded).
3207 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3208 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3209 num_stream_ctxs, num_streams);
3211 for (i = 0; i < num_eps; i++) {
3212 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3213 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3215 num_streams, mem_flags);
3216 if (!vdev->eps[ep_index].stream_info)
3218 /* Set maxPstreams in endpoint context and update deq ptr to
3219 * point to stream context array. FIXME
3223 /* Set up the input context for a configure endpoint command. */
3224 for (i = 0; i < num_eps; i++) {
3225 struct xhci_ep_ctx *ep_ctx;
3227 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3228 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3230 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3231 vdev->out_ctx, ep_index);
3232 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3233 vdev->eps[ep_index].stream_info);
3235 /* Tell the HW to drop its old copy of the endpoint context info
3236 * and add the updated copy from the input context.
3238 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3239 vdev->out_ctx, ctrl_ctx,
3240 changed_ep_bitmask, changed_ep_bitmask);
3242 /* Issue and wait for the configure endpoint command */
3243 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3246 /* xHC rejected the configure endpoint command for some reason, so we
3247 * leave the old ring intact and free our internal streams data
3253 spin_lock_irqsave(&xhci->lock, flags);
3254 for (i = 0; i < num_eps; i++) {
3255 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3256 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3257 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3258 udev->slot_id, ep_index);
3259 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3261 xhci_free_command(xhci, config_cmd);
3262 spin_unlock_irqrestore(&xhci->lock, flags);
3264 /* Subtract 1 for stream 0, which drivers can't use */
3265 return num_streams - 1;
3268 /* If it didn't work, free the streams! */
3269 for (i = 0; i < num_eps; i++) {
3270 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3271 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3272 vdev->eps[ep_index].stream_info = NULL;
3273 /* FIXME Unset maxPstreams in endpoint context and
3274 * update deq ptr to point to normal string ring.
3276 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3277 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3278 xhci_endpoint_zero(xhci, vdev, eps[i]);
3280 xhci_free_command(xhci, config_cmd);
3284 /* Transition the endpoint from using streams to being a "normal" endpoint
3287 * Modify the endpoint context state, submit a configure endpoint command,
3288 * and free all endpoint rings for streams if that completes successfully.
3290 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3291 struct usb_host_endpoint **eps, unsigned int num_eps,
3295 struct xhci_hcd *xhci;
3296 struct xhci_virt_device *vdev;
3297 struct xhci_command *command;
3298 struct xhci_input_control_ctx *ctrl_ctx;
3299 unsigned int ep_index;
3300 unsigned long flags;
3301 u32 changed_ep_bitmask;
3303 xhci = hcd_to_xhci(hcd);
3304 vdev = xhci->devs[udev->slot_id];
3306 /* Set up a configure endpoint command to remove the streams rings */
3307 spin_lock_irqsave(&xhci->lock, flags);
3308 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3309 udev, eps, num_eps);
3310 if (changed_ep_bitmask == 0) {
3311 spin_unlock_irqrestore(&xhci->lock, flags);
3315 /* Use the xhci_command structure from the first endpoint. We may have
3316 * allocated too many, but the driver may call xhci_free_streams() for
3317 * each endpoint it grouped into one call to xhci_alloc_streams().
3319 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3320 command = vdev->eps[ep_index].stream_info->free_streams_command;
3321 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3323 spin_unlock_irqrestore(&xhci->lock, flags);
3324 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3329 for (i = 0; i < num_eps; i++) {
3330 struct xhci_ep_ctx *ep_ctx;
3332 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3333 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3334 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3335 EP_GETTING_NO_STREAMS;
3337 xhci_endpoint_copy(xhci, command->in_ctx,
3338 vdev->out_ctx, ep_index);
3339 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3340 &vdev->eps[ep_index]);
3342 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3343 vdev->out_ctx, ctrl_ctx,
3344 changed_ep_bitmask, changed_ep_bitmask);
3345 spin_unlock_irqrestore(&xhci->lock, flags);
3347 /* Issue and wait for the configure endpoint command,
3348 * which must succeed.
3350 ret = xhci_configure_endpoint(xhci, udev, command,
3353 /* xHC rejected the configure endpoint command for some reason, so we
3354 * leave the streams rings intact.
3359 spin_lock_irqsave(&xhci->lock, flags);
3360 for (i = 0; i < num_eps; i++) {
3361 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3362 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3363 vdev->eps[ep_index].stream_info = NULL;
3364 /* FIXME Unset maxPstreams in endpoint context and
3365 * update deq ptr to point to normal string ring.
3367 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3368 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3370 spin_unlock_irqrestore(&xhci->lock, flags);
3376 * Deletes endpoint resources for endpoints that were active before a Reset
3377 * Device command, or a Disable Slot command. The Reset Device command leaves
3378 * the control endpoint intact, whereas the Disable Slot command deletes it.
3380 * Must be called with xhci->lock held.
3382 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3383 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3386 unsigned int num_dropped_eps = 0;
3387 unsigned int drop_flags = 0;
3389 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3390 if (virt_dev->eps[i].ring) {
3391 drop_flags |= 1 << i;
3395 xhci->num_active_eps -= num_dropped_eps;
3396 if (num_dropped_eps)
3397 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3398 "Dropped %u ep ctxs, flags = 0x%x, "
3400 num_dropped_eps, drop_flags,
3401 xhci->num_active_eps);
3405 * This submits a Reset Device Command, which will set the device state to 0,
3406 * set the device address to 0, and disable all the endpoints except the default
3407 * control endpoint. The USB core should come back and call
3408 * xhci_address_device(), and then re-set up the configuration. If this is
3409 * called because of a usb_reset_and_verify_device(), then the old alternate
3410 * settings will be re-installed through the normal bandwidth allocation
3413 * Wait for the Reset Device command to finish. Remove all structures
3414 * associated with the endpoints that were disabled. Clear the input device
3415 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3417 * If the virt_dev to be reset does not exist or does not match the udev,
3418 * it means the device is lost, possibly due to the xHC restore error and
3419 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3420 * re-allocate the device.
3422 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3425 unsigned long flags;
3426 struct xhci_hcd *xhci;
3427 unsigned int slot_id;
3428 struct xhci_virt_device *virt_dev;
3429 struct xhci_command *reset_device_cmd;
3430 int last_freed_endpoint;
3431 struct xhci_slot_ctx *slot_ctx;
3432 int old_active_eps = 0;
3434 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3437 xhci = hcd_to_xhci(hcd);
3438 slot_id = udev->slot_id;
3439 virt_dev = xhci->devs[slot_id];
3441 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3442 "not exist. Re-allocate the device\n", slot_id);
3443 ret = xhci_alloc_dev(hcd, udev);
3450 if (virt_dev->udev != udev) {
3451 /* If the virt_dev and the udev does not match, this virt_dev
3452 * may belong to another udev.
3453 * Re-allocate the device.
3455 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3456 "not match the udev. Re-allocate the device\n",
3458 ret = xhci_alloc_dev(hcd, udev);
3465 /* If device is not setup, there is no point in resetting it */
3466 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3467 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3468 SLOT_STATE_DISABLED)
3471 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3472 /* Allocate the command structure that holds the struct completion.
3473 * Assume we're in process context, since the normal device reset
3474 * process has to wait for the device anyway. Storage devices are
3475 * reset as part of error handling, so use GFP_NOIO instead of
3478 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3479 if (!reset_device_cmd) {
3480 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3484 /* Attempt to submit the Reset Device command to the command ring */
3485 spin_lock_irqsave(&xhci->lock, flags);
3487 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3489 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3490 spin_unlock_irqrestore(&xhci->lock, flags);
3491 goto command_cleanup;
3493 xhci_ring_cmd_db(xhci);
3494 spin_unlock_irqrestore(&xhci->lock, flags);
3496 /* Wait for the Reset Device command to finish */
3497 wait_for_completion(reset_device_cmd->completion);
3499 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3500 * unless we tried to reset a slot ID that wasn't enabled,
3501 * or the device wasn't in the addressed or configured state.
3503 ret = reset_device_cmd->status;
3505 case COMP_CMD_ABORT:
3507 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3509 goto command_cleanup;
3510 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3511 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3512 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3514 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3515 xhci_dbg(xhci, "Not freeing device rings.\n");
3516 /* Don't treat this as an error. May change my mind later. */
3518 goto command_cleanup;
3520 xhci_dbg(xhci, "Successful reset device command.\n");
3523 if (xhci_is_vendor_info_code(xhci, ret))
3525 xhci_warn(xhci, "Unknown completion code %u for "
3526 "reset device command.\n", ret);
3528 goto command_cleanup;
3531 /* Free up host controller endpoint resources */
3532 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3533 spin_lock_irqsave(&xhci->lock, flags);
3534 /* Don't delete the default control endpoint resources */
3535 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3536 spin_unlock_irqrestore(&xhci->lock, flags);
3539 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3540 last_freed_endpoint = 1;
3541 for (i = 1; i < 31; ++i) {
3542 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3544 if (ep->ep_state & EP_HAS_STREAMS) {
3545 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3546 xhci_get_endpoint_address(i));
3547 xhci_free_stream_info(xhci, ep->stream_info);
3548 ep->stream_info = NULL;
3549 ep->ep_state &= ~EP_HAS_STREAMS;
3553 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3554 last_freed_endpoint = i;
3556 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3557 xhci_drop_ep_from_interval_table(xhci,
3558 &virt_dev->eps[i].bw_info,
3563 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3565 /* If necessary, update the number of active TTs on this root port */
3566 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3568 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3569 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3573 xhci_free_command(xhci, reset_device_cmd);
3578 * At this point, the struct usb_device is about to go away, the device has
3579 * disconnected, and all traffic has been stopped and the endpoints have been
3580 * disabled. Free any HC data structures associated with that device.
3582 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3584 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3585 struct xhci_virt_device *virt_dev;
3586 unsigned long flags;
3589 struct xhci_command *command;
3591 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3595 #ifndef CONFIG_USB_DEFAULT_PERSIST
3597 * We called pm_runtime_get_noresume when the device was attached.
3598 * Decrement the counter here to allow controller to runtime suspend
3599 * if no devices remain.
3601 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3602 pm_runtime_put_noidle(hcd->self.controller);
3605 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3606 /* If the host is halted due to driver unload, we still need to free the
3609 if (ret <= 0 && ret != -ENODEV) {
3614 virt_dev = xhci->devs[udev->slot_id];
3616 /* Stop any wayward timer functions (which may grab the lock) */
3617 for (i = 0; i < 31; ++i) {
3618 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3619 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3622 spin_lock_irqsave(&xhci->lock, flags);
3623 /* Don't disable the slot if the host controller is dead. */
3624 state = readl(&xhci->op_regs->status);
3625 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3626 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3627 xhci_free_virt_device(xhci, udev->slot_id);
3628 spin_unlock_irqrestore(&xhci->lock, flags);
3633 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3635 spin_unlock_irqrestore(&xhci->lock, flags);
3636 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3639 xhci_ring_cmd_db(xhci);
3640 spin_unlock_irqrestore(&xhci->lock, flags);
3643 * Event command completion handler will free any data structures
3644 * associated with the slot. XXX Can free sleep?
3649 * Checks if we have enough host controller resources for the default control
3652 * Must be called with xhci->lock held.
3654 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3656 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3657 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3658 "Not enough ep ctxs: "
3659 "%u active, need to add 1, limit is %u.",
3660 xhci->num_active_eps, xhci->limit_active_eps);
3663 xhci->num_active_eps += 1;
3664 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3665 "Adding 1 ep ctx, %u now active.",
3666 xhci->num_active_eps);
3672 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3673 * timed out, or allocating memory failed. Returns 1 on success.
3675 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3677 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3678 unsigned long flags;
3680 struct xhci_command *command;
3682 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3686 spin_lock_irqsave(&xhci->lock, flags);
3687 command->completion = &xhci->addr_dev;
3688 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3690 spin_unlock_irqrestore(&xhci->lock, flags);
3691 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3695 xhci_ring_cmd_db(xhci);
3696 spin_unlock_irqrestore(&xhci->lock, flags);
3698 wait_for_completion(command->completion);
3700 if (!xhci->slot_id || command->status != COMP_SUCCESS) {
3701 xhci_err(xhci, "Error while assigning device slot ID\n");
3702 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3704 readl(&xhci->cap_regs->hcs_params1)));
3709 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3710 spin_lock_irqsave(&xhci->lock, flags);
3711 ret = xhci_reserve_host_control_ep_resources(xhci);
3713 spin_unlock_irqrestore(&xhci->lock, flags);
3714 xhci_warn(xhci, "Not enough host resources, "
3715 "active endpoint contexts = %u\n",
3716 xhci->num_active_eps);
3719 spin_unlock_irqrestore(&xhci->lock, flags);
3721 /* Use GFP_NOIO, since this function can be called from
3722 * xhci_discover_or_reset_device(), which may be called as part of
3723 * mass storage driver error handling.
3725 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3726 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3729 udev->slot_id = xhci->slot_id;
3731 #ifndef CONFIG_USB_DEFAULT_PERSIST
3733 * If resetting upon resume, we can't put the controller into runtime
3734 * suspend if there is a device attached.
3736 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3737 pm_runtime_get_noresume(hcd->self.controller);
3742 /* Is this a LS or FS device under a HS hub? */
3743 /* Hub or peripherial? */
3747 /* Disable slot, if we can do it without mem alloc */
3748 spin_lock_irqsave(&xhci->lock, flags);
3749 command->completion = NULL;
3750 command->status = 0;
3751 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3753 xhci_ring_cmd_db(xhci);
3754 spin_unlock_irqrestore(&xhci->lock, flags);
3759 * Issue an Address Device command and optionally send a corresponding
3760 * SetAddress request to the device.
3761 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3762 * we should only issue and wait on one address command at the same time.
3764 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3765 enum xhci_setup_dev setup)
3767 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3768 unsigned long flags;
3769 struct xhci_virt_device *virt_dev;
3771 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3772 struct xhci_slot_ctx *slot_ctx;
3773 struct xhci_input_control_ctx *ctrl_ctx;
3775 struct xhci_command *command;
3777 if (!udev->slot_id) {
3778 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3779 "Bad Slot ID %d", udev->slot_id);
3783 virt_dev = xhci->devs[udev->slot_id];
3785 if (WARN_ON(!virt_dev)) {
3787 * In plug/unplug torture test with an NEC controller,
3788 * a zero-dereference was observed once due to virt_dev = 0.
3789 * Print useful debug rather than crash if it is observed again!
3791 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3796 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3800 command->in_ctx = virt_dev->in_ctx;
3801 command->completion = &xhci->addr_dev;
3803 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3804 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3806 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3812 * If this is the first Set Address since device plug-in or
3813 * virt_device realloaction after a resume with an xHCI power loss,
3814 * then set up the slot context.
3816 if (!slot_ctx->dev_info)
3817 xhci_setup_addressable_virt_dev(xhci, udev);
3818 /* Otherwise, update the control endpoint ring enqueue pointer. */
3820 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3821 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3822 ctrl_ctx->drop_flags = 0;
3824 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3825 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3826 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3827 le32_to_cpu(slot_ctx->dev_info) >> 27);
3829 spin_lock_irqsave(&xhci->lock, flags);
3830 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3831 udev->slot_id, setup);
3833 spin_unlock_irqrestore(&xhci->lock, flags);
3834 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3835 "FIXME: allocate a command ring segment");
3839 xhci_ring_cmd_db(xhci);
3840 spin_unlock_irqrestore(&xhci->lock, flags);
3842 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3843 wait_for_completion(command->completion);
3845 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3846 * the SetAddress() "recovery interval" required by USB and aborting the
3847 * command on a timeout.
3849 switch (command->status) {
3850 case COMP_CMD_ABORT:
3852 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3855 case COMP_CTX_STATE:
3857 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3858 act, udev->slot_id);
3862 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3866 dev_warn(&udev->dev,
3867 "ERROR: Incompatible device for setup %s command\n", act);
3871 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3872 "Successful setup %s command", act);
3876 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3877 act, command->status);
3878 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3879 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3880 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3888 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3889 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3890 "Op regs DCBAA ptr = %#016llx", temp_64);
3891 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3892 "Slot ID %d dcbaa entry @%p = %#016llx",
3894 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3895 (unsigned long long)
3896 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3897 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3898 "Output Context DMA address = %#08llx",
3899 (unsigned long long)virt_dev->out_ctx->dma);
3900 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3901 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3902 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3903 le32_to_cpu(slot_ctx->dev_info) >> 27);
3904 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3905 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3907 * USB core uses address 1 for the roothubs, so we add one to the
3908 * address given back to us by the HC.
3910 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3911 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3912 le32_to_cpu(slot_ctx->dev_info) >> 27);
3913 /* Zero the input context control for later use */
3914 ctrl_ctx->add_flags = 0;
3915 ctrl_ctx->drop_flags = 0;
3917 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3918 "Internal device address = %d",
3919 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3924 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3926 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3929 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3931 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3935 * Transfer the port index into real index in the HW port status
3936 * registers. Caculate offset between the port's PORTSC register
3937 * and port status base. Divide the number of per port register
3938 * to get the real index. The raw port number bases 1.
3940 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3942 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3943 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3944 __le32 __iomem *addr;
3947 if (hcd->speed != HCD_USB3)
3948 addr = xhci->usb2_ports[port1 - 1];
3950 addr = xhci->usb3_ports[port1 - 1];
3952 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3957 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3958 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3960 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3961 struct usb_device *udev, u16 max_exit_latency)
3963 struct xhci_virt_device *virt_dev;
3964 struct xhci_command *command;
3965 struct xhci_input_control_ctx *ctrl_ctx;
3966 struct xhci_slot_ctx *slot_ctx;
3967 unsigned long flags;
3970 spin_lock_irqsave(&xhci->lock, flags);
3971 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3972 spin_unlock_irqrestore(&xhci->lock, flags);
3976 /* Attempt to issue an Evaluate Context command to change the MEL. */
3977 virt_dev = xhci->devs[udev->slot_id];
3978 command = xhci->lpm_command;
3979 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3981 spin_unlock_irqrestore(&xhci->lock, flags);
3982 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3987 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3988 spin_unlock_irqrestore(&xhci->lock, flags);
3990 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3991 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3992 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3993 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3995 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3996 "Set up evaluate context for LPM MEL change.");
3997 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3998 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4000 /* Issue and wait for the evaluate context command. */
4001 ret = xhci_configure_endpoint(xhci, udev, command,
4003 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4004 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4007 spin_lock_irqsave(&xhci->lock, flags);
4008 virt_dev->current_mel = max_exit_latency;
4009 spin_unlock_irqrestore(&xhci->lock, flags);
4014 #ifdef CONFIG_PM_RUNTIME
4016 /* BESL to HIRD Encoding array for USB2 LPM */
4017 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4018 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4020 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4021 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4022 struct usb_device *udev)
4024 int u2del, besl, besl_host;
4025 int besl_device = 0;
4028 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4029 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4031 if (field & USB_BESL_SUPPORT) {
4032 for (besl_host = 0; besl_host < 16; besl_host++) {
4033 if (xhci_besl_encoding[besl_host] >= u2del)
4036 /* Use baseline BESL value as default */
4037 if (field & USB_BESL_BASELINE_VALID)
4038 besl_device = USB_GET_BESL_BASELINE(field);
4039 else if (field & USB_BESL_DEEP_VALID)
4040 besl_device = USB_GET_BESL_DEEP(field);
4045 besl_host = (u2del - 51) / 75 + 1;
4048 besl = besl_host + besl_device;
4055 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4056 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4063 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4065 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4066 l1 = udev->l1_params.timeout / 256;
4068 /* device has preferred BESLD */
4069 if (field & USB_BESL_DEEP_VALID) {
4070 besld = USB_GET_BESL_DEEP(field);
4074 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4077 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4078 struct usb_device *udev, int enable)
4080 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4081 __le32 __iomem **port_array;
4082 __le32 __iomem *pm_addr, *hlpm_addr;
4083 u32 pm_val, hlpm_val, field;
4084 unsigned int port_num;
4085 unsigned long flags;
4086 int hird, exit_latency;
4089 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4093 if (!udev->parent || udev->parent->parent ||
4094 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4097 if (udev->usb2_hw_lpm_capable != 1)
4100 spin_lock_irqsave(&xhci->lock, flags);
4102 port_array = xhci->usb2_ports;
4103 port_num = udev->portnum - 1;
4104 pm_addr = port_array[port_num] + PORTPMSC;
4105 pm_val = readl(pm_addr);
4106 hlpm_addr = port_array[port_num] + PORTHLPMC;
4107 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4109 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4110 enable ? "enable" : "disable", port_num + 1);
4113 /* Host supports BESL timeout instead of HIRD */
4114 if (udev->usb2_hw_lpm_besl_capable) {
4115 /* if device doesn't have a preferred BESL value use a
4116 * default one which works with mixed HIRD and BESL
4117 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4119 if ((field & USB_BESL_SUPPORT) &&
4120 (field & USB_BESL_BASELINE_VALID))
4121 hird = USB_GET_BESL_BASELINE(field);
4123 hird = udev->l1_params.besl;
4125 exit_latency = xhci_besl_encoding[hird];
4126 spin_unlock_irqrestore(&xhci->lock, flags);
4128 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4129 * input context for link powermanagement evaluate
4130 * context commands. It is protected by hcd->bandwidth
4131 * mutex and is shared by all devices. We need to set
4132 * the max ext latency in USB 2 BESL LPM as well, so
4133 * use the same mutex and xhci_change_max_exit_latency()
4135 mutex_lock(hcd->bandwidth_mutex);
4136 ret = xhci_change_max_exit_latency(xhci, udev,
4138 mutex_unlock(hcd->bandwidth_mutex);
4142 spin_lock_irqsave(&xhci->lock, flags);
4144 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4145 writel(hlpm_val, hlpm_addr);
4149 hird = xhci_calculate_hird_besl(xhci, udev);
4152 pm_val &= ~PORT_HIRD_MASK;
4153 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4154 writel(pm_val, pm_addr);
4155 pm_val = readl(pm_addr);
4157 writel(pm_val, pm_addr);
4161 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4162 writel(pm_val, pm_addr);
4165 if (udev->usb2_hw_lpm_besl_capable) {
4166 spin_unlock_irqrestore(&xhci->lock, flags);
4167 mutex_lock(hcd->bandwidth_mutex);
4168 xhci_change_max_exit_latency(xhci, udev, 0);
4169 mutex_unlock(hcd->bandwidth_mutex);
4174 spin_unlock_irqrestore(&xhci->lock, flags);
4178 /* check if a usb2 port supports a given extened capability protocol
4179 * only USB2 ports extended protocol capability values are cached.
4180 * Return 1 if capability is supported
4182 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4183 unsigned capability)
4185 u32 port_offset, port_count;
4188 for (i = 0; i < xhci->num_ext_caps; i++) {
4189 if (xhci->ext_caps[i] & capability) {
4190 /* port offsets starts at 1 */
4191 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4192 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4193 if (port >= port_offset &&
4194 port < port_offset + port_count)
4201 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4203 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4204 int portnum = udev->portnum - 1;
4206 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4210 /* we only support lpm for non-hub device connected to root hub yet */
4211 if (!udev->parent || udev->parent->parent ||
4212 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4215 if (xhci->hw_lpm_support == 1 &&
4216 xhci_check_usb2_port_capability(
4217 xhci, portnum, XHCI_HLC)) {
4218 udev->usb2_hw_lpm_capable = 1;
4219 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4220 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4221 if (xhci_check_usb2_port_capability(xhci, portnum,
4223 udev->usb2_hw_lpm_besl_capable = 1;
4231 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4232 struct usb_device *udev, int enable)
4237 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4242 #endif /* CONFIG_PM_RUNTIME */
4244 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4247 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4248 static unsigned long long xhci_service_interval_to_ns(
4249 struct usb_endpoint_descriptor *desc)
4251 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4254 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4255 enum usb3_link_state state)
4257 unsigned long long sel;
4258 unsigned long long pel;
4259 unsigned int max_sel_pel;
4264 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4265 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4266 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4267 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4271 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4272 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4273 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4277 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4279 return USB3_LPM_DISABLED;
4282 if (sel <= max_sel_pel && pel <= max_sel_pel)
4283 return USB3_LPM_DEVICE_INITIATED;
4285 if (sel > max_sel_pel)
4286 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4287 "due to long SEL %llu ms\n",
4290 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4291 "due to long PEL %llu ms\n",
4293 return USB3_LPM_DISABLED;
4296 /* The U1 timeout should be the maximum of the following values:
4297 * - For control endpoints, U1 system exit latency (SEL) * 3
4298 * - For bulk endpoints, U1 SEL * 5
4299 * - For interrupt endpoints:
4300 * - Notification EPs, U1 SEL * 3
4301 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4302 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4304 static unsigned long long xhci_calculate_intel_u1_timeout(
4305 struct usb_device *udev,
4306 struct usb_endpoint_descriptor *desc)
4308 unsigned long long timeout_ns;
4312 ep_type = usb_endpoint_type(desc);
4314 case USB_ENDPOINT_XFER_CONTROL:
4315 timeout_ns = udev->u1_params.sel * 3;
4317 case USB_ENDPOINT_XFER_BULK:
4318 timeout_ns = udev->u1_params.sel * 5;
4320 case USB_ENDPOINT_XFER_INT:
4321 intr_type = usb_endpoint_interrupt_type(desc);
4322 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4323 timeout_ns = udev->u1_params.sel * 3;
4326 /* Otherwise the calculation is the same as isoc eps */
4327 case USB_ENDPOINT_XFER_ISOC:
4328 timeout_ns = xhci_service_interval_to_ns(desc);
4329 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4330 if (timeout_ns < udev->u1_params.sel * 2)
4331 timeout_ns = udev->u1_params.sel * 2;
4340 /* Returns the hub-encoded U1 timeout value. */
4341 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4342 struct usb_device *udev,
4343 struct usb_endpoint_descriptor *desc)
4345 unsigned long long timeout_ns;
4347 if (xhci->quirks & XHCI_INTEL_HOST)
4348 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4350 timeout_ns = udev->u1_params.sel;
4352 /* The U1 timeout is encoded in 1us intervals.
4353 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4355 if (timeout_ns == USB3_LPM_DISABLED)
4358 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4360 /* If the necessary timeout value is bigger than what we can set in the
4361 * USB 3.0 hub, we have to disable hub-initiated U1.
4363 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4365 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4366 "due to long timeout %llu ms\n", timeout_ns);
4367 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4370 /* The U2 timeout should be the maximum of:
4371 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4372 * - largest bInterval of any active periodic endpoint (to avoid going
4373 * into lower power link states between intervals).
4374 * - the U2 Exit Latency of the device
4376 static unsigned long long xhci_calculate_intel_u2_timeout(
4377 struct usb_device *udev,
4378 struct usb_endpoint_descriptor *desc)
4380 unsigned long long timeout_ns;
4381 unsigned long long u2_del_ns;
4383 timeout_ns = 10 * 1000 * 1000;
4385 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4386 (xhci_service_interval_to_ns(desc) > timeout_ns))
4387 timeout_ns = xhci_service_interval_to_ns(desc);
4389 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4390 if (u2_del_ns > timeout_ns)
4391 timeout_ns = u2_del_ns;
4396 /* Returns the hub-encoded U2 timeout value. */
4397 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4398 struct usb_device *udev,
4399 struct usb_endpoint_descriptor *desc)
4401 unsigned long long timeout_ns;
4403 if (xhci->quirks & XHCI_INTEL_HOST)
4404 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4406 timeout_ns = udev->u2_params.sel;
4408 /* The U2 timeout is encoded in 256us intervals */
4409 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4410 /* If the necessary timeout value is bigger than what we can set in the
4411 * USB 3.0 hub, we have to disable hub-initiated U2.
4413 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4415 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4416 "due to long timeout %llu ms\n", timeout_ns);
4417 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4420 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4421 struct usb_device *udev,
4422 struct usb_endpoint_descriptor *desc,
4423 enum usb3_link_state state,
4426 if (state == USB3_LPM_U1)
4427 return xhci_calculate_u1_timeout(xhci, udev, desc);
4428 else if (state == USB3_LPM_U2)
4429 return xhci_calculate_u2_timeout(xhci, udev, desc);
4431 return USB3_LPM_DISABLED;
4434 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4435 struct usb_device *udev,
4436 struct usb_endpoint_descriptor *desc,
4437 enum usb3_link_state state,
4442 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4443 desc, state, timeout);
4445 /* If we found we can't enable hub-initiated LPM, or
4446 * the U1 or U2 exit latency was too high to allow
4447 * device-initiated LPM as well, just stop searching.
4449 if (alt_timeout == USB3_LPM_DISABLED ||
4450 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4451 *timeout = alt_timeout;
4454 if (alt_timeout > *timeout)
4455 *timeout = alt_timeout;
4459 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4460 struct usb_device *udev,
4461 struct usb_host_interface *alt,
4462 enum usb3_link_state state,
4467 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4468 if (xhci_update_timeout_for_endpoint(xhci, udev,
4469 &alt->endpoint[j].desc, state, timeout))
4476 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4477 enum usb3_link_state state)
4479 struct usb_device *parent;
4480 unsigned int num_hubs;
4482 if (state == USB3_LPM_U2)
4485 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4486 for (parent = udev->parent, num_hubs = 0; parent->parent;
4487 parent = parent->parent)
4493 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4494 " below second-tier hub.\n");
4495 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4496 "to decrease power consumption.\n");
4500 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4501 struct usb_device *udev,
4502 enum usb3_link_state state)
4504 if (xhci->quirks & XHCI_INTEL_HOST)
4505 return xhci_check_intel_tier_policy(udev, state);
4510 /* Returns the U1 or U2 timeout that should be enabled.
4511 * If the tier check or timeout setting functions return with a non-zero exit
4512 * code, that means the timeout value has been finalized and we shouldn't look
4513 * at any more endpoints.
4515 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4516 struct usb_device *udev, enum usb3_link_state state)
4518 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4519 struct usb_host_config *config;
4522 u16 timeout = USB3_LPM_DISABLED;
4524 if (state == USB3_LPM_U1)
4526 else if (state == USB3_LPM_U2)
4529 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4534 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4537 /* Gather some information about the currently installed configuration
4538 * and alternate interface settings.
4540 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4544 config = udev->actconfig;
4548 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4549 struct usb_driver *driver;
4550 struct usb_interface *intf = config->interface[i];
4555 /* Check if any currently bound drivers want hub-initiated LPM
4558 if (intf->dev.driver) {
4559 driver = to_usb_driver(intf->dev.driver);
4560 if (driver && driver->disable_hub_initiated_lpm) {
4561 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4562 "at request of driver %s\n",
4563 state_name, driver->name);
4564 return xhci_get_timeout_no_hub_lpm(udev, state);
4568 /* Not sure how this could happen... */
4569 if (!intf->cur_altsetting)
4572 if (xhci_update_timeout_for_interface(xhci, udev,
4573 intf->cur_altsetting,
4580 static int calculate_max_exit_latency(struct usb_device *udev,
4581 enum usb3_link_state state_changed,
4582 u16 hub_encoded_timeout)
4584 unsigned long long u1_mel_us = 0;
4585 unsigned long long u2_mel_us = 0;
4586 unsigned long long mel_us = 0;
4592 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4593 hub_encoded_timeout == USB3_LPM_DISABLED);
4594 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4595 hub_encoded_timeout == USB3_LPM_DISABLED);
4597 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4598 hub_encoded_timeout != USB3_LPM_DISABLED);
4599 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4600 hub_encoded_timeout != USB3_LPM_DISABLED);
4602 /* If U1 was already enabled and we're not disabling it,
4603 * or we're going to enable U1, account for the U1 max exit latency.
4605 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4607 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4608 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4610 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4612 if (u1_mel_us > u2_mel_us)
4616 /* xHCI host controller max exit latency field is only 16 bits wide. */
4617 if (mel_us > MAX_EXIT) {
4618 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4619 "is too big.\n", mel_us);
4625 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4626 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4627 struct usb_device *udev, enum usb3_link_state state)
4629 struct xhci_hcd *xhci;
4630 u16 hub_encoded_timeout;
4634 xhci = hcd_to_xhci(hcd);
4635 /* The LPM timeout values are pretty host-controller specific, so don't
4636 * enable hub-initiated timeouts unless the vendor has provided
4637 * information about their timeout algorithm.
4639 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4640 !xhci->devs[udev->slot_id])
4641 return USB3_LPM_DISABLED;
4643 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4644 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4646 /* Max Exit Latency is too big, disable LPM. */
4647 hub_encoded_timeout = USB3_LPM_DISABLED;
4651 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4654 return hub_encoded_timeout;
4657 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4658 struct usb_device *udev, enum usb3_link_state state)
4660 struct xhci_hcd *xhci;
4664 xhci = hcd_to_xhci(hcd);
4665 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4666 !xhci->devs[udev->slot_id])
4669 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4670 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4675 #else /* CONFIG_PM */
4677 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4678 struct usb_device *udev, enum usb3_link_state state)
4680 return USB3_LPM_DISABLED;
4683 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4684 struct usb_device *udev, enum usb3_link_state state)
4688 #endif /* CONFIG_PM */
4690 /*-------------------------------------------------------------------------*/
4692 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4693 * internal data structures for the device.
4695 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4696 struct usb_tt *tt, gfp_t mem_flags)
4698 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4699 struct xhci_virt_device *vdev;
4700 struct xhci_command *config_cmd;
4701 struct xhci_input_control_ctx *ctrl_ctx;
4702 struct xhci_slot_ctx *slot_ctx;
4703 unsigned long flags;
4704 unsigned think_time;
4707 /* Ignore root hubs */
4711 vdev = xhci->devs[hdev->slot_id];
4713 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4716 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4718 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4721 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4723 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4725 xhci_free_command(xhci, config_cmd);
4729 spin_lock_irqsave(&xhci->lock, flags);
4730 if (hdev->speed == USB_SPEED_HIGH &&
4731 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4732 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4733 xhci_free_command(xhci, config_cmd);
4734 spin_unlock_irqrestore(&xhci->lock, flags);
4738 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4739 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4740 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4741 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4743 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4744 if (xhci->hci_version > 0x95) {
4745 xhci_dbg(xhci, "xHCI version %x needs hub "
4746 "TT think time and number of ports\n",
4747 (unsigned int) xhci->hci_version);
4748 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4749 /* Set TT think time - convert from ns to FS bit times.
4750 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4751 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4753 * xHCI 1.0: this field shall be 0 if the device is not a
4756 think_time = tt->think_time;
4757 if (think_time != 0)
4758 think_time = (think_time / 666) - 1;
4759 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4760 slot_ctx->tt_info |=
4761 cpu_to_le32(TT_THINK_TIME(think_time));
4763 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4764 "TT think time or number of ports\n",
4765 (unsigned int) xhci->hci_version);
4767 slot_ctx->dev_state = 0;
4768 spin_unlock_irqrestore(&xhci->lock, flags);
4770 xhci_dbg(xhci, "Set up %s for hub device.\n",
4771 (xhci->hci_version > 0x95) ?
4772 "configure endpoint" : "evaluate context");
4773 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4774 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4776 /* Issue and wait for the configure endpoint or
4777 * evaluate context command.
4779 if (xhci->hci_version > 0x95)
4780 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4783 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4786 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4787 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4789 xhci_free_command(xhci, config_cmd);
4793 int xhci_get_frame(struct usb_hcd *hcd)
4795 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4796 /* EHCI mods by the periodic size. Why? */
4797 return readl(&xhci->run_regs->microframe_index) >> 3;
4800 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4802 struct xhci_hcd *xhci;
4803 struct device *dev = hcd->self.controller;
4806 /* Accept arbitrarily long scatter-gather lists */
4807 hcd->self.sg_tablesize = ~0;
4809 /* support to build packet from discontinuous buffers */
4810 hcd->self.no_sg_constraint = 1;
4812 /* XHCI controllers don't stop the ep queue on short packets :| */
4813 hcd->self.no_stop_on_short = 1;
4815 if (usb_hcd_is_primary_hcd(hcd)) {
4816 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4819 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4820 xhci->main_hcd = hcd;
4821 /* Mark the first roothub as being USB 2.0.
4822 * The xHCI driver will register the USB 3.0 roothub.
4824 hcd->speed = HCD_USB2;
4825 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4827 * USB 2.0 roothub under xHCI has an integrated TT,
4828 * (rate matching hub) as opposed to having an OHCI/UHCI
4829 * companion controller.
4833 /* xHCI private pointer was set in xhci_pci_probe for the second
4834 * registered roothub.
4839 xhci->cap_regs = hcd->regs;
4840 xhci->op_regs = hcd->regs +
4841 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4842 xhci->run_regs = hcd->regs +
4843 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4844 /* Cache read-only capability registers */
4845 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4846 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4847 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4848 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4849 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4850 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4851 xhci_print_registers(xhci);
4853 xhci->quirks = quirks;
4855 get_quirks(dev, xhci);
4857 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4858 * success event after a short transfer. This quirk will ignore such
4861 if (xhci->hci_version > 0x96)
4862 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4864 /* Make sure the HC is halted. */
4865 retval = xhci_halt(xhci);
4869 xhci_dbg(xhci, "Resetting HCD\n");
4870 /* Reset the internal HC memory state and registers. */
4871 retval = xhci_reset(xhci);
4874 xhci_dbg(xhci, "Reset complete\n");
4876 /* Set dma_mask and coherent_dma_mask to 64-bits,
4877 * if xHC supports 64-bit addressing */
4878 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4879 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4880 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4881 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4884 xhci_dbg(xhci, "Calling HCD init\n");
4885 /* Initialize HCD and host controller data structures. */
4886 retval = xhci_init(hcd);
4889 xhci_dbg(xhci, "Called HCD init\n");
4896 MODULE_DESCRIPTION(DRIVER_DESC);
4897 MODULE_AUTHOR(DRIVER_AUTHOR);
4898 MODULE_LICENSE("GPL");
4900 static int __init xhci_hcd_init(void)
4904 retval = xhci_register_pci();
4906 pr_debug("Problem registering PCI driver.\n");
4909 retval = xhci_register_plat();
4911 pr_debug("Problem registering platform driver.\n");
4915 * Check the compiler generated sizes of structures that must be laid
4916 * out in specific ways for hardware access.
4918 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4919 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4920 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4921 /* xhci_device_control has eight fields, and also
4922 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4924 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4925 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4926 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4927 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4928 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4929 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4930 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4933 xhci_unregister_pci();
4936 module_init(xhci_hcd_init);
4938 static void __exit xhci_hcd_cleanup(void)
4940 xhci_unregister_pci();
4941 xhci_unregister_plat();
4943 module_exit(xhci_hcd_cleanup);