xhci: Switch PPT ports to EHCI on shutdown.
[firefly-linux-kernel-4.4.55.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         else
110                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
111                                 XHCI_MAX_HALT_USEC);
112         return ret;
113 }
114
115 /*
116  * Set the run bit and wait for the host to be running.
117  */
118 static int xhci_start(struct xhci_hcd *xhci)
119 {
120         u32 temp;
121         int ret;
122
123         temp = xhci_readl(xhci, &xhci->op_regs->command);
124         temp |= (CMD_RUN);
125         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
126                         temp);
127         xhci_writel(xhci, temp, &xhci->op_regs->command);
128
129         /*
130          * Wait for the HCHalted Status bit to be 0 to indicate the host is
131          * running.
132          */
133         ret = handshake(xhci, &xhci->op_regs->status,
134                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
135         if (ret == -ETIMEDOUT)
136                 xhci_err(xhci, "Host took too long to start, "
137                                 "waited %u microseconds.\n",
138                                 XHCI_MAX_HALT_USEC);
139         if (!ret)
140                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
141         return ret;
142 }
143
144 /*
145  * Reset a halted HC.
146  *
147  * This resets pipelines, timers, counters, state machines, etc.
148  * Transactions will be terminated immediately, and operational registers
149  * will be set to their defaults.
150  */
151 int xhci_reset(struct xhci_hcd *xhci)
152 {
153         u32 command;
154         u32 state;
155         int ret, i;
156
157         state = xhci_readl(xhci, &xhci->op_regs->status);
158         if ((state & STS_HALT) == 0) {
159                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
160                 return 0;
161         }
162
163         xhci_dbg(xhci, "// Reset the HC\n");
164         command = xhci_readl(xhci, &xhci->op_regs->command);
165         command |= CMD_RESET;
166         xhci_writel(xhci, command, &xhci->op_regs->command);
167
168         ret = handshake(xhci, &xhci->op_regs->command,
169                         CMD_RESET, 0, 10 * 1000 * 1000);
170         if (ret)
171                 return ret;
172
173         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
174         /*
175          * xHCI cannot write to any doorbells or operational registers other
176          * than status until the "Controller Not Ready" flag is cleared.
177          */
178         ret = handshake(xhci, &xhci->op_regs->status,
179                         STS_CNR, 0, 10 * 1000 * 1000);
180
181         for (i = 0; i < 2; ++i) {
182                 xhci->bus_state[i].port_c_suspend = 0;
183                 xhci->bus_state[i].suspended_ports = 0;
184                 xhci->bus_state[i].resuming_ports = 0;
185         }
186
187         return ret;
188 }
189
190 #ifdef CONFIG_PCI
191 static int xhci_free_msi(struct xhci_hcd *xhci)
192 {
193         int i;
194
195         if (!xhci->msix_entries)
196                 return -EINVAL;
197
198         for (i = 0; i < xhci->msix_count; i++)
199                 if (xhci->msix_entries[i].vector)
200                         free_irq(xhci->msix_entries[i].vector,
201                                         xhci_to_hcd(xhci));
202         return 0;
203 }
204
205 /*
206  * Set up MSI
207  */
208 static int xhci_setup_msi(struct xhci_hcd *xhci)
209 {
210         int ret;
211         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
212
213         ret = pci_enable_msi(pdev);
214         if (ret) {
215                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
216                 return ret;
217         }
218
219         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
220                                 0, "xhci_hcd", xhci_to_hcd(xhci));
221         if (ret) {
222                 xhci_dbg(xhci, "disable MSI interrupt\n");
223                 pci_disable_msi(pdev);
224         }
225
226         return ret;
227 }
228
229 /*
230  * Free IRQs
231  * free all IRQs request
232  */
233 static void xhci_free_irq(struct xhci_hcd *xhci)
234 {
235         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
236         int ret;
237
238         /* return if using legacy interrupt */
239         if (xhci_to_hcd(xhci)->irq > 0)
240                 return;
241
242         ret = xhci_free_msi(xhci);
243         if (!ret)
244                 return;
245         if (pdev->irq > 0)
246                 free_irq(pdev->irq, xhci_to_hcd(xhci));
247
248         return;
249 }
250
251 /*
252  * Set up MSI-X
253  */
254 static int xhci_setup_msix(struct xhci_hcd *xhci)
255 {
256         int i, ret = 0;
257         struct usb_hcd *hcd = xhci_to_hcd(xhci);
258         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
259
260         /*
261          * calculate number of msi-x vectors supported.
262          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
263          *   with max number of interrupters based on the xhci HCSPARAMS1.
264          * - num_online_cpus: maximum msi-x vectors per CPUs core.
265          *   Add additional 1 vector to ensure always available interrupt.
266          */
267         xhci->msix_count = min(num_online_cpus() + 1,
268                                 HCS_MAX_INTRS(xhci->hcs_params1));
269
270         xhci->msix_entries =
271                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
272                                 GFP_KERNEL);
273         if (!xhci->msix_entries) {
274                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
275                 return -ENOMEM;
276         }
277
278         for (i = 0; i < xhci->msix_count; i++) {
279                 xhci->msix_entries[i].entry = i;
280                 xhci->msix_entries[i].vector = 0;
281         }
282
283         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
284         if (ret) {
285                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
286                 goto free_entries;
287         }
288
289         for (i = 0; i < xhci->msix_count; i++) {
290                 ret = request_irq(xhci->msix_entries[i].vector,
291                                 (irq_handler_t)xhci_msi_irq,
292                                 0, "xhci_hcd", xhci_to_hcd(xhci));
293                 if (ret)
294                         goto disable_msix;
295         }
296
297         hcd->msix_enabled = 1;
298         return ret;
299
300 disable_msix:
301         xhci_dbg(xhci, "disable MSI-X interrupt\n");
302         xhci_free_irq(xhci);
303         pci_disable_msix(pdev);
304 free_entries:
305         kfree(xhci->msix_entries);
306         xhci->msix_entries = NULL;
307         return ret;
308 }
309
310 /* Free any IRQs and disable MSI-X */
311 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
312 {
313         struct usb_hcd *hcd = xhci_to_hcd(xhci);
314         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
315
316         xhci_free_irq(xhci);
317
318         if (xhci->msix_entries) {
319                 pci_disable_msix(pdev);
320                 kfree(xhci->msix_entries);
321                 xhci->msix_entries = NULL;
322         } else {
323                 pci_disable_msi(pdev);
324         }
325
326         hcd->msix_enabled = 0;
327         return;
328 }
329
330 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
331 {
332         int i;
333
334         if (xhci->msix_entries) {
335                 for (i = 0; i < xhci->msix_count; i++)
336                         synchronize_irq(xhci->msix_entries[i].vector);
337         }
338 }
339
340 static int xhci_try_enable_msi(struct usb_hcd *hcd)
341 {
342         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
343         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
344         int ret;
345
346         /*
347          * Some Fresco Logic host controllers advertise MSI, but fail to
348          * generate interrupts.  Don't even try to enable MSI.
349          */
350         if (xhci->quirks & XHCI_BROKEN_MSI)
351                 return 0;
352
353         /* unregister the legacy interrupt */
354         if (hcd->irq)
355                 free_irq(hcd->irq, hcd);
356         hcd->irq = 0;
357
358         ret = xhci_setup_msix(xhci);
359         if (ret)
360                 /* fall back to msi*/
361                 ret = xhci_setup_msi(xhci);
362
363         if (!ret)
364                 /* hcd->irq is 0, we have MSI */
365                 return 0;
366
367         if (!pdev->irq) {
368                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
369                 return -EINVAL;
370         }
371
372         /* fall back to legacy interrupt*/
373         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
374                         hcd->irq_descr, hcd);
375         if (ret) {
376                 xhci_err(xhci, "request interrupt %d failed\n",
377                                 pdev->irq);
378                 return ret;
379         }
380         hcd->irq = pdev->irq;
381         return 0;
382 }
383
384 #else
385
386 static int xhci_try_enable_msi(struct usb_hcd *hcd)
387 {
388         return 0;
389 }
390
391 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
392 {
393 }
394
395 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
396 {
397 }
398
399 #endif
400
401 /*
402  * Initialize memory for HCD and xHC (one-time init).
403  *
404  * Program the PAGESIZE register, initialize the device context array, create
405  * device contexts (?), set up a command ring segment (or two?), create event
406  * ring (one for now).
407  */
408 int xhci_init(struct usb_hcd *hcd)
409 {
410         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
411         int retval = 0;
412
413         xhci_dbg(xhci, "xhci_init\n");
414         spin_lock_init(&xhci->lock);
415         if (xhci->hci_version == 0x95 && link_quirk) {
416                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
417                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
418         } else {
419                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
420         }
421         retval = xhci_mem_init(xhci, GFP_KERNEL);
422         xhci_dbg(xhci, "Finished xhci_init\n");
423
424         return retval;
425 }
426
427 /*-------------------------------------------------------------------------*/
428
429
430 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
431 static void xhci_event_ring_work(unsigned long arg)
432 {
433         unsigned long flags;
434         int temp;
435         u64 temp_64;
436         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
437         int i, j;
438
439         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
440
441         spin_lock_irqsave(&xhci->lock, flags);
442         temp = xhci_readl(xhci, &xhci->op_regs->status);
443         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
444         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
445                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
446                 xhci_dbg(xhci, "HW died, polling stopped.\n");
447                 spin_unlock_irqrestore(&xhci->lock, flags);
448                 return;
449         }
450
451         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
452         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
453         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
454         xhci->error_bitmask = 0;
455         xhci_dbg(xhci, "Event ring:\n");
456         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
457         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
458         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
459         temp_64 &= ~ERST_PTR_MASK;
460         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
461         xhci_dbg(xhci, "Command ring:\n");
462         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
463         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
464         xhci_dbg_cmd_ptrs(xhci);
465         for (i = 0; i < MAX_HC_SLOTS; ++i) {
466                 if (!xhci->devs[i])
467                         continue;
468                 for (j = 0; j < 31; ++j) {
469                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
470                 }
471         }
472         spin_unlock_irqrestore(&xhci->lock, flags);
473
474         if (!xhci->zombie)
475                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
476         else
477                 xhci_dbg(xhci, "Quit polling the event ring.\n");
478 }
479 #endif
480
481 static int xhci_run_finished(struct xhci_hcd *xhci)
482 {
483         if (xhci_start(xhci)) {
484                 xhci_halt(xhci);
485                 return -ENODEV;
486         }
487         xhci->shared_hcd->state = HC_STATE_RUNNING;
488
489         if (xhci->quirks & XHCI_NEC_HOST)
490                 xhci_ring_cmd_db(xhci);
491
492         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
493         return 0;
494 }
495
496 /*
497  * Start the HC after it was halted.
498  *
499  * This function is called by the USB core when the HC driver is added.
500  * Its opposite is xhci_stop().
501  *
502  * xhci_init() must be called once before this function can be called.
503  * Reset the HC, enable device slot contexts, program DCBAAP, and
504  * set command ring pointer and event ring pointer.
505  *
506  * Setup MSI-X vectors and enable interrupts.
507  */
508 int xhci_run(struct usb_hcd *hcd)
509 {
510         u32 temp;
511         u64 temp_64;
512         int ret;
513         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
514
515         /* Start the xHCI host controller running only after the USB 2.0 roothub
516          * is setup.
517          */
518
519         hcd->uses_new_polling = 1;
520         if (!usb_hcd_is_primary_hcd(hcd))
521                 return xhci_run_finished(xhci);
522
523         xhci_dbg(xhci, "xhci_run\n");
524
525         ret = xhci_try_enable_msi(hcd);
526         if (ret)
527                 return ret;
528
529 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
530         init_timer(&xhci->event_ring_timer);
531         xhci->event_ring_timer.data = (unsigned long) xhci;
532         xhci->event_ring_timer.function = xhci_event_ring_work;
533         /* Poll the event ring */
534         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
535         xhci->zombie = 0;
536         xhci_dbg(xhci, "Setting event ring polling timer\n");
537         add_timer(&xhci->event_ring_timer);
538 #endif
539
540         xhci_dbg(xhci, "Command ring memory map follows:\n");
541         xhci_debug_ring(xhci, xhci->cmd_ring);
542         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
543         xhci_dbg_cmd_ptrs(xhci);
544
545         xhci_dbg(xhci, "ERST memory map follows:\n");
546         xhci_dbg_erst(xhci, &xhci->erst);
547         xhci_dbg(xhci, "Event ring:\n");
548         xhci_debug_ring(xhci, xhci->event_ring);
549         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
550         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
551         temp_64 &= ~ERST_PTR_MASK;
552         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
553
554         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
555         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
556         temp &= ~ER_IRQ_INTERVAL_MASK;
557         temp |= (u32) 160;
558         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
559
560         /* Set the HCD state before we enable the irqs */
561         temp = xhci_readl(xhci, &xhci->op_regs->command);
562         temp |= (CMD_EIE);
563         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
564                         temp);
565         xhci_writel(xhci, temp, &xhci->op_regs->command);
566
567         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
569                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
570         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
571                         &xhci->ir_set->irq_pending);
572         xhci_print_ir_set(xhci, 0);
573
574         if (xhci->quirks & XHCI_NEC_HOST)
575                 xhci_queue_vendor_command(xhci, 0, 0, 0,
576                                 TRB_TYPE(TRB_NEC_GET_FW));
577
578         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
579         return 0;
580 }
581
582 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
583 {
584         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
585
586         spin_lock_irq(&xhci->lock);
587         xhci_halt(xhci);
588
589         /* The shared_hcd is going to be deallocated shortly (the USB core only
590          * calls this function when allocation fails in usb_add_hcd(), or
591          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
592          */
593         xhci->shared_hcd = NULL;
594         spin_unlock_irq(&xhci->lock);
595 }
596
597 /*
598  * Stop xHCI driver.
599  *
600  * This function is called by the USB core when the HC driver is removed.
601  * Its opposite is xhci_run().
602  *
603  * Disable device contexts, disable IRQs, and quiesce the HC.
604  * Reset the HC, finish any completed transactions, and cleanup memory.
605  */
606 void xhci_stop(struct usb_hcd *hcd)
607 {
608         u32 temp;
609         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
610
611         if (!usb_hcd_is_primary_hcd(hcd)) {
612                 xhci_only_stop_hcd(xhci->shared_hcd);
613                 return;
614         }
615
616         spin_lock_irq(&xhci->lock);
617         /* Make sure the xHC is halted for a USB3 roothub
618          * (xhci_stop() could be called as part of failed init).
619          */
620         xhci_halt(xhci);
621         xhci_reset(xhci);
622         spin_unlock_irq(&xhci->lock);
623
624         xhci_cleanup_msix(xhci);
625
626 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
627         /* Tell the event ring poll function not to reschedule */
628         xhci->zombie = 1;
629         del_timer_sync(&xhci->event_ring_timer);
630 #endif
631
632         if (xhci->quirks & XHCI_AMD_PLL_FIX)
633                 usb_amd_dev_put();
634
635         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
636         temp = xhci_readl(xhci, &xhci->op_regs->status);
637         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
638         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
639         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
640                         &xhci->ir_set->irq_pending);
641         xhci_print_ir_set(xhci, 0);
642
643         xhci_dbg(xhci, "cleaning up memory\n");
644         xhci_mem_cleanup(xhci);
645         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
646                     xhci_readl(xhci, &xhci->op_regs->status));
647 }
648
649 /*
650  * Shutdown HC (not bus-specific)
651  *
652  * This is called when the machine is rebooting or halting.  We assume that the
653  * machine will be powered off, and the HC's internal state will be reset.
654  * Don't bother to free memory.
655  *
656  * This will only ever be called with the main usb_hcd (the USB3 roothub).
657  */
658 void xhci_shutdown(struct usb_hcd *hcd)
659 {
660         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661
662         if (xhci->quirks && XHCI_SPURIOUS_REBOOT)
663                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
664
665         spin_lock_irq(&xhci->lock);
666         xhci_halt(xhci);
667         spin_unlock_irq(&xhci->lock);
668
669         xhci_cleanup_msix(xhci);
670
671         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
672                     xhci_readl(xhci, &xhci->op_regs->status));
673 }
674
675 #ifdef CONFIG_PM
676 static void xhci_save_registers(struct xhci_hcd *xhci)
677 {
678         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
679         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
680         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
681         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
682         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
683         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
684         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
685         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
686         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
687 }
688
689 static void xhci_restore_registers(struct xhci_hcd *xhci)
690 {
691         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
692         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
693         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
694         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
695         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
696         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
697         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
698         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
699         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
700 }
701
702 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
703 {
704         u64     val_64;
705
706         /* step 2: initialize command ring buffer */
707         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
708         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
709                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
710                                       xhci->cmd_ring->dequeue) &
711                  (u64) ~CMD_RING_RSVD_BITS) |
712                 xhci->cmd_ring->cycle_state;
713         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
714                         (long unsigned long) val_64);
715         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
716 }
717
718 /*
719  * The whole command ring must be cleared to zero when we suspend the host.
720  *
721  * The host doesn't save the command ring pointer in the suspend well, so we
722  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
723  * aligned, because of the reserved bits in the command ring dequeue pointer
724  * register.  Therefore, we can't just set the dequeue pointer back in the
725  * middle of the ring (TRBs are 16-byte aligned).
726  */
727 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
728 {
729         struct xhci_ring *ring;
730         struct xhci_segment *seg;
731
732         ring = xhci->cmd_ring;
733         seg = ring->deq_seg;
734         do {
735                 memset(seg->trbs, 0,
736                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
737                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
738                         cpu_to_le32(~TRB_CYCLE);
739                 seg = seg->next;
740         } while (seg != ring->deq_seg);
741
742         /* Reset the software enqueue and dequeue pointers */
743         ring->deq_seg = ring->first_seg;
744         ring->dequeue = ring->first_seg->trbs;
745         ring->enq_seg = ring->deq_seg;
746         ring->enqueue = ring->dequeue;
747
748         ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
749         /*
750          * Ring is now zeroed, so the HW should look for change of ownership
751          * when the cycle bit is set to 1.
752          */
753         ring->cycle_state = 1;
754
755         /*
756          * Reset the hardware dequeue pointer.
757          * Yes, this will need to be re-written after resume, but we're paranoid
758          * and want to make sure the hardware doesn't access bogus memory
759          * because, say, the BIOS or an SMI started the host without changing
760          * the command ring pointers.
761          */
762         xhci_set_cmd_ring_deq(xhci);
763 }
764
765 /*
766  * Stop HC (not bus-specific)
767  *
768  * This is called when the machine transition into S3/S4 mode.
769  *
770  */
771 int xhci_suspend(struct xhci_hcd *xhci)
772 {
773         int                     rc = 0;
774         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
775         u32                     command;
776
777         spin_lock_irq(&xhci->lock);
778         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
779         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
780         /* step 1: stop endpoint */
781         /* skipped assuming that port suspend has done */
782
783         /* step 2: clear Run/Stop bit */
784         command = xhci_readl(xhci, &xhci->op_regs->command);
785         command &= ~CMD_RUN;
786         xhci_writel(xhci, command, &xhci->op_regs->command);
787         if (handshake(xhci, &xhci->op_regs->status,
788                       STS_HALT, STS_HALT, 100*100)) {
789                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
790                 spin_unlock_irq(&xhci->lock);
791                 return -ETIMEDOUT;
792         }
793         xhci_clear_command_ring(xhci);
794
795         /* step 3: save registers */
796         xhci_save_registers(xhci);
797
798         /* step 4: set CSS flag */
799         command = xhci_readl(xhci, &xhci->op_regs->command);
800         command |= CMD_CSS;
801         xhci_writel(xhci, command, &xhci->op_regs->command);
802         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
803                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
804                 spin_unlock_irq(&xhci->lock);
805                 return -ETIMEDOUT;
806         }
807         spin_unlock_irq(&xhci->lock);
808
809         /* step 5: remove core well power */
810         /* synchronize irq when using MSI-X */
811         xhci_msix_sync_irqs(xhci);
812
813         return rc;
814 }
815
816 /*
817  * start xHC (not bus-specific)
818  *
819  * This is called when the machine transition from S3/S4 mode.
820  *
821  */
822 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
823 {
824         u32                     command, temp = 0;
825         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
826         struct usb_hcd          *secondary_hcd;
827         int                     retval = 0;
828
829         /* Wait a bit if either of the roothubs need to settle from the
830          * transition into bus suspend.
831          */
832         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
833                         time_before(jiffies,
834                                 xhci->bus_state[1].next_statechange))
835                 msleep(100);
836
837         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
838         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
839
840         spin_lock_irq(&xhci->lock);
841         if (xhci->quirks & XHCI_RESET_ON_RESUME)
842                 hibernated = true;
843
844         if (!hibernated) {
845                 /* step 1: restore register */
846                 xhci_restore_registers(xhci);
847                 /* step 2: initialize command ring buffer */
848                 xhci_set_cmd_ring_deq(xhci);
849                 /* step 3: restore state and start state*/
850                 /* step 3: set CRS flag */
851                 command = xhci_readl(xhci, &xhci->op_regs->command);
852                 command |= CMD_CRS;
853                 xhci_writel(xhci, command, &xhci->op_regs->command);
854                 if (handshake(xhci, &xhci->op_regs->status,
855                               STS_RESTORE, 0, 10 * 1000)) {
856                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
857                         spin_unlock_irq(&xhci->lock);
858                         return -ETIMEDOUT;
859                 }
860                 temp = xhci_readl(xhci, &xhci->op_regs->status);
861         }
862
863         /* If restore operation fails, re-initialize the HC during resume */
864         if ((temp & STS_SRE) || hibernated) {
865                 /* Let the USB core know _both_ roothubs lost power. */
866                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
867                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
868
869                 xhci_dbg(xhci, "Stop HCD\n");
870                 xhci_halt(xhci);
871                 xhci_reset(xhci);
872                 spin_unlock_irq(&xhci->lock);
873                 xhci_cleanup_msix(xhci);
874
875 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
876                 /* Tell the event ring poll function not to reschedule */
877                 xhci->zombie = 1;
878                 del_timer_sync(&xhci->event_ring_timer);
879 #endif
880
881                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
882                 temp = xhci_readl(xhci, &xhci->op_regs->status);
883                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
884                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
885                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
886                                 &xhci->ir_set->irq_pending);
887                 xhci_print_ir_set(xhci, 0);
888
889                 xhci_dbg(xhci, "cleaning up memory\n");
890                 xhci_mem_cleanup(xhci);
891                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
892                             xhci_readl(xhci, &xhci->op_regs->status));
893
894                 /* USB core calls the PCI reinit and start functions twice:
895                  * first with the primary HCD, and then with the secondary HCD.
896                  * If we don't do the same, the host will never be started.
897                  */
898                 if (!usb_hcd_is_primary_hcd(hcd))
899                         secondary_hcd = hcd;
900                 else
901                         secondary_hcd = xhci->shared_hcd;
902
903                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
904                 retval = xhci_init(hcd->primary_hcd);
905                 if (retval)
906                         return retval;
907                 xhci_dbg(xhci, "Start the primary HCD\n");
908                 retval = xhci_run(hcd->primary_hcd);
909                 if (!retval) {
910                         xhci_dbg(xhci, "Start the secondary HCD\n");
911                         retval = xhci_run(secondary_hcd);
912                 }
913                 hcd->state = HC_STATE_SUSPENDED;
914                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
915                 goto done;
916         }
917
918         /* step 4: set Run/Stop bit */
919         command = xhci_readl(xhci, &xhci->op_regs->command);
920         command |= CMD_RUN;
921         xhci_writel(xhci, command, &xhci->op_regs->command);
922         handshake(xhci, &xhci->op_regs->status, STS_HALT,
923                   0, 250 * 1000);
924
925         /* step 5: walk topology and initialize portsc,
926          * portpmsc and portli
927          */
928         /* this is done in bus_resume */
929
930         /* step 6: restart each of the previously
931          * Running endpoints by ringing their doorbells
932          */
933
934         spin_unlock_irq(&xhci->lock);
935
936  done:
937         if (retval == 0) {
938                 usb_hcd_resume_root_hub(hcd);
939                 usb_hcd_resume_root_hub(xhci->shared_hcd);
940         }
941         return retval;
942 }
943 #endif  /* CONFIG_PM */
944
945 /*-------------------------------------------------------------------------*/
946
947 /**
948  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
949  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
950  * value to right shift 1 for the bitmask.
951  *
952  * Index  = (epnum * 2) + direction - 1,
953  * where direction = 0 for OUT, 1 for IN.
954  * For control endpoints, the IN index is used (OUT index is unused), so
955  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
956  */
957 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
958 {
959         unsigned int index;
960         if (usb_endpoint_xfer_control(desc))
961                 index = (unsigned int) (usb_endpoint_num(desc)*2);
962         else
963                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
964                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
965         return index;
966 }
967
968 /* Find the flag for this endpoint (for use in the control context).  Use the
969  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
970  * bit 1, etc.
971  */
972 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
973 {
974         return 1 << (xhci_get_endpoint_index(desc) + 1);
975 }
976
977 /* Find the flag for this endpoint (for use in the control context).  Use the
978  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
979  * bit 1, etc.
980  */
981 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
982 {
983         return 1 << (ep_index + 1);
984 }
985
986 /* Compute the last valid endpoint context index.  Basically, this is the
987  * endpoint index plus one.  For slot contexts with more than valid endpoint,
988  * we find the most significant bit set in the added contexts flags.
989  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
990  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
991  */
992 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
993 {
994         return fls(added_ctxs) - 1;
995 }
996
997 /* Returns 1 if the arguments are OK;
998  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
999  */
1000 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1001                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1002                 const char *func) {
1003         struct xhci_hcd *xhci;
1004         struct xhci_virt_device *virt_dev;
1005
1006         if (!hcd || (check_ep && !ep) || !udev) {
1007                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1008                                 func);
1009                 return -EINVAL;
1010         }
1011         if (!udev->parent) {
1012                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1013                                 func);
1014                 return 0;
1015         }
1016
1017         xhci = hcd_to_xhci(hcd);
1018         if (xhci->xhc_state & XHCI_STATE_HALTED)
1019                 return -ENODEV;
1020
1021         if (check_virt_dev) {
1022                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1023                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1024                                                 "device\n", func);
1025                         return -EINVAL;
1026                 }
1027
1028                 virt_dev = xhci->devs[udev->slot_id];
1029                 if (virt_dev->udev != udev) {
1030                         printk(KERN_DEBUG "xHCI %s called with udev and "
1031                                           "virt_dev does not match\n", func);
1032                         return -EINVAL;
1033                 }
1034         }
1035
1036         return 1;
1037 }
1038
1039 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1040                 struct usb_device *udev, struct xhci_command *command,
1041                 bool ctx_change, bool must_succeed);
1042
1043 /*
1044  * Full speed devices may have a max packet size greater than 8 bytes, but the
1045  * USB core doesn't know that until it reads the first 8 bytes of the
1046  * descriptor.  If the usb_device's max packet size changes after that point,
1047  * we need to issue an evaluate context command and wait on it.
1048  */
1049 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1050                 unsigned int ep_index, struct urb *urb)
1051 {
1052         struct xhci_container_ctx *in_ctx;
1053         struct xhci_container_ctx *out_ctx;
1054         struct xhci_input_control_ctx *ctrl_ctx;
1055         struct xhci_ep_ctx *ep_ctx;
1056         int max_packet_size;
1057         int hw_max_packet_size;
1058         int ret = 0;
1059
1060         out_ctx = xhci->devs[slot_id]->out_ctx;
1061         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1062         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1063         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1064         if (hw_max_packet_size != max_packet_size) {
1065                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1066                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1067                                 max_packet_size);
1068                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1069                                 hw_max_packet_size);
1070                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1071
1072                 /* Set up the modified control endpoint 0 */
1073                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1074                                 xhci->devs[slot_id]->out_ctx, ep_index);
1075                 in_ctx = xhci->devs[slot_id]->in_ctx;
1076                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1077                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1078                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1079
1080                 /* Set up the input context flags for the command */
1081                 /* FIXME: This won't work if a non-default control endpoint
1082                  * changes max packet sizes.
1083                  */
1084                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1085                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1086                 ctrl_ctx->drop_flags = 0;
1087
1088                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1089                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1090                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1091                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1092
1093                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1094                                 true, false);
1095
1096                 /* Clean up the input context for later use by bandwidth
1097                  * functions.
1098                  */
1099                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1100         }
1101         return ret;
1102 }
1103
1104 /*
1105  * non-error returns are a promise to giveback() the urb later
1106  * we drop ownership so next owner (or urb unlink) can get it
1107  */
1108 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1109 {
1110         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1111         struct xhci_td *buffer;
1112         unsigned long flags;
1113         int ret = 0;
1114         unsigned int slot_id, ep_index;
1115         struct urb_priv *urb_priv;
1116         int size, i;
1117
1118         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1119                                         true, true, __func__) <= 0)
1120                 return -EINVAL;
1121
1122         slot_id = urb->dev->slot_id;
1123         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1124
1125         if (!HCD_HW_ACCESSIBLE(hcd)) {
1126                 if (!in_interrupt())
1127                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1128                 ret = -ESHUTDOWN;
1129                 goto exit;
1130         }
1131
1132         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1133                 size = urb->number_of_packets;
1134         else
1135                 size = 1;
1136
1137         urb_priv = kzalloc(sizeof(struct urb_priv) +
1138                                   size * sizeof(struct xhci_td *), mem_flags);
1139         if (!urb_priv)
1140                 return -ENOMEM;
1141
1142         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1143         if (!buffer) {
1144                 kfree(urb_priv);
1145                 return -ENOMEM;
1146         }
1147
1148         for (i = 0; i < size; i++) {
1149                 urb_priv->td[i] = buffer;
1150                 buffer++;
1151         }
1152
1153         urb_priv->length = size;
1154         urb_priv->td_cnt = 0;
1155         urb->hcpriv = urb_priv;
1156
1157         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1158                 /* Check to see if the max packet size for the default control
1159                  * endpoint changed during FS device enumeration
1160                  */
1161                 if (urb->dev->speed == USB_SPEED_FULL) {
1162                         ret = xhci_check_maxpacket(xhci, slot_id,
1163                                         ep_index, urb);
1164                         if (ret < 0) {
1165                                 xhci_urb_free_priv(xhci, urb_priv);
1166                                 urb->hcpriv = NULL;
1167                                 return ret;
1168                         }
1169                 }
1170
1171                 /* We have a spinlock and interrupts disabled, so we must pass
1172                  * atomic context to this function, which may allocate memory.
1173                  */
1174                 spin_lock_irqsave(&xhci->lock, flags);
1175                 if (xhci->xhc_state & XHCI_STATE_DYING)
1176                         goto dying;
1177                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1178                                 slot_id, ep_index);
1179                 if (ret)
1180                         goto free_priv;
1181                 spin_unlock_irqrestore(&xhci->lock, flags);
1182         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1183                 spin_lock_irqsave(&xhci->lock, flags);
1184                 if (xhci->xhc_state & XHCI_STATE_DYING)
1185                         goto dying;
1186                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1187                                 EP_GETTING_STREAMS) {
1188                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1189                                         "is transitioning to using streams.\n");
1190                         ret = -EINVAL;
1191                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1192                                 EP_GETTING_NO_STREAMS) {
1193                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1194                                         "is transitioning to "
1195                                         "not having streams.\n");
1196                         ret = -EINVAL;
1197                 } else {
1198                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1199                                         slot_id, ep_index);
1200                 }
1201                 if (ret)
1202                         goto free_priv;
1203                 spin_unlock_irqrestore(&xhci->lock, flags);
1204         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1205                 spin_lock_irqsave(&xhci->lock, flags);
1206                 if (xhci->xhc_state & XHCI_STATE_DYING)
1207                         goto dying;
1208                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1209                                 slot_id, ep_index);
1210                 if (ret)
1211                         goto free_priv;
1212                 spin_unlock_irqrestore(&xhci->lock, flags);
1213         } else {
1214                 spin_lock_irqsave(&xhci->lock, flags);
1215                 if (xhci->xhc_state & XHCI_STATE_DYING)
1216                         goto dying;
1217                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1218                                 slot_id, ep_index);
1219                 if (ret)
1220                         goto free_priv;
1221                 spin_unlock_irqrestore(&xhci->lock, flags);
1222         }
1223 exit:
1224         return ret;
1225 dying:
1226         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1227                         "non-responsive xHCI host.\n",
1228                         urb->ep->desc.bEndpointAddress, urb);
1229         ret = -ESHUTDOWN;
1230 free_priv:
1231         xhci_urb_free_priv(xhci, urb_priv);
1232         urb->hcpriv = NULL;
1233         spin_unlock_irqrestore(&xhci->lock, flags);
1234         return ret;
1235 }
1236
1237 /* Get the right ring for the given URB.
1238  * If the endpoint supports streams, boundary check the URB's stream ID.
1239  * If the endpoint doesn't support streams, return the singular endpoint ring.
1240  */
1241 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1242                 struct urb *urb)
1243 {
1244         unsigned int slot_id;
1245         unsigned int ep_index;
1246         unsigned int stream_id;
1247         struct xhci_virt_ep *ep;
1248
1249         slot_id = urb->dev->slot_id;
1250         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1251         stream_id = urb->stream_id;
1252         ep = &xhci->devs[slot_id]->eps[ep_index];
1253         /* Common case: no streams */
1254         if (!(ep->ep_state & EP_HAS_STREAMS))
1255                 return ep->ring;
1256
1257         if (stream_id == 0) {
1258                 xhci_warn(xhci,
1259                                 "WARN: Slot ID %u, ep index %u has streams, "
1260                                 "but URB has no stream ID.\n",
1261                                 slot_id, ep_index);
1262                 return NULL;
1263         }
1264
1265         if (stream_id < ep->stream_info->num_streams)
1266                 return ep->stream_info->stream_rings[stream_id];
1267
1268         xhci_warn(xhci,
1269                         "WARN: Slot ID %u, ep index %u has "
1270                         "stream IDs 1 to %u allocated, "
1271                         "but stream ID %u is requested.\n",
1272                         slot_id, ep_index,
1273                         ep->stream_info->num_streams - 1,
1274                         stream_id);
1275         return NULL;
1276 }
1277
1278 /*
1279  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1280  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1281  * should pick up where it left off in the TD, unless a Set Transfer Ring
1282  * Dequeue Pointer is issued.
1283  *
1284  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1285  * the ring.  Since the ring is a contiguous structure, they can't be physically
1286  * removed.  Instead, there are two options:
1287  *
1288  *  1) If the HC is in the middle of processing the URB to be canceled, we
1289  *     simply move the ring's dequeue pointer past those TRBs using the Set
1290  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1291  *     when drivers timeout on the last submitted URB and attempt to cancel.
1292  *
1293  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1294  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1295  *     HC will need to invalidate the any TRBs it has cached after the stop
1296  *     endpoint command, as noted in the xHCI 0.95 errata.
1297  *
1298  *  3) The TD may have completed by the time the Stop Endpoint Command
1299  *     completes, so software needs to handle that case too.
1300  *
1301  * This function should protect against the TD enqueueing code ringing the
1302  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1303  * It also needs to account for multiple cancellations on happening at the same
1304  * time for the same endpoint.
1305  *
1306  * Note that this function can be called in any context, or so says
1307  * usb_hcd_unlink_urb()
1308  */
1309 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1310 {
1311         unsigned long flags;
1312         int ret, i;
1313         u32 temp;
1314         struct xhci_hcd *xhci;
1315         struct urb_priv *urb_priv;
1316         struct xhci_td *td;
1317         unsigned int ep_index;
1318         struct xhci_ring *ep_ring;
1319         struct xhci_virt_ep *ep;
1320
1321         xhci = hcd_to_xhci(hcd);
1322         spin_lock_irqsave(&xhci->lock, flags);
1323         /* Make sure the URB hasn't completed or been unlinked already */
1324         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1325         if (ret || !urb->hcpriv)
1326                 goto done;
1327         temp = xhci_readl(xhci, &xhci->op_regs->status);
1328         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1329                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1330                 urb_priv = urb->hcpriv;
1331                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1332                         td = urb_priv->td[i];
1333                         if (!list_empty(&td->td_list))
1334                                 list_del_init(&td->td_list);
1335                         if (!list_empty(&td->cancelled_td_list))
1336                                 list_del_init(&td->cancelled_td_list);
1337                 }
1338
1339                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1340                 spin_unlock_irqrestore(&xhci->lock, flags);
1341                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1342                 xhci_urb_free_priv(xhci, urb_priv);
1343                 return ret;
1344         }
1345         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1346                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1347                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1348                                 "non-responsive xHCI host.\n",
1349                                 urb->ep->desc.bEndpointAddress, urb);
1350                 /* Let the stop endpoint command watchdog timer (which set this
1351                  * state) finish cleaning up the endpoint TD lists.  We must
1352                  * have caught it in the middle of dropping a lock and giving
1353                  * back an URB.
1354                  */
1355                 goto done;
1356         }
1357
1358         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1359         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1360         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1361         if (!ep_ring) {
1362                 ret = -EINVAL;
1363                 goto done;
1364         }
1365
1366         urb_priv = urb->hcpriv;
1367         i = urb_priv->td_cnt;
1368         if (i < urb_priv->length)
1369                 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1370                                 "starting at offset 0x%llx\n",
1371                                 urb, urb->dev->devpath,
1372                                 urb->ep->desc.bEndpointAddress,
1373                                 (unsigned long long) xhci_trb_virt_to_dma(
1374                                         urb_priv->td[i]->start_seg,
1375                                         urb_priv->td[i]->first_trb));
1376
1377         for (; i < urb_priv->length; i++) {
1378                 td = urb_priv->td[i];
1379                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1380         }
1381
1382         /* Queue a stop endpoint command, but only if this is
1383          * the first cancellation to be handled.
1384          */
1385         if (!(ep->ep_state & EP_HALT_PENDING)) {
1386                 ep->ep_state |= EP_HALT_PENDING;
1387                 ep->stop_cmds_pending++;
1388                 ep->stop_cmd_timer.expires = jiffies +
1389                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1390                 add_timer(&ep->stop_cmd_timer);
1391                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1392                 xhci_ring_cmd_db(xhci);
1393         }
1394 done:
1395         spin_unlock_irqrestore(&xhci->lock, flags);
1396         return ret;
1397 }
1398
1399 /* Drop an endpoint from a new bandwidth configuration for this device.
1400  * Only one call to this function is allowed per endpoint before
1401  * check_bandwidth() or reset_bandwidth() must be called.
1402  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1403  * add the endpoint to the schedule with possibly new parameters denoted by a
1404  * different endpoint descriptor in usb_host_endpoint.
1405  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1406  * not allowed.
1407  *
1408  * The USB core will not allow URBs to be queued to an endpoint that is being
1409  * disabled, so there's no need for mutual exclusion to protect
1410  * the xhci->devs[slot_id] structure.
1411  */
1412 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1413                 struct usb_host_endpoint *ep)
1414 {
1415         struct xhci_hcd *xhci;
1416         struct xhci_container_ctx *in_ctx, *out_ctx;
1417         struct xhci_input_control_ctx *ctrl_ctx;
1418         struct xhci_slot_ctx *slot_ctx;
1419         unsigned int last_ctx;
1420         unsigned int ep_index;
1421         struct xhci_ep_ctx *ep_ctx;
1422         u32 drop_flag;
1423         u32 new_add_flags, new_drop_flags, new_slot_info;
1424         int ret;
1425
1426         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1427         if (ret <= 0)
1428                 return ret;
1429         xhci = hcd_to_xhci(hcd);
1430         if (xhci->xhc_state & XHCI_STATE_DYING)
1431                 return -ENODEV;
1432
1433         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1434         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1435         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1436                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1437                                 __func__, drop_flag);
1438                 return 0;
1439         }
1440
1441         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1442         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1443         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1444         ep_index = xhci_get_endpoint_index(&ep->desc);
1445         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1446         /* If the HC already knows the endpoint is disabled,
1447          * or the HCD has noted it is disabled, ignore this request
1448          */
1449         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1450              cpu_to_le32(EP_STATE_DISABLED)) ||
1451             le32_to_cpu(ctrl_ctx->drop_flags) &
1452             xhci_get_endpoint_flag(&ep->desc)) {
1453                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1454                                 __func__, ep);
1455                 return 0;
1456         }
1457
1458         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1459         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1460
1461         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1462         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1463
1464         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1465         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1466         /* Update the last valid endpoint context, if we deleted the last one */
1467         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1468             LAST_CTX(last_ctx)) {
1469                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1470                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1471         }
1472         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1473
1474         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1475
1476         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1477                         (unsigned int) ep->desc.bEndpointAddress,
1478                         udev->slot_id,
1479                         (unsigned int) new_drop_flags,
1480                         (unsigned int) new_add_flags,
1481                         (unsigned int) new_slot_info);
1482         return 0;
1483 }
1484
1485 /* Add an endpoint to a new possible bandwidth configuration for this device.
1486  * Only one call to this function is allowed per endpoint before
1487  * check_bandwidth() or reset_bandwidth() must be called.
1488  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1489  * add the endpoint to the schedule with possibly new parameters denoted by a
1490  * different endpoint descriptor in usb_host_endpoint.
1491  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1492  * not allowed.
1493  *
1494  * The USB core will not allow URBs to be queued to an endpoint until the
1495  * configuration or alt setting is installed in the device, so there's no need
1496  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1497  */
1498 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1499                 struct usb_host_endpoint *ep)
1500 {
1501         struct xhci_hcd *xhci;
1502         struct xhci_container_ctx *in_ctx, *out_ctx;
1503         unsigned int ep_index;
1504         struct xhci_ep_ctx *ep_ctx;
1505         struct xhci_slot_ctx *slot_ctx;
1506         struct xhci_input_control_ctx *ctrl_ctx;
1507         u32 added_ctxs;
1508         unsigned int last_ctx;
1509         u32 new_add_flags, new_drop_flags, new_slot_info;
1510         struct xhci_virt_device *virt_dev;
1511         int ret = 0;
1512
1513         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1514         if (ret <= 0) {
1515                 /* So we won't queue a reset ep command for a root hub */
1516                 ep->hcpriv = NULL;
1517                 return ret;
1518         }
1519         xhci = hcd_to_xhci(hcd);
1520         if (xhci->xhc_state & XHCI_STATE_DYING)
1521                 return -ENODEV;
1522
1523         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1524         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1525         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1526                 /* FIXME when we have to issue an evaluate endpoint command to
1527                  * deal with ep0 max packet size changing once we get the
1528                  * descriptors
1529                  */
1530                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1531                                 __func__, added_ctxs);
1532                 return 0;
1533         }
1534
1535         virt_dev = xhci->devs[udev->slot_id];
1536         in_ctx = virt_dev->in_ctx;
1537         out_ctx = virt_dev->out_ctx;
1538         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1539         ep_index = xhci_get_endpoint_index(&ep->desc);
1540         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1541
1542         /* If this endpoint is already in use, and the upper layers are trying
1543          * to add it again without dropping it, reject the addition.
1544          */
1545         if (virt_dev->eps[ep_index].ring &&
1546                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1547                                 xhci_get_endpoint_flag(&ep->desc))) {
1548                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1549                                 "without dropping it.\n",
1550                                 (unsigned int) ep->desc.bEndpointAddress);
1551                 return -EINVAL;
1552         }
1553
1554         /* If the HCD has already noted the endpoint is enabled,
1555          * ignore this request.
1556          */
1557         if (le32_to_cpu(ctrl_ctx->add_flags) &
1558             xhci_get_endpoint_flag(&ep->desc)) {
1559                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1560                                 __func__, ep);
1561                 return 0;
1562         }
1563
1564         /*
1565          * Configuration and alternate setting changes must be done in
1566          * process context, not interrupt context (or so documenation
1567          * for usb_set_interface() and usb_set_configuration() claim).
1568          */
1569         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1570                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1571                                 __func__, ep->desc.bEndpointAddress);
1572                 return -ENOMEM;
1573         }
1574
1575         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1576         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1577
1578         /* If xhci_endpoint_disable() was called for this endpoint, but the
1579          * xHC hasn't been notified yet through the check_bandwidth() call,
1580          * this re-adds a new state for the endpoint from the new endpoint
1581          * descriptors.  We must drop and re-add this endpoint, so we leave the
1582          * drop flags alone.
1583          */
1584         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1585
1586         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1587         /* Update the last valid endpoint context, if we just added one past */
1588         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1589             LAST_CTX(last_ctx)) {
1590                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1591                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1592         }
1593         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1594
1595         /* Store the usb_device pointer for later use */
1596         ep->hcpriv = udev;
1597
1598         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1599                         (unsigned int) ep->desc.bEndpointAddress,
1600                         udev->slot_id,
1601                         (unsigned int) new_drop_flags,
1602                         (unsigned int) new_add_flags,
1603                         (unsigned int) new_slot_info);
1604         return 0;
1605 }
1606
1607 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1608 {
1609         struct xhci_input_control_ctx *ctrl_ctx;
1610         struct xhci_ep_ctx *ep_ctx;
1611         struct xhci_slot_ctx *slot_ctx;
1612         int i;
1613
1614         /* When a device's add flag and drop flag are zero, any subsequent
1615          * configure endpoint command will leave that endpoint's state
1616          * untouched.  Make sure we don't leave any old state in the input
1617          * endpoint contexts.
1618          */
1619         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1620         ctrl_ctx->drop_flags = 0;
1621         ctrl_ctx->add_flags = 0;
1622         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1623         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1624         /* Endpoint 0 is always valid */
1625         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1626         for (i = 1; i < 31; ++i) {
1627                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1628                 ep_ctx->ep_info = 0;
1629                 ep_ctx->ep_info2 = 0;
1630                 ep_ctx->deq = 0;
1631                 ep_ctx->tx_info = 0;
1632         }
1633 }
1634
1635 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1636                 struct usb_device *udev, u32 *cmd_status)
1637 {
1638         int ret;
1639
1640         switch (*cmd_status) {
1641         case COMP_ENOMEM:
1642                 dev_warn(&udev->dev, "Not enough host controller resources "
1643                                 "for new device state.\n");
1644                 ret = -ENOMEM;
1645                 /* FIXME: can we allocate more resources for the HC? */
1646                 break;
1647         case COMP_BW_ERR:
1648         case COMP_2ND_BW_ERR:
1649                 dev_warn(&udev->dev, "Not enough bandwidth "
1650                                 "for new device state.\n");
1651                 ret = -ENOSPC;
1652                 /* FIXME: can we go back to the old state? */
1653                 break;
1654         case COMP_TRB_ERR:
1655                 /* the HCD set up something wrong */
1656                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1657                                 "add flag = 1, "
1658                                 "and endpoint is not disabled.\n");
1659                 ret = -EINVAL;
1660                 break;
1661         case COMP_DEV_ERR:
1662                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1663                                 "configure command.\n");
1664                 ret = -ENODEV;
1665                 break;
1666         case COMP_SUCCESS:
1667                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1668                 ret = 0;
1669                 break;
1670         default:
1671                 xhci_err(xhci, "ERROR: unexpected command completion "
1672                                 "code 0x%x.\n", *cmd_status);
1673                 ret = -EINVAL;
1674                 break;
1675         }
1676         return ret;
1677 }
1678
1679 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1680                 struct usb_device *udev, u32 *cmd_status)
1681 {
1682         int ret;
1683         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1684
1685         switch (*cmd_status) {
1686         case COMP_EINVAL:
1687                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1688                                 "context command.\n");
1689                 ret = -EINVAL;
1690                 break;
1691         case COMP_EBADSLT:
1692                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1693                                 "evaluate context command.\n");
1694         case COMP_CTX_STATE:
1695                 dev_warn(&udev->dev, "WARN: invalid context state for "
1696                                 "evaluate context command.\n");
1697                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1698                 ret = -EINVAL;
1699                 break;
1700         case COMP_DEV_ERR:
1701                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1702                                 "context command.\n");
1703                 ret = -ENODEV;
1704                 break;
1705         case COMP_MEL_ERR:
1706                 /* Max Exit Latency too large error */
1707                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1708                 ret = -EINVAL;
1709                 break;
1710         case COMP_SUCCESS:
1711                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1712                 ret = 0;
1713                 break;
1714         default:
1715                 xhci_err(xhci, "ERROR: unexpected command completion "
1716                                 "code 0x%x.\n", *cmd_status);
1717                 ret = -EINVAL;
1718                 break;
1719         }
1720         return ret;
1721 }
1722
1723 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1724                 struct xhci_container_ctx *in_ctx)
1725 {
1726         struct xhci_input_control_ctx *ctrl_ctx;
1727         u32 valid_add_flags;
1728         u32 valid_drop_flags;
1729
1730         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1731         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1732          * (bit 1).  The default control endpoint is added during the Address
1733          * Device command and is never removed until the slot is disabled.
1734          */
1735         valid_add_flags = ctrl_ctx->add_flags >> 2;
1736         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1737
1738         /* Use hweight32 to count the number of ones in the add flags, or
1739          * number of endpoints added.  Don't count endpoints that are changed
1740          * (both added and dropped).
1741          */
1742         return hweight32(valid_add_flags) -
1743                 hweight32(valid_add_flags & valid_drop_flags);
1744 }
1745
1746 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1747                 struct xhci_container_ctx *in_ctx)
1748 {
1749         struct xhci_input_control_ctx *ctrl_ctx;
1750         u32 valid_add_flags;
1751         u32 valid_drop_flags;
1752
1753         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1754         valid_add_flags = ctrl_ctx->add_flags >> 2;
1755         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1756
1757         return hweight32(valid_drop_flags) -
1758                 hweight32(valid_add_flags & valid_drop_flags);
1759 }
1760
1761 /*
1762  * We need to reserve the new number of endpoints before the configure endpoint
1763  * command completes.  We can't subtract the dropped endpoints from the number
1764  * of active endpoints until the command completes because we can oversubscribe
1765  * the host in this case:
1766  *
1767  *  - the first configure endpoint command drops more endpoints than it adds
1768  *  - a second configure endpoint command that adds more endpoints is queued
1769  *  - the first configure endpoint command fails, so the config is unchanged
1770  *  - the second command may succeed, even though there isn't enough resources
1771  *
1772  * Must be called with xhci->lock held.
1773  */
1774 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1775                 struct xhci_container_ctx *in_ctx)
1776 {
1777         u32 added_eps;
1778
1779         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1780         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1781                 xhci_dbg(xhci, "Not enough ep ctxs: "
1782                                 "%u active, need to add %u, limit is %u.\n",
1783                                 xhci->num_active_eps, added_eps,
1784                                 xhci->limit_active_eps);
1785                 return -ENOMEM;
1786         }
1787         xhci->num_active_eps += added_eps;
1788         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1789                         xhci->num_active_eps);
1790         return 0;
1791 }
1792
1793 /*
1794  * The configure endpoint was failed by the xHC for some other reason, so we
1795  * need to revert the resources that failed configuration would have used.
1796  *
1797  * Must be called with xhci->lock held.
1798  */
1799 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1800                 struct xhci_container_ctx *in_ctx)
1801 {
1802         u32 num_failed_eps;
1803
1804         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1805         xhci->num_active_eps -= num_failed_eps;
1806         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1807                         num_failed_eps,
1808                         xhci->num_active_eps);
1809 }
1810
1811 /*
1812  * Now that the command has completed, clean up the active endpoint count by
1813  * subtracting out the endpoints that were dropped (but not changed).
1814  *
1815  * Must be called with xhci->lock held.
1816  */
1817 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1818                 struct xhci_container_ctx *in_ctx)
1819 {
1820         u32 num_dropped_eps;
1821
1822         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1823         xhci->num_active_eps -= num_dropped_eps;
1824         if (num_dropped_eps)
1825                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1826                                 num_dropped_eps,
1827                                 xhci->num_active_eps);
1828 }
1829
1830 unsigned int xhci_get_block_size(struct usb_device *udev)
1831 {
1832         switch (udev->speed) {
1833         case USB_SPEED_LOW:
1834         case USB_SPEED_FULL:
1835                 return FS_BLOCK;
1836         case USB_SPEED_HIGH:
1837                 return HS_BLOCK;
1838         case USB_SPEED_SUPER:
1839                 return SS_BLOCK;
1840         case USB_SPEED_UNKNOWN:
1841         case USB_SPEED_WIRELESS:
1842         default:
1843                 /* Should never happen */
1844                 return 1;
1845         }
1846 }
1847
1848 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1849 {
1850         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1851                 return LS_OVERHEAD;
1852         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1853                 return FS_OVERHEAD;
1854         return HS_OVERHEAD;
1855 }
1856
1857 /* If we are changing a LS/FS device under a HS hub,
1858  * make sure (if we are activating a new TT) that the HS bus has enough
1859  * bandwidth for this new TT.
1860  */
1861 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1862                 struct xhci_virt_device *virt_dev,
1863                 int old_active_eps)
1864 {
1865         struct xhci_interval_bw_table *bw_table;
1866         struct xhci_tt_bw_info *tt_info;
1867
1868         /* Find the bandwidth table for the root port this TT is attached to. */
1869         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1870         tt_info = virt_dev->tt_info;
1871         /* If this TT already had active endpoints, the bandwidth for this TT
1872          * has already been added.  Removing all periodic endpoints (and thus
1873          * making the TT enactive) will only decrease the bandwidth used.
1874          */
1875         if (old_active_eps)
1876                 return 0;
1877         if (old_active_eps == 0 && tt_info->active_eps != 0) {
1878                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1879                         return -ENOMEM;
1880                 return 0;
1881         }
1882         /* Not sure why we would have no new active endpoints...
1883          *
1884          * Maybe because of an Evaluate Context change for a hub update or a
1885          * control endpoint 0 max packet size change?
1886          * FIXME: skip the bandwidth calculation in that case.
1887          */
1888         return 0;
1889 }
1890
1891 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
1892                 struct xhci_virt_device *virt_dev)
1893 {
1894         unsigned int bw_reserved;
1895
1896         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
1897         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
1898                 return -ENOMEM;
1899
1900         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
1901         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
1902                 return -ENOMEM;
1903
1904         return 0;
1905 }
1906
1907 /*
1908  * This algorithm is a very conservative estimate of the worst-case scheduling
1909  * scenario for any one interval.  The hardware dynamically schedules the
1910  * packets, so we can't tell which microframe could be the limiting factor in
1911  * the bandwidth scheduling.  This only takes into account periodic endpoints.
1912  *
1913  * Obviously, we can't solve an NP complete problem to find the minimum worst
1914  * case scenario.  Instead, we come up with an estimate that is no less than
1915  * the worst case bandwidth used for any one microframe, but may be an
1916  * over-estimate.
1917  *
1918  * We walk the requirements for each endpoint by interval, starting with the
1919  * smallest interval, and place packets in the schedule where there is only one
1920  * possible way to schedule packets for that interval.  In order to simplify
1921  * this algorithm, we record the largest max packet size for each interval, and
1922  * assume all packets will be that size.
1923  *
1924  * For interval 0, we obviously must schedule all packets for each interval.
1925  * The bandwidth for interval 0 is just the amount of data to be transmitted
1926  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1927  * the number of packets).
1928  *
1929  * For interval 1, we have two possible microframes to schedule those packets
1930  * in.  For this algorithm, if we can schedule the same number of packets for
1931  * each possible scheduling opportunity (each microframe), we will do so.  The
1932  * remaining number of packets will be saved to be transmitted in the gaps in
1933  * the next interval's scheduling sequence.
1934  *
1935  * As we move those remaining packets to be scheduled with interval 2 packets,
1936  * we have to double the number of remaining packets to transmit.  This is
1937  * because the intervals are actually powers of 2, and we would be transmitting
1938  * the previous interval's packets twice in this interval.  We also have to be
1939  * sure that when we look at the largest max packet size for this interval, we
1940  * also look at the largest max packet size for the remaining packets and take
1941  * the greater of the two.
1942  *
1943  * The algorithm continues to evenly distribute packets in each scheduling
1944  * opportunity, and push the remaining packets out, until we get to the last
1945  * interval.  Then those packets and their associated overhead are just added
1946  * to the bandwidth used.
1947  */
1948 static int xhci_check_bw_table(struct xhci_hcd *xhci,
1949                 struct xhci_virt_device *virt_dev,
1950                 int old_active_eps)
1951 {
1952         unsigned int bw_reserved;
1953         unsigned int max_bandwidth;
1954         unsigned int bw_used;
1955         unsigned int block_size;
1956         struct xhci_interval_bw_table *bw_table;
1957         unsigned int packet_size = 0;
1958         unsigned int overhead = 0;
1959         unsigned int packets_transmitted = 0;
1960         unsigned int packets_remaining = 0;
1961         unsigned int i;
1962
1963         if (virt_dev->udev->speed == USB_SPEED_SUPER)
1964                 return xhci_check_ss_bw(xhci, virt_dev);
1965
1966         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
1967                 max_bandwidth = HS_BW_LIMIT;
1968                 /* Convert percent of bus BW reserved to blocks reserved */
1969                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
1970         } else {
1971                 max_bandwidth = FS_BW_LIMIT;
1972                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
1973         }
1974
1975         bw_table = virt_dev->bw_table;
1976         /* We need to translate the max packet size and max ESIT payloads into
1977          * the units the hardware uses.
1978          */
1979         block_size = xhci_get_block_size(virt_dev->udev);
1980
1981         /* If we are manipulating a LS/FS device under a HS hub, double check
1982          * that the HS bus has enough bandwidth if we are activing a new TT.
1983          */
1984         if (virt_dev->tt_info) {
1985                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1986                                 virt_dev->real_port);
1987                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
1988                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
1989                                         "newly activated TT.\n");
1990                         return -ENOMEM;
1991                 }
1992                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
1993                                 virt_dev->tt_info->slot_id,
1994                                 virt_dev->tt_info->ttport);
1995         } else {
1996                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
1997                                 virt_dev->real_port);
1998         }
1999
2000         /* Add in how much bandwidth will be used for interval zero, or the
2001          * rounded max ESIT payload + number of packets * largest overhead.
2002          */
2003         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2004                 bw_table->interval_bw[0].num_packets *
2005                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2006
2007         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2008                 unsigned int bw_added;
2009                 unsigned int largest_mps;
2010                 unsigned int interval_overhead;
2011
2012                 /*
2013                  * How many packets could we transmit in this interval?
2014                  * If packets didn't fit in the previous interval, we will need
2015                  * to transmit that many packets twice within this interval.
2016                  */
2017                 packets_remaining = 2 * packets_remaining +
2018                         bw_table->interval_bw[i].num_packets;
2019
2020                 /* Find the largest max packet size of this or the previous
2021                  * interval.
2022                  */
2023                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2024                         largest_mps = 0;
2025                 else {
2026                         struct xhci_virt_ep *virt_ep;
2027                         struct list_head *ep_entry;
2028
2029                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2030                         virt_ep = list_entry(ep_entry,
2031                                         struct xhci_virt_ep, bw_endpoint_list);
2032                         /* Convert to blocks, rounding up */
2033                         largest_mps = DIV_ROUND_UP(
2034                                         virt_ep->bw_info.max_packet_size,
2035                                         block_size);
2036                 }
2037                 if (largest_mps > packet_size)
2038                         packet_size = largest_mps;
2039
2040                 /* Use the larger overhead of this or the previous interval. */
2041                 interval_overhead = xhci_get_largest_overhead(
2042                                 &bw_table->interval_bw[i]);
2043                 if (interval_overhead > overhead)
2044                         overhead = interval_overhead;
2045
2046                 /* How many packets can we evenly distribute across
2047                  * (1 << (i + 1)) possible scheduling opportunities?
2048                  */
2049                 packets_transmitted = packets_remaining >> (i + 1);
2050
2051                 /* Add in the bandwidth used for those scheduled packets */
2052                 bw_added = packets_transmitted * (overhead + packet_size);
2053
2054                 /* How many packets do we have remaining to transmit? */
2055                 packets_remaining = packets_remaining % (1 << (i + 1));
2056
2057                 /* What largest max packet size should those packets have? */
2058                 /* If we've transmitted all packets, don't carry over the
2059                  * largest packet size.
2060                  */
2061                 if (packets_remaining == 0) {
2062                         packet_size = 0;
2063                         overhead = 0;
2064                 } else if (packets_transmitted > 0) {
2065                         /* Otherwise if we do have remaining packets, and we've
2066                          * scheduled some packets in this interval, take the
2067                          * largest max packet size from endpoints with this
2068                          * interval.
2069                          */
2070                         packet_size = largest_mps;
2071                         overhead = interval_overhead;
2072                 }
2073                 /* Otherwise carry over packet_size and overhead from the last
2074                  * time we had a remainder.
2075                  */
2076                 bw_used += bw_added;
2077                 if (bw_used > max_bandwidth) {
2078                         xhci_warn(xhci, "Not enough bandwidth. "
2079                                         "Proposed: %u, Max: %u\n",
2080                                 bw_used, max_bandwidth);
2081                         return -ENOMEM;
2082                 }
2083         }
2084         /*
2085          * Ok, we know we have some packets left over after even-handedly
2086          * scheduling interval 15.  We don't know which microframes they will
2087          * fit into, so we over-schedule and say they will be scheduled every
2088          * microframe.
2089          */
2090         if (packets_remaining > 0)
2091                 bw_used += overhead + packet_size;
2092
2093         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2094                 unsigned int port_index = virt_dev->real_port - 1;
2095
2096                 /* OK, we're manipulating a HS device attached to a
2097                  * root port bandwidth domain.  Include the number of active TTs
2098                  * in the bandwidth used.
2099                  */
2100                 bw_used += TT_HS_OVERHEAD *
2101                         xhci->rh_bw[port_index].num_active_tts;
2102         }
2103
2104         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2105                 "Available: %u " "percent\n",
2106                 bw_used, max_bandwidth, bw_reserved,
2107                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2108                 max_bandwidth);
2109
2110         bw_used += bw_reserved;
2111         if (bw_used > max_bandwidth) {
2112                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2113                                 bw_used, max_bandwidth);
2114                 return -ENOMEM;
2115         }
2116
2117         bw_table->bw_used = bw_used;
2118         return 0;
2119 }
2120
2121 static bool xhci_is_async_ep(unsigned int ep_type)
2122 {
2123         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2124                                         ep_type != ISOC_IN_EP &&
2125                                         ep_type != INT_IN_EP);
2126 }
2127
2128 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2129 {
2130         return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2131 }
2132
2133 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2134 {
2135         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2136
2137         if (ep_bw->ep_interval == 0)
2138                 return SS_OVERHEAD_BURST +
2139                         (ep_bw->mult * ep_bw->num_packets *
2140                                         (SS_OVERHEAD + mps));
2141         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2142                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2143                                 1 << ep_bw->ep_interval);
2144
2145 }
2146
2147 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2148                 struct xhci_bw_info *ep_bw,
2149                 struct xhci_interval_bw_table *bw_table,
2150                 struct usb_device *udev,
2151                 struct xhci_virt_ep *virt_ep,
2152                 struct xhci_tt_bw_info *tt_info)
2153 {
2154         struct xhci_interval_bw *interval_bw;
2155         int normalized_interval;
2156
2157         if (xhci_is_async_ep(ep_bw->type))
2158                 return;
2159
2160         if (udev->speed == USB_SPEED_SUPER) {
2161                 if (xhci_is_sync_in_ep(ep_bw->type))
2162                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2163                                 xhci_get_ss_bw_consumed(ep_bw);
2164                 else
2165                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2166                                 xhci_get_ss_bw_consumed(ep_bw);
2167                 return;
2168         }
2169
2170         /* SuperSpeed endpoints never get added to intervals in the table, so
2171          * this check is only valid for HS/FS/LS devices.
2172          */
2173         if (list_empty(&virt_ep->bw_endpoint_list))
2174                 return;
2175         /* For LS/FS devices, we need to translate the interval expressed in
2176          * microframes to frames.
2177          */
2178         if (udev->speed == USB_SPEED_HIGH)
2179                 normalized_interval = ep_bw->ep_interval;
2180         else
2181                 normalized_interval = ep_bw->ep_interval - 3;
2182
2183         if (normalized_interval == 0)
2184                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2185         interval_bw = &bw_table->interval_bw[normalized_interval];
2186         interval_bw->num_packets -= ep_bw->num_packets;
2187         switch (udev->speed) {
2188         case USB_SPEED_LOW:
2189                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2190                 break;
2191         case USB_SPEED_FULL:
2192                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2193                 break;
2194         case USB_SPEED_HIGH:
2195                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2196                 break;
2197         case USB_SPEED_SUPER:
2198         case USB_SPEED_UNKNOWN:
2199         case USB_SPEED_WIRELESS:
2200                 /* Should never happen because only LS/FS/HS endpoints will get
2201                  * added to the endpoint list.
2202                  */
2203                 return;
2204         }
2205         if (tt_info)
2206                 tt_info->active_eps -= 1;
2207         list_del_init(&virt_ep->bw_endpoint_list);
2208 }
2209
2210 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2211                 struct xhci_bw_info *ep_bw,
2212                 struct xhci_interval_bw_table *bw_table,
2213                 struct usb_device *udev,
2214                 struct xhci_virt_ep *virt_ep,
2215                 struct xhci_tt_bw_info *tt_info)
2216 {
2217         struct xhci_interval_bw *interval_bw;
2218         struct xhci_virt_ep *smaller_ep;
2219         int normalized_interval;
2220
2221         if (xhci_is_async_ep(ep_bw->type))
2222                 return;
2223
2224         if (udev->speed == USB_SPEED_SUPER) {
2225                 if (xhci_is_sync_in_ep(ep_bw->type))
2226                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2227                                 xhci_get_ss_bw_consumed(ep_bw);
2228                 else
2229                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2230                                 xhci_get_ss_bw_consumed(ep_bw);
2231                 return;
2232         }
2233
2234         /* For LS/FS devices, we need to translate the interval expressed in
2235          * microframes to frames.
2236          */
2237         if (udev->speed == USB_SPEED_HIGH)
2238                 normalized_interval = ep_bw->ep_interval;
2239         else
2240                 normalized_interval = ep_bw->ep_interval - 3;
2241
2242         if (normalized_interval == 0)
2243                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2244         interval_bw = &bw_table->interval_bw[normalized_interval];
2245         interval_bw->num_packets += ep_bw->num_packets;
2246         switch (udev->speed) {
2247         case USB_SPEED_LOW:
2248                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2249                 break;
2250         case USB_SPEED_FULL:
2251                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2252                 break;
2253         case USB_SPEED_HIGH:
2254                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2255                 break;
2256         case USB_SPEED_SUPER:
2257         case USB_SPEED_UNKNOWN:
2258         case USB_SPEED_WIRELESS:
2259                 /* Should never happen because only LS/FS/HS endpoints will get
2260                  * added to the endpoint list.
2261                  */
2262                 return;
2263         }
2264
2265         if (tt_info)
2266                 tt_info->active_eps += 1;
2267         /* Insert the endpoint into the list, largest max packet size first. */
2268         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2269                         bw_endpoint_list) {
2270                 if (ep_bw->max_packet_size >=
2271                                 smaller_ep->bw_info.max_packet_size) {
2272                         /* Add the new ep before the smaller endpoint */
2273                         list_add_tail(&virt_ep->bw_endpoint_list,
2274                                         &smaller_ep->bw_endpoint_list);
2275                         return;
2276                 }
2277         }
2278         /* Add the new endpoint at the end of the list. */
2279         list_add_tail(&virt_ep->bw_endpoint_list,
2280                         &interval_bw->endpoints);
2281 }
2282
2283 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2284                 struct xhci_virt_device *virt_dev,
2285                 int old_active_eps)
2286 {
2287         struct xhci_root_port_bw_info *rh_bw_info;
2288         if (!virt_dev->tt_info)
2289                 return;
2290
2291         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2292         if (old_active_eps == 0 &&
2293                                 virt_dev->tt_info->active_eps != 0) {
2294                 rh_bw_info->num_active_tts += 1;
2295                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2296         } else if (old_active_eps != 0 &&
2297                                 virt_dev->tt_info->active_eps == 0) {
2298                 rh_bw_info->num_active_tts -= 1;
2299                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2300         }
2301 }
2302
2303 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2304                 struct xhci_virt_device *virt_dev,
2305                 struct xhci_container_ctx *in_ctx)
2306 {
2307         struct xhci_bw_info ep_bw_info[31];
2308         int i;
2309         struct xhci_input_control_ctx *ctrl_ctx;
2310         int old_active_eps = 0;
2311
2312         if (virt_dev->tt_info)
2313                 old_active_eps = virt_dev->tt_info->active_eps;
2314
2315         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2316
2317         for (i = 0; i < 31; i++) {
2318                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2319                         continue;
2320
2321                 /* Make a copy of the BW info in case we need to revert this */
2322                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2323                                 sizeof(ep_bw_info[i]));
2324                 /* Drop the endpoint from the interval table if the endpoint is
2325                  * being dropped or changed.
2326                  */
2327                 if (EP_IS_DROPPED(ctrl_ctx, i))
2328                         xhci_drop_ep_from_interval_table(xhci,
2329                                         &virt_dev->eps[i].bw_info,
2330                                         virt_dev->bw_table,
2331                                         virt_dev->udev,
2332                                         &virt_dev->eps[i],
2333                                         virt_dev->tt_info);
2334         }
2335         /* Overwrite the information stored in the endpoints' bw_info */
2336         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2337         for (i = 0; i < 31; i++) {
2338                 /* Add any changed or added endpoints to the interval table */
2339                 if (EP_IS_ADDED(ctrl_ctx, i))
2340                         xhci_add_ep_to_interval_table(xhci,
2341                                         &virt_dev->eps[i].bw_info,
2342                                         virt_dev->bw_table,
2343                                         virt_dev->udev,
2344                                         &virt_dev->eps[i],
2345                                         virt_dev->tt_info);
2346         }
2347
2348         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2349                 /* Ok, this fits in the bandwidth we have.
2350                  * Update the number of active TTs.
2351                  */
2352                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2353                 return 0;
2354         }
2355
2356         /* We don't have enough bandwidth for this, revert the stored info. */
2357         for (i = 0; i < 31; i++) {
2358                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2359                         continue;
2360
2361                 /* Drop the new copies of any added or changed endpoints from
2362                  * the interval table.
2363                  */
2364                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2365                         xhci_drop_ep_from_interval_table(xhci,
2366                                         &virt_dev->eps[i].bw_info,
2367                                         virt_dev->bw_table,
2368                                         virt_dev->udev,
2369                                         &virt_dev->eps[i],
2370                                         virt_dev->tt_info);
2371                 }
2372                 /* Revert the endpoint back to its old information */
2373                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2374                                 sizeof(ep_bw_info[i]));
2375                 /* Add any changed or dropped endpoints back into the table */
2376                 if (EP_IS_DROPPED(ctrl_ctx, i))
2377                         xhci_add_ep_to_interval_table(xhci,
2378                                         &virt_dev->eps[i].bw_info,
2379                                         virt_dev->bw_table,
2380                                         virt_dev->udev,
2381                                         &virt_dev->eps[i],
2382                                         virt_dev->tt_info);
2383         }
2384         return -ENOMEM;
2385 }
2386
2387
2388 /* Issue a configure endpoint command or evaluate context command
2389  * and wait for it to finish.
2390  */
2391 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2392                 struct usb_device *udev,
2393                 struct xhci_command *command,
2394                 bool ctx_change, bool must_succeed)
2395 {
2396         int ret;
2397         int timeleft;
2398         unsigned long flags;
2399         struct xhci_container_ctx *in_ctx;
2400         struct completion *cmd_completion;
2401         u32 *cmd_status;
2402         struct xhci_virt_device *virt_dev;
2403
2404         spin_lock_irqsave(&xhci->lock, flags);
2405         virt_dev = xhci->devs[udev->slot_id];
2406
2407         if (command)
2408                 in_ctx = command->in_ctx;
2409         else
2410                 in_ctx = virt_dev->in_ctx;
2411
2412         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2413                         xhci_reserve_host_resources(xhci, in_ctx)) {
2414                 spin_unlock_irqrestore(&xhci->lock, flags);
2415                 xhci_warn(xhci, "Not enough host resources, "
2416                                 "active endpoint contexts = %u\n",
2417                                 xhci->num_active_eps);
2418                 return -ENOMEM;
2419         }
2420         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2421                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2422                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2423                         xhci_free_host_resources(xhci, in_ctx);
2424                 spin_unlock_irqrestore(&xhci->lock, flags);
2425                 xhci_warn(xhci, "Not enough bandwidth\n");
2426                 return -ENOMEM;
2427         }
2428
2429         if (command) {
2430                 cmd_completion = command->completion;
2431                 cmd_status = &command->status;
2432                 command->command_trb = xhci->cmd_ring->enqueue;
2433
2434                 /* Enqueue pointer can be left pointing to the link TRB,
2435                  * we must handle that
2436                  */
2437                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2438                         command->command_trb =
2439                                 xhci->cmd_ring->enq_seg->next->trbs;
2440
2441                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2442         } else {
2443                 cmd_completion = &virt_dev->cmd_completion;
2444                 cmd_status = &virt_dev->cmd_status;
2445         }
2446         init_completion(cmd_completion);
2447
2448         if (!ctx_change)
2449                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2450                                 udev->slot_id, must_succeed);
2451         else
2452                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2453                                 udev->slot_id, must_succeed);
2454         if (ret < 0) {
2455                 if (command)
2456                         list_del(&command->cmd_list);
2457                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2458                         xhci_free_host_resources(xhci, in_ctx);
2459                 spin_unlock_irqrestore(&xhci->lock, flags);
2460                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2461                 return -ENOMEM;
2462         }
2463         xhci_ring_cmd_db(xhci);
2464         spin_unlock_irqrestore(&xhci->lock, flags);
2465
2466         /* Wait for the configure endpoint command to complete */
2467         timeleft = wait_for_completion_interruptible_timeout(
2468                         cmd_completion,
2469                         USB_CTRL_SET_TIMEOUT);
2470         if (timeleft <= 0) {
2471                 xhci_warn(xhci, "%s while waiting for %s command\n",
2472                                 timeleft == 0 ? "Timeout" : "Signal",
2473                                 ctx_change == 0 ?
2474                                         "configure endpoint" :
2475                                         "evaluate context");
2476                 /* FIXME cancel the configure endpoint command */
2477                 return -ETIME;
2478         }
2479
2480         if (!ctx_change)
2481                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2482         else
2483                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2484
2485         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2486                 spin_lock_irqsave(&xhci->lock, flags);
2487                 /* If the command failed, remove the reserved resources.
2488                  * Otherwise, clean up the estimate to include dropped eps.
2489                  */
2490                 if (ret)
2491                         xhci_free_host_resources(xhci, in_ctx);
2492                 else
2493                         xhci_finish_resource_reservation(xhci, in_ctx);
2494                 spin_unlock_irqrestore(&xhci->lock, flags);
2495         }
2496         return ret;
2497 }
2498
2499 /* Called after one or more calls to xhci_add_endpoint() or
2500  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2501  * to call xhci_reset_bandwidth().
2502  *
2503  * Since we are in the middle of changing either configuration or
2504  * installing a new alt setting, the USB core won't allow URBs to be
2505  * enqueued for any endpoint on the old config or interface.  Nothing
2506  * else should be touching the xhci->devs[slot_id] structure, so we
2507  * don't need to take the xhci->lock for manipulating that.
2508  */
2509 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2510 {
2511         int i;
2512         int ret = 0;
2513         struct xhci_hcd *xhci;
2514         struct xhci_virt_device *virt_dev;
2515         struct xhci_input_control_ctx *ctrl_ctx;
2516         struct xhci_slot_ctx *slot_ctx;
2517
2518         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2519         if (ret <= 0)
2520                 return ret;
2521         xhci = hcd_to_xhci(hcd);
2522         if (xhci->xhc_state & XHCI_STATE_DYING)
2523                 return -ENODEV;
2524
2525         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2526         virt_dev = xhci->devs[udev->slot_id];
2527
2528         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2529         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2530         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2531         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2532         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2533
2534         /* Don't issue the command if there's no endpoints to update. */
2535         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2536                         ctrl_ctx->drop_flags == 0)
2537                 return 0;
2538
2539         xhci_dbg(xhci, "New Input Control Context:\n");
2540         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2541         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2542                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2543
2544         ret = xhci_configure_endpoint(xhci, udev, NULL,
2545                         false, false);
2546         if (ret) {
2547                 /* Callee should call reset_bandwidth() */
2548                 return ret;
2549         }
2550
2551         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2552         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2553                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2554
2555         /* Free any rings that were dropped, but not changed. */
2556         for (i = 1; i < 31; ++i) {
2557                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2558                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2559                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2560         }
2561         xhci_zero_in_ctx(xhci, virt_dev);
2562         /*
2563          * Install any rings for completely new endpoints or changed endpoints,
2564          * and free or cache any old rings from changed endpoints.
2565          */
2566         for (i = 1; i < 31; ++i) {
2567                 if (!virt_dev->eps[i].new_ring)
2568                         continue;
2569                 /* Only cache or free the old ring if it exists.
2570                  * It may not if this is the first add of an endpoint.
2571                  */
2572                 if (virt_dev->eps[i].ring) {
2573                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2574                 }
2575                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2576                 virt_dev->eps[i].new_ring = NULL;
2577         }
2578
2579         return ret;
2580 }
2581
2582 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2583 {
2584         struct xhci_hcd *xhci;
2585         struct xhci_virt_device *virt_dev;
2586         int i, ret;
2587
2588         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2589         if (ret <= 0)
2590                 return;
2591         xhci = hcd_to_xhci(hcd);
2592
2593         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2594         virt_dev = xhci->devs[udev->slot_id];
2595         /* Free any rings allocated for added endpoints */
2596         for (i = 0; i < 31; ++i) {
2597                 if (virt_dev->eps[i].new_ring) {
2598                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2599                         virt_dev->eps[i].new_ring = NULL;
2600                 }
2601         }
2602         xhci_zero_in_ctx(xhci, virt_dev);
2603 }
2604
2605 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2606                 struct xhci_container_ctx *in_ctx,
2607                 struct xhci_container_ctx *out_ctx,
2608                 u32 add_flags, u32 drop_flags)
2609 {
2610         struct xhci_input_control_ctx *ctrl_ctx;
2611         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2612         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2613         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2614         xhci_slot_copy(xhci, in_ctx, out_ctx);
2615         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2616
2617         xhci_dbg(xhci, "Input Context:\n");
2618         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2619 }
2620
2621 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2622                 unsigned int slot_id, unsigned int ep_index,
2623                 struct xhci_dequeue_state *deq_state)
2624 {
2625         struct xhci_container_ctx *in_ctx;
2626         struct xhci_ep_ctx *ep_ctx;
2627         u32 added_ctxs;
2628         dma_addr_t addr;
2629
2630         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2631                         xhci->devs[slot_id]->out_ctx, ep_index);
2632         in_ctx = xhci->devs[slot_id]->in_ctx;
2633         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2634         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2635                         deq_state->new_deq_ptr);
2636         if (addr == 0) {
2637                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2638                                 "reset ep command\n");
2639                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2640                                 deq_state->new_deq_seg,
2641                                 deq_state->new_deq_ptr);
2642                 return;
2643         }
2644         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2645
2646         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2647         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2648                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2649 }
2650
2651 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2652                 struct usb_device *udev, unsigned int ep_index)
2653 {
2654         struct xhci_dequeue_state deq_state;
2655         struct xhci_virt_ep *ep;
2656
2657         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2658         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2659         /* We need to move the HW's dequeue pointer past this TD,
2660          * or it will attempt to resend it on the next doorbell ring.
2661          */
2662         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2663                         ep_index, ep->stopped_stream, ep->stopped_td,
2664                         &deq_state);
2665
2666         /* HW with the reset endpoint quirk will use the saved dequeue state to
2667          * issue a configure endpoint command later.
2668          */
2669         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2670                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2671                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2672                                 ep_index, ep->stopped_stream, &deq_state);
2673         } else {
2674                 /* Better hope no one uses the input context between now and the
2675                  * reset endpoint completion!
2676                  * XXX: No idea how this hardware will react when stream rings
2677                  * are enabled.
2678                  */
2679                 xhci_dbg(xhci, "Setting up input context for "
2680                                 "configure endpoint command\n");
2681                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2682                                 ep_index, &deq_state);
2683         }
2684 }
2685
2686 /* Deal with stalled endpoints.  The core should have sent the control message
2687  * to clear the halt condition.  However, we need to make the xHCI hardware
2688  * reset its sequence number, since a device will expect a sequence number of
2689  * zero after the halt condition is cleared.
2690  * Context: in_interrupt
2691  */
2692 void xhci_endpoint_reset(struct usb_hcd *hcd,
2693                 struct usb_host_endpoint *ep)
2694 {
2695         struct xhci_hcd *xhci;
2696         struct usb_device *udev;
2697         unsigned int ep_index;
2698         unsigned long flags;
2699         int ret;
2700         struct xhci_virt_ep *virt_ep;
2701
2702         xhci = hcd_to_xhci(hcd);
2703         udev = (struct usb_device *) ep->hcpriv;
2704         /* Called with a root hub endpoint (or an endpoint that wasn't added
2705          * with xhci_add_endpoint()
2706          */
2707         if (!ep->hcpriv)
2708                 return;
2709         ep_index = xhci_get_endpoint_index(&ep->desc);
2710         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2711         if (!virt_ep->stopped_td) {
2712                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2713                                 ep->desc.bEndpointAddress);
2714                 return;
2715         }
2716         if (usb_endpoint_xfer_control(&ep->desc)) {
2717                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2718                 return;
2719         }
2720
2721         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2722         spin_lock_irqsave(&xhci->lock, flags);
2723         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2724         /*
2725          * Can't change the ring dequeue pointer until it's transitioned to the
2726          * stopped state, which is only upon a successful reset endpoint
2727          * command.  Better hope that last command worked!
2728          */
2729         if (!ret) {
2730                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2731                 kfree(virt_ep->stopped_td);
2732                 xhci_ring_cmd_db(xhci);
2733         }
2734         virt_ep->stopped_td = NULL;
2735         virt_ep->stopped_trb = NULL;
2736         virt_ep->stopped_stream = 0;
2737         spin_unlock_irqrestore(&xhci->lock, flags);
2738
2739         if (ret)
2740                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2741 }
2742
2743 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2744                 struct usb_device *udev, struct usb_host_endpoint *ep,
2745                 unsigned int slot_id)
2746 {
2747         int ret;
2748         unsigned int ep_index;
2749         unsigned int ep_state;
2750
2751         if (!ep)
2752                 return -EINVAL;
2753         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2754         if (ret <= 0)
2755                 return -EINVAL;
2756         if (ep->ss_ep_comp.bmAttributes == 0) {
2757                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2758                                 " descriptor for ep 0x%x does not support streams\n",
2759                                 ep->desc.bEndpointAddress);
2760                 return -EINVAL;
2761         }
2762
2763         ep_index = xhci_get_endpoint_index(&ep->desc);
2764         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2765         if (ep_state & EP_HAS_STREAMS ||
2766                         ep_state & EP_GETTING_STREAMS) {
2767                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2768                                 "already has streams set up.\n",
2769                                 ep->desc.bEndpointAddress);
2770                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2771                                 "dynamic stream context array reallocation.\n");
2772                 return -EINVAL;
2773         }
2774         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2775                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2776                                 "endpoint 0x%x; URBs are pending.\n",
2777                                 ep->desc.bEndpointAddress);
2778                 return -EINVAL;
2779         }
2780         return 0;
2781 }
2782
2783 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2784                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2785 {
2786         unsigned int max_streams;
2787
2788         /* The stream context array size must be a power of two */
2789         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2790         /*
2791          * Find out how many primary stream array entries the host controller
2792          * supports.  Later we may use secondary stream arrays (similar to 2nd
2793          * level page entries), but that's an optional feature for xHCI host
2794          * controllers. xHCs must support at least 4 stream IDs.
2795          */
2796         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2797         if (*num_stream_ctxs > max_streams) {
2798                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2799                                 max_streams);
2800                 *num_stream_ctxs = max_streams;
2801                 *num_streams = max_streams;
2802         }
2803 }
2804
2805 /* Returns an error code if one of the endpoint already has streams.
2806  * This does not change any data structures, it only checks and gathers
2807  * information.
2808  */
2809 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2810                 struct usb_device *udev,
2811                 struct usb_host_endpoint **eps, unsigned int num_eps,
2812                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2813 {
2814         unsigned int max_streams;
2815         unsigned int endpoint_flag;
2816         int i;
2817         int ret;
2818
2819         for (i = 0; i < num_eps; i++) {
2820                 ret = xhci_check_streams_endpoint(xhci, udev,
2821                                 eps[i], udev->slot_id);
2822                 if (ret < 0)
2823                         return ret;
2824
2825                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2826                 if (max_streams < (*num_streams - 1)) {
2827                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2828                                         eps[i]->desc.bEndpointAddress,
2829                                         max_streams);
2830                         *num_streams = max_streams+1;
2831                 }
2832
2833                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2834                 if (*changed_ep_bitmask & endpoint_flag)
2835                         return -EINVAL;
2836                 *changed_ep_bitmask |= endpoint_flag;
2837         }
2838         return 0;
2839 }
2840
2841 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2842                 struct usb_device *udev,
2843                 struct usb_host_endpoint **eps, unsigned int num_eps)
2844 {
2845         u32 changed_ep_bitmask = 0;
2846         unsigned int slot_id;
2847         unsigned int ep_index;
2848         unsigned int ep_state;
2849         int i;
2850
2851         slot_id = udev->slot_id;
2852         if (!xhci->devs[slot_id])
2853                 return 0;
2854
2855         for (i = 0; i < num_eps; i++) {
2856                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2857                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2858                 /* Are streams already being freed for the endpoint? */
2859                 if (ep_state & EP_GETTING_NO_STREAMS) {
2860                         xhci_warn(xhci, "WARN Can't disable streams for "
2861                                         "endpoint 0x%x\n, "
2862                                         "streams are being disabled already.",
2863                                         eps[i]->desc.bEndpointAddress);
2864                         return 0;
2865                 }
2866                 /* Are there actually any streams to free? */
2867                 if (!(ep_state & EP_HAS_STREAMS) &&
2868                                 !(ep_state & EP_GETTING_STREAMS)) {
2869                         xhci_warn(xhci, "WARN Can't disable streams for "
2870                                         "endpoint 0x%x\n, "
2871                                         "streams are already disabled!",
2872                                         eps[i]->desc.bEndpointAddress);
2873                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2874                                         "with non-streams endpoint\n");
2875                         return 0;
2876                 }
2877                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2878         }
2879         return changed_ep_bitmask;
2880 }
2881
2882 /*
2883  * The USB device drivers use this function (though the HCD interface in USB
2884  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2885  * coordinate mass storage command queueing across multiple endpoints (basically
2886  * a stream ID == a task ID).
2887  *
2888  * Setting up streams involves allocating the same size stream context array
2889  * for each endpoint and issuing a configure endpoint command for all endpoints.
2890  *
2891  * Don't allow the call to succeed if one endpoint only supports one stream
2892  * (which means it doesn't support streams at all).
2893  *
2894  * Drivers may get less stream IDs than they asked for, if the host controller
2895  * hardware or endpoints claim they can't support the number of requested
2896  * stream IDs.
2897  */
2898 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2899                 struct usb_host_endpoint **eps, unsigned int num_eps,
2900                 unsigned int num_streams, gfp_t mem_flags)
2901 {
2902         int i, ret;
2903         struct xhci_hcd *xhci;
2904         struct xhci_virt_device *vdev;
2905         struct xhci_command *config_cmd;
2906         unsigned int ep_index;
2907         unsigned int num_stream_ctxs;
2908         unsigned long flags;
2909         u32 changed_ep_bitmask = 0;
2910
2911         if (!eps)
2912                 return -EINVAL;
2913
2914         /* Add one to the number of streams requested to account for
2915          * stream 0 that is reserved for xHCI usage.
2916          */
2917         num_streams += 1;
2918         xhci = hcd_to_xhci(hcd);
2919         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2920                         num_streams);
2921
2922         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2923         if (!config_cmd) {
2924                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2925                 return -ENOMEM;
2926         }
2927
2928         /* Check to make sure all endpoints are not already configured for
2929          * streams.  While we're at it, find the maximum number of streams that
2930          * all the endpoints will support and check for duplicate endpoints.
2931          */
2932         spin_lock_irqsave(&xhci->lock, flags);
2933         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2934                         num_eps, &num_streams, &changed_ep_bitmask);
2935         if (ret < 0) {
2936                 xhci_free_command(xhci, config_cmd);
2937                 spin_unlock_irqrestore(&xhci->lock, flags);
2938                 return ret;
2939         }
2940         if (num_streams <= 1) {
2941                 xhci_warn(xhci, "WARN: endpoints can't handle "
2942                                 "more than one stream.\n");
2943                 xhci_free_command(xhci, config_cmd);
2944                 spin_unlock_irqrestore(&xhci->lock, flags);
2945                 return -EINVAL;
2946         }
2947         vdev = xhci->devs[udev->slot_id];
2948         /* Mark each endpoint as being in transition, so
2949          * xhci_urb_enqueue() will reject all URBs.
2950          */
2951         for (i = 0; i < num_eps; i++) {
2952                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2953                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2954         }
2955         spin_unlock_irqrestore(&xhci->lock, flags);
2956
2957         /* Setup internal data structures and allocate HW data structures for
2958          * streams (but don't install the HW structures in the input context
2959          * until we're sure all memory allocation succeeded).
2960          */
2961         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2962         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2963                         num_stream_ctxs, num_streams);
2964
2965         for (i = 0; i < num_eps; i++) {
2966                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2967                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2968                                 num_stream_ctxs,
2969                                 num_streams, mem_flags);
2970                 if (!vdev->eps[ep_index].stream_info)
2971                         goto cleanup;
2972                 /* Set maxPstreams in endpoint context and update deq ptr to
2973                  * point to stream context array. FIXME
2974                  */
2975         }
2976
2977         /* Set up the input context for a configure endpoint command. */
2978         for (i = 0; i < num_eps; i++) {
2979                 struct xhci_ep_ctx *ep_ctx;
2980
2981                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2982                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2983
2984                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2985                                 vdev->out_ctx, ep_index);
2986                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2987                                 vdev->eps[ep_index].stream_info);
2988         }
2989         /* Tell the HW to drop its old copy of the endpoint context info
2990          * and add the updated copy from the input context.
2991          */
2992         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2993                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2994
2995         /* Issue and wait for the configure endpoint command */
2996         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2997                         false, false);
2998
2999         /* xHC rejected the configure endpoint command for some reason, so we
3000          * leave the old ring intact and free our internal streams data
3001          * structure.
3002          */
3003         if (ret < 0)
3004                 goto cleanup;
3005
3006         spin_lock_irqsave(&xhci->lock, flags);
3007         for (i = 0; i < num_eps; i++) {
3008                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3009                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3010                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3011                          udev->slot_id, ep_index);
3012                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3013         }
3014         xhci_free_command(xhci, config_cmd);
3015         spin_unlock_irqrestore(&xhci->lock, flags);
3016
3017         /* Subtract 1 for stream 0, which drivers can't use */
3018         return num_streams - 1;
3019
3020 cleanup:
3021         /* If it didn't work, free the streams! */
3022         for (i = 0; i < num_eps; i++) {
3023                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3024                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3025                 vdev->eps[ep_index].stream_info = NULL;
3026                 /* FIXME Unset maxPstreams in endpoint context and
3027                  * update deq ptr to point to normal string ring.
3028                  */
3029                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3030                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3031                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3032         }
3033         xhci_free_command(xhci, config_cmd);
3034         return -ENOMEM;
3035 }
3036
3037 /* Transition the endpoint from using streams to being a "normal" endpoint
3038  * without streams.
3039  *
3040  * Modify the endpoint context state, submit a configure endpoint command,
3041  * and free all endpoint rings for streams if that completes successfully.
3042  */
3043 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3044                 struct usb_host_endpoint **eps, unsigned int num_eps,
3045                 gfp_t mem_flags)
3046 {
3047         int i, ret;
3048         struct xhci_hcd *xhci;
3049         struct xhci_virt_device *vdev;
3050         struct xhci_command *command;
3051         unsigned int ep_index;
3052         unsigned long flags;
3053         u32 changed_ep_bitmask;
3054
3055         xhci = hcd_to_xhci(hcd);
3056         vdev = xhci->devs[udev->slot_id];
3057
3058         /* Set up a configure endpoint command to remove the streams rings */
3059         spin_lock_irqsave(&xhci->lock, flags);
3060         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3061                         udev, eps, num_eps);
3062         if (changed_ep_bitmask == 0) {
3063                 spin_unlock_irqrestore(&xhci->lock, flags);
3064                 return -EINVAL;
3065         }
3066
3067         /* Use the xhci_command structure from the first endpoint.  We may have
3068          * allocated too many, but the driver may call xhci_free_streams() for
3069          * each endpoint it grouped into one call to xhci_alloc_streams().
3070          */
3071         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3072         command = vdev->eps[ep_index].stream_info->free_streams_command;
3073         for (i = 0; i < num_eps; i++) {
3074                 struct xhci_ep_ctx *ep_ctx;
3075
3076                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3077                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3078                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3079                         EP_GETTING_NO_STREAMS;
3080
3081                 xhci_endpoint_copy(xhci, command->in_ctx,
3082                                 vdev->out_ctx, ep_index);
3083                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3084                                 &vdev->eps[ep_index]);
3085         }
3086         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3087                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3088         spin_unlock_irqrestore(&xhci->lock, flags);
3089
3090         /* Issue and wait for the configure endpoint command,
3091          * which must succeed.
3092          */
3093         ret = xhci_configure_endpoint(xhci, udev, command,
3094                         false, true);
3095
3096         /* xHC rejected the configure endpoint command for some reason, so we
3097          * leave the streams rings intact.
3098          */
3099         if (ret < 0)
3100                 return ret;
3101
3102         spin_lock_irqsave(&xhci->lock, flags);
3103         for (i = 0; i < num_eps; i++) {
3104                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3105                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3106                 vdev->eps[ep_index].stream_info = NULL;
3107                 /* FIXME Unset maxPstreams in endpoint context and
3108                  * update deq ptr to point to normal string ring.
3109                  */
3110                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3111                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3112         }
3113         spin_unlock_irqrestore(&xhci->lock, flags);
3114
3115         return 0;
3116 }
3117
3118 /*
3119  * Deletes endpoint resources for endpoints that were active before a Reset
3120  * Device command, or a Disable Slot command.  The Reset Device command leaves
3121  * the control endpoint intact, whereas the Disable Slot command deletes it.
3122  *
3123  * Must be called with xhci->lock held.
3124  */
3125 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3126         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3127 {
3128         int i;
3129         unsigned int num_dropped_eps = 0;
3130         unsigned int drop_flags = 0;
3131
3132         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3133                 if (virt_dev->eps[i].ring) {
3134                         drop_flags |= 1 << i;
3135                         num_dropped_eps++;
3136                 }
3137         }
3138         xhci->num_active_eps -= num_dropped_eps;
3139         if (num_dropped_eps)
3140                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3141                                 "%u now active.\n",
3142                                 num_dropped_eps, drop_flags,
3143                                 xhci->num_active_eps);
3144 }
3145
3146 /*
3147  * This submits a Reset Device Command, which will set the device state to 0,
3148  * set the device address to 0, and disable all the endpoints except the default
3149  * control endpoint.  The USB core should come back and call
3150  * xhci_address_device(), and then re-set up the configuration.  If this is
3151  * called because of a usb_reset_and_verify_device(), then the old alternate
3152  * settings will be re-installed through the normal bandwidth allocation
3153  * functions.
3154  *
3155  * Wait for the Reset Device command to finish.  Remove all structures
3156  * associated with the endpoints that were disabled.  Clear the input device
3157  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3158  *
3159  * If the virt_dev to be reset does not exist or does not match the udev,
3160  * it means the device is lost, possibly due to the xHC restore error and
3161  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3162  * re-allocate the device.
3163  */
3164 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3165 {
3166         int ret, i;
3167         unsigned long flags;
3168         struct xhci_hcd *xhci;
3169         unsigned int slot_id;
3170         struct xhci_virt_device *virt_dev;
3171         struct xhci_command *reset_device_cmd;
3172         int timeleft;
3173         int last_freed_endpoint;
3174         struct xhci_slot_ctx *slot_ctx;
3175         int old_active_eps = 0;
3176
3177         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3178         if (ret <= 0)
3179                 return ret;
3180         xhci = hcd_to_xhci(hcd);
3181         slot_id = udev->slot_id;
3182         virt_dev = xhci->devs[slot_id];
3183         if (!virt_dev) {
3184                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3185                                 "not exist. Re-allocate the device\n", slot_id);
3186                 ret = xhci_alloc_dev(hcd, udev);
3187                 if (ret == 1)
3188                         return 0;
3189                 else
3190                         return -EINVAL;
3191         }
3192
3193         if (virt_dev->udev != udev) {
3194                 /* If the virt_dev and the udev does not match, this virt_dev
3195                  * may belong to another udev.
3196                  * Re-allocate the device.
3197                  */
3198                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3199                                 "not match the udev. Re-allocate the device\n",
3200                                 slot_id);
3201                 ret = xhci_alloc_dev(hcd, udev);
3202                 if (ret == 1)
3203                         return 0;
3204                 else
3205                         return -EINVAL;
3206         }
3207
3208         /* If device is not setup, there is no point in resetting it */
3209         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3210         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3211                                                 SLOT_STATE_DISABLED)
3212                 return 0;
3213
3214         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3215         /* Allocate the command structure that holds the struct completion.
3216          * Assume we're in process context, since the normal device reset
3217          * process has to wait for the device anyway.  Storage devices are
3218          * reset as part of error handling, so use GFP_NOIO instead of
3219          * GFP_KERNEL.
3220          */
3221         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3222         if (!reset_device_cmd) {
3223                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3224                 return -ENOMEM;
3225         }
3226
3227         /* Attempt to submit the Reset Device command to the command ring */
3228         spin_lock_irqsave(&xhci->lock, flags);
3229         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3230
3231         /* Enqueue pointer can be left pointing to the link TRB,
3232          * we must handle that
3233          */
3234         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3235                 reset_device_cmd->command_trb =
3236                         xhci->cmd_ring->enq_seg->next->trbs;
3237
3238         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3239         ret = xhci_queue_reset_device(xhci, slot_id);
3240         if (ret) {
3241                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3242                 list_del(&reset_device_cmd->cmd_list);
3243                 spin_unlock_irqrestore(&xhci->lock, flags);
3244                 goto command_cleanup;
3245         }
3246         xhci_ring_cmd_db(xhci);
3247         spin_unlock_irqrestore(&xhci->lock, flags);
3248
3249         /* Wait for the Reset Device command to finish */
3250         timeleft = wait_for_completion_interruptible_timeout(
3251                         reset_device_cmd->completion,
3252                         USB_CTRL_SET_TIMEOUT);
3253         if (timeleft <= 0) {
3254                 xhci_warn(xhci, "%s while waiting for reset device command\n",
3255                                 timeleft == 0 ? "Timeout" : "Signal");
3256                 spin_lock_irqsave(&xhci->lock, flags);
3257                 /* The timeout might have raced with the event ring handler, so
3258                  * only delete from the list if the item isn't poisoned.
3259                  */
3260                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3261                         list_del(&reset_device_cmd->cmd_list);
3262                 spin_unlock_irqrestore(&xhci->lock, flags);
3263                 ret = -ETIME;
3264                 goto command_cleanup;
3265         }
3266
3267         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3268          * unless we tried to reset a slot ID that wasn't enabled,
3269          * or the device wasn't in the addressed or configured state.
3270          */
3271         ret = reset_device_cmd->status;
3272         switch (ret) {
3273         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3274         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3275                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3276                                 slot_id,
3277                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3278                 xhci_info(xhci, "Not freeing device rings.\n");
3279                 /* Don't treat this as an error.  May change my mind later. */
3280                 ret = 0;
3281                 goto command_cleanup;
3282         case COMP_SUCCESS:
3283                 xhci_dbg(xhci, "Successful reset device command.\n");
3284                 break;
3285         default:
3286                 if (xhci_is_vendor_info_code(xhci, ret))
3287                         break;
3288                 xhci_warn(xhci, "Unknown completion code %u for "
3289                                 "reset device command.\n", ret);
3290                 ret = -EINVAL;
3291                 goto command_cleanup;
3292         }
3293
3294         /* Free up host controller endpoint resources */
3295         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3296                 spin_lock_irqsave(&xhci->lock, flags);
3297                 /* Don't delete the default control endpoint resources */
3298                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3299                 spin_unlock_irqrestore(&xhci->lock, flags);
3300         }
3301
3302         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3303         last_freed_endpoint = 1;
3304         for (i = 1; i < 31; ++i) {
3305                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3306
3307                 if (ep->ep_state & EP_HAS_STREAMS) {
3308                         xhci_free_stream_info(xhci, ep->stream_info);
3309                         ep->stream_info = NULL;
3310                         ep->ep_state &= ~EP_HAS_STREAMS;
3311                 }
3312
3313                 if (ep->ring) {
3314                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3315                         last_freed_endpoint = i;
3316                 }
3317                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3318                         xhci_drop_ep_from_interval_table(xhci,
3319                                         &virt_dev->eps[i].bw_info,
3320                                         virt_dev->bw_table,
3321                                         udev,
3322                                         &virt_dev->eps[i],
3323                                         virt_dev->tt_info);
3324                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3325         }
3326         /* If necessary, update the number of active TTs on this root port */
3327         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3328
3329         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3330         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3331         ret = 0;
3332
3333 command_cleanup:
3334         xhci_free_command(xhci, reset_device_cmd);
3335         return ret;
3336 }
3337
3338 /*
3339  * At this point, the struct usb_device is about to go away, the device has
3340  * disconnected, and all traffic has been stopped and the endpoints have been
3341  * disabled.  Free any HC data structures associated with that device.
3342  */
3343 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3344 {
3345         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3346         struct xhci_virt_device *virt_dev;
3347         unsigned long flags;
3348         u32 state;
3349         int i, ret;
3350
3351         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3352         /* If the host is halted due to driver unload, we still need to free the
3353          * device.
3354          */
3355         if (ret <= 0 && ret != -ENODEV)
3356                 return;
3357
3358         virt_dev = xhci->devs[udev->slot_id];
3359
3360         /* Stop any wayward timer functions (which may grab the lock) */
3361         for (i = 0; i < 31; ++i) {
3362                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3363                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3364         }
3365
3366         if (udev->usb2_hw_lpm_enabled) {
3367                 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3368                 udev->usb2_hw_lpm_enabled = 0;
3369         }
3370
3371         spin_lock_irqsave(&xhci->lock, flags);
3372         /* Don't disable the slot if the host controller is dead. */
3373         state = xhci_readl(xhci, &xhci->op_regs->status);
3374         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3375                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3376                 xhci_free_virt_device(xhci, udev->slot_id);
3377                 spin_unlock_irqrestore(&xhci->lock, flags);
3378                 return;
3379         }
3380
3381         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3382                 spin_unlock_irqrestore(&xhci->lock, flags);
3383                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3384                 return;
3385         }
3386         xhci_ring_cmd_db(xhci);
3387         spin_unlock_irqrestore(&xhci->lock, flags);
3388         /*
3389          * Event command completion handler will free any data structures
3390          * associated with the slot.  XXX Can free sleep?
3391          */
3392 }
3393
3394 /*
3395  * Checks if we have enough host controller resources for the default control
3396  * endpoint.
3397  *
3398  * Must be called with xhci->lock held.
3399  */
3400 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3401 {
3402         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3403                 xhci_dbg(xhci, "Not enough ep ctxs: "
3404                                 "%u active, need to add 1, limit is %u.\n",
3405                                 xhci->num_active_eps, xhci->limit_active_eps);
3406                 return -ENOMEM;
3407         }
3408         xhci->num_active_eps += 1;
3409         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3410                         xhci->num_active_eps);
3411         return 0;
3412 }
3413
3414
3415 /*
3416  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3417  * timed out, or allocating memory failed.  Returns 1 on success.
3418  */
3419 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3420 {
3421         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3422         unsigned long flags;
3423         int timeleft;
3424         int ret;
3425
3426         spin_lock_irqsave(&xhci->lock, flags);
3427         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3428         if (ret) {
3429                 spin_unlock_irqrestore(&xhci->lock, flags);
3430                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3431                 return 0;
3432         }
3433         xhci_ring_cmd_db(xhci);
3434         spin_unlock_irqrestore(&xhci->lock, flags);
3435
3436         /* XXX: how much time for xHC slot assignment? */
3437         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3438                         USB_CTRL_SET_TIMEOUT);
3439         if (timeleft <= 0) {
3440                 xhci_warn(xhci, "%s while waiting for a slot\n",
3441                                 timeleft == 0 ? "Timeout" : "Signal");
3442                 /* FIXME cancel the enable slot request */
3443                 return 0;
3444         }
3445
3446         if (!xhci->slot_id) {
3447                 xhci_err(xhci, "Error while assigning device slot ID\n");
3448                 return 0;
3449         }
3450
3451         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3452                 spin_lock_irqsave(&xhci->lock, flags);
3453                 ret = xhci_reserve_host_control_ep_resources(xhci);
3454                 if (ret) {
3455                         spin_unlock_irqrestore(&xhci->lock, flags);
3456                         xhci_warn(xhci, "Not enough host resources, "
3457                                         "active endpoint contexts = %u\n",
3458                                         xhci->num_active_eps);
3459                         goto disable_slot;
3460                 }
3461                 spin_unlock_irqrestore(&xhci->lock, flags);
3462         }
3463         /* Use GFP_NOIO, since this function can be called from
3464          * xhci_discover_or_reset_device(), which may be called as part of
3465          * mass storage driver error handling.
3466          */
3467         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3468                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3469                 goto disable_slot;
3470         }
3471         udev->slot_id = xhci->slot_id;
3472         /* Is this a LS or FS device under a HS hub? */
3473         /* Hub or peripherial? */
3474         return 1;
3475
3476 disable_slot:
3477         /* Disable slot, if we can do it without mem alloc */
3478         spin_lock_irqsave(&xhci->lock, flags);
3479         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3480                 xhci_ring_cmd_db(xhci);
3481         spin_unlock_irqrestore(&xhci->lock, flags);
3482         return 0;
3483 }
3484
3485 /*
3486  * Issue an Address Device command (which will issue a SetAddress request to
3487  * the device).
3488  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3489  * we should only issue and wait on one address command at the same time.
3490  *
3491  * We add one to the device address issued by the hardware because the USB core
3492  * uses address 1 for the root hubs (even though they're not really devices).
3493  */
3494 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3495 {
3496         unsigned long flags;
3497         int timeleft;
3498         struct xhci_virt_device *virt_dev;
3499         int ret = 0;
3500         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3501         struct xhci_slot_ctx *slot_ctx;
3502         struct xhci_input_control_ctx *ctrl_ctx;
3503         u64 temp_64;
3504
3505         if (!udev->slot_id) {
3506                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3507                 return -EINVAL;
3508         }
3509
3510         virt_dev = xhci->devs[udev->slot_id];
3511
3512         if (WARN_ON(!virt_dev)) {
3513                 /*
3514                  * In plug/unplug torture test with an NEC controller,
3515                  * a zero-dereference was observed once due to virt_dev = 0.
3516                  * Print useful debug rather than crash if it is observed again!
3517                  */
3518                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3519                         udev->slot_id);
3520                 return -EINVAL;
3521         }
3522
3523         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3524         /*
3525          * If this is the first Set Address since device plug-in or
3526          * virt_device realloaction after a resume with an xHCI power loss,
3527          * then set up the slot context.
3528          */
3529         if (!slot_ctx->dev_info)
3530                 xhci_setup_addressable_virt_dev(xhci, udev);
3531         /* Otherwise, update the control endpoint ring enqueue pointer. */
3532         else
3533                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3534         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3535         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3536         ctrl_ctx->drop_flags = 0;
3537
3538         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3539         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3540
3541         spin_lock_irqsave(&xhci->lock, flags);
3542         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3543                                         udev->slot_id);
3544         if (ret) {
3545                 spin_unlock_irqrestore(&xhci->lock, flags);
3546                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3547                 return ret;
3548         }
3549         xhci_ring_cmd_db(xhci);
3550         spin_unlock_irqrestore(&xhci->lock, flags);
3551
3552         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3553         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3554                         USB_CTRL_SET_TIMEOUT);
3555         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3556          * the SetAddress() "recovery interval" required by USB and aborting the
3557          * command on a timeout.
3558          */
3559         if (timeleft <= 0) {
3560                 xhci_warn(xhci, "%s while waiting for address device command\n",
3561                                 timeleft == 0 ? "Timeout" : "Signal");
3562                 /* FIXME cancel the address device command */
3563                 return -ETIME;
3564         }
3565
3566         switch (virt_dev->cmd_status) {
3567         case COMP_CTX_STATE:
3568         case COMP_EBADSLT:
3569                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3570                                 udev->slot_id);
3571                 ret = -EINVAL;
3572                 break;
3573         case COMP_TX_ERR:
3574                 dev_warn(&udev->dev, "Device not responding to set address.\n");
3575                 ret = -EPROTO;
3576                 break;
3577         case COMP_DEV_ERR:
3578                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3579                                 "device command.\n");
3580                 ret = -ENODEV;
3581                 break;
3582         case COMP_SUCCESS:
3583                 xhci_dbg(xhci, "Successful Address Device command\n");
3584                 break;
3585         default:
3586                 xhci_err(xhci, "ERROR: unexpected command completion "
3587                                 "code 0x%x.\n", virt_dev->cmd_status);
3588                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3589                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3590                 ret = -EINVAL;
3591                 break;
3592         }
3593         if (ret) {
3594                 return ret;
3595         }
3596         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3597         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3598         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3599                  udev->slot_id,
3600                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3601                  (unsigned long long)
3602                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3603         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3604                         (unsigned long long)virt_dev->out_ctx->dma);
3605         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3606         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3607         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3608         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3609         /*
3610          * USB core uses address 1 for the roothubs, so we add one to the
3611          * address given back to us by the HC.
3612          */
3613         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3614         /* Use kernel assigned address for devices; store xHC assigned
3615          * address locally. */
3616         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3617                 + 1;
3618         /* Zero the input context control for later use */
3619         ctrl_ctx->add_flags = 0;
3620         ctrl_ctx->drop_flags = 0;
3621
3622         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3623
3624         return 0;
3625 }
3626
3627 #ifdef CONFIG_USB_SUSPEND
3628
3629 /* BESL to HIRD Encoding array for USB2 LPM */
3630 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3631         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3632
3633 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3634 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3635                                         struct usb_device *udev)
3636 {
3637         int u2del, besl, besl_host;
3638         int besl_device = 0;
3639         u32 field;
3640
3641         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3642         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3643
3644         if (field & USB_BESL_SUPPORT) {
3645                 for (besl_host = 0; besl_host < 16; besl_host++) {
3646                         if (xhci_besl_encoding[besl_host] >= u2del)
3647                                 break;
3648                 }
3649                 /* Use baseline BESL value as default */
3650                 if (field & USB_BESL_BASELINE_VALID)
3651                         besl_device = USB_GET_BESL_BASELINE(field);
3652                 else if (field & USB_BESL_DEEP_VALID)
3653                         besl_device = USB_GET_BESL_DEEP(field);
3654         } else {
3655                 if (u2del <= 50)
3656                         besl_host = 0;
3657                 else
3658                         besl_host = (u2del - 51) / 75 + 1;
3659         }
3660
3661         besl = besl_host + besl_device;
3662         if (besl > 15)
3663                 besl = 15;
3664
3665         return besl;
3666 }
3667
3668 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3669                                         struct usb_device *udev)
3670 {
3671         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3672         struct dev_info *dev_info;
3673         __le32 __iomem  **port_array;
3674         __le32 __iomem  *addr, *pm_addr;
3675         u32             temp, dev_id;
3676         unsigned int    port_num;
3677         unsigned long   flags;
3678         int             hird;
3679         int             ret;
3680
3681         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3682                         !udev->lpm_capable)
3683                 return -EINVAL;
3684
3685         /* we only support lpm for non-hub device connected to root hub yet */
3686         if (!udev->parent || udev->parent->parent ||
3687                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3688                 return -EINVAL;
3689
3690         spin_lock_irqsave(&xhci->lock, flags);
3691
3692         /* Look for devices in lpm_failed_devs list */
3693         dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3694                         le16_to_cpu(udev->descriptor.idProduct);
3695         list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3696                 if (dev_info->dev_id == dev_id) {
3697                         ret = -EINVAL;
3698                         goto finish;
3699                 }
3700         }
3701
3702         port_array = xhci->usb2_ports;
3703         port_num = udev->portnum - 1;
3704
3705         if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3706                 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3707                 ret = -EINVAL;
3708                 goto finish;
3709         }
3710
3711         /*
3712          * Test USB 2.0 software LPM.
3713          * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3714          * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3715          * in the June 2011 errata release.
3716          */
3717         xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3718         /*
3719          * Set L1 Device Slot and HIRD/BESL.
3720          * Check device's USB 2.0 extension descriptor to determine whether
3721          * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3722          */
3723         pm_addr = port_array[port_num] + 1;
3724         hird = xhci_calculate_hird_besl(xhci, udev);
3725         temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3726         xhci_writel(xhci, temp, pm_addr);
3727
3728         /* Set port link state to U2(L1) */
3729         addr = port_array[port_num];
3730         xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3731
3732         /* wait for ACK */
3733         spin_unlock_irqrestore(&xhci->lock, flags);
3734         msleep(10);
3735         spin_lock_irqsave(&xhci->lock, flags);
3736
3737         /* Check L1 Status */
3738         ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3739         if (ret != -ETIMEDOUT) {
3740                 /* enter L1 successfully */
3741                 temp = xhci_readl(xhci, addr);
3742                 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3743                                 port_num, temp);
3744                 ret = 0;
3745         } else {
3746                 temp = xhci_readl(xhci, pm_addr);
3747                 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3748                                 port_num, temp & PORT_L1S_MASK);
3749                 ret = -EINVAL;
3750         }
3751
3752         /* Resume the port */
3753         xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3754
3755         spin_unlock_irqrestore(&xhci->lock, flags);
3756         msleep(10);
3757         spin_lock_irqsave(&xhci->lock, flags);
3758
3759         /* Clear PLC */
3760         xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3761
3762         /* Check PORTSC to make sure the device is in the right state */
3763         if (!ret) {
3764                 temp = xhci_readl(xhci, addr);
3765                 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3766                 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3767                                 (temp & PORT_PLS_MASK) != XDEV_U0) {
3768                         xhci_dbg(xhci, "port L1 resume fail\n");
3769                         ret = -EINVAL;
3770                 }
3771         }
3772
3773         if (ret) {
3774                 /* Insert dev to lpm_failed_devs list */
3775                 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3776                                 "re-enumerate\n");
3777                 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3778                 if (!dev_info) {
3779                         ret = -ENOMEM;
3780                         goto finish;
3781                 }
3782                 dev_info->dev_id = dev_id;
3783                 INIT_LIST_HEAD(&dev_info->list);
3784                 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3785         } else {
3786                 xhci_ring_device(xhci, udev->slot_id);
3787         }
3788
3789 finish:
3790         spin_unlock_irqrestore(&xhci->lock, flags);
3791         return ret;
3792 }
3793
3794 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3795                         struct usb_device *udev, int enable)
3796 {
3797         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3798         __le32 __iomem  **port_array;
3799         __le32 __iomem  *pm_addr;
3800         u32             temp;
3801         unsigned int    port_num;
3802         unsigned long   flags;
3803         int             hird;
3804
3805         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3806                         !udev->lpm_capable)
3807                 return -EPERM;
3808
3809         if (!udev->parent || udev->parent->parent ||
3810                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3811                 return -EPERM;
3812
3813         if (udev->usb2_hw_lpm_capable != 1)
3814                 return -EPERM;
3815
3816         spin_lock_irqsave(&xhci->lock, flags);
3817
3818         port_array = xhci->usb2_ports;
3819         port_num = udev->portnum - 1;
3820         pm_addr = port_array[port_num] + 1;
3821         temp = xhci_readl(xhci, pm_addr);
3822
3823         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3824                         enable ? "enable" : "disable", port_num);
3825
3826         hird = xhci_calculate_hird_besl(xhci, udev);
3827
3828         if (enable) {
3829                 temp &= ~PORT_HIRD_MASK;
3830                 temp |= PORT_HIRD(hird) | PORT_RWE;
3831                 xhci_writel(xhci, temp, pm_addr);
3832                 temp = xhci_readl(xhci, pm_addr);
3833                 temp |= PORT_HLE;
3834                 xhci_writel(xhci, temp, pm_addr);
3835         } else {
3836                 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3837                 xhci_writel(xhci, temp, pm_addr);
3838         }
3839
3840         spin_unlock_irqrestore(&xhci->lock, flags);
3841         return 0;
3842 }
3843
3844 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3845 {
3846         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3847         int             ret;
3848
3849         ret = xhci_usb2_software_lpm_test(hcd, udev);
3850         if (!ret) {
3851                 xhci_dbg(xhci, "software LPM test succeed\n");
3852                 if (xhci->hw_lpm_support == 1) {
3853                         udev->usb2_hw_lpm_capable = 1;
3854                         ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3855                         if (!ret)
3856                                 udev->usb2_hw_lpm_enabled = 1;
3857                 }
3858         }
3859
3860         return 0;
3861 }
3862
3863 #else
3864
3865 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3866                                 struct usb_device *udev, int enable)
3867 {
3868         return 0;
3869 }
3870
3871 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3872 {
3873         return 0;
3874 }
3875
3876 #endif /* CONFIG_USB_SUSPEND */
3877
3878 /*---------------------- USB 3.0 Link PM functions ------------------------*/
3879
3880 #ifdef CONFIG_PM
3881 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
3882 static unsigned long long xhci_service_interval_to_ns(
3883                 struct usb_endpoint_descriptor *desc)
3884 {
3885         return (1 << (desc->bInterval - 1)) * 125 * 1000;
3886 }
3887
3888 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
3889                 enum usb3_link_state state)
3890 {
3891         unsigned long long sel;
3892         unsigned long long pel;
3893         unsigned int max_sel_pel;
3894         char *state_name;
3895
3896         switch (state) {
3897         case USB3_LPM_U1:
3898                 /* Convert SEL and PEL stored in nanoseconds to microseconds */
3899                 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
3900                 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
3901                 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
3902                 state_name = "U1";
3903                 break;
3904         case USB3_LPM_U2:
3905                 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
3906                 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
3907                 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
3908                 state_name = "U2";
3909                 break;
3910         default:
3911                 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
3912                                 __func__);
3913                 return USB3_LPM_DISABLED;
3914         }
3915
3916         if (sel <= max_sel_pel && pel <= max_sel_pel)
3917                 return USB3_LPM_DEVICE_INITIATED;
3918
3919         if (sel > max_sel_pel)
3920                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
3921                                 "due to long SEL %llu ms\n",
3922                                 state_name, sel);
3923         else
3924                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
3925                                 "due to long PEL %llu\n ms",
3926                                 state_name, pel);
3927         return USB3_LPM_DISABLED;
3928 }
3929
3930 /* Returns the hub-encoded U1 timeout value.
3931  * The U1 timeout should be the maximum of the following values:
3932  *  - For control endpoints, U1 system exit latency (SEL) * 3
3933  *  - For bulk endpoints, U1 SEL * 5
3934  *  - For interrupt endpoints:
3935  *    - Notification EPs, U1 SEL * 3
3936  *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
3937  *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
3938  */
3939 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
3940                 struct usb_endpoint_descriptor *desc)
3941 {
3942         unsigned long long timeout_ns;
3943         int ep_type;
3944         int intr_type;
3945
3946         ep_type = usb_endpoint_type(desc);
3947         switch (ep_type) {
3948         case USB_ENDPOINT_XFER_CONTROL:
3949                 timeout_ns = udev->u1_params.sel * 3;
3950                 break;
3951         case USB_ENDPOINT_XFER_BULK:
3952                 timeout_ns = udev->u1_params.sel * 5;
3953                 break;
3954         case USB_ENDPOINT_XFER_INT:
3955                 intr_type = usb_endpoint_interrupt_type(desc);
3956                 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
3957                         timeout_ns = udev->u1_params.sel * 3;
3958                         break;
3959                 }
3960                 /* Otherwise the calculation is the same as isoc eps */
3961         case USB_ENDPOINT_XFER_ISOC:
3962                 timeout_ns = xhci_service_interval_to_ns(desc);
3963                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
3964                 if (timeout_ns < udev->u1_params.sel * 2)
3965                         timeout_ns = udev->u1_params.sel * 2;
3966                 break;
3967         default:
3968                 return 0;
3969         }
3970
3971         /* The U1 timeout is encoded in 1us intervals. */
3972         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
3973         /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
3974         if (timeout_ns == USB3_LPM_DISABLED)
3975                 timeout_ns++;
3976
3977         /* If the necessary timeout value is bigger than what we can set in the
3978          * USB 3.0 hub, we have to disable hub-initiated U1.
3979          */
3980         if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
3981                 return timeout_ns;
3982         dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
3983                         "due to long timeout %llu ms\n", timeout_ns);
3984         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
3985 }
3986
3987 /* Returns the hub-encoded U2 timeout value.
3988  * The U2 timeout should be the maximum of:
3989  *  - 10 ms (to avoid the bandwidth impact on the scheduler)
3990  *  - largest bInterval of any active periodic endpoint (to avoid going
3991  *    into lower power link states between intervals).
3992  *  - the U2 Exit Latency of the device
3993  */
3994 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
3995                 struct usb_endpoint_descriptor *desc)
3996 {
3997         unsigned long long timeout_ns;
3998         unsigned long long u2_del_ns;
3999
4000         timeout_ns = 10 * 1000 * 1000;
4001
4002         if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4003                         (xhci_service_interval_to_ns(desc) > timeout_ns))
4004                 timeout_ns = xhci_service_interval_to_ns(desc);
4005
4006         u2_del_ns = udev->bos->ss_cap->bU2DevExitLat * 1000;
4007         if (u2_del_ns > timeout_ns)
4008                 timeout_ns = u2_del_ns;
4009
4010         /* The U2 timeout is encoded in 256us intervals */
4011         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4012         /* If the necessary timeout value is bigger than what we can set in the
4013          * USB 3.0 hub, we have to disable hub-initiated U2.
4014          */
4015         if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4016                 return timeout_ns;
4017         dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4018                         "due to long timeout %llu ms\n", timeout_ns);
4019         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4020 }
4021
4022 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4023                 struct usb_device *udev,
4024                 struct usb_endpoint_descriptor *desc,
4025                 enum usb3_link_state state,
4026                 u16 *timeout)
4027 {
4028         if (state == USB3_LPM_U1) {
4029                 if (xhci->quirks & XHCI_INTEL_HOST)
4030                         return xhci_calculate_intel_u1_timeout(udev, desc);
4031         } else {
4032                 if (xhci->quirks & XHCI_INTEL_HOST)
4033                         return xhci_calculate_intel_u2_timeout(udev, desc);
4034         }
4035
4036         return USB3_LPM_DISABLED;
4037 }
4038
4039 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4040                 struct usb_device *udev,
4041                 struct usb_endpoint_descriptor *desc,
4042                 enum usb3_link_state state,
4043                 u16 *timeout)
4044 {
4045         u16 alt_timeout;
4046
4047         alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4048                 desc, state, timeout);
4049
4050         /* If we found we can't enable hub-initiated LPM, or
4051          * the U1 or U2 exit latency was too high to allow
4052          * device-initiated LPM as well, just stop searching.
4053          */
4054         if (alt_timeout == USB3_LPM_DISABLED ||
4055                         alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4056                 *timeout = alt_timeout;
4057                 return -E2BIG;
4058         }
4059         if (alt_timeout > *timeout)
4060                 *timeout = alt_timeout;
4061         return 0;
4062 }
4063
4064 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4065                 struct usb_device *udev,
4066                 struct usb_host_interface *alt,
4067                 enum usb3_link_state state,
4068                 u16 *timeout)
4069 {
4070         int j;
4071
4072         for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4073                 if (xhci_update_timeout_for_endpoint(xhci, udev,
4074                                         &alt->endpoint[j].desc, state, timeout))
4075                         return -E2BIG;
4076                 continue;
4077         }
4078         return 0;
4079 }
4080
4081 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4082                 enum usb3_link_state state)
4083 {
4084         struct usb_device *parent;
4085         unsigned int num_hubs;
4086
4087         if (state == USB3_LPM_U2)
4088                 return 0;
4089
4090         /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4091         for (parent = udev->parent, num_hubs = 0; parent->parent;
4092                         parent = parent->parent)
4093                 num_hubs++;
4094
4095         if (num_hubs < 2)
4096                 return 0;
4097
4098         dev_dbg(&udev->dev, "Disabling U1 link state for device"
4099                         " below second-tier hub.\n");
4100         dev_dbg(&udev->dev, "Plug device into first-tier hub "
4101                         "to decrease power consumption.\n");
4102         return -E2BIG;
4103 }
4104
4105 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4106                 struct usb_device *udev,
4107                 enum usb3_link_state state)
4108 {
4109         if (xhci->quirks & XHCI_INTEL_HOST)
4110                 return xhci_check_intel_tier_policy(udev, state);
4111         return -EINVAL;
4112 }
4113
4114 /* Returns the U1 or U2 timeout that should be enabled.
4115  * If the tier check or timeout setting functions return with a non-zero exit
4116  * code, that means the timeout value has been finalized and we shouldn't look
4117  * at any more endpoints.
4118  */
4119 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4120                         struct usb_device *udev, enum usb3_link_state state)
4121 {
4122         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4123         struct usb_host_config *config;
4124         char *state_name;
4125         int i;
4126         u16 timeout = USB3_LPM_DISABLED;
4127
4128         if (state == USB3_LPM_U1)
4129                 state_name = "U1";
4130         else if (state == USB3_LPM_U2)
4131                 state_name = "U2";
4132         else {
4133                 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4134                                 state);
4135                 return timeout;
4136         }
4137
4138         if (xhci_check_tier_policy(xhci, udev, state) < 0)
4139                 return timeout;
4140
4141         /* Gather some information about the currently installed configuration
4142          * and alternate interface settings.
4143          */
4144         if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4145                         state, &timeout))
4146                 return timeout;
4147
4148         config = udev->actconfig;
4149         if (!config)
4150                 return timeout;
4151
4152         for (i = 0; i < USB_MAXINTERFACES; i++) {
4153                 struct usb_driver *driver;
4154                 struct usb_interface *intf = config->interface[i];
4155
4156                 if (!intf)
4157                         continue;
4158
4159                 /* Check if any currently bound drivers want hub-initiated LPM
4160                  * disabled.
4161                  */
4162                 if (intf->dev.driver) {
4163                         driver = to_usb_driver(intf->dev.driver);
4164                         if (driver && driver->disable_hub_initiated_lpm) {
4165                                 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4166                                                 "at request of driver %s\n",
4167                                                 state_name, driver->name);
4168                                 return xhci_get_timeout_no_hub_lpm(udev, state);
4169                         }
4170                 }
4171
4172                 /* Not sure how this could happen... */
4173                 if (!intf->cur_altsetting)
4174                         continue;
4175
4176                 if (xhci_update_timeout_for_interface(xhci, udev,
4177                                         intf->cur_altsetting,
4178                                         state, &timeout))
4179                         return timeout;
4180         }
4181         return timeout;
4182 }
4183
4184 /*
4185  * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4186  * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
4187  */
4188 static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4189                         struct usb_device *udev, u16 max_exit_latency)
4190 {
4191         struct xhci_virt_device *virt_dev;
4192         struct xhci_command *command;
4193         struct xhci_input_control_ctx *ctrl_ctx;
4194         struct xhci_slot_ctx *slot_ctx;
4195         unsigned long flags;
4196         int ret;
4197
4198         spin_lock_irqsave(&xhci->lock, flags);
4199         if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
4200                 spin_unlock_irqrestore(&xhci->lock, flags);
4201                 return 0;
4202         }
4203
4204         /* Attempt to issue an Evaluate Context command to change the MEL. */
4205         virt_dev = xhci->devs[udev->slot_id];
4206         command = xhci->lpm_command;
4207         xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4208         spin_unlock_irqrestore(&xhci->lock, flags);
4209
4210         ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
4211         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4212         slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4213         slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4214         slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4215
4216         xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
4217         xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4218         xhci_dbg_ctx(xhci, command->in_ctx, 0);
4219
4220         /* Issue and wait for the evaluate context command. */
4221         ret = xhci_configure_endpoint(xhci, udev, command,
4222                         true, true);
4223         xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4224         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4225
4226         if (!ret) {
4227                 spin_lock_irqsave(&xhci->lock, flags);
4228                 virt_dev->current_mel = max_exit_latency;
4229                 spin_unlock_irqrestore(&xhci->lock, flags);
4230         }
4231         return ret;
4232 }
4233
4234 static int calculate_max_exit_latency(struct usb_device *udev,
4235                 enum usb3_link_state state_changed,
4236                 u16 hub_encoded_timeout)
4237 {
4238         unsigned long long u1_mel_us = 0;
4239         unsigned long long u2_mel_us = 0;
4240         unsigned long long mel_us = 0;
4241         bool disabling_u1;
4242         bool disabling_u2;
4243         bool enabling_u1;
4244         bool enabling_u2;
4245
4246         disabling_u1 = (state_changed == USB3_LPM_U1 &&
4247                         hub_encoded_timeout == USB3_LPM_DISABLED);
4248         disabling_u2 = (state_changed == USB3_LPM_U2 &&
4249                         hub_encoded_timeout == USB3_LPM_DISABLED);
4250
4251         enabling_u1 = (state_changed == USB3_LPM_U1 &&
4252                         hub_encoded_timeout != USB3_LPM_DISABLED);
4253         enabling_u2 = (state_changed == USB3_LPM_U2 &&
4254                         hub_encoded_timeout != USB3_LPM_DISABLED);
4255
4256         /* If U1 was already enabled and we're not disabling it,
4257          * or we're going to enable U1, account for the U1 max exit latency.
4258          */
4259         if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4260                         enabling_u1)
4261                 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4262         if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4263                         enabling_u2)
4264                 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4265
4266         if (u1_mel_us > u2_mel_us)
4267                 mel_us = u1_mel_us;
4268         else
4269                 mel_us = u2_mel_us;
4270         /* xHCI host controller max exit latency field is only 16 bits wide. */
4271         if (mel_us > MAX_EXIT) {
4272                 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4273                                 "is too big.\n", mel_us);
4274                 return -E2BIG;
4275         }
4276         return mel_us;
4277 }
4278
4279 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4280 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4281                         struct usb_device *udev, enum usb3_link_state state)
4282 {
4283         struct xhci_hcd *xhci;
4284         u16 hub_encoded_timeout;
4285         int mel;
4286         int ret;
4287
4288         xhci = hcd_to_xhci(hcd);
4289         /* The LPM timeout values are pretty host-controller specific, so don't
4290          * enable hub-initiated timeouts unless the vendor has provided
4291          * information about their timeout algorithm.
4292          */
4293         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4294                         !xhci->devs[udev->slot_id])
4295                 return USB3_LPM_DISABLED;
4296
4297         hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4298         mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4299         if (mel < 0) {
4300                 /* Max Exit Latency is too big, disable LPM. */
4301                 hub_encoded_timeout = USB3_LPM_DISABLED;
4302                 mel = 0;
4303         }
4304
4305         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4306         if (ret)
4307                 return ret;
4308         return hub_encoded_timeout;
4309 }
4310
4311 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4312                         struct usb_device *udev, enum usb3_link_state state)
4313 {
4314         struct xhci_hcd *xhci;
4315         u16 mel;
4316         int ret;
4317
4318         xhci = hcd_to_xhci(hcd);
4319         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4320                         !xhci->devs[udev->slot_id])
4321                 return 0;
4322
4323         mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4324         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4325         if (ret)
4326                 return ret;
4327         return 0;
4328 }
4329 #else /* CONFIG_PM */
4330
4331 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4332                         struct usb_device *udev, enum usb3_link_state state)
4333 {
4334         return USB3_LPM_DISABLED;
4335 }
4336
4337 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4338                         struct usb_device *udev, enum usb3_link_state state)
4339 {
4340         return 0;
4341 }
4342 #endif  /* CONFIG_PM */
4343
4344 /*-------------------------------------------------------------------------*/
4345
4346 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4347  * internal data structures for the device.
4348  */
4349 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4350                         struct usb_tt *tt, gfp_t mem_flags)
4351 {
4352         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4353         struct xhci_virt_device *vdev;
4354         struct xhci_command *config_cmd;
4355         struct xhci_input_control_ctx *ctrl_ctx;
4356         struct xhci_slot_ctx *slot_ctx;
4357         unsigned long flags;
4358         unsigned think_time;
4359         int ret;
4360
4361         /* Ignore root hubs */
4362         if (!hdev->parent)
4363                 return 0;
4364
4365         vdev = xhci->devs[hdev->slot_id];
4366         if (!vdev) {
4367                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4368                 return -EINVAL;
4369         }
4370         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4371         if (!config_cmd) {
4372                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4373                 return -ENOMEM;
4374         }
4375
4376         spin_lock_irqsave(&xhci->lock, flags);
4377         if (hdev->speed == USB_SPEED_HIGH &&
4378                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4379                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4380                 xhci_free_command(xhci, config_cmd);
4381                 spin_unlock_irqrestore(&xhci->lock, flags);
4382                 return -ENOMEM;
4383         }
4384
4385         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4386         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4387         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4388         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4389         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4390         if (tt->multi)
4391                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4392         if (xhci->hci_version > 0x95) {
4393                 xhci_dbg(xhci, "xHCI version %x needs hub "
4394                                 "TT think time and number of ports\n",
4395                                 (unsigned int) xhci->hci_version);
4396                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4397                 /* Set TT think time - convert from ns to FS bit times.
4398                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
4399                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
4400                  *
4401                  * xHCI 1.0: this field shall be 0 if the device is not a
4402                  * High-spped hub.
4403                  */
4404                 think_time = tt->think_time;
4405                 if (think_time != 0)
4406                         think_time = (think_time / 666) - 1;
4407                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4408                         slot_ctx->tt_info |=
4409                                 cpu_to_le32(TT_THINK_TIME(think_time));
4410         } else {
4411                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4412                                 "TT think time or number of ports\n",
4413                                 (unsigned int) xhci->hci_version);
4414         }
4415         slot_ctx->dev_state = 0;
4416         spin_unlock_irqrestore(&xhci->lock, flags);
4417
4418         xhci_dbg(xhci, "Set up %s for hub device.\n",
4419                         (xhci->hci_version > 0x95) ?
4420                         "configure endpoint" : "evaluate context");
4421         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4422         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4423
4424         /* Issue and wait for the configure endpoint or
4425          * evaluate context command.
4426          */
4427         if (xhci->hci_version > 0x95)
4428                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4429                                 false, false);
4430         else
4431                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4432                                 true, false);
4433
4434         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4435         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4436
4437         xhci_free_command(xhci, config_cmd);
4438         return ret;
4439 }
4440
4441 int xhci_get_frame(struct usb_hcd *hcd)
4442 {
4443         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4444         /* EHCI mods by the periodic size.  Why? */
4445         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4446 }
4447
4448 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4449 {
4450         struct xhci_hcd         *xhci;
4451         struct device           *dev = hcd->self.controller;
4452         int                     retval;
4453         u32                     temp;
4454
4455         /* Accept arbitrarily long scatter-gather lists */
4456         hcd->self.sg_tablesize = ~0;
4457         /* XHCI controllers don't stop the ep queue on short packets :| */
4458         hcd->self.no_stop_on_short = 1;
4459
4460         if (usb_hcd_is_primary_hcd(hcd)) {
4461                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4462                 if (!xhci)
4463                         return -ENOMEM;
4464                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4465                 xhci->main_hcd = hcd;
4466                 /* Mark the first roothub as being USB 2.0.
4467                  * The xHCI driver will register the USB 3.0 roothub.
4468                  */
4469                 hcd->speed = HCD_USB2;
4470                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4471                 /*
4472                  * USB 2.0 roothub under xHCI has an integrated TT,
4473                  * (rate matching hub) as opposed to having an OHCI/UHCI
4474                  * companion controller.
4475                  */
4476                 hcd->has_tt = 1;
4477         } else {
4478                 /* xHCI private pointer was set in xhci_pci_probe for the second
4479                  * registered roothub.
4480                  */
4481                 xhci = hcd_to_xhci(hcd);
4482                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4483                 if (HCC_64BIT_ADDR(temp)) {
4484                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4485                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4486                 } else {
4487                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4488                 }
4489                 return 0;
4490         }
4491
4492         xhci->cap_regs = hcd->regs;
4493         xhci->op_regs = hcd->regs +
4494                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4495         xhci->run_regs = hcd->regs +
4496                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4497         /* Cache read-only capability registers */
4498         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4499         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4500         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4501         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4502         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4503         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4504         xhci_print_registers(xhci);
4505
4506         get_quirks(dev, xhci);
4507
4508         /* Make sure the HC is halted. */
4509         retval = xhci_halt(xhci);
4510         if (retval)
4511                 goto error;
4512
4513         xhci_dbg(xhci, "Resetting HCD\n");
4514         /* Reset the internal HC memory state and registers. */
4515         retval = xhci_reset(xhci);
4516         if (retval)
4517                 goto error;
4518         xhci_dbg(xhci, "Reset complete\n");
4519
4520         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4521         if (HCC_64BIT_ADDR(temp)) {
4522                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4523                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4524         } else {
4525                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4526         }
4527
4528         xhci_dbg(xhci, "Calling HCD init\n");
4529         /* Initialize HCD and host controller data structures. */
4530         retval = xhci_init(hcd);
4531         if (retval)
4532                 goto error;
4533         xhci_dbg(xhci, "Called HCD init\n");
4534         return 0;
4535 error:
4536         kfree(xhci);
4537         return retval;
4538 }
4539
4540 MODULE_DESCRIPTION(DRIVER_DESC);
4541 MODULE_AUTHOR(DRIVER_AUTHOR);
4542 MODULE_LICENSE("GPL");
4543
4544 static int __init xhci_hcd_init(void)
4545 {
4546         int retval;
4547
4548         retval = xhci_register_pci();
4549         if (retval < 0) {
4550                 printk(KERN_DEBUG "Problem registering PCI driver.");
4551                 return retval;
4552         }
4553         retval = xhci_register_plat();
4554         if (retval < 0) {
4555                 printk(KERN_DEBUG "Problem registering platform driver.");
4556                 goto unreg_pci;
4557         }
4558         /*
4559          * Check the compiler generated sizes of structures that must be laid
4560          * out in specific ways for hardware access.
4561          */
4562         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4563         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4564         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4565         /* xhci_device_control has eight fields, and also
4566          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4567          */
4568         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4569         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4570         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4571         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4572         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4573         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4574         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4575         return 0;
4576 unreg_pci:
4577         xhci_unregister_pci();
4578         return retval;
4579 }
4580 module_init(xhci_hcd_init);
4581
4582 static void __exit xhci_hcd_cleanup(void)
4583 {
4584         xhci_unregister_pci();
4585         xhci_unregister_plat();
4586 }
4587 module_exit(xhci_hcd_cleanup);