2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
48 #include <linux/debugfs.h>
50 #include "musb_core.h"
52 static const struct of_device_id musb_dsps_of_match[];
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 { return __raw_readb(addr + offset); }
61 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
62 { return __raw_readl(addr + offset); }
64 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
65 { __raw_writeb(data, addr + offset); }
67 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
68 { __raw_writel(data, addr + offset); }
71 * DSPS musb wrapper register offset.
72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
75 struct dsps_musb_wrapper {
90 /* bit positions for control */
93 /* bit positions for interrupt */
99 unsigned txep_shift:5;
103 unsigned rxep_shift:5;
107 /* bit positions for phy_utmi */
108 unsigned otg_disable:5;
110 /* bit positions for mode */
112 unsigned iddig_mux:5;
113 /* miscellaneous stuff */
118 * register shadow for suspend
120 struct dsps_context {
131 * DSPS glue structure.
135 struct platform_device *musb; /* child musb pdev */
136 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
137 struct timer_list timer; /* otg_workaround timer */
138 unsigned long last_timer; /* last timer data for each instance */
140 struct dsps_context context;
141 struct debugfs_regset32 regset;
142 struct dentry *dbgfs_root;
145 static const struct debugfs_reg32 dsps_musb_regs[] = {
146 { "revision", 0x00 },
150 { "intr0_stat", 0x30 },
151 { "intr1_stat", 0x34 },
152 { "intr0_set", 0x38 },
153 { "intr1_set", 0x3c },
157 { "srpfixtime", 0xd4 },
159 { "phy_utmi", 0xe0 },
163 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
165 struct device *dev = musb->controller;
166 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
169 timeout = jiffies + msecs_to_jiffies(3);
171 /* Never idle if active, or when VBUS timeout is not set as host */
172 if (musb->is_active || (musb->a_wait_bcon == 0 &&
173 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
174 dev_dbg(musb->controller, "%s active, deleting timer\n",
175 usb_otg_state_string(musb->xceiv->state));
176 del_timer(&glue->timer);
177 glue->last_timer = jiffies;
180 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
183 if (!musb->g.dev.driver)
186 if (time_after(glue->last_timer, timeout) &&
187 timer_pending(&glue->timer)) {
188 dev_dbg(musb->controller,
189 "Longer idle timer already pending, ignoring...\n");
192 glue->last_timer = timeout;
194 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
195 usb_otg_state_string(musb->xceiv->state),
196 jiffies_to_msecs(timeout - jiffies));
197 mod_timer(&glue->timer, timeout);
201 * dsps_musb_enable - enable interrupts
203 static void dsps_musb_enable(struct musb *musb)
205 struct device *dev = musb->controller;
206 struct platform_device *pdev = to_platform_device(dev->parent);
207 struct dsps_glue *glue = platform_get_drvdata(pdev);
208 const struct dsps_musb_wrapper *wrp = glue->wrp;
209 void __iomem *reg_base = musb->ctrl_base;
210 u32 epmask, coremask;
212 /* Workaround: setup IRQs through both register sets. */
213 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
214 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
215 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
217 dsps_writel(reg_base, wrp->epintr_set, epmask);
218 dsps_writel(reg_base, wrp->coreintr_set, coremask);
219 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
220 dsps_writel(reg_base, wrp->coreintr_set,
221 (1 << wrp->drvvbus) << wrp->usb_shift);
222 dsps_musb_try_idle(musb, 0);
226 * dsps_musb_disable - disable HDRC and flush interrupts
228 static void dsps_musb_disable(struct musb *musb)
230 struct device *dev = musb->controller;
231 struct platform_device *pdev = to_platform_device(dev->parent);
232 struct dsps_glue *glue = platform_get_drvdata(pdev);
233 const struct dsps_musb_wrapper *wrp = glue->wrp;
234 void __iomem *reg_base = musb->ctrl_base;
236 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
237 dsps_writel(reg_base, wrp->epintr_clear,
238 wrp->txep_bitmap | wrp->rxep_bitmap);
239 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
242 static void otg_timer(unsigned long _musb)
244 struct musb *musb = (void *)_musb;
245 void __iomem *mregs = musb->mregs;
246 struct device *dev = musb->controller;
247 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
248 const struct dsps_musb_wrapper *wrp = glue->wrp;
251 int skip_session = 0;
254 * We poll because DSPS IP's won't expose several OTG-critical
255 * status change events (from the transceiver) otherwise.
257 devctl = dsps_readb(mregs, MUSB_DEVCTL);
258 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
259 usb_otg_state_string(musb->xceiv->state));
261 spin_lock_irqsave(&musb->lock, flags);
262 switch (musb->xceiv->state) {
263 case OTG_STATE_A_WAIT_BCON:
264 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
268 case OTG_STATE_A_IDLE:
269 case OTG_STATE_B_IDLE:
270 if (devctl & MUSB_DEVCTL_BDEVICE) {
271 musb->xceiv->state = OTG_STATE_B_IDLE;
274 musb->xceiv->state = OTG_STATE_A_IDLE;
277 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
278 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
279 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
281 case OTG_STATE_A_WAIT_VFALL:
282 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
283 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
284 MUSB_INTR_VBUSERROR << wrp->usb_shift);
289 spin_unlock_irqrestore(&musb->lock, flags);
292 static irqreturn_t dsps_interrupt(int irq, void *hci)
294 struct musb *musb = hci;
295 void __iomem *reg_base = musb->ctrl_base;
296 struct device *dev = musb->controller;
297 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
298 const struct dsps_musb_wrapper *wrp = glue->wrp;
300 irqreturn_t ret = IRQ_NONE;
303 spin_lock_irqsave(&musb->lock, flags);
305 /* Get endpoint interrupts */
306 epintr = dsps_readl(reg_base, wrp->epintr_status);
307 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
308 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
311 dsps_writel(reg_base, wrp->epintr_status, epintr);
313 /* Get usb core interrupts */
314 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
315 if (!usbintr && !epintr)
318 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
320 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
322 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
325 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
326 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
327 * switch appropriately between halves of the OTG state machine.
328 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
329 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
330 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
332 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
333 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
336 * When a babble condition occurs, the musb controller removes
337 * the session and is no longer in host mode. Hence, all
338 * devices connected to its root hub get disconnected.
340 * Hand this error down to the musb core isr, so it can
343 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
344 musb->int_tx = musb->int_rx = 0;
347 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
348 int drvvbus = dsps_readl(reg_base, wrp->status);
349 void __iomem *mregs = musb->mregs;
350 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
353 err = musb->int_usb & MUSB_INTR_VBUSERROR;
356 * The Mentor core doesn't debounce VBUS as needed
357 * to cope with device connect current spikes. This
358 * means it's not uncommon for bus-powered devices
359 * to get VBUS errors during enumeration.
361 * This is a workaround, but newer RTL from Mentor
362 * seems to allow a better one: "re"-starting sessions
363 * without waiting for VBUS to stop registering in
366 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
367 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
368 mod_timer(&glue->timer,
369 jiffies + wrp->poll_seconds * HZ);
370 WARNING("VBUS error workaround (delay coming)\n");
371 } else if (drvvbus) {
373 musb->xceiv->otg->default_a = 1;
374 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
375 del_timer(&glue->timer);
379 musb->xceiv->otg->default_a = 0;
380 musb->xceiv->state = OTG_STATE_B_IDLE;
383 /* NOTE: this must complete power-on within 100 ms. */
384 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
385 drvvbus ? "on" : "off",
386 usb_otg_state_string(musb->xceiv->state),
392 if (musb->int_tx || musb->int_rx || musb->int_usb)
393 ret |= musb_interrupt(musb);
395 /* Poll for ID change in OTG port mode */
396 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
397 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
398 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
400 spin_unlock_irqrestore(&musb->lock, flags);
405 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
411 sprintf(buf, "%s.dsps", dev_name(musb->controller));
412 root = debugfs_create_dir(buf, NULL);
415 glue->dbgfs_root = root;
417 glue->regset.regs = dsps_musb_regs;
418 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
419 glue->regset.base = musb->ctrl_base;
421 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
423 debugfs_remove_recursive(root);
429 static int dsps_musb_init(struct musb *musb)
431 struct device *dev = musb->controller;
432 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
433 struct platform_device *parent = to_platform_device(dev->parent);
434 const struct dsps_musb_wrapper *wrp = glue->wrp;
435 void __iomem *reg_base;
440 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
444 reg_base = devm_ioremap_resource(dev, r);
445 if (IS_ERR(reg_base))
446 return PTR_ERR(reg_base);
447 musb->ctrl_base = reg_base;
449 /* NOP driver needs change if supporting dual instance */
450 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
451 if (IS_ERR(musb->xceiv))
452 return PTR_ERR(musb->xceiv);
454 /* Returns zero if e.g. not clocked */
455 rev = dsps_readl(reg_base, wrp->revision);
459 usb_phy_init(musb->xceiv);
460 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
463 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
465 musb->isr = dsps_interrupt;
467 /* reset the otgdisable bit, needed for host mode to work */
468 val = dsps_readl(reg_base, wrp->phy_utmi);
469 val &= ~(1 << wrp->otg_disable);
470 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
472 ret = dsps_musb_dbg_init(musb, glue);
479 static int dsps_musb_exit(struct musb *musb)
481 struct device *dev = musb->controller;
482 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
484 del_timer_sync(&glue->timer);
485 usb_phy_shutdown(musb->xceiv);
486 debugfs_remove_recursive(glue->dbgfs_root);
491 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
493 struct device *dev = musb->controller;
494 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
495 const struct dsps_musb_wrapper *wrp = glue->wrp;
496 void __iomem *ctrl_base = musb->ctrl_base;
499 reg = dsps_readl(ctrl_base, wrp->mode);
503 reg &= ~(1 << wrp->iddig);
506 * if we're setting mode to host-only or device-only, we're
507 * going to ignore whatever the PHY sends us and just force
508 * ID pin status by SW
510 reg |= (1 << wrp->iddig_mux);
512 dsps_writel(ctrl_base, wrp->mode, reg);
513 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
515 case MUSB_PERIPHERAL:
516 reg |= (1 << wrp->iddig);
519 * if we're setting mode to host-only or device-only, we're
520 * going to ignore whatever the PHY sends us and just force
521 * ID pin status by SW
523 reg |= (1 << wrp->iddig_mux);
525 dsps_writel(ctrl_base, wrp->mode, reg);
528 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
531 dev_err(glue->dev, "unsupported mode %d\n", mode);
538 static void dsps_musb_reset(struct musb *musb)
540 struct device *dev = musb->controller;
541 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
542 const struct dsps_musb_wrapper *wrp = glue->wrp;
544 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
548 static struct musb_platform_ops dsps_ops = {
549 .init = dsps_musb_init,
550 .exit = dsps_musb_exit,
552 .enable = dsps_musb_enable,
553 .disable = dsps_musb_disable,
555 .try_idle = dsps_musb_try_idle,
556 .set_mode = dsps_musb_set_mode,
557 .reset = dsps_musb_reset,
560 static u64 musb_dmamask = DMA_BIT_MASK(32);
562 static int get_int_prop(struct device_node *dn, const char *s)
567 ret = of_property_read_u32(dn, s, &val);
573 static int get_musb_port_mode(struct device *dev)
575 enum usb_dr_mode mode;
577 mode = of_usb_get_dr_mode(dev->of_node);
579 case USB_DR_MODE_HOST:
580 return MUSB_PORT_MODE_HOST;
582 case USB_DR_MODE_PERIPHERAL:
583 return MUSB_PORT_MODE_GADGET;
585 case USB_DR_MODE_UNKNOWN:
586 case USB_DR_MODE_OTG:
588 return MUSB_PORT_MODE_DUAL_ROLE;
592 static int dsps_create_musb_pdev(struct dsps_glue *glue,
593 struct platform_device *parent)
595 struct musb_hdrc_platform_data pdata;
596 struct resource resources[2];
597 struct resource *res;
598 struct device *dev = &parent->dev;
599 struct musb_hdrc_config *config;
600 struct platform_device *musb;
601 struct device_node *dn = parent->dev.of_node;
604 memset(resources, 0, sizeof(resources));
605 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
607 dev_err(dev, "failed to get memory.\n");
612 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
614 dev_err(dev, "failed to get irq.\n");
619 /* allocate the child platform device */
620 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
622 dev_err(dev, "failed to allocate musb device\n");
626 musb->dev.parent = dev;
627 musb->dev.dma_mask = &musb_dmamask;
628 musb->dev.coherent_dma_mask = musb_dmamask;
629 musb->dev.of_node = of_node_get(dn);
633 ret = platform_device_add_resources(musb, resources,
634 ARRAY_SIZE(resources));
636 dev_err(dev, "failed to add resources\n");
640 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
642 dev_err(dev, "failed to allocate musb hdrc config\n");
646 pdata.config = config;
647 pdata.platform_ops = &dsps_ops;
649 config->num_eps = get_int_prop(dn, "mentor,num-eps");
650 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
651 config->host_port_deassert_reset_at_resume = 1;
652 pdata.mode = get_musb_port_mode(dev);
653 /* DT keeps this entry in mA, musb expects it as per USB spec */
654 pdata.power = get_int_prop(dn, "mentor,power") / 2;
655 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
657 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
659 dev_err(dev, "failed to add platform_data\n");
663 ret = platform_device_add(musb);
665 dev_err(dev, "failed to register musb device\n");
671 platform_device_put(musb);
675 static int dsps_probe(struct platform_device *pdev)
677 const struct of_device_id *match;
678 const struct dsps_musb_wrapper *wrp;
679 struct dsps_glue *glue;
682 if (!strcmp(pdev->name, "musb-hdrc"))
685 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
687 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
693 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
695 dev_err(&pdev->dev, "unable to allocate glue memory\n");
699 glue->dev = &pdev->dev;
702 platform_set_drvdata(pdev, glue);
703 pm_runtime_enable(&pdev->dev);
705 ret = pm_runtime_get_sync(&pdev->dev);
707 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
711 ret = dsps_create_musb_pdev(glue, pdev);
718 pm_runtime_put(&pdev->dev);
720 pm_runtime_disable(&pdev->dev);
724 static int dsps_remove(struct platform_device *pdev)
726 struct dsps_glue *glue = platform_get_drvdata(pdev);
728 platform_device_unregister(glue->musb);
730 /* disable usbss clocks */
731 pm_runtime_put(&pdev->dev);
732 pm_runtime_disable(&pdev->dev);
737 static const struct dsps_musb_wrapper am33xx_driver_data = {
742 .epintr_clear = 0x40,
743 .epintr_status = 0x30,
744 .coreintr_set = 0x3c,
745 .coreintr_clear = 0x44,
746 .coreintr_status = 0x34,
757 .usb_bitmap = (0x1ff << 0),
761 .txep_bitmap = (0xffff << 0),
764 .rxep_bitmap = (0xfffe << 16),
768 static const struct of_device_id musb_dsps_of_match[] = {
769 { .compatible = "ti,musb-am33xx",
770 .data = (void *) &am33xx_driver_data, },
773 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
775 #ifdef CONFIG_PM_SLEEP
776 static int dsps_suspend(struct device *dev)
778 struct dsps_glue *glue = dev_get_drvdata(dev);
779 const struct dsps_musb_wrapper *wrp = glue->wrp;
780 struct musb *musb = platform_get_drvdata(glue->musb);
781 void __iomem *mbase = musb->ctrl_base;
783 glue->context.control = dsps_readl(mbase, wrp->control);
784 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
785 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
786 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
787 glue->context.mode = dsps_readl(mbase, wrp->mode);
788 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
789 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
794 static int dsps_resume(struct device *dev)
796 struct dsps_glue *glue = dev_get_drvdata(dev);
797 const struct dsps_musb_wrapper *wrp = glue->wrp;
798 struct musb *musb = platform_get_drvdata(glue->musb);
799 void __iomem *mbase = musb->ctrl_base;
801 dsps_writel(mbase, wrp->control, glue->context.control);
802 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
803 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
804 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
805 dsps_writel(mbase, wrp->mode, glue->context.mode);
806 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
807 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
813 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
815 static struct platform_driver dsps_usbss_driver = {
817 .remove = dsps_remove,
821 .of_match_table = musb_dsps_of_match,
825 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
826 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
827 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
828 MODULE_LICENSE("GPL v2");
830 module_platform_driver(dsps_usbss_driver);