2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
48 #include <linux/debugfs.h>
50 #include "musb_core.h"
52 static const struct of_device_id musb_dsps_of_match[];
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
60 return __raw_readb(addr + offset);
63 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
65 return __raw_readl(addr + offset);
68 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
70 __raw_writeb(data, addr + offset);
73 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
75 __raw_writel(data, addr + offset);
79 * DSPS musb wrapper register offset.
80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
83 struct dsps_musb_wrapper {
98 /* bit positions for control */
101 /* bit positions for interrupt */
102 unsigned usb_shift:5;
107 unsigned txep_shift:5;
111 unsigned rxep_shift:5;
115 /* bit positions for phy_utmi */
116 unsigned otg_disable:5;
118 /* bit positions for mode */
120 unsigned iddig_mux:5;
121 /* miscellaneous stuff */
126 * register shadow for suspend
128 struct dsps_context {
139 * DSPS glue structure.
143 struct platform_device *musb; /* child musb pdev */
144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
145 struct timer_list timer; /* otg_workaround timer */
146 unsigned long last_timer; /* last timer data for each instance */
147 bool sw_babble_enabled;
149 struct dsps_context context;
150 struct debugfs_regset32 regset;
151 struct dentry *dbgfs_root;
154 static const struct debugfs_reg32 dsps_musb_regs[] = {
155 { "revision", 0x00 },
159 { "intr0_stat", 0x30 },
160 { "intr1_stat", 0x34 },
161 { "intr0_set", 0x38 },
162 { "intr1_set", 0x3c },
166 { "srpfixtime", 0xd4 },
168 { "phy_utmi", 0xe0 },
172 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
174 struct device *dev = musb->controller;
175 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
178 timeout = jiffies + msecs_to_jiffies(3);
180 /* Never idle if active, or when VBUS timeout is not set as host */
181 if (musb->is_active || (musb->a_wait_bcon == 0 &&
182 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
183 dev_dbg(musb->controller, "%s active, deleting timer\n",
184 usb_otg_state_string(musb->xceiv->state));
185 del_timer(&glue->timer);
186 glue->last_timer = jiffies;
189 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
192 if (!musb->g.dev.driver)
195 if (time_after(glue->last_timer, timeout) &&
196 timer_pending(&glue->timer)) {
197 dev_dbg(musb->controller,
198 "Longer idle timer already pending, ignoring...\n");
201 glue->last_timer = timeout;
203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
204 usb_otg_state_string(musb->xceiv->state),
205 jiffies_to_msecs(timeout - jiffies));
206 mod_timer(&glue->timer, timeout);
210 * dsps_musb_enable - enable interrupts
212 static void dsps_musb_enable(struct musb *musb)
214 struct device *dev = musb->controller;
215 struct platform_device *pdev = to_platform_device(dev->parent);
216 struct dsps_glue *glue = platform_get_drvdata(pdev);
217 const struct dsps_musb_wrapper *wrp = glue->wrp;
218 void __iomem *reg_base = musb->ctrl_base;
219 u32 epmask, coremask;
221 /* Workaround: setup IRQs through both register sets. */
222 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
223 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
224 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
226 dsps_writel(reg_base, wrp->epintr_set, epmask);
227 dsps_writel(reg_base, wrp->coreintr_set, coremask);
228 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
229 dsps_writel(reg_base, wrp->coreintr_set,
230 (1 << wrp->drvvbus) << wrp->usb_shift);
231 dsps_musb_try_idle(musb, 0);
235 * dsps_musb_disable - disable HDRC and flush interrupts
237 static void dsps_musb_disable(struct musb *musb)
239 struct device *dev = musb->controller;
240 struct platform_device *pdev = to_platform_device(dev->parent);
241 struct dsps_glue *glue = platform_get_drvdata(pdev);
242 const struct dsps_musb_wrapper *wrp = glue->wrp;
243 void __iomem *reg_base = musb->ctrl_base;
245 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
246 dsps_writel(reg_base, wrp->epintr_clear,
247 wrp->txep_bitmap | wrp->rxep_bitmap);
248 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
251 static void otg_timer(unsigned long _musb)
253 struct musb *musb = (void *)_musb;
254 void __iomem *mregs = musb->mregs;
255 struct device *dev = musb->controller;
256 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
257 const struct dsps_musb_wrapper *wrp = glue->wrp;
260 int skip_session = 0;
263 * We poll because DSPS IP's won't expose several OTG-critical
264 * status change events (from the transceiver) otherwise.
266 devctl = dsps_readb(mregs, MUSB_DEVCTL);
267 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
268 usb_otg_state_string(musb->xceiv->state));
270 spin_lock_irqsave(&musb->lock, flags);
271 switch (musb->xceiv->state) {
272 case OTG_STATE_A_WAIT_BCON:
273 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
277 case OTG_STATE_A_IDLE:
278 case OTG_STATE_B_IDLE:
279 if (devctl & MUSB_DEVCTL_BDEVICE) {
280 musb->xceiv->state = OTG_STATE_B_IDLE;
283 musb->xceiv->state = OTG_STATE_A_IDLE;
286 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
287 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
288 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
290 case OTG_STATE_A_WAIT_VFALL:
291 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
292 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
293 MUSB_INTR_VBUSERROR << wrp->usb_shift);
298 spin_unlock_irqrestore(&musb->lock, flags);
301 static irqreturn_t dsps_interrupt(int irq, void *hci)
303 struct musb *musb = hci;
304 void __iomem *reg_base = musb->ctrl_base;
305 struct device *dev = musb->controller;
306 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
307 const struct dsps_musb_wrapper *wrp = glue->wrp;
309 irqreturn_t ret = IRQ_NONE;
312 spin_lock_irqsave(&musb->lock, flags);
314 /* Get endpoint interrupts */
315 epintr = dsps_readl(reg_base, wrp->epintr_status);
316 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
317 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
320 dsps_writel(reg_base, wrp->epintr_status, epintr);
322 /* Get usb core interrupts */
323 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
324 if (!usbintr && !epintr)
327 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
329 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
331 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
334 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
335 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
336 * switch appropriately between halves of the OTG state machine.
337 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
338 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
339 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
341 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
342 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
345 * When a babble condition occurs, the musb controller removes
346 * the session and is no longer in host mode. Hence, all
347 * devices connected to its root hub get disconnected.
349 * Hand this error down to the musb core isr, so it can
352 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
353 musb->int_tx = musb->int_rx = 0;
356 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
357 int drvvbus = dsps_readl(reg_base, wrp->status);
358 void __iomem *mregs = musb->mregs;
359 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
362 err = musb->int_usb & MUSB_INTR_VBUSERROR;
365 * The Mentor core doesn't debounce VBUS as needed
366 * to cope with device connect current spikes. This
367 * means it's not uncommon for bus-powered devices
368 * to get VBUS errors during enumeration.
370 * This is a workaround, but newer RTL from Mentor
371 * seems to allow a better one: "re"-starting sessions
372 * without waiting for VBUS to stop registering in
375 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
376 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
377 mod_timer(&glue->timer,
378 jiffies + wrp->poll_seconds * HZ);
379 WARNING("VBUS error workaround (delay coming)\n");
380 } else if (drvvbus) {
382 musb->xceiv->otg->default_a = 1;
383 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
384 del_timer(&glue->timer);
388 musb->xceiv->otg->default_a = 0;
389 musb->xceiv->state = OTG_STATE_B_IDLE;
392 /* NOTE: this must complete power-on within 100 ms. */
393 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
394 drvvbus ? "on" : "off",
395 usb_otg_state_string(musb->xceiv->state),
401 if (musb->int_tx || musb->int_rx || musb->int_usb)
402 ret |= musb_interrupt(musb);
404 /* Poll for ID change in OTG port mode */
405 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
406 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
407 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
409 spin_unlock_irqrestore(&musb->lock, flags);
414 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
420 sprintf(buf, "%s.dsps", dev_name(musb->controller));
421 root = debugfs_create_dir(buf, NULL);
424 glue->dbgfs_root = root;
426 glue->regset.regs = dsps_musb_regs;
427 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
428 glue->regset.base = musb->ctrl_base;
430 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
432 debugfs_remove_recursive(root);
438 static int dsps_musb_init(struct musb *musb)
440 struct device *dev = musb->controller;
441 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
442 struct platform_device *parent = to_platform_device(dev->parent);
443 const struct dsps_musb_wrapper *wrp = glue->wrp;
444 void __iomem *reg_base;
449 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
453 reg_base = devm_ioremap_resource(dev, r);
454 if (IS_ERR(reg_base))
455 return PTR_ERR(reg_base);
456 musb->ctrl_base = reg_base;
458 /* NOP driver needs change if supporting dual instance */
459 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
460 if (IS_ERR(musb->xceiv))
461 return PTR_ERR(musb->xceiv);
463 /* Returns zero if e.g. not clocked */
464 rev = dsps_readl(reg_base, wrp->revision);
468 usb_phy_init(musb->xceiv);
469 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
472 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
474 musb->isr = dsps_interrupt;
476 /* reset the otgdisable bit, needed for host mode to work */
477 val = dsps_readl(reg_base, wrp->phy_utmi);
478 val &= ~(1 << wrp->otg_disable);
479 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
482 * Check whether the dsps version has babble control enabled.
483 * In latest silicon revision the babble control logic is enabled.
484 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
487 val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
488 if (val == MUSB_BABBLE_RCV_DISABLE) {
489 glue->sw_babble_enabled = true;
490 val |= MUSB_BABBLE_SW_SESSION_CTRL;
491 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
494 ret = dsps_musb_dbg_init(musb, glue);
501 static int dsps_musb_exit(struct musb *musb)
503 struct device *dev = musb->controller;
504 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
506 del_timer_sync(&glue->timer);
507 usb_phy_shutdown(musb->xceiv);
508 debugfs_remove_recursive(glue->dbgfs_root);
513 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
515 struct device *dev = musb->controller;
516 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
517 const struct dsps_musb_wrapper *wrp = glue->wrp;
518 void __iomem *ctrl_base = musb->ctrl_base;
521 reg = dsps_readl(ctrl_base, wrp->mode);
525 reg &= ~(1 << wrp->iddig);
528 * if we're setting mode to host-only or device-only, we're
529 * going to ignore whatever the PHY sends us and just force
530 * ID pin status by SW
532 reg |= (1 << wrp->iddig_mux);
534 dsps_writel(ctrl_base, wrp->mode, reg);
535 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
537 case MUSB_PERIPHERAL:
538 reg |= (1 << wrp->iddig);
541 * if we're setting mode to host-only or device-only, we're
542 * going to ignore whatever the PHY sends us and just force
543 * ID pin status by SW
545 reg |= (1 << wrp->iddig_mux);
547 dsps_writel(ctrl_base, wrp->mode, reg);
550 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
553 dev_err(glue->dev, "unsupported mode %d\n", mode);
560 static bool sw_babble_control(struct musb *musb)
563 bool session_restart = false;
565 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
566 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
569 * check line monitor flag to check whether babble is
572 dev_dbg(musb->controller, "STUCK_J is %s\n",
573 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
575 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
579 * babble is due to noise, then set transmit idle (d7 bit)
580 * to resume normal operation
582 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
583 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
584 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
586 /* wait till line monitor flag cleared */
587 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
589 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
591 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
593 /* check whether stuck_at_j bit cleared */
594 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
596 * real babble condition has occurred
597 * restart the controller to start the
600 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
602 session_restart = true;
605 session_restart = true;
608 return session_restart;
611 static int dsps_musb_reset(struct musb *musb)
613 struct device *dev = musb->controller;
614 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
615 const struct dsps_musb_wrapper *wrp = glue->wrp;
616 int session_restart = 0;
618 if (glue->sw_babble_enabled)
619 session_restart = sw_babble_control(musb);
621 * In case of new silicon version babble condition can be recovered
622 * without resetting the MUSB. But for older silicon versions, MUSB
625 if (session_restart || !glue->sw_babble_enabled) {
626 dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
627 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
628 usleep_range(100, 200);
629 usb_phy_shutdown(musb->xceiv);
630 usleep_range(100, 200);
631 usb_phy_init(musb->xceiv);
635 return !session_restart;
638 static struct musb_platform_ops dsps_ops = {
639 .init = dsps_musb_init,
640 .exit = dsps_musb_exit,
642 .enable = dsps_musb_enable,
643 .disable = dsps_musb_disable,
645 .try_idle = dsps_musb_try_idle,
646 .set_mode = dsps_musb_set_mode,
647 .reset = dsps_musb_reset,
650 static u64 musb_dmamask = DMA_BIT_MASK(32);
652 static int get_int_prop(struct device_node *dn, const char *s)
657 ret = of_property_read_u32(dn, s, &val);
663 static int get_musb_port_mode(struct device *dev)
665 enum usb_dr_mode mode;
667 mode = of_usb_get_dr_mode(dev->of_node);
669 case USB_DR_MODE_HOST:
670 return MUSB_PORT_MODE_HOST;
672 case USB_DR_MODE_PERIPHERAL:
673 return MUSB_PORT_MODE_GADGET;
675 case USB_DR_MODE_UNKNOWN:
676 case USB_DR_MODE_OTG:
678 return MUSB_PORT_MODE_DUAL_ROLE;
682 static int dsps_create_musb_pdev(struct dsps_glue *glue,
683 struct platform_device *parent)
685 struct musb_hdrc_platform_data pdata;
686 struct resource resources[2];
687 struct resource *res;
688 struct device *dev = &parent->dev;
689 struct musb_hdrc_config *config;
690 struct platform_device *musb;
691 struct device_node *dn = parent->dev.of_node;
694 memset(resources, 0, sizeof(resources));
695 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
697 dev_err(dev, "failed to get memory.\n");
702 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
704 dev_err(dev, "failed to get irq.\n");
709 /* allocate the child platform device */
710 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
712 dev_err(dev, "failed to allocate musb device\n");
716 musb->dev.parent = dev;
717 musb->dev.dma_mask = &musb_dmamask;
718 musb->dev.coherent_dma_mask = musb_dmamask;
719 musb->dev.of_node = of_node_get(dn);
723 ret = platform_device_add_resources(musb, resources,
724 ARRAY_SIZE(resources));
726 dev_err(dev, "failed to add resources\n");
730 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
732 dev_err(dev, "failed to allocate musb hdrc config\n");
736 pdata.config = config;
737 pdata.platform_ops = &dsps_ops;
739 config->num_eps = get_int_prop(dn, "mentor,num-eps");
740 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
741 config->host_port_deassert_reset_at_resume = 1;
742 pdata.mode = get_musb_port_mode(dev);
743 /* DT keeps this entry in mA, musb expects it as per USB spec */
744 pdata.power = get_int_prop(dn, "mentor,power") / 2;
745 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
747 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
749 dev_err(dev, "failed to add platform_data\n");
753 ret = platform_device_add(musb);
755 dev_err(dev, "failed to register musb device\n");
761 platform_device_put(musb);
765 static int dsps_probe(struct platform_device *pdev)
767 const struct of_device_id *match;
768 const struct dsps_musb_wrapper *wrp;
769 struct dsps_glue *glue;
772 if (!strcmp(pdev->name, "musb-hdrc"))
775 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
777 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
783 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
785 dev_err(&pdev->dev, "unable to allocate glue memory\n");
789 glue->dev = &pdev->dev;
792 platform_set_drvdata(pdev, glue);
793 pm_runtime_enable(&pdev->dev);
795 ret = pm_runtime_get_sync(&pdev->dev);
797 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
801 ret = dsps_create_musb_pdev(glue, pdev);
808 pm_runtime_put(&pdev->dev);
810 pm_runtime_disable(&pdev->dev);
814 static int dsps_remove(struct platform_device *pdev)
816 struct dsps_glue *glue = platform_get_drvdata(pdev);
818 platform_device_unregister(glue->musb);
820 /* disable usbss clocks */
821 pm_runtime_put(&pdev->dev);
822 pm_runtime_disable(&pdev->dev);
827 static const struct dsps_musb_wrapper am33xx_driver_data = {
832 .epintr_clear = 0x40,
833 .epintr_status = 0x30,
834 .coreintr_set = 0x3c,
835 .coreintr_clear = 0x44,
836 .coreintr_status = 0x34,
847 .usb_bitmap = (0x1ff << 0),
851 .txep_bitmap = (0xffff << 0),
854 .rxep_bitmap = (0xfffe << 16),
858 static const struct of_device_id musb_dsps_of_match[] = {
859 { .compatible = "ti,musb-am33xx",
860 .data = (void *) &am33xx_driver_data, },
863 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
865 #ifdef CONFIG_PM_SLEEP
866 static int dsps_suspend(struct device *dev)
868 struct dsps_glue *glue = dev_get_drvdata(dev);
869 const struct dsps_musb_wrapper *wrp = glue->wrp;
870 struct musb *musb = platform_get_drvdata(glue->musb);
871 void __iomem *mbase = musb->ctrl_base;
873 glue->context.control = dsps_readl(mbase, wrp->control);
874 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
875 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
876 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
877 glue->context.mode = dsps_readl(mbase, wrp->mode);
878 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
879 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
884 static int dsps_resume(struct device *dev)
886 struct dsps_glue *glue = dev_get_drvdata(dev);
887 const struct dsps_musb_wrapper *wrp = glue->wrp;
888 struct musb *musb = platform_get_drvdata(glue->musb);
889 void __iomem *mbase = musb->ctrl_base;
891 dsps_writel(mbase, wrp->control, glue->context.control);
892 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
893 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
894 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
895 dsps_writel(mbase, wrp->mode, glue->context.mode);
896 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
897 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
903 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
905 static struct platform_driver dsps_usbss_driver = {
907 .remove = dsps_remove,
911 .of_match_table = musb_dsps_of_match,
915 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
916 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
917 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
918 MODULE_LICENSE("GPL v2");
920 module_platform_driver(dsps_usbss_driver);