3 #include "../screen/screen.h"
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7 /* LVDS ÍⲿÁ¬Ïß½Ó·¨ */
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8 /* LVDS_8BIT_1 LVDS_8BIT_2 LVDS_8BIT_3 LVDS_6BIT
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9 ----------------------------------------------------------------------
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17 ----------------------------------------------------------------------
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25 ----------------------------------------------------------------------
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30 2 TX24 HSYNC HSYNC HSYNC HSYNC
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31 TX25 VSYNC VSYNC VSYNC VSYNC
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32 TX26 ENABLE ENABLE ENABLE ENABLE
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33 ----------------------------------------------------------------------
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37 Y TX11 G7 G1 GND GND
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38 3 TX16 B6 B0 GND GND
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40 TX23 RSVD RSVD RSVD RSVD
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41 ----------------------------------------------------------------------
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43 #define LVDS_8BIT_1 0x00
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44 #define LVDS_8BIT_2 0x01
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45 #define LVDS_8BIT_3 0x10
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46 #define LVDS_6BIT 0x11
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47 //LVDS lane input format
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48 #define DATA_D0_MSB 0
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49 #define DATA_D7_MSB 1
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52 #define FROM_LCD0_OR_SCL 1
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55 #define LCD1_AS_IN 0
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56 #define LCD1_AS_OUT 1
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58 //LCD1 output source
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59 #define LCD1_FROM_LCD0 0
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60 #define LCD1_FROM_SCL 1
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63 #define S_PLL_FROM_DIV 0
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64 #define S_PLL_FROM_CLKIN 1
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65 #define S_PLL_DIV(x) ((x)&0x7)
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66 /*********S_PLL_CON************/
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68 #define S_DIV_N(x) (((x)&0xf)<<4)
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69 #define S_DIV_OD(x) (((x)&3)<<0)
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71 #define S_DIV_M(x) ((x)&0xff)
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73 #define S_PLL_UNLOCK (0<<7) //0:unlock 1:pll_lock
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74 #define S_PLL_LOCK (1<<7) //0:unlock 1:pll_lock
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75 #define S_PLL_PWR(x) (((x)&1)<<2) //0:POWER UP 1:POWER DOWN
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76 #define S_PLL_RESET(x) (((x)&1)<<1) //0:normal 1:reset M/N dividers
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77 #define S_PLL_BYPASS(x) (((x)&1)<<0) //0:normal 1:bypass
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79 #define LVDS_OUT_CLK_PIN(x) (((x)&1)<<7) //clk enable pin, 0: enable
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80 #define LVDS_OUT_CLK_PWR_PIN(x) (((x)&1)<<6) //clk pwr enable pin, 1: enable
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81 #define LVDS_PLL_PWR_PIN(x) (((x)&1)<<5) //pll pwr enable pin, 0:enable
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82 #define LVDS_BIASE_PWR(x) (((x)&1)<<4) //0: power down 1: normal work
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83 #define LVDS_LANE_IN_FORMAT(x) (((x)&1)<<3) //0: msb on D0 1:msb on D7
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84 #define LVDS_INPUT_SOURCE(x) (((x)&1)<<2) //0: from lcd1 1:from lcd0 or scaler
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85 #define LVDS_OUTPUT_FORMAT(x) (((x)&3)<<0) //00:8bit format-1 01:8bit format-2 10:8bit format-3 11:6bit format
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87 #define LVDS_OUT_ENABLE(x) (((x)&0xf)<<4) //0:output enable 1:output disable
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88 #define LVDS_TX_PWR_ENABLE(x) (((x)&0xf)<<0) //0:working mode 1:power down
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90 #define LCD1_OUT_ENABLE(x) (((x)&1)<<1) //0:lcd1 as input 1:lcd1 as output
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91 #define LCD1_OUT_SRC(x) (((x)&1)<<0) //0:from lcd0 1:from scaler
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93 #define SCL_BYPASS(x) (((x)&1)<<4) //0:not bypass 1:bypass
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94 #define SCL_DEN_INV(x) (((x)&1)<<3) //scl_den_inv
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95 #define SCL_H_V_SYNC_INV(x) (((x)&1)<<2) //scl_sync_inv
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96 #define SCL_OUT_CLK_INV(x) (((x)&1)<<1) //scl_dclk_inv
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97 #define SCL_ENABLE(x) (((x)&1)<<0) //scaler enable
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99 #define SCL_H_FACTOR_LSB(x) ((x)&0xff) //scl_h_factor[7:0]
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101 #define SCL_H_FACTOR_MSB(x) (((x)>>8)&0x3f) //scl_h_factor[13:8]
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103 #define SCL_V_FACTOR_LSB(x) ((x)&0xff) //scl_v_factor[7:0]
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105 #define SCL_V_FACTOR_MSB(x) (((x)>>8)&0x3f) //scl_v_factor[13:8]
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107 #define SCL_DSP_HST_LSB(x) ((x)&0xff) //dsp_frame_hst[7:0]
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109 #define SCL_DSP_HST_MSB(x) (((x)>>8)&0xf) //dsp_frame_hst[11:8]
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111 #define SCL_DSP_VST_LSB(x) ((x)&0xff) //dsp_frame_vst[7:0]
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113 #define SCL_DSP_VST_MSB(x) (((x)>>8)&0xf) //dsp_frame_vst[11:8]
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115 #define SCL_DSP_HTOTAL_LSB(x) ((x)&0xff) //dsp_frame_htotal[7:0]
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117 #define SCL_DSP_HTOTAL_MSB(x) (((x)>>8)&0xf) //dsp_frame_htotal[11:8]
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119 #define SCL_DSP_HS_END(x) ((x)&0xff) //dsp_hs_end
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121 #define SCL_DSP_HACT_ST_LSB(x) ((x)&0xff) //dsp_hact_st[7:0]
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123 #define SCL_DSP_HACT_ST_MSB(x) (((x)>>8)&0x3) //dsp_hact_st[9:8]
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125 #define SCL_DSP_HACT_END_LSB(x) ((x)&0xff) //dsp_hact_end[7:0]
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127 #define SCL_DSP_HACT_END_MSB(x) (((x)>>8)&0xf) //dsp_frame_htotal[11:8]
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129 #define SCL_DSP_VTOTAL_LSB(x) ((x)&0xff) //dsp_frame_vtotal[7:0]
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131 #define SCL_DSP_VTOTAL_MSB(x) (((x)>>8)&0xf) //dsp_frame_vtotal[11:8]
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133 #define SCL_DSP_VS_END(x) ((x)&0xff) //dsp_vs_end
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135 #define SCL_DSP_VACT_ST(x) ((x)&0xff) //dsp_vact_st[7:0]
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137 #define SCL_DSP_VACT_END_LSB(x) ((x)&0xff) //dsp_vact_end[7:0]
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139 #define SCL_DSP_VACT_END_MSB(x) (((x)>>8)&0xf) //dsp_frame_vtotal[11:8]
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141 #define SCL_H_BORD_ST_LSB(x) ((x)&0xff) //dsp_hbord_st[7:0]
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143 #define SCL_H_BORD_ST_MSB(x) (((x)>>8)&0x3) //dsp_hbord_st[9:8]
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145 #define SCL_H_BORD_END_LSB(x) ((x)&0xff) //dsp_hbord_end[7:0]
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147 #define SCL_H_BORD_END_MSB(x) (((x)>>8)&0xf) //dsp_hbord_end[11:8]
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149 #define SCL_V_BORD_ST(x) ((x)&0xff) //dsp_vbord_st[7:0]
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151 #define SCL_V_BORD_END_LSB(x) ((x)&0xff) //dsp_vbord_end[7:0]
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153 #define SCL_V_BORD_END_MSB(x) (((x)>>8)&0xf) //dsp_vbord_end[11:8]
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155 /****************LCD STRUCT********/
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156 #define PLL_CLKOD(i) ((i) & 0x03)
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157 #define PLL_NO_1 PLL_CLKOD(0)
158 #define PLL_NO_2 PLL_CLKOD(1)
159 #define PLL_NO_4 PLL_CLKOD(2)
160 #define PLL_NO_8 PLL_CLKOD(3)
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161 #define SCALE_PLL(_parent_rate , _rate, _m, _n, _od) \
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163 .parent_rate = _parent_rate, \
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170 struct rk610_pll_info{
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177 struct lcd_mode_inf{
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188 struct rk610_pll_info pllclk;
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190 struct scl_hv_info{
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194 struct rk610_lcd_info{
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196 struct scl_hv_info scl;
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197 struct lcd_mode_inf *lcd_mode;
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199 extern int rk610_lcd_init(struct i2c_client *client);
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200 extern int rk610_lcd_scaler_set_param(struct rk29fb_screen *screen,bool enable );
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