drivers/video/display/screen/lcd_CPTclaa038la31xe.c

   1 /*
   2  * Copyright (C) 2011 ROCKCHIP, Inc.
   3  *
   4  * author: hhb@rock-chips.com
   5  * creat date: 2011-03-22
   6  * route:drivers/video/display/screen/lcd_ls035y8dx02a.c - driver for rk29 phone sdk
   7  * declaration: This program driver have been tested in rk29_phonesdk hardware platform at 2011.03.31.
   8  * about migration: you need just 3 interface functions,such as lcd_init(void),lcd_standby(u8 enable),
   9  * set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20
  21 #include <linux/fb.h>
  22 #include <linux/delay.h>
  23 #include "../../rk29_fb.h"
  24 #include <mach/gpio.h>
  25 #include <mach/iomux.h>
  26 #include <mach/board.h>
  27 #include "screen.h"
  28
  29 /* Base */
  30 #define OUT_TYPE                SCREEN_RGB
  31 #define OUT_FACE                OUT_P666
  32 #define OUT_CLK                 (26*1000000)    //***27  uint Hz
  33 #define LCDC_ACLK       150000000     //29 lcdc axi DMA Ƶ��
  34
  35 /* Timing */
  36 #define H_PW                    10//8 //16
  37 #define H_BP                    10//24
  38 #define H_VD                    480//320
  39 #define H_FP                    10//60//16
  40
  41 #define V_PW                    3
  42 #define V_BP                    3
  43 #define V_VD                    800//480
  44 #define V_FP                    3
  45
  46 #define LCD_WIDTH       800    //need modify
  47 #define LCD_HEIGHT      480
  48
  49 /* Other */
  50 #define DCLK_POL                0           //0
  51 #define SWAP_RB                 0
  52
  53 static struct rk29lcd_info *gLcd_info = NULL;
  54 int lcd_init(void);
  55 int lcd_standby(u8 enable);
  56
  57 #define RXD_PORT        RK29_PIN2_PC7
  58 #define TXD_PORT        gLcd_info->txd_pin
  59 #define CLK_PORT        gLcd_info->clk_pin
  60 #define CS_PORT         gLcd_info->cs_pin
  61 #define RESET_PORT      RK29_PIN6_PC6
  62
  63 #define CS_OUT()        gpio_direction_output(CS_PORT, 1)
  64 #define CS_SET()        gpio_set_value(CS_PORT, GPIO_HIGH)
  65 #define CS_CLR()        gpio_set_value(CS_PORT, GPIO_LOW)
  66 #define CLK_OUT()       gpio_direction_output(CLK_PORT, 0)
  67 #define CLK_SET()       gpio_set_value(CLK_PORT, GPIO_HIGH)
  68 #define CLK_CLR()       gpio_set_value(CLK_PORT, GPIO_LOW)
  69 #define TXD_OUT()       gpio_direction_output(TXD_PORT, 1)
  70 #define TXD_SET()       gpio_set_value(TXD_PORT, GPIO_HIGH)
  71 #define TXD_CLR()       gpio_set_value(TXD_PORT, GPIO_LOW)
  72 #define RXD_IN()        gpio_direction_input(RXD_PORT)
  73 #define RXD_GET()           gpio_get_value(RXD_PORT)
  74
  75 #define DRVDelayUs(i)   udelay(i*4)
  76 #define DRVDelayMs(i)   mdelay(i*4)
  77
  78 /*----------------------------------------------------------------------
  79 Name    :   Claa0381a31RegSet
  80 Desc    :   IO模拟SPI对屏寄存器进行设置
  81 Params  :   Reg         寄存器地址
  82             Data        数据
  83 Return  :
  84 Notes   :   设置前需要调用SetIOSpiMode(1)进入IO模式
  85             设置后需要调用SetIOSpiMode(0)退出IO模式
  86 ----------------------------------------------------------------------*/
  87 void Claa0381a31Cmd(u32 data)
  88 {
  89     u32 i;
  90     TXD_OUT();
  91     CLK_OUT();
  92     CS_OUT();
  93     DRVDelayUs(2);
  94
  95     CS_SET();
  96     TXD_SET();
  97     CLK_SET();
  98     DRVDelayUs(2);
  99
 100     if(data)
 101     {
 102         CS_CLR();
 103         DRVDelayUs(2);
 104
 105         TXD_CLR();   //wr 0
 106         CLK_CLR();
 107         DRVDelayUs(2);
 108         CLK_SET();
 109         DRVDelayUs(2);
 110
 111         for(i = 0; i < 8; i++)  //reg
 112         {
 113                 if(data &(1<<(7-i)))
 114                         TXD_SET();
 115                 else
 116                         TXD_CLR();
 117
 118                 // 模拟CLK
 119                 CLK_CLR();
 120                 DRVDelayUs(2);
 121                 CLK_SET();
 122                 DRVDelayUs(2);
 123         }
 124     }
 125 }
 126
 127 void Claa0381a31Data(u32 data)
 128 {
 129     u32 i;
 130
 131     TXD_SET();
 132     CLK_CLR();
 133     DRVDelayUs(2);
 134     CLK_SET();
 135     DRVDelayUs(2);
 136
 137         for(i = 0; i < 8; i++)  //reg
 138         {
 139                 if(data &(1<<(7-i)))
 140                         TXD_SET();
 141                 else
 142                         TXD_CLR();
 143
 144                 // 模拟CLK
 145                 CLK_CLR();
 146                 DRVDelayUs(2);
 147                 CLK_SET();
 148                 DRVDelayUs(2);
 149         }
 150
 151 }
 152
 153
 154 void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
 155 {
 156     /* screen type & face */
 157     screen->type = OUT_TYPE;
 158     screen->face = OUT_FACE;
 159
 160     /* Screen size */
 161     screen->x_res = H_VD;
 162     screen->y_res = V_VD;
 163     screen->width = LCD_WIDTH;
 164     screen->height = LCD_HEIGHT;
 165
 166     /* Timing */
 167     screen->lcdc_aclk = LCDC_ACLK;
 168     screen->pixclock = OUT_CLK;
 169         screen->left_margin = H_BP;             /*>2*/
 170         screen->right_margin = H_FP;    /*>2*/
 171         screen->hsync_len = H_PW;               /*>2*/ //***all > 326, 4<PW+BP<15,
 172         screen->upper_margin = V_BP;    /*>2*/
 173         screen->lower_margin = V_FP;    /*>2*/
 174         screen->vsync_len = V_PW;               /*>6*/
 175
 176         /* Pin polarity */
 177         screen->pin_hsync = 0;
 178         screen->pin_vsync = 0;
 179         screen->pin_den = 0;
 180         screen->pin_dclk = DCLK_POL;
 181
 182         /* Swap rule */
 183     screen->swap_rb = SWAP_RB;
 184     screen->swap_rg = 0;
 185     screen->swap_gb = 0;
 186     screen->swap_delta = 0;
 187     screen->swap_dumy = 0;
 188
 189     /* Operation function*/
 190     screen->init = lcd_init;
 191     screen->standby = lcd_standby;
 192     if(lcd_info)
 193         gLcd_info = lcd_info;
 194 }
 195
 196 int lcd_init(void)
 197 {
 198         volatile u32 data;
 199     if(gLcd_info){
 200         gLcd_info->io_init();
 201         }
 202
 203     /* reset lcd to start init lcd by software if there is no hardware reset circuit for the lcd */
 204 #ifdef RESET_PORT
 205     gpio_request(RESET_PORT, NULL);
 206     gpio_direction_output(RESET_PORT, 0);
 207     mdelay(2);
 208     gpio_set_value(RESET_PORT, 1);
 209     mdelay(10);
 210     gpio_free(RESET_PORT);
 211 #endif
 212
 213         printk("lcd init...\n");
 214
 215     Claa0381a31Cmd(0xb9);
 216     Claa0381a31Data(0xff);
 217     Claa0381a31Data(0x83);
 218     Claa0381a31Data(0x63);
 219     Claa0381a31Cmd(0);
 220
 221     Claa0381a31Cmd(0xb1);
 222     Claa0381a31Data(0x81);
 223     Claa0381a31Data(0x30);
 224     Claa0381a31Data(0x03);
 225     Claa0381a31Data(0x34);
 226     Claa0381a31Data(0x02);
 227     Claa0381a31Data(0x13);
 228     Claa0381a31Data(0x11);
 229     Claa0381a31Data(0x00);
 230     Claa0381a31Data(0x35);
 231     Claa0381a31Data(0x3e);
 232     Claa0381a31Data(0x16);
 233     Claa0381a31Data(0x16);
 234     Claa0381a31Cmd(0);
 235
 236     Claa0381a31Cmd(0x11);
 237     Claa0381a31Cmd(0);
 238
 239     DRVDelayMs(150);
 240
 241     Claa0381a31Cmd(0xb6);
 242     Claa0381a31Data(0x42);
 243     Claa0381a31Cmd(0);
 244
 245     Claa0381a31Cmd(0xb3);
 246     Claa0381a31Data(0x01);
 247     Claa0381a31Cmd(0);
 248
 249     Claa0381a31Cmd(0xb4);
 250     Claa0381a31Data(0x04);
 251     Claa0381a31Cmd(0);
 252
 253     Claa0381a31Cmd(0xe0);
 254     Claa0381a31Data(0x00);
 255     Claa0381a31Data(0x1e);
 256     Claa0381a31Data(0x23);
 257     Claa0381a31Data(0x2d);
 258     Claa0381a31Data(0x2d);
 259     Claa0381a31Data(0x3f);
 260     Claa0381a31Data(0x08);
 261     Claa0381a31Data(0xcc);
 262     Claa0381a31Data(0x8c);
 263     Claa0381a31Data(0xcf);
 264     Claa0381a31Data(0x51);
 265     Claa0381a31Data(0x12);
 266     Claa0381a31Data(0x52);
 267     Claa0381a31Data(0x92);
 268     Claa0381a31Data(0x1E);
 269     Claa0381a31Data(0x00);
 270     Claa0381a31Data(0x1e);
 271     Claa0381a31Data(0x23);
 272     Claa0381a31Data(0x2d);
 273     Claa0381a31Data(0x2d);
 274     Claa0381a31Data(0x3f);
 275     Claa0381a31Data(0x08);
 276     Claa0381a31Data(0xcc);
 277     Claa0381a31Data(0x8c);
 278     Claa0381a31Data(0xcf);
 279     Claa0381a31Data(0x51);
 280     Claa0381a31Data(0x12);
 281     Claa0381a31Data(0x52);
 282     Claa0381a31Data(0x92);
 283     Claa0381a31Data(0x1E);
 284     Claa0381a31Cmd(0);
 285
 286     Claa0381a31Cmd(0xcc);
 287     Claa0381a31Data(0x0b);
 288     Claa0381a31Cmd(0);
 289
 290     Claa0381a31Cmd(0x3a);
 291     Claa0381a31Data(0x60);
 292     Claa0381a31Cmd(0);
 293
 294     DRVDelayMs(20);
 295
 296     Claa0381a31Cmd(0x29);
 297     Claa0381a31Cmd(0);
 298
 299     if(gLcd_info)
 300         gLcd_info->io_deinit();
 301
 302     return 0;
 303 }
 304
 305 int lcd_standby(u8 enable)      //***enable =1 means suspend, 0 means resume
 306 {
 307
 308     if(gLcd_info)
 309        gLcd_info->io_init();
 310         printk("lcd standby\n");
 311         if(enable) {
 312                 printk("lcd standby...enable =1 means suspend\n");
 313                 //spi_screenreg_set(0x10, 0xffff, 0xffff);
 314                 //mdelay(120);
 315                 //spi_screenreg_set(0x28, 0xffff, 0xffff);
 316         } else {
 317                 printk("lcd standby...0 means resume\n");
 318                 //spi_screenreg_set(0x29, 0xffff, 0xffff);
 319                 //spi_screenreg_set(0x11, 0xffff, 0xffff);
 320                 //mdelay(150);
 321         }
 322
 323     if(gLcd_info)
 324        gLcd_info->io_deinit();
 325     return 0;
 326 }
 327