drivers/video/display/screen/lcd_hdmi_1024x768.c

   1 #include <linux/fb.h>\r
   2 #include <linux/delay.h>\r
   3 #include <mach/gpio.h>\r
   4 #include <mach/iomux.h>\r
   5 #include <mach/board.h>\r
   6 #include "screen.h"\r
   7 #include <linux/hdmi.h>\r
   8 #include "../../rk29_fb.h"\r
   9 \r
  10 \r
  11 /* Base */\r
  12 #define OUT_TYPE                SCREEN_LVDS\r
  13 \r
  14 #define OUT_FORMAT      LVDS_8BIT_2\r
  15 #define OUT_FACE                OUT_D888_P666  \r
  16 #define OUT_CLK                 65000000\r
  17 #define LCDC_ACLK        500000000//312000000           //29 lcdc axi DMA ÆµÂÊ\r
  18 \r
  19 /* Timing */\r
  20 #define H_PW                    10\r
  21 #define H_BP                    100\r
  22 #define H_VD                    1024\r
  23 #define H_FP                    210\r
  24 \r
  25 #define V_PW                    10\r
  26 #define V_BP                    10\r
  27 #define V_VD                    768\r
  28 #define V_FP                    18\r
  29 \r
  30 #define LCD_WIDTH       202\r
  31 #define LCD_HEIGHT      152\r
  32 \r
  33 /* scaler Timing    */\r
  34 //1920*1080*60\r
  35 #define S_OUT_CLK               SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
  36 #define S_H_PW                  100\r
  37 #define S_H_BP                  100\r
  38 #define S_H_VD                  1024\r
  39 #define S_H_FP                  151\r
  40 \r
  41 #define S_V_PW                  5\r
  42 #define S_V_BP                  15\r
  43 #define S_V_VD                  768\r
  44 #define S_V_FP                  12\r
  45 \r
  46 #define S_H_ST                  1757\r
  47 #define S_V_ST                  14\r
  48 \r
  49 //1920*1080*50\r
  50 #define S1_OUT_CLK              SCALE_RATE(148500000,54000000)  //m=16 n=11 no=4 \r
  51 #define S1_H_PW                 100\r
  52 #define S1_H_BP                 100\r
  53 #define S1_H_VD                 1024\r
  54 #define S1_H_FP                 126\r
  55 \r
  56 #define S1_V_PW                 5\r
  57 #define S1_V_BP                 15\r
  58 #define S1_V_VD                 768\r
  59 #define S1_V_FP                 12\r
  60 \r
  61 #define S1_H_ST                 1757\r
  62 #define S1_V_ST                 14\r
  63 \r
  64 //1280*720*60\r
  65 #define S2_OUT_CLK              SCALE_RATE(74250000,66000000)  //m=32 n=9 no=4\r
  66 #define S2_H_PW                 100\r
  67 #define S2_H_BP                 100\r
  68 #define S2_H_VD                 1024\r
  69 #define S2_H_FP                 151\r
  70 \r
  71 #define S2_V_PW                 5\r
  72 #define S2_V_BP                 15\r
  73 #define S2_V_VD                 768\r
  74 #define S2_V_FP                 12\r
  75 \r
  76 #define S2_H_ST                 0\r
  77 #define S2_V_ST                 12\r
  78 //1280*720*50\r
  79 \r
  80 #define S3_OUT_CLK              SCALE_RATE(74250000,54000000)   // m=32 n=11 no=4 \r
  81 #define S3_H_PW                 100\r
  82 #define S3_H_BP                 100\r
  83 #define S3_H_VD                 1024\r
  84 #define S3_H_FP                 151\r
  85 \r
  86 #define S3_V_PW                 5\r
  87 #define S3_V_BP                 15\r
  88 #define S3_V_VD                 768\r
  89 #define S3_V_FP                 12\r
  90 \r
  91 #define S3_H_ST                 0\r
  92 #define S3_V_ST                 12\r
  93 \r
  94 //720*576*50\r
  95 #define S4_OUT_CLK              SCALE_RATE(27000000,54375000)  //m=145 n=9 no=8 \r
  96 #define S4_H_PW                 100\r
  97 #define S4_H_BP                 100\r
  98 #define S4_H_VD                 1024\r
  99 #define S4_H_FP                 81\r
 100 \r
 101 #define S4_V_PW                 5\r
 102 #define S4_V_BP                 15\r
 103 #define S4_V_VD                 768\r
 104 #define S4_V_FP                 45\r
 105 \r
 106 \r
 107 #define S4_H_ST                 435\r
 108 #define S4_V_ST                 45\r
 109 //720*480*60\r
 110 #define S5_OUT_CLK              SCALE_RATE(27000000,72000000)  //m=32 n=3 no=4 \r
 111 #define S5_H_PW                 100\r
 112 #define S5_H_BP                 100\r
 113 #define S5_H_VD                 1024\r
 114 #define S5_H_FP                 81\r
 115 \r
 116 #define S5_V_PW                 5\r
 117 #define S5_V_BP                 15\r
 118 #define S5_V_VD                 768\r
 119 #define S5_V_FP                 51\r
 120 \r
 121 #define S5_H_ST                 858\r
 122 #define S5_V_ST                 45\r
 123 \r
 124 #define S_DCLK_POL       0\r
 125 \r
 126 /* Other */\r
 127 #define DCLK_POL                0\r
 128 #define SWAP_RB                 0 \r
 129 #ifdef  CONFIG_HDMI_DUAL_DISP\r
 130 static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)\r
 131 {\r
 132     screen->s_clk_inv = S_DCLK_POL;\r
 133     screen->s_den_inv = 0;\r
 134     screen->s_hv_sync_inv = 0;\r
 135     switch(hdmi_resolution){\r
 136     case HDMI_1920x1080p_60Hz:\r
 137                 /* Scaler Timing    */\r
 138             screen->hdmi_resolution = hdmi_resolution;\r
 139                 screen->s_pixclock = S_OUT_CLK;\r
 140                 screen->s_hsync_len = S_H_PW;\r
 141                 screen->s_left_margin = S_H_BP;\r
 142                 screen->s_right_margin = S_H_FP;\r
 143                 screen->s_hsync_len = S_H_PW;\r
 144                 screen->s_upper_margin = S_V_BP;\r
 145                 screen->s_lower_margin = S_V_FP;\r
 146                 screen->s_vsync_len = S_V_PW;\r
 147                 screen->s_hsync_st = S_H_ST;\r
 148                 screen->s_vsync_st = S_V_ST;\r
 149                 break;\r
 150         case HDMI_1920x1080p_50Hz:\r
 151                 /* Scaler Timing    */\r
 152             screen->hdmi_resolution = hdmi_resolution;\r
 153                 screen->s_pixclock = S1_OUT_CLK;\r
 154                 screen->s_hsync_len = S1_H_PW;\r
 155                 screen->s_left_margin = S1_H_BP;\r
 156                 screen->s_right_margin = S1_H_FP;\r
 157                 screen->s_hsync_len = S1_H_PW;\r
 158                 screen->s_upper_margin = S1_V_BP;\r
 159                 screen->s_lower_margin = S1_V_FP;\r
 160                 screen->s_vsync_len = S1_V_PW;\r
 161                 screen->s_hsync_st = S1_H_ST;\r
 162                 screen->s_vsync_st = S1_V_ST;\r
 163                 break;\r
 164         case HDMI_1280x720p_60Hz:\r
 165                 /* Scaler Timing    */\r
 166             screen->hdmi_resolution = hdmi_resolution;\r
 167                 screen->s_pixclock = S2_OUT_CLK;\r
 168                 screen->s_hsync_len = S2_H_PW;\r
 169                 screen->s_left_margin = S2_H_BP;\r
 170                 screen->s_right_margin = S2_H_FP;\r
 171                 screen->s_hsync_len = S2_H_PW;\r
 172                 screen->s_upper_margin = S2_V_BP;\r
 173                 screen->s_lower_margin = S2_V_FP;\r
 174                 screen->s_vsync_len = S2_V_PW;\r
 175                 screen->s_hsync_st = S2_H_ST;\r
 176                 screen->s_vsync_st = S2_V_ST;\r
 177                 break;\r
 178     case HDMI_1280x720p_50Hz:\r
 179                 /* Scaler Timing    */\r
 180             screen->hdmi_resolution = hdmi_resolution;\r
 181                 screen->s_pixclock = S3_OUT_CLK;\r
 182                 screen->s_hsync_len = S3_H_PW;\r
 183                 screen->s_left_margin = S3_H_BP;\r
 184                 screen->s_right_margin = S3_H_FP;\r
 185                 screen->s_hsync_len = S3_H_PW;\r
 186                 screen->s_upper_margin = S3_V_BP;\r
 187                 screen->s_lower_margin = S3_V_FP;\r
 188                 screen->s_vsync_len = S3_V_PW;\r
 189                 screen->s_hsync_st = S3_H_ST;\r
 190                 screen->s_vsync_st = S3_V_ST;\r
 191                 break;\r
 192     case HDMI_720x576p_50Hz_4x3:\r
 193     case HDMI_720x576p_50Hz_16x9:\r
 194                 /* Scaler Timing    */\r
 195             screen->hdmi_resolution = hdmi_resolution;\r
 196                 screen->s_pixclock = S4_OUT_CLK;\r
 197                 screen->s_hsync_len = S4_H_PW;\r
 198                 screen->s_left_margin = S4_H_BP;\r
 199                 screen->s_right_margin = S4_H_FP;\r
 200                 screen->s_hsync_len = S4_H_PW;\r
 201                 screen->s_upper_margin = S4_V_BP;\r
 202                 screen->s_lower_margin = S4_V_FP;\r
 203                 screen->s_vsync_len = S4_V_PW;\r
 204                 screen->s_hsync_st = S4_H_ST;\r
 205                 screen->s_vsync_st = S4_V_ST;\r
 206                 break;\r
 207     case HDMI_720x480p_60Hz_16x9:\r
 208     case HDMI_720x480p_60Hz_4x3:\r
 209                 /* Scaler Timing    */\r
 210             screen->hdmi_resolution = hdmi_resolution;\r
 211                 screen->s_pixclock = S5_OUT_CLK;\r
 212                 screen->s_hsync_len = S5_H_PW;\r
 213                 screen->s_left_margin = S5_H_BP;\r
 214                 screen->s_right_margin = S5_H_FP;\r
 215                 screen->s_hsync_len = S5_H_PW;\r
 216                 screen->s_upper_margin = S5_V_BP;\r
 217                 screen->s_lower_margin = S5_V_FP;\r
 218                 screen->s_vsync_len = S5_V_PW;\r
 219                 screen->s_hsync_st = S5_H_ST;\r
 220                 screen->s_vsync_st = S5_V_ST;\r
 221                 break;\r
 222     default :\r
 223             printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
 224             return -1;\r
 225                 break;\r
 226         }\r
 227         \r
 228         return 0;\r
 229 }\r
 230 #else\r
 231 static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}\r
 232 #endif\r
 233 \r
 234 void set_lcd_info(struct rk29fb_screen *screen,  struct rk29lcd_info *lcd_info )\r
 235 {\r
 236     /* screen type & face */\r
 237     screen->type = OUT_TYPE;\r
 238     screen->face = OUT_FACE;\r
 239     screen->hw_format = OUT_FORMAT;\r
 240     \r
 241     /* Screen size */\r
 242     screen->x_res = H_VD;\r
 243     screen->y_res = V_VD;\r
 244 \r
 245     screen->width = LCD_WIDTH;\r
 246     screen->height = LCD_HEIGHT;\r
 247 \r
 248     /* Timing */\r
 249     screen->lcdc_aclk = LCDC_ACLK;\r
 250     screen->pixclock = OUT_CLK;\r
 251         screen->left_margin = H_BP;\r
 252         screen->right_margin = H_FP;\r
 253         screen->hsync_len = H_PW;\r
 254         screen->upper_margin = V_BP;\r
 255         screen->lower_margin = V_FP;\r
 256         screen->vsync_len = V_PW;\r
 257         \r
 258         /* Pin polarity */\r
 259         screen->pin_hsync = 0;\r
 260         screen->pin_vsync = 0;\r
 261         screen->pin_den = 0;\r
 262         screen->pin_dclk = DCLK_POL;\r
 263 \r
 264         /* Swap rule */\r
 265     screen->swap_rb = SWAP_RB;\r
 266     screen->swap_rg = 0;\r
 267     screen->swap_gb = 0;\r
 268     screen->swap_delta = 0;\r
 269     screen->swap_dumy = 0;\r
 270 \r
 271     /* Operation function*/\r
 272     screen->init = NULL;\r
 273     screen->standby = NULL;\r
 274     screen->sscreen_get = set_scaler_info;\r
 275 #ifdef CONFIG_RK610_LVDS\r
 276     screen->sscreen_set = rk610_lcd_scaler_set_param;\r
 277 #endif\r
 278 }