drivers/video/display/screen/lcd_hx8357.c

   1 #include <linux/fb.h>
   2 #include <linux/delay.h>
   3 #include "../../rk2818_fb.h"
   4 #include <mach/gpio.h>
   5 #include <mach/iomux.h>
   6 #include "screen.h"
   7
   8
   9 /* Base */
  10 #define OUT_TYPE                SCREEN_RGB
  11 #define OUT_FACE                OUT_P666        /*OUT_P888*/
  12 #define OUT_CLK                 12      //***27
  13
  14 /* Timing */
  15 #define H_PW                    8
  16 #define H_BP                    6
  17 #define H_VD                    320     //***800
  18 #define H_FP                    6
  19
  20 #define V_PW                    12
  21 #define V_BP                    4
  22 #define V_VD                    480     //***480
  23 #define V_FP                    4
  24
  25 /* Other */
  26 #define DCLK_POL                0
  27 #define SWAP_RB                 1
  28
  29 int init(void);
  30 int standby(u8 enable);
  31 void set_lcd_info(struct rk28fb_screen *screen);
  32
  33 static void screen_set_iomux(u8 enable)
  34 {
  35     int ret=-1;
  36     if(enable)
  37     {
  38         rk2818_mux_api_set(GPIOH6_IQ_SEL_NAME, 0);
  39         ret = gpio_request(RK2818_PIN_PH6, NULL);
  40         if(0)//(ret != 0)
  41         {
  42             gpio_free(RK2818_PIN_PH6);
  43             printk(">>>>>> lcd cs gpio_request err \n ");
  44             goto pin_err;
  45         }
  46
  47         rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, 1);
  48
  49         ret = gpio_request(RK2818_PIN_PE5, NULL);
  50         if(0)//(ret != 0)
  51         {
  52             gpio_free(RK2818_PIN_PE5);
  53             printk(">>>>>> lcd clk gpio_request err \n ");
  54             goto pin_err;
  55         }
  56
  57         ret = gpio_request(RK2818_PIN_PE4, NULL);
  58         if(0)//(ret != 0)
  59         {
  60             gpio_free(RK2818_PIN_PE4);
  61             printk(">>>>>> lcd txd gpio_request err \n ");
  62             goto pin_err;
  63         }
  64     }
  65     else
  66     {
  67          gpio_free(RK2818_PIN_PH6);
  68        //  rk2818_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1);
  69
  70          gpio_free(RK2818_PIN_PE5);
  71          gpio_free(RK2818_PIN_PE4);
  72          rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, 0);
  73     }
  74     return ;
  75 pin_err:
  76     return ;
  77
  78 }
  79 void set_lcd_info(struct rk28fb_screen *screen)
  80 {
  81         printk("lcd_hx8357 set_lcd_info \n");
  82     /* screen type & face */
  83     screen->type = OUT_TYPE;
  84     screen->face = OUT_FACE;
  85
  86     /* Screen size */
  87     screen->x_res = H_VD;
  88     screen->y_res = V_VD;
  89
  90     /* Timing */
  91     screen->pixclock = OUT_CLK;
  92         screen->left_margin = H_BP;             /*>2*/
  93         screen->right_margin = H_FP;    /*>2*/
  94         screen->hsync_len = H_PW;               /*>2*/ //***all > 326, 4<PW+BP<15,
  95         screen->upper_margin = V_BP;    /*>2*/
  96         screen->lower_margin = V_FP;    /*>2*/
  97         screen->vsync_len = V_PW;               /*>6*/
  98
  99         /* Pin polarity */
 100         screen->pin_hsync = 0;
 101         screen->pin_vsync = 0;
 102         screen->pin_den = 0;
 103         screen->pin_dclk = DCLK_POL;
 104
 105         /* Swap rule */
 106     screen->swap_rb = SWAP_RB;
 107     screen->swap_rg = 0;
 108     screen->swap_gb = 0;
 109     screen->swap_delta = 0;
 110     screen->swap_dumy = 0;
 111
 112     /* Operation function*/
 113     screen->init = init;
 114     screen->standby = standby;
 115 }
 116
 117 void spi_screenreg_set(u32 Addr, u32 Data)
 118 {
 119 #define CS_OUT()        gpio_direction_output(RK2818_PIN_PH6, GPIO_OUT)
 120 #define CS_SET()        gpio_set_value(RK2818_PIN_PH6, GPIO_HIGH)
 121 #define CS_CLR()        gpio_set_value(RK2818_PIN_PH6, GPIO_LOW)
 122 #define CLK_OUT()       gpio_direction_output(RK2818_PIN_PE5, GPIO_OUT)  //I2C0_SCL
 123 #define CLK_SET()       gpio_set_value(RK2818_PIN_PE5, GPIO_HIGH)
 124 #define CLK_CLR()       gpio_set_value(RK2818_PIN_PE5, GPIO_LOW)
 125 #define TXD_OUT()       gpio_direction_output(RK2818_PIN_PE4, GPIO_OUT)  //I2C0_SDA
 126 #define TXD_SET()       gpio_set_value(RK2818_PIN_PE4, GPIO_HIGH)
 127 #define TXD_CLR()       gpio_set_value(RK2818_PIN_PE4, GPIO_LOW)
 128
 129 #define DRVDelayUs(i)   udelay(i*2)
 130
 131     u32 i;
 132     u32 control_bit;
 133
 134
 135     TXD_OUT();
 136     CLK_OUT();
 137     CS_OUT();
 138     DRVDelayUs(2);
 139     DRVDelayUs(2);
 140
 141     CS_SET();
 142     TXD_SET();
 143     CLK_SET();
 144     DRVDelayUs(2);
 145
 146         CS_CLR();
 147         control_bit = 0x70<<8;
 148         Addr = (control_bit | Addr);
 149         //printk("addr is 0x%x \n", Addr);
 150         for(i = 0; i < 16; i++)  //reg
 151         {
 152                 if(Addr &(1<<(15-i)))
 153                         TXD_SET();
 154                 else
 155                         TXD_CLR();
 156
 157                 // \u6a21\u62dfCLK
 158                 CLK_CLR();
 159                 DRVDelayUs(2);
 160                 CLK_SET();
 161                 DRVDelayUs(2);
 162         }
 163
 164         CS_SET();
 165         TXD_SET();
 166         CLK_SET();
 167         DRVDelayUs(2);
 168         CS_CLR();
 169
 170 #if 0
 171         TXD_CLR();  //write
 172
 173         // \u6a21\u62dfCLK
 174     CLK_CLR();
 175     DRVDelayUs(2);
 176     CLK_SET();
 177     DRVDelayUs(2);
 178
 179         TXD_SET();  //highz
 180
 181         // \u6a21\u62dfCLK
 182     CLK_CLR();
 183     DRVDelayUs(2);
 184     CLK_SET();
 185     DRVDelayUs(2);
 186 #endif
 187
 188         control_bit = 0x72<<8;
 189         Data = (control_bit | Data);
 190         //printk("data is 0x%x \n", Data);
 191         for(i = 0; i < 16; i++)  //data
 192         {
 193                 if(Data &(1<<(15-i)))
 194                         TXD_SET();
 195                 else
 196                         TXD_CLR();
 197
 198                 // \u6a21\u62dfCLK
 199                 CLK_CLR();
 200                 DRVDelayUs(2);
 201                 CLK_SET();
 202                 DRVDelayUs(2);
 203         }
 204
 205         CS_SET();
 206         CLK_CLR();
 207         TXD_CLR();
 208         DRVDelayUs(2);
 209
 210 }
 211
 212
 213
 214 int init(void)
 215 {
 216
 217         printk("lcd_hx8357 init \n");
 218         screen_set_iomux(1);
 219
 220 #if 0                                                                                   //***Õâ¾ä´úÂëÊÇ²»ÊÇÐ´´íÁË
 221     spi_screenreg_set(0x02, 0x07);
 222     spi_screenreg_set(0x03, 0x5f);
 223     spi_screenreg_set(0x04, 0x17);
 224     spi_screenreg_set(0x05, 0x20);
 225     spi_screenreg_set(0x06, 0x08);
 226     spi_screenreg_set(0x07, 0x20);
 227     spi_screenreg_set(0x08, 0x20);
 228     spi_screenreg_set(0x09, 0x20);
 229     spi_screenreg_set(0x0a, 0x20);
 230     spi_screenreg_set(0x0b, 0x22);
 231     spi_screenreg_set(0x0c, 0x22);
 232     spi_screenreg_set(0x0d, 0x22);
 233     spi_screenreg_set(0x0e, 0x10);
 234     spi_screenreg_set(0x0f, 0x10);
 235     spi_screenreg_set(0x10, 0x10);
 236
 237     spi_screenreg_set(0x11, 0x15);
 238     spi_screenreg_set(0x12, 0xAA);
 239     spi_screenreg_set(0x13, 0xFF);
 240     spi_screenreg_set(0x14, 0xb0);
 241     spi_screenreg_set(0x15, 0x8e);
 242     spi_screenreg_set(0x16, 0xd6);
 243     spi_screenreg_set(0x17, 0xfe);
 244     spi_screenreg_set(0x18, 0x28);
 245     spi_screenreg_set(0x19, 0x52);
 246     spi_screenreg_set(0x1A, 0x7c);
 247
 248     spi_screenreg_set(0x1B, 0xe9);
 249     spi_screenreg_set(0x1C, 0x42);
 250     spi_screenreg_set(0x1D, 0x88);
 251     spi_screenreg_set(0x1E, 0xb8);
 252     spi_screenreg_set(0x1F, 0xFF);
 253     spi_screenreg_set(0x20, 0xF0);
 254     spi_screenreg_set(0x21, 0xF0);
 255     spi_screenreg_set(0x22, 0x09);
 256 #else
 257         spi_screenreg_set(0xff, 0x00);
 258         spi_screenreg_set(0x16, 0x08);
 259         spi_screenreg_set(0x01, 0x02);
 260         spi_screenreg_set(0xe2, 0x00);
 261         spi_screenreg_set(0xe3, 0x00);
 262         spi_screenreg_set(0xf2, 0x00);
 263         spi_screenreg_set(0xe4, 0x1c);
 264         spi_screenreg_set(0xe5, 0x1c);
 265         spi_screenreg_set(0xe6, 0x00);
 266         spi_screenreg_set(0xe7, 0x1c);
 267
 268         spi_screenreg_set(0x19, 0x01);
 269         mdelay(10);
 270         spi_screenreg_set(0x2a, 0x00);
 271         spi_screenreg_set(0x2b, 0x13);
 272         spi_screenreg_set(0x2f, 0x01);
 273         spi_screenreg_set(0x02, 0x00);
 274         spi_screenreg_set(0x03, 0x00);
 275         spi_screenreg_set(0x04, 0x01);
 276         spi_screenreg_set(0x05, 0x3f);
 277         spi_screenreg_set(0x06, 0x00);
 278         spi_screenreg_set(0x07, 0x00);
 279
 280         spi_screenreg_set(0x08, 0x01);
 281         spi_screenreg_set(0x09, 0xdf);
 282         spi_screenreg_set(0x24, 0x91);
 283         spi_screenreg_set(0x25, 0x8a);
 284         spi_screenreg_set(0x29, 0x01);
 285         spi_screenreg_set(0x18, 0x22);
 286         spi_screenreg_set(0x1b, 0x30);
 287         mdelay(10);
 288         spi_screenreg_set(0x1d, 0x22);
 289         mdelay(10);
 290         spi_screenreg_set(0x40, 0x00);
 291         spi_screenreg_set(0x41, 0x3c);
 292         spi_screenreg_set(0x42, 0x38);
 293         spi_screenreg_set(0x43, 0x34);
 294         spi_screenreg_set(0x44, 0x2e);
 295         spi_screenreg_set(0x45, 0x2f);
 296         spi_screenreg_set(0x46, 0x41);
 297         spi_screenreg_set(0x47, 0x7d);
 298         spi_screenreg_set(0x48, 0x0b);
 299         spi_screenreg_set(0x49, 0x05);
 300         spi_screenreg_set(0x4a, 0x06);
 301         spi_screenreg_set(0x4b, 0x12);
 302         spi_screenreg_set(0x4c, 0x16);
 303         spi_screenreg_set(0x50, 0x10);
 304         spi_screenreg_set(0x51, 0x11);
 305         spi_screenreg_set(0x52, 0x0b);
 306         spi_screenreg_set(0x53, 0x07);
 307         spi_screenreg_set(0x54, 0x03);
 308         spi_screenreg_set(0x55, 0x3f);
 309         spi_screenreg_set(0x56, 0x02);
 310         spi_screenreg_set(0x57, 0x3e);
 311         spi_screenreg_set(0x58, 0x09);
 312         spi_screenreg_set(0x59, 0x0d);
 313         spi_screenreg_set(0x5a, 0x19);
 314         spi_screenreg_set(0x5b, 0x1a);
 315         spi_screenreg_set(0x5c, 0x14);
 316         spi_screenreg_set(0x5d, 0xc0);
 317         spi_screenreg_set(0x1a, 0x05);
 318         mdelay(10);
 319
 320         spi_screenreg_set(0x1c, 0x03);
 321         mdelay(10);
 322         spi_screenreg_set(0x1f, 0x90);
 323         mdelay(10);
 324         spi_screenreg_set(0x1f, 0xd2);
 325         mdelay(10);
 326         spi_screenreg_set(0x28, 0x04);
 327         mdelay(40);
 328         spi_screenreg_set(0x28, 0x38);
 329         mdelay(40);
 330         spi_screenreg_set(0x28, 0x3c);
 331         mdelay(40);
 332         spi_screenreg_set(0x80, 0x00);
 333         spi_screenreg_set(0x81, 0x00);
 334         spi_screenreg_set(0x82, 0x00);
 335         spi_screenreg_set(0x83, 0x00);
 336
 337         spi_screenreg_set(0x60, 0x08);
 338         spi_screenreg_set(0x31, 0x02);
 339         spi_screenreg_set(0x32, 0x08 /*0x00*/);
 340         spi_screenreg_set(0x17, 0x60);  //***RGB666
 341         spi_screenreg_set(0x2d, 0x1f);
 342         spi_screenreg_set(0xe8, 0x90);
 343 #endif
 344         screen_set_iomux(0);
 345
 346     return 0;
 347 }
 348
 349 int standby(u8 enable)  //***enable =1 means suspend, 0 means resume
 350 {
 351
 352      screen_set_iomux(1);
 353         if(enable) {
 354                 printk("---------screen suspend--------------\n");
 355                 #if 0
 356                 spi_screenreg_set(0x03, 0xde);
 357                 #else
 358                 spi_screenreg_set(0x1f, 0x91);
 359                 spi_screenreg_set(0x19, 0x00);
 360                 #endif
 361         } else {
 362                 printk("---------screen resume--------------\n ");
 363                 #if 0
 364                 spi_screenreg_set(0x03, 0x5f);
 365                 #else
 366                 spi_screenreg_set(0x19, 0x01);
 367                 spi_screenreg_set(0x1f, 0x90);
 368                 mdelay(10);
 369                 spi_screenreg_set(0x1f, 0xd2);
 370                 #endif
 371         }
 372
 373    screen_set_iomux(0);
 374     return 0;
 375 }
 376