2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
35 #include <video/omapdss.h>
38 #include "dss_features.h"
41 struct platform_device *pdev;
43 struct regulator *vdds_dsi_reg;
44 struct platform_device *dsidev;
48 struct omap_video_timings timings;
49 struct dss_lcd_mgr_config mgr_config;
52 struct omap_dss_device output;
54 bool port_initialized;
57 static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
59 return container_of(dssdev, struct dpi_data, output);
62 /* only used in non-DT mode */
63 static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
65 return dev_get_drvdata(&pdev->dev);
68 static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
71 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
72 * would also be used for DISPC fclk. Meaning, when the DPI output is
73 * disabled, DISPC clock will be disabled, and TV out will stop.
75 switch (omapdss_get_version()) {
76 case OMAPDSS_VER_OMAP24xx:
77 case OMAPDSS_VER_OMAP34xx_ES1:
78 case OMAPDSS_VER_OMAP34xx_ES3:
79 case OMAPDSS_VER_OMAP3630:
80 case OMAPDSS_VER_AM35xx:
81 case OMAPDSS_VER_AM43xx:
84 case OMAPDSS_VER_OMAP4430_ES1:
85 case OMAPDSS_VER_OMAP4430_ES2:
86 case OMAPDSS_VER_OMAP4:
88 case OMAP_DSS_CHANNEL_LCD:
89 return dsi_get_dsidev_from_id(0);
90 case OMAP_DSS_CHANNEL_LCD2:
91 return dsi_get_dsidev_from_id(1);
96 case OMAPDSS_VER_OMAP5:
98 case OMAP_DSS_CHANNEL_LCD:
99 return dsi_get_dsidev_from_id(0);
100 case OMAP_DSS_CHANNEL_LCD3:
101 return dsi_get_dsidev_from_id(1);
111 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
114 case OMAP_DSS_CHANNEL_LCD:
115 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
116 case OMAP_DSS_CHANNEL_LCD2:
117 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
118 case OMAP_DSS_CHANNEL_LCD3:
119 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
121 /* this shouldn't happen */
123 return OMAP_DSS_CLK_SRC_FCK;
127 struct dpi_clk_calc_ctx {
128 struct platform_device *dsidev;
132 unsigned long pck_min, pck_max;
136 struct dsi_clock_info dsi_cinfo;
138 struct dispc_clock_info dispc_cinfo;
141 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
142 unsigned long pck, void *data)
144 struct dpi_clk_calc_ctx *ctx = data;
147 * Odd dividers give us uneven duty cycle, causing problem when level
148 * shifted. So skip all odd dividers when the pixel clock is on the
151 if (ctx->pck_min >= 100000000) {
152 if (lckd > 1 && lckd % 2 != 0)
155 if (pckd > 1 && pckd % 2 != 0)
159 ctx->dispc_cinfo.lck_div = lckd;
160 ctx->dispc_cinfo.pck_div = pckd;
161 ctx->dispc_cinfo.lck = lck;
162 ctx->dispc_cinfo.pck = pck;
168 static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
171 struct dpi_clk_calc_ctx *ctx = data;
174 * Odd dividers give us uneven duty cycle, causing problem when level
175 * shifted. So skip all odd dividers when the pixel clock is on the
178 if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
181 ctx->dsi_cinfo.regm_dispc = regm_dispc;
182 ctx->dsi_cinfo.dsi_pll_hsdiv_dispc_clk = dispc;
184 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
185 dpi_calc_dispc_cb, ctx);
189 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint,
193 struct dpi_clk_calc_ctx *ctx = data;
195 ctx->dsi_cinfo.regn = regn;
196 ctx->dsi_cinfo.regm = regm;
197 ctx->dsi_cinfo.fint = fint;
198 ctx->dsi_cinfo.clkin4ddr = pll;
200 return dsi_hsdiv_calc(ctx->dsidev, pll, ctx->pck_min,
201 dpi_calc_hsdiv_cb, ctx);
204 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
206 struct dpi_clk_calc_ctx *ctx = data;
210 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
211 dpi_calc_dispc_cb, ctx);
214 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
215 struct dpi_clk_calc_ctx *ctx)
218 unsigned long pll_min, pll_max;
220 clkin = dsi_get_pll_clkin(dpi->dsidev);
222 memset(ctx, 0, sizeof(*ctx));
223 ctx->dsidev = dpi->dsidev;
224 ctx->pck_min = pck - 1000;
225 ctx->pck_max = pck + 1000;
226 ctx->dsi_cinfo.clkin = clkin;
231 return dsi_pll_calc(dpi->dsidev, clkin,
233 dpi_calc_pll_cb, ctx);
236 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
241 * DSS fck gives us very few possibilities, so finding a good pixel
242 * clock may not be possible. We try multiple times to find the clock,
243 * each time widening the pixel clock range we look for, up to
247 for (i = 0; i < 25; ++i) {
250 memset(ctx, 0, sizeof(*ctx));
251 if (pck > 1000 * i * i * i)
252 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
255 ctx->pck_max = pck + 1000 * i * i * i;
257 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
267 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
268 unsigned long pck_req, unsigned long *fck, int *lck_div,
271 struct dpi_clk_calc_ctx ctx;
275 ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
279 r = dsi_pll_set_clock_div(dpi->dsidev, &ctx.dsi_cinfo);
283 dss_select_lcd_clk_source(channel,
284 dpi_get_alt_clk_src(channel));
286 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
288 *fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
289 *lck_div = ctx.dispc_cinfo.lck_div;
290 *pck_div = ctx.dispc_cinfo.pck_div;
295 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
296 unsigned long *fck, int *lck_div, int *pck_div)
298 struct dpi_clk_calc_ctx ctx;
302 ok = dpi_dss_clk_calc(pck_req, &ctx);
306 r = dss_set_fck_rate(ctx.fck);
310 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
313 *lck_div = ctx.dispc_cinfo.lck_div;
314 *pck_div = ctx.dispc_cinfo.pck_div;
319 static int dpi_set_mode(struct dpi_data *dpi)
321 struct omap_dss_device *out = &dpi->output;
322 struct omap_overlay_manager *mgr = out->manager;
323 struct omap_video_timings *t = &dpi->timings;
324 int lck_div = 0, pck_div = 0;
325 unsigned long fck = 0;
330 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
333 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
338 pck = fck / lck_div / pck_div;
340 if (pck != t->pixelclock) {
341 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
347 dss_mgr_set_timings(mgr, t);
352 static void dpi_config_lcd_manager(struct dpi_data *dpi)
354 struct omap_dss_device *out = &dpi->output;
355 struct omap_overlay_manager *mgr = out->manager;
357 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
359 dpi->mgr_config.stallmode = false;
360 dpi->mgr_config.fifohandcheck = false;
362 dpi->mgr_config.video_port_width = dpi->data_lines;
364 dpi->mgr_config.lcden_sig_polarity = 0;
366 dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
369 static int dpi_display_enable(struct omap_dss_device *dssdev)
371 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
372 struct omap_dss_device *out = &dpi->output;
375 mutex_lock(&dpi->lock);
377 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
378 DSSERR("no VDSS_DSI regulator\n");
383 if (out == NULL || out->manager == NULL) {
384 DSSERR("failed to enable display: no output/manager\n");
389 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
390 r = regulator_enable(dpi->vdds_dsi_reg);
395 r = dispc_runtime_get();
399 r = dss_dpi_select_source(out->manager->id);
404 r = dsi_runtime_get(dpi->dsidev);
408 r = dsi_pll_init(dpi->dsidev, 0, 1);
410 goto err_dsi_pll_init;
413 r = dpi_set_mode(dpi);
417 dpi_config_lcd_manager(dpi);
421 r = dss_mgr_enable(out->manager);
425 mutex_unlock(&dpi->lock);
432 dsi_pll_uninit(dpi->dsidev, true);
435 dsi_runtime_put(dpi->dsidev);
440 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
441 regulator_disable(dpi->vdds_dsi_reg);
445 mutex_unlock(&dpi->lock);
449 static void dpi_display_disable(struct omap_dss_device *dssdev)
451 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
452 struct omap_overlay_manager *mgr = dpi->output.manager;
454 mutex_lock(&dpi->lock);
456 dss_mgr_disable(mgr);
459 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
460 dsi_pll_uninit(dpi->dsidev, true);
461 dsi_runtime_put(dpi->dsidev);
466 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
467 regulator_disable(dpi->vdds_dsi_reg);
469 mutex_unlock(&dpi->lock);
472 static void dpi_set_timings(struct omap_dss_device *dssdev,
473 struct omap_video_timings *timings)
475 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
477 DSSDBG("dpi_set_timings\n");
479 mutex_lock(&dpi->lock);
481 dpi->timings = *timings;
483 mutex_unlock(&dpi->lock);
486 static void dpi_get_timings(struct omap_dss_device *dssdev,
487 struct omap_video_timings *timings)
489 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
491 mutex_lock(&dpi->lock);
493 *timings = dpi->timings;
495 mutex_unlock(&dpi->lock);
498 static int dpi_check_timings(struct omap_dss_device *dssdev,
499 struct omap_video_timings *timings)
501 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
502 struct omap_overlay_manager *mgr = dpi->output.manager;
503 int lck_div, pck_div;
506 struct dpi_clk_calc_ctx ctx;
509 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
512 if (timings->pixelclock == 0)
516 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
520 fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
522 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
529 lck_div = ctx.dispc_cinfo.lck_div;
530 pck_div = ctx.dispc_cinfo.pck_div;
532 pck = fck / lck_div / pck_div;
534 timings->pixelclock = pck;
539 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
541 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
543 mutex_lock(&dpi->lock);
545 dpi->data_lines = data_lines;
547 mutex_unlock(&dpi->lock);
550 static int dpi_verify_dsi_pll(struct platform_device *dsidev)
554 /* do initial setup with the PLL to see if it is operational */
556 r = dsi_runtime_get(dsidev);
560 r = dsi_pll_init(dsidev, 0, 1);
562 dsi_runtime_put(dsidev);
566 dsi_pll_uninit(dsidev, true);
567 dsi_runtime_put(dsidev);
572 static int dpi_init_regulator(struct dpi_data *dpi)
574 struct regulator *vdds_dsi;
576 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
579 if (dpi->vdds_dsi_reg)
582 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
583 if (IS_ERR(vdds_dsi)) {
584 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
585 DSSERR("can't get VDDS_DSI regulator\n");
586 return PTR_ERR(vdds_dsi);
589 dpi->vdds_dsi_reg = vdds_dsi;
594 static void dpi_init_pll(struct dpi_data *dpi)
596 struct platform_device *dsidev;
601 dsidev = dpi_get_dsidev(dpi->output.dispc_channel);
605 if (dpi_verify_dsi_pll(dsidev)) {
606 DSSWARN("DSI PLL not operational\n");
610 dpi->dsidev = dsidev;
614 * Return a hardcoded channel for the DPI output. This should work for
615 * current use cases, but this can be later expanded to either resolve
616 * the channel in some more dynamic manner, or get the channel as a user
619 static enum omap_channel dpi_get_channel(void)
621 switch (omapdss_get_version()) {
622 case OMAPDSS_VER_OMAP24xx:
623 case OMAPDSS_VER_OMAP34xx_ES1:
624 case OMAPDSS_VER_OMAP34xx_ES3:
625 case OMAPDSS_VER_OMAP3630:
626 case OMAPDSS_VER_AM35xx:
627 case OMAPDSS_VER_AM43xx:
628 return OMAP_DSS_CHANNEL_LCD;
630 case OMAPDSS_VER_OMAP4430_ES1:
631 case OMAPDSS_VER_OMAP4430_ES2:
632 case OMAPDSS_VER_OMAP4:
633 return OMAP_DSS_CHANNEL_LCD2;
635 case OMAPDSS_VER_OMAP5:
636 return OMAP_DSS_CHANNEL_LCD3;
639 DSSWARN("unsupported DSS version\n");
640 return OMAP_DSS_CHANNEL_LCD;
644 static int dpi_connect(struct omap_dss_device *dssdev,
645 struct omap_dss_device *dst)
647 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
648 struct omap_overlay_manager *mgr;
651 r = dpi_init_regulator(dpi);
657 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
661 r = dss_mgr_connect(mgr, dssdev);
665 r = omapdss_output_set_device(dssdev, dst);
667 DSSERR("failed to connect output to new device: %s\n",
669 dss_mgr_disconnect(mgr, dssdev);
676 static void dpi_disconnect(struct omap_dss_device *dssdev,
677 struct omap_dss_device *dst)
679 WARN_ON(dst != dssdev->dst);
681 if (dst != dssdev->dst)
684 omapdss_output_unset_device(dssdev);
687 dss_mgr_disconnect(dssdev->manager, dssdev);
690 static const struct omapdss_dpi_ops dpi_ops = {
691 .connect = dpi_connect,
692 .disconnect = dpi_disconnect,
694 .enable = dpi_display_enable,
695 .disable = dpi_display_disable,
697 .check_timings = dpi_check_timings,
698 .set_timings = dpi_set_timings,
699 .get_timings = dpi_get_timings,
701 .set_data_lines = dpi_set_data_lines,
704 static void dpi_init_output(struct platform_device *pdev)
706 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
707 struct omap_dss_device *out = &dpi->output;
709 out->dev = &pdev->dev;
710 out->id = OMAP_DSS_OUTPUT_DPI;
711 out->output_type = OMAP_DISPLAY_TYPE_DPI;
713 out->dispc_channel = dpi_get_channel();
714 out->ops.dpi = &dpi_ops;
715 out->owner = THIS_MODULE;
717 omapdss_register_output(out);
720 static void __exit dpi_uninit_output(struct platform_device *pdev)
722 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
723 struct omap_dss_device *out = &dpi->output;
725 omapdss_unregister_output(out);
728 static void dpi_init_output_port(struct platform_device *pdev,
729 struct device_node *port)
731 struct dpi_data *dpi = port->data;
732 struct omap_dss_device *out = &dpi->output;
734 out->dev = &pdev->dev;
735 out->id = OMAP_DSS_OUTPUT_DPI;
736 out->output_type = OMAP_DISPLAY_TYPE_DPI;
737 out->dispc_channel = dpi_get_channel();
738 out->ops.dpi = &dpi_ops;
739 out->owner = THIS_MODULE;
741 omapdss_register_output(out);
744 static void __exit dpi_uninit_output_port(struct device_node *port)
746 struct dpi_data *dpi = port->data;
747 struct omap_dss_device *out = &dpi->output;
749 omapdss_unregister_output(out);
752 static int omap_dpi_probe(struct platform_device *pdev)
754 struct dpi_data *dpi;
756 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
762 dev_set_drvdata(&pdev->dev, dpi);
764 mutex_init(&dpi->lock);
766 dpi_init_output(pdev);
771 static int __exit omap_dpi_remove(struct platform_device *pdev)
773 dpi_uninit_output(pdev);
778 static struct platform_driver omap_dpi_driver = {
779 .probe = omap_dpi_probe,
780 .remove = __exit_p(omap_dpi_remove),
782 .name = "omapdss_dpi",
783 .owner = THIS_MODULE,
784 .suppress_bind_attrs = true,
788 int __init dpi_init_platform_driver(void)
790 return platform_driver_register(&omap_dpi_driver);
793 void __exit dpi_uninit_platform_driver(void)
795 platform_driver_unregister(&omap_dpi_driver);
798 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
800 struct dpi_data *dpi;
801 struct device_node *ep;
805 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
809 ep = omapdss_of_get_next_endpoint(port, NULL);
813 r = of_property_read_u32(ep, "data-lines", &datalines);
815 DSSERR("failed to parse datalines\n");
819 dpi->data_lines = datalines;
826 mutex_init(&dpi->lock);
828 dpi_init_output_port(pdev, port);
830 dpi->port_initialized = true;
840 void __exit dpi_uninit_port(struct device_node *port)
842 struct dpi_data *dpi = port->data;
844 if (!dpi->port_initialized)
847 dpi_uninit_output_port(port);