2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
35 #include <video/omapdss.h>
38 #include "dss_features.h"
41 struct platform_device *pdev;
43 struct regulator *vdds_dsi_reg;
44 struct platform_device *dsidev;
48 struct omap_video_timings timings;
49 struct dss_lcd_mgr_config mgr_config;
52 struct omap_dss_device output;
54 bool port_initialized;
57 static struct dpi_data dpi_data;
59 static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
62 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
63 * would also be used for DISPC fclk. Meaning, when the DPI output is
64 * disabled, DISPC clock will be disabled, and TV out will stop.
66 switch (omapdss_get_version()) {
67 case OMAPDSS_VER_OMAP24xx:
68 case OMAPDSS_VER_OMAP34xx_ES1:
69 case OMAPDSS_VER_OMAP34xx_ES3:
70 case OMAPDSS_VER_OMAP3630:
71 case OMAPDSS_VER_AM35xx:
72 case OMAPDSS_VER_AM43xx:
75 case OMAPDSS_VER_OMAP4430_ES1:
76 case OMAPDSS_VER_OMAP4430_ES2:
77 case OMAPDSS_VER_OMAP4:
79 case OMAP_DSS_CHANNEL_LCD:
80 return dsi_get_dsidev_from_id(0);
81 case OMAP_DSS_CHANNEL_LCD2:
82 return dsi_get_dsidev_from_id(1);
87 case OMAPDSS_VER_OMAP5:
89 case OMAP_DSS_CHANNEL_LCD:
90 return dsi_get_dsidev_from_id(0);
91 case OMAP_DSS_CHANNEL_LCD3:
92 return dsi_get_dsidev_from_id(1);
102 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
105 case OMAP_DSS_CHANNEL_LCD:
106 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
107 case OMAP_DSS_CHANNEL_LCD2:
108 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
109 case OMAP_DSS_CHANNEL_LCD3:
110 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
112 /* this shouldn't happen */
114 return OMAP_DSS_CLK_SRC_FCK;
118 struct dpi_clk_calc_ctx {
119 struct platform_device *dsidev;
123 unsigned long pck_min, pck_max;
127 struct dsi_clock_info dsi_cinfo;
129 struct dispc_clock_info dispc_cinfo;
132 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
133 unsigned long pck, void *data)
135 struct dpi_clk_calc_ctx *ctx = data;
138 * Odd dividers give us uneven duty cycle, causing problem when level
139 * shifted. So skip all odd dividers when the pixel clock is on the
142 if (ctx->pck_min >= 100000000) {
143 if (lckd > 1 && lckd % 2 != 0)
146 if (pckd > 1 && pckd % 2 != 0)
150 ctx->dispc_cinfo.lck_div = lckd;
151 ctx->dispc_cinfo.pck_div = pckd;
152 ctx->dispc_cinfo.lck = lck;
153 ctx->dispc_cinfo.pck = pck;
159 static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
162 struct dpi_clk_calc_ctx *ctx = data;
165 * Odd dividers give us uneven duty cycle, causing problem when level
166 * shifted. So skip all odd dividers when the pixel clock is on the
169 if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
172 ctx->dsi_cinfo.regm_dispc = regm_dispc;
173 ctx->dsi_cinfo.dsi_pll_hsdiv_dispc_clk = dispc;
175 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
176 dpi_calc_dispc_cb, ctx);
180 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint,
184 struct dpi_clk_calc_ctx *ctx = data;
186 ctx->dsi_cinfo.regn = regn;
187 ctx->dsi_cinfo.regm = regm;
188 ctx->dsi_cinfo.fint = fint;
189 ctx->dsi_cinfo.clkin4ddr = pll;
191 return dsi_hsdiv_calc(ctx->dsidev, pll, ctx->pck_min,
192 dpi_calc_hsdiv_cb, ctx);
195 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
197 struct dpi_clk_calc_ctx *ctx = data;
201 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
202 dpi_calc_dispc_cb, ctx);
205 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
206 struct dpi_clk_calc_ctx *ctx)
209 unsigned long pll_min, pll_max;
211 clkin = dsi_get_pll_clkin(dpi->dsidev);
213 memset(ctx, 0, sizeof(*ctx));
214 ctx->dsidev = dpi->dsidev;
215 ctx->pck_min = pck - 1000;
216 ctx->pck_max = pck + 1000;
217 ctx->dsi_cinfo.clkin = clkin;
222 return dsi_pll_calc(dpi->dsidev, clkin,
224 dpi_calc_pll_cb, ctx);
227 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
232 * DSS fck gives us very few possibilities, so finding a good pixel
233 * clock may not be possible. We try multiple times to find the clock,
234 * each time widening the pixel clock range we look for, up to
238 for (i = 0; i < 25; ++i) {
241 memset(ctx, 0, sizeof(*ctx));
242 if (pck > 1000 * i * i * i)
243 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
246 ctx->pck_max = pck + 1000 * i * i * i;
248 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
258 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
259 unsigned long pck_req, unsigned long *fck, int *lck_div,
262 struct dpi_clk_calc_ctx ctx;
266 ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
270 r = dsi_pll_set_clock_div(dpi->dsidev, &ctx.dsi_cinfo);
274 dss_select_lcd_clk_source(channel,
275 dpi_get_alt_clk_src(channel));
277 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
279 *fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
280 *lck_div = ctx.dispc_cinfo.lck_div;
281 *pck_div = ctx.dispc_cinfo.pck_div;
286 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
287 unsigned long *fck, int *lck_div, int *pck_div)
289 struct dpi_clk_calc_ctx ctx;
293 ok = dpi_dss_clk_calc(pck_req, &ctx);
297 r = dss_set_fck_rate(ctx.fck);
301 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
304 *lck_div = ctx.dispc_cinfo.lck_div;
305 *pck_div = ctx.dispc_cinfo.pck_div;
310 static int dpi_set_mode(struct dpi_data *dpi)
312 struct omap_dss_device *out = &dpi->output;
313 struct omap_overlay_manager *mgr = out->manager;
314 struct omap_video_timings *t = &dpi->timings;
315 int lck_div = 0, pck_div = 0;
316 unsigned long fck = 0;
321 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
324 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
329 pck = fck / lck_div / pck_div;
331 if (pck != t->pixelclock) {
332 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
338 dss_mgr_set_timings(mgr, t);
343 static void dpi_config_lcd_manager(struct dpi_data *dpi)
345 struct omap_dss_device *out = &dpi->output;
346 struct omap_overlay_manager *mgr = out->manager;
348 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
350 dpi->mgr_config.stallmode = false;
351 dpi->mgr_config.fifohandcheck = false;
353 dpi->mgr_config.video_port_width = dpi->data_lines;
355 dpi->mgr_config.lcden_sig_polarity = 0;
357 dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
360 static int dpi_display_enable(struct omap_dss_device *dssdev)
362 struct dpi_data *dpi = &dpi_data;
363 struct omap_dss_device *out = &dpi->output;
366 mutex_lock(&dpi->lock);
368 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
369 DSSERR("no VDSS_DSI regulator\n");
374 if (out == NULL || out->manager == NULL) {
375 DSSERR("failed to enable display: no output/manager\n");
380 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
381 r = regulator_enable(dpi->vdds_dsi_reg);
386 r = dispc_runtime_get();
390 r = dss_dpi_select_source(out->manager->id);
395 r = dsi_runtime_get(dpi->dsidev);
399 r = dsi_pll_init(dpi->dsidev, 0, 1);
401 goto err_dsi_pll_init;
404 r = dpi_set_mode(dpi);
408 dpi_config_lcd_manager(dpi);
412 r = dss_mgr_enable(out->manager);
416 mutex_unlock(&dpi->lock);
423 dsi_pll_uninit(dpi->dsidev, true);
426 dsi_runtime_put(dpi->dsidev);
431 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
432 regulator_disable(dpi->vdds_dsi_reg);
436 mutex_unlock(&dpi->lock);
440 static void dpi_display_disable(struct omap_dss_device *dssdev)
442 struct dpi_data *dpi = &dpi_data;
443 struct omap_overlay_manager *mgr = dpi->output.manager;
445 mutex_lock(&dpi->lock);
447 dss_mgr_disable(mgr);
450 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
451 dsi_pll_uninit(dpi->dsidev, true);
452 dsi_runtime_put(dpi->dsidev);
457 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
458 regulator_disable(dpi->vdds_dsi_reg);
460 mutex_unlock(&dpi->lock);
463 static void dpi_set_timings(struct omap_dss_device *dssdev,
464 struct omap_video_timings *timings)
466 struct dpi_data *dpi = &dpi_data;
468 DSSDBG("dpi_set_timings\n");
470 mutex_lock(&dpi->lock);
472 dpi->timings = *timings;
474 mutex_unlock(&dpi->lock);
477 static void dpi_get_timings(struct omap_dss_device *dssdev,
478 struct omap_video_timings *timings)
480 struct dpi_data *dpi = &dpi_data;
482 mutex_lock(&dpi->lock);
484 *timings = dpi->timings;
486 mutex_unlock(&dpi->lock);
489 static int dpi_check_timings(struct omap_dss_device *dssdev,
490 struct omap_video_timings *timings)
492 struct dpi_data *dpi = &dpi_data;
493 struct omap_overlay_manager *mgr = dpi->output.manager;
494 int lck_div, pck_div;
497 struct dpi_clk_calc_ctx ctx;
500 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
503 if (timings->pixelclock == 0)
507 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
511 fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
513 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
520 lck_div = ctx.dispc_cinfo.lck_div;
521 pck_div = ctx.dispc_cinfo.pck_div;
523 pck = fck / lck_div / pck_div;
525 timings->pixelclock = pck;
530 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
532 struct dpi_data *dpi = &dpi_data;
534 mutex_lock(&dpi->lock);
536 dpi->data_lines = data_lines;
538 mutex_unlock(&dpi->lock);
541 static int dpi_verify_dsi_pll(struct platform_device *dsidev)
545 /* do initial setup with the PLL to see if it is operational */
547 r = dsi_runtime_get(dsidev);
551 r = dsi_pll_init(dsidev, 0, 1);
553 dsi_runtime_put(dsidev);
557 dsi_pll_uninit(dsidev, true);
558 dsi_runtime_put(dsidev);
563 static int dpi_init_regulator(struct dpi_data *dpi)
565 struct regulator *vdds_dsi;
567 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
570 if (dpi->vdds_dsi_reg)
573 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
574 if (IS_ERR(vdds_dsi)) {
575 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
576 DSSERR("can't get VDDS_DSI regulator\n");
577 return PTR_ERR(vdds_dsi);
580 dpi->vdds_dsi_reg = vdds_dsi;
585 static void dpi_init_pll(struct dpi_data *dpi)
587 struct platform_device *dsidev;
592 dsidev = dpi_get_dsidev(dpi->output.dispc_channel);
596 if (dpi_verify_dsi_pll(dsidev)) {
597 DSSWARN("DSI PLL not operational\n");
601 dpi->dsidev = dsidev;
605 * Return a hardcoded channel for the DPI output. This should work for
606 * current use cases, but this can be later expanded to either resolve
607 * the channel in some more dynamic manner, or get the channel as a user
610 static enum omap_channel dpi_get_channel(void)
612 switch (omapdss_get_version()) {
613 case OMAPDSS_VER_OMAP24xx:
614 case OMAPDSS_VER_OMAP34xx_ES1:
615 case OMAPDSS_VER_OMAP34xx_ES3:
616 case OMAPDSS_VER_OMAP3630:
617 case OMAPDSS_VER_AM35xx:
618 case OMAPDSS_VER_AM43xx:
619 return OMAP_DSS_CHANNEL_LCD;
621 case OMAPDSS_VER_OMAP4430_ES1:
622 case OMAPDSS_VER_OMAP4430_ES2:
623 case OMAPDSS_VER_OMAP4:
624 return OMAP_DSS_CHANNEL_LCD2;
626 case OMAPDSS_VER_OMAP5:
627 return OMAP_DSS_CHANNEL_LCD3;
630 DSSWARN("unsupported DSS version\n");
631 return OMAP_DSS_CHANNEL_LCD;
635 static int dpi_connect(struct omap_dss_device *dssdev,
636 struct omap_dss_device *dst)
638 struct dpi_data *dpi = &dpi_data;
639 struct omap_overlay_manager *mgr;
642 r = dpi_init_regulator(dpi);
648 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
652 r = dss_mgr_connect(mgr, dssdev);
656 r = omapdss_output_set_device(dssdev, dst);
658 DSSERR("failed to connect output to new device: %s\n",
660 dss_mgr_disconnect(mgr, dssdev);
667 static void dpi_disconnect(struct omap_dss_device *dssdev,
668 struct omap_dss_device *dst)
670 WARN_ON(dst != dssdev->dst);
672 if (dst != dssdev->dst)
675 omapdss_output_unset_device(dssdev);
678 dss_mgr_disconnect(dssdev->manager, dssdev);
681 static const struct omapdss_dpi_ops dpi_ops = {
682 .connect = dpi_connect,
683 .disconnect = dpi_disconnect,
685 .enable = dpi_display_enable,
686 .disable = dpi_display_disable,
688 .check_timings = dpi_check_timings,
689 .set_timings = dpi_set_timings,
690 .get_timings = dpi_get_timings,
692 .set_data_lines = dpi_set_data_lines,
695 static void dpi_init_output(struct platform_device *pdev)
697 struct dpi_data *dpi = &dpi_data;
698 struct omap_dss_device *out = &dpi->output;
700 out->dev = &pdev->dev;
701 out->id = OMAP_DSS_OUTPUT_DPI;
702 out->output_type = OMAP_DISPLAY_TYPE_DPI;
704 out->dispc_channel = dpi_get_channel();
705 out->ops.dpi = &dpi_ops;
706 out->owner = THIS_MODULE;
708 omapdss_register_output(out);
711 static void __exit dpi_uninit_output(struct platform_device *pdev)
713 struct dpi_data *dpi = &dpi_data;
714 struct omap_dss_device *out = &dpi->output;
716 omapdss_unregister_output(out);
719 static int omap_dpi_probe(struct platform_device *pdev)
721 struct dpi_data *dpi = &dpi_data;
725 dev_set_drvdata(&pdev->dev, dpi);
727 mutex_init(&dpi->lock);
729 dpi_init_output(pdev);
734 static int __exit omap_dpi_remove(struct platform_device *pdev)
736 dpi_uninit_output(pdev);
741 static struct platform_driver omap_dpi_driver = {
742 .probe = omap_dpi_probe,
743 .remove = __exit_p(omap_dpi_remove),
745 .name = "omapdss_dpi",
746 .owner = THIS_MODULE,
747 .suppress_bind_attrs = true,
751 int __init dpi_init_platform_driver(void)
753 return platform_driver_register(&omap_dpi_driver);
756 void __exit dpi_uninit_platform_driver(void)
758 platform_driver_unregister(&omap_dpi_driver);
761 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
763 struct dpi_data *dpi = &dpi_data;
764 struct device_node *ep;
768 ep = omapdss_of_get_next_endpoint(port, NULL);
772 r = of_property_read_u32(ep, "data-lines", &datalines);
774 DSSERR("failed to parse datalines\n");
778 dpi->data_lines = datalines;
784 mutex_init(&dpi->lock);
786 dpi_init_output(pdev);
788 dpi->port_initialized = true;
798 void __exit dpi_uninit_port(void)
800 struct dpi_data *dpi = &dpi_data;
802 if (!dpi->port_initialized)
805 dpi_uninit_output(dpi->pdev);