OMAPDSS: DPI: Use DPI driver data
[firefly-linux-kernel-4.4.55.git] / drivers / video / fbdev / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
33 #include <linux/of.h>
34
35 #include <video/omapdss.h>
36
37 #include "dss.h"
38 #include "dss_features.h"
39
40 struct dpi_data {
41         struct platform_device *pdev;
42
43         struct regulator *vdds_dsi_reg;
44         struct platform_device *dsidev;
45
46         struct mutex lock;
47
48         struct omap_video_timings timings;
49         struct dss_lcd_mgr_config mgr_config;
50         int data_lines;
51
52         struct omap_dss_device output;
53
54         bool port_initialized;
55 };
56
57 static struct dpi_data dpi_data;
58
59 static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
60 {
61         /*
62          * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
63          * would also be used for DISPC fclk. Meaning, when the DPI output is
64          * disabled, DISPC clock will be disabled, and TV out will stop.
65          */
66         switch (omapdss_get_version()) {
67         case OMAPDSS_VER_OMAP24xx:
68         case OMAPDSS_VER_OMAP34xx_ES1:
69         case OMAPDSS_VER_OMAP34xx_ES3:
70         case OMAPDSS_VER_OMAP3630:
71         case OMAPDSS_VER_AM35xx:
72         case OMAPDSS_VER_AM43xx:
73                 return NULL;
74
75         case OMAPDSS_VER_OMAP4430_ES1:
76         case OMAPDSS_VER_OMAP4430_ES2:
77         case OMAPDSS_VER_OMAP4:
78                 switch (channel) {
79                 case OMAP_DSS_CHANNEL_LCD:
80                         return dsi_get_dsidev_from_id(0);
81                 case OMAP_DSS_CHANNEL_LCD2:
82                         return dsi_get_dsidev_from_id(1);
83                 default:
84                         return NULL;
85                 }
86
87         case OMAPDSS_VER_OMAP5:
88                 switch (channel) {
89                 case OMAP_DSS_CHANNEL_LCD:
90                         return dsi_get_dsidev_from_id(0);
91                 case OMAP_DSS_CHANNEL_LCD3:
92                         return dsi_get_dsidev_from_id(1);
93                 default:
94                         return NULL;
95                 }
96
97         default:
98                 return NULL;
99         }
100 }
101
102 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
103 {
104         switch (channel) {
105         case OMAP_DSS_CHANNEL_LCD:
106                 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
107         case OMAP_DSS_CHANNEL_LCD2:
108                 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
109         case OMAP_DSS_CHANNEL_LCD3:
110                 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
111         default:
112                 /* this shouldn't happen */
113                 WARN_ON(1);
114                 return OMAP_DSS_CLK_SRC_FCK;
115         }
116 }
117
118 struct dpi_clk_calc_ctx {
119         struct platform_device *dsidev;
120
121         /* inputs */
122
123         unsigned long pck_min, pck_max;
124
125         /* outputs */
126
127         struct dsi_clock_info dsi_cinfo;
128         unsigned long fck;
129         struct dispc_clock_info dispc_cinfo;
130 };
131
132 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
133                 unsigned long pck, void *data)
134 {
135         struct dpi_clk_calc_ctx *ctx = data;
136
137         /*
138          * Odd dividers give us uneven duty cycle, causing problem when level
139          * shifted. So skip all odd dividers when the pixel clock is on the
140          * higher side.
141          */
142         if (ctx->pck_min >= 100000000) {
143                 if (lckd > 1 && lckd % 2 != 0)
144                         return false;
145
146                 if (pckd > 1 && pckd % 2 != 0)
147                         return false;
148         }
149
150         ctx->dispc_cinfo.lck_div = lckd;
151         ctx->dispc_cinfo.pck_div = pckd;
152         ctx->dispc_cinfo.lck = lck;
153         ctx->dispc_cinfo.pck = pck;
154
155         return true;
156 }
157
158
159 static bool dpi_calc_hsdiv_cb(int regm_dispc, unsigned long dispc,
160                 void *data)
161 {
162         struct dpi_clk_calc_ctx *ctx = data;
163
164         /*
165          * Odd dividers give us uneven duty cycle, causing problem when level
166          * shifted. So skip all odd dividers when the pixel clock is on the
167          * higher side.
168          */
169         if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
170                 return false;
171
172         ctx->dsi_cinfo.regm_dispc = regm_dispc;
173         ctx->dsi_cinfo.dsi_pll_hsdiv_dispc_clk = dispc;
174
175         return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
176                         dpi_calc_dispc_cb, ctx);
177 }
178
179
180 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint,
181                 unsigned long pll,
182                 void *data)
183 {
184         struct dpi_clk_calc_ctx *ctx = data;
185
186         ctx->dsi_cinfo.regn = regn;
187         ctx->dsi_cinfo.regm = regm;
188         ctx->dsi_cinfo.fint = fint;
189         ctx->dsi_cinfo.clkin4ddr = pll;
190
191         return dsi_hsdiv_calc(ctx->dsidev, pll, ctx->pck_min,
192                         dpi_calc_hsdiv_cb, ctx);
193 }
194
195 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
196 {
197         struct dpi_clk_calc_ctx *ctx = data;
198
199         ctx->fck = fck;
200
201         return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
202                         dpi_calc_dispc_cb, ctx);
203 }
204
205 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
206                 struct dpi_clk_calc_ctx *ctx)
207 {
208         unsigned long clkin;
209         unsigned long pll_min, pll_max;
210
211         clkin = dsi_get_pll_clkin(dpi->dsidev);
212
213         memset(ctx, 0, sizeof(*ctx));
214         ctx->dsidev = dpi->dsidev;
215         ctx->pck_min = pck - 1000;
216         ctx->pck_max = pck + 1000;
217         ctx->dsi_cinfo.clkin = clkin;
218
219         pll_min = 0;
220         pll_max = 0;
221
222         return dsi_pll_calc(dpi->dsidev, clkin,
223                         pll_min, pll_max,
224                         dpi_calc_pll_cb, ctx);
225 }
226
227 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
228 {
229         int i;
230
231         /*
232          * DSS fck gives us very few possibilities, so finding a good pixel
233          * clock may not be possible. We try multiple times to find the clock,
234          * each time widening the pixel clock range we look for, up to
235          * +/- ~15MHz.
236          */
237
238         for (i = 0; i < 25; ++i) {
239                 bool ok;
240
241                 memset(ctx, 0, sizeof(*ctx));
242                 if (pck > 1000 * i * i * i)
243                         ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
244                 else
245                         ctx->pck_min = 0;
246                 ctx->pck_max = pck + 1000 * i * i * i;
247
248                 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
249                 if (ok)
250                         return ok;
251         }
252
253         return false;
254 }
255
256
257
258 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
259                 unsigned long pck_req, unsigned long *fck, int *lck_div,
260                 int *pck_div)
261 {
262         struct dpi_clk_calc_ctx ctx;
263         int r;
264         bool ok;
265
266         ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
267         if (!ok)
268                 return -EINVAL;
269
270         r = dsi_pll_set_clock_div(dpi->dsidev, &ctx.dsi_cinfo);
271         if (r)
272                 return r;
273
274         dss_select_lcd_clk_source(channel,
275                         dpi_get_alt_clk_src(channel));
276
277         dpi->mgr_config.clock_info = ctx.dispc_cinfo;
278
279         *fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
280         *lck_div = ctx.dispc_cinfo.lck_div;
281         *pck_div = ctx.dispc_cinfo.pck_div;
282
283         return 0;
284 }
285
286 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
287                 unsigned long *fck, int *lck_div, int *pck_div)
288 {
289         struct dpi_clk_calc_ctx ctx;
290         int r;
291         bool ok;
292
293         ok = dpi_dss_clk_calc(pck_req, &ctx);
294         if (!ok)
295                 return -EINVAL;
296
297         r = dss_set_fck_rate(ctx.fck);
298         if (r)
299                 return r;
300
301         dpi->mgr_config.clock_info = ctx.dispc_cinfo;
302
303         *fck = ctx.fck;
304         *lck_div = ctx.dispc_cinfo.lck_div;
305         *pck_div = ctx.dispc_cinfo.pck_div;
306
307         return 0;
308 }
309
310 static int dpi_set_mode(struct dpi_data *dpi)
311 {
312         struct omap_dss_device *out = &dpi->output;
313         struct omap_overlay_manager *mgr = out->manager;
314         struct omap_video_timings *t = &dpi->timings;
315         int lck_div = 0, pck_div = 0;
316         unsigned long fck = 0;
317         unsigned long pck;
318         int r = 0;
319
320         if (dpi->dsidev)
321                 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
322                                 &lck_div, &pck_div);
323         else
324                 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
325                                 &lck_div, &pck_div);
326         if (r)
327                 return r;
328
329         pck = fck / lck_div / pck_div;
330
331         if (pck != t->pixelclock) {
332                 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
333                         t->pixelclock, pck);
334
335                 t->pixelclock = pck;
336         }
337
338         dss_mgr_set_timings(mgr, t);
339
340         return 0;
341 }
342
343 static void dpi_config_lcd_manager(struct dpi_data *dpi)
344 {
345         struct omap_dss_device *out = &dpi->output;
346         struct omap_overlay_manager *mgr = out->manager;
347
348         dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
349
350         dpi->mgr_config.stallmode = false;
351         dpi->mgr_config.fifohandcheck = false;
352
353         dpi->mgr_config.video_port_width = dpi->data_lines;
354
355         dpi->mgr_config.lcden_sig_polarity = 0;
356
357         dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
358 }
359
360 static int dpi_display_enable(struct omap_dss_device *dssdev)
361 {
362         struct dpi_data *dpi = &dpi_data;
363         struct omap_dss_device *out = &dpi->output;
364         int r;
365
366         mutex_lock(&dpi->lock);
367
368         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
369                 DSSERR("no VDSS_DSI regulator\n");
370                 r = -ENODEV;
371                 goto err_no_reg;
372         }
373
374         if (out == NULL || out->manager == NULL) {
375                 DSSERR("failed to enable display: no output/manager\n");
376                 r = -ENODEV;
377                 goto err_no_out_mgr;
378         }
379
380         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
381                 r = regulator_enable(dpi->vdds_dsi_reg);
382                 if (r)
383                         goto err_reg_enable;
384         }
385
386         r = dispc_runtime_get();
387         if (r)
388                 goto err_get_dispc;
389
390         r = dss_dpi_select_source(out->manager->id);
391         if (r)
392                 goto err_src_sel;
393
394         if (dpi->dsidev) {
395                 r = dsi_runtime_get(dpi->dsidev);
396                 if (r)
397                         goto err_get_dsi;
398
399                 r = dsi_pll_init(dpi->dsidev, 0, 1);
400                 if (r)
401                         goto err_dsi_pll_init;
402         }
403
404         r = dpi_set_mode(dpi);
405         if (r)
406                 goto err_set_mode;
407
408         dpi_config_lcd_manager(dpi);
409
410         mdelay(2);
411
412         r = dss_mgr_enable(out->manager);
413         if (r)
414                 goto err_mgr_enable;
415
416         mutex_unlock(&dpi->lock);
417
418         return 0;
419
420 err_mgr_enable:
421 err_set_mode:
422         if (dpi->dsidev)
423                 dsi_pll_uninit(dpi->dsidev, true);
424 err_dsi_pll_init:
425         if (dpi->dsidev)
426                 dsi_runtime_put(dpi->dsidev);
427 err_get_dsi:
428 err_src_sel:
429         dispc_runtime_put();
430 err_get_dispc:
431         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
432                 regulator_disable(dpi->vdds_dsi_reg);
433 err_reg_enable:
434 err_no_out_mgr:
435 err_no_reg:
436         mutex_unlock(&dpi->lock);
437         return r;
438 }
439
440 static void dpi_display_disable(struct omap_dss_device *dssdev)
441 {
442         struct dpi_data *dpi = &dpi_data;
443         struct omap_overlay_manager *mgr = dpi->output.manager;
444
445         mutex_lock(&dpi->lock);
446
447         dss_mgr_disable(mgr);
448
449         if (dpi->dsidev) {
450                 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
451                 dsi_pll_uninit(dpi->dsidev, true);
452                 dsi_runtime_put(dpi->dsidev);
453         }
454
455         dispc_runtime_put();
456
457         if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
458                 regulator_disable(dpi->vdds_dsi_reg);
459
460         mutex_unlock(&dpi->lock);
461 }
462
463 static void dpi_set_timings(struct omap_dss_device *dssdev,
464                 struct omap_video_timings *timings)
465 {
466         struct dpi_data *dpi = &dpi_data;
467
468         DSSDBG("dpi_set_timings\n");
469
470         mutex_lock(&dpi->lock);
471
472         dpi->timings = *timings;
473
474         mutex_unlock(&dpi->lock);
475 }
476
477 static void dpi_get_timings(struct omap_dss_device *dssdev,
478                 struct omap_video_timings *timings)
479 {
480         struct dpi_data *dpi = &dpi_data;
481
482         mutex_lock(&dpi->lock);
483
484         *timings = dpi->timings;
485
486         mutex_unlock(&dpi->lock);
487 }
488
489 static int dpi_check_timings(struct omap_dss_device *dssdev,
490                         struct omap_video_timings *timings)
491 {
492         struct dpi_data *dpi = &dpi_data;
493         struct omap_overlay_manager *mgr = dpi->output.manager;
494         int lck_div, pck_div;
495         unsigned long fck;
496         unsigned long pck;
497         struct dpi_clk_calc_ctx ctx;
498         bool ok;
499
500         if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
501                 return -EINVAL;
502
503         if (timings->pixelclock == 0)
504                 return -EINVAL;
505
506         if (dpi->dsidev) {
507                 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
508                 if (!ok)
509                         return -EINVAL;
510
511                 fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
512         } else {
513                 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
514                 if (!ok)
515                         return -EINVAL;
516
517                 fck = ctx.fck;
518         }
519
520         lck_div = ctx.dispc_cinfo.lck_div;
521         pck_div = ctx.dispc_cinfo.pck_div;
522
523         pck = fck / lck_div / pck_div;
524
525         timings->pixelclock = pck;
526
527         return 0;
528 }
529
530 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
531 {
532         struct dpi_data *dpi = &dpi_data;
533
534         mutex_lock(&dpi->lock);
535
536         dpi->data_lines = data_lines;
537
538         mutex_unlock(&dpi->lock);
539 }
540
541 static int dpi_verify_dsi_pll(struct platform_device *dsidev)
542 {
543         int r;
544
545         /* do initial setup with the PLL to see if it is operational */
546
547         r = dsi_runtime_get(dsidev);
548         if (r)
549                 return r;
550
551         r = dsi_pll_init(dsidev, 0, 1);
552         if (r) {
553                 dsi_runtime_put(dsidev);
554                 return r;
555         }
556
557         dsi_pll_uninit(dsidev, true);
558         dsi_runtime_put(dsidev);
559
560         return 0;
561 }
562
563 static int dpi_init_regulator(struct dpi_data *dpi)
564 {
565         struct regulator *vdds_dsi;
566
567         if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
568                 return 0;
569
570         if (dpi->vdds_dsi_reg)
571                 return 0;
572
573         vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
574         if (IS_ERR(vdds_dsi)) {
575                 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
576                         DSSERR("can't get VDDS_DSI regulator\n");
577                 return PTR_ERR(vdds_dsi);
578         }
579
580         dpi->vdds_dsi_reg = vdds_dsi;
581
582         return 0;
583 }
584
585 static void dpi_init_pll(struct dpi_data *dpi)
586 {
587         struct platform_device *dsidev;
588
589         if (dpi->dsidev)
590                 return;
591
592         dsidev = dpi_get_dsidev(dpi->output.dispc_channel);
593         if (!dsidev)
594                 return;
595
596         if (dpi_verify_dsi_pll(dsidev)) {
597                 DSSWARN("DSI PLL not operational\n");
598                 return;
599         }
600
601         dpi->dsidev = dsidev;
602 }
603
604 /*
605  * Return a hardcoded channel for the DPI output. This should work for
606  * current use cases, but this can be later expanded to either resolve
607  * the channel in some more dynamic manner, or get the channel as a user
608  * parameter.
609  */
610 static enum omap_channel dpi_get_channel(void)
611 {
612         switch (omapdss_get_version()) {
613         case OMAPDSS_VER_OMAP24xx:
614         case OMAPDSS_VER_OMAP34xx_ES1:
615         case OMAPDSS_VER_OMAP34xx_ES3:
616         case OMAPDSS_VER_OMAP3630:
617         case OMAPDSS_VER_AM35xx:
618         case OMAPDSS_VER_AM43xx:
619                 return OMAP_DSS_CHANNEL_LCD;
620
621         case OMAPDSS_VER_OMAP4430_ES1:
622         case OMAPDSS_VER_OMAP4430_ES2:
623         case OMAPDSS_VER_OMAP4:
624                 return OMAP_DSS_CHANNEL_LCD2;
625
626         case OMAPDSS_VER_OMAP5:
627                 return OMAP_DSS_CHANNEL_LCD3;
628
629         default:
630                 DSSWARN("unsupported DSS version\n");
631                 return OMAP_DSS_CHANNEL_LCD;
632         }
633 }
634
635 static int dpi_connect(struct omap_dss_device *dssdev,
636                 struct omap_dss_device *dst)
637 {
638         struct dpi_data *dpi = &dpi_data;
639         struct omap_overlay_manager *mgr;
640         int r;
641
642         r = dpi_init_regulator(dpi);
643         if (r)
644                 return r;
645
646         dpi_init_pll(dpi);
647
648         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
649         if (!mgr)
650                 return -ENODEV;
651
652         r = dss_mgr_connect(mgr, dssdev);
653         if (r)
654                 return r;
655
656         r = omapdss_output_set_device(dssdev, dst);
657         if (r) {
658                 DSSERR("failed to connect output to new device: %s\n",
659                                 dst->name);
660                 dss_mgr_disconnect(mgr, dssdev);
661                 return r;
662         }
663
664         return 0;
665 }
666
667 static void dpi_disconnect(struct omap_dss_device *dssdev,
668                 struct omap_dss_device *dst)
669 {
670         WARN_ON(dst != dssdev->dst);
671
672         if (dst != dssdev->dst)
673                 return;
674
675         omapdss_output_unset_device(dssdev);
676
677         if (dssdev->manager)
678                 dss_mgr_disconnect(dssdev->manager, dssdev);
679 }
680
681 static const struct omapdss_dpi_ops dpi_ops = {
682         .connect = dpi_connect,
683         .disconnect = dpi_disconnect,
684
685         .enable = dpi_display_enable,
686         .disable = dpi_display_disable,
687
688         .check_timings = dpi_check_timings,
689         .set_timings = dpi_set_timings,
690         .get_timings = dpi_get_timings,
691
692         .set_data_lines = dpi_set_data_lines,
693 };
694
695 static void dpi_init_output(struct platform_device *pdev)
696 {
697         struct dpi_data *dpi = &dpi_data;
698         struct omap_dss_device *out = &dpi->output;
699
700         out->dev = &pdev->dev;
701         out->id = OMAP_DSS_OUTPUT_DPI;
702         out->output_type = OMAP_DISPLAY_TYPE_DPI;
703         out->name = "dpi.0";
704         out->dispc_channel = dpi_get_channel();
705         out->ops.dpi = &dpi_ops;
706         out->owner = THIS_MODULE;
707
708         omapdss_register_output(out);
709 }
710
711 static void __exit dpi_uninit_output(struct platform_device *pdev)
712 {
713         struct dpi_data *dpi = &dpi_data;
714         struct omap_dss_device *out = &dpi->output;
715
716         omapdss_unregister_output(out);
717 }
718
719 static int omap_dpi_probe(struct platform_device *pdev)
720 {
721         struct dpi_data *dpi = &dpi_data;
722
723         dpi->pdev = pdev;
724
725         dev_set_drvdata(&pdev->dev, dpi);
726
727         mutex_init(&dpi->lock);
728
729         dpi_init_output(pdev);
730
731         return 0;
732 }
733
734 static int __exit omap_dpi_remove(struct platform_device *pdev)
735 {
736         dpi_uninit_output(pdev);
737
738         return 0;
739 }
740
741 static struct platform_driver omap_dpi_driver = {
742         .probe          = omap_dpi_probe,
743         .remove         = __exit_p(omap_dpi_remove),
744         .driver         = {
745                 .name   = "omapdss_dpi",
746                 .owner  = THIS_MODULE,
747                 .suppress_bind_attrs = true,
748         },
749 };
750
751 int __init dpi_init_platform_driver(void)
752 {
753         return platform_driver_register(&omap_dpi_driver);
754 }
755
756 void __exit dpi_uninit_platform_driver(void)
757 {
758         platform_driver_unregister(&omap_dpi_driver);
759 }
760
761 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
762 {
763         struct dpi_data *dpi = &dpi_data;
764         struct device_node *ep;
765         u32 datalines;
766         int r;
767
768         ep = omapdss_of_get_next_endpoint(port, NULL);
769         if (!ep)
770                 return 0;
771
772         r = of_property_read_u32(ep, "data-lines", &datalines);
773         if (r) {
774                 DSSERR("failed to parse datalines\n");
775                 goto err_datalines;
776         }
777
778         dpi->data_lines = datalines;
779
780         of_node_put(ep);
781
782         dpi->pdev = pdev;
783
784         mutex_init(&dpi->lock);
785
786         dpi_init_output(pdev);
787
788         dpi->port_initialized = true;
789
790         return 0;
791
792 err_datalines:
793         of_node_put(ep);
794
795         return r;
796 }
797
798 void __exit dpi_uninit_port(void)
799 {
800         struct dpi_data *dpi = &dpi_data;
801
802         if (!dpi->port_initialized)
803                 return;
804
805         dpi_uninit_output(dpi->pdev);
806 }