rk29 fix hdmi compile
[firefly-linux-kernel-4.4.55.git] / drivers / video / hdmi / hdmi-fb.c
1 #include <linux/console.h>
2 #include <linux/fb.h>
3
4 #include <linux/completion.h>
5 #include <linux/rk_screen.h>
6 #include <linux/hdmi.h>
7 #include "../rk29_fb.h"
8
9
10 /* Base */
11 #define LCD_ACLK                500000000// 312000000
12
13 #define OUT_TYPE                SCREEN_HDMI
14 #define OUT_FACE                OUT_P888
15 #define DCLK_POL                1
16 #define SWAP_RB                 0
17
18
19 /* 720p@50Hz Timing */
20 #define OUT_CLK0            74250000
21 #define H_PW0                   40
22 #define H_BP0                   220
23 #define H_VD0                   1280
24 #define H_FP0                   440
25 #define V_PW0                   5
26 #define V_BP0                   20
27 #define V_VD0                   720
28 #define V_FP0                   5
29
30 /* 720p@60Hz Timing */
31 #define OUT_CLK1                74250000
32 #define H_PW1                   40
33 #define H_BP1                   220
34 #define H_VD1                   1280
35 #define H_FP1                   110
36 #define V_PW1                   5
37 #define V_BP1                   20
38 #define V_VD1                   720
39 #define V_FP1                   5
40
41 /* 576p@50Hz Timing */
42 #define OUT_CLK2                27000000
43 #define H_PW2                   64
44 #define H_BP2                   68
45 #define H_VD2                   720
46 #define H_FP2                   12
47 #define V_PW2                   5
48 #define V_BP2                   39
49 #define V_VD2                   576
50 #define V_FP2                   5
51
52 /* 720x480p@60Hz Timing */
53 #define OUT_CLK3                27000000
54 #define H_PW3                   62
55 #define H_BP3                   60
56 #define H_VD3                   720
57 #define H_FP3                   16
58 #define V_PW3                   6
59 #define V_BP3                   30
60 #define V_VD3                   480
61 #define V_FP3                   9
62
63 /* 1080p@50Hz Timing */
64 #define OUT_CLK5                148500000
65 #define H_PW4                   44
66 #define H_BP4                   148
67 #define H_VD4                   1920
68 #define H_FP4                   528
69 #define V_PW4                   5
70 #define V_BP4                   36
71 #define V_VD4                   1080
72 #define V_FP4                   4
73
74 /* 1080p@60Hz Timing */
75 #define OUT_CLK4                148500000
76 #define H_PW5                   44
77 #define H_BP5                   148
78 #define H_VD5                   1920
79 #define H_FP5                   88
80 #define V_PW5                   5
81 #define V_BP5                   36
82 #define V_VD5                   1080
83 #define V_FP5                   4
84
85
86 extern int FB_Switch_Screen( struct rk29fb_screen *screen, u32 enable );
87
88 static int anx7150_init(void)
89 {
90     return 0;
91 }
92
93 static int anx7150_standby(u8 enable)
94 {
95     return 0;
96 }
97
98
99 struct rk29fb_screen hdmi_info[] = {
100         {
101             .hdmi_resolution = HDMI_1280x720p_50Hz,
102                 .type = OUT_TYPE,
103                 .face = OUT_FACE,
104                 .x_res = H_VD0,
105                 .y_res = V_VD0,
106                 .pixclock = OUT_CLK0,
107                 .lcdc_aclk = LCD_ACLK,
108                 .left_margin = H_BP0,
109                 .right_margin = H_FP0,
110                 .hsync_len = H_PW0,
111                 .upper_margin = V_BP0,
112                 .lower_margin = V_FP0,
113                 .vsync_len = V_PW0,
114                 .pin_hsync = 1,
115                 .pin_vsync = 1,
116                 .pin_den = 0,
117                 .pin_dclk = DCLK_POL,
118                 .swap_rb = SWAP_RB,
119                 .swap_rg = 0,
120                 .swap_gb = 0,
121                 .swap_delta = 0,
122                 .swap_dumy = 0,
123                 .init = anx7150_init,
124                 .standby = anx7150_standby,     
125         },              //HDMI_1280x720p_50Hz
126         {
127             .hdmi_resolution = HDMI_1280x720p_60Hz,
128                 .type = OUT_TYPE,
129                 .face = OUT_FACE,
130                 .x_res = H_VD1,
131                 .y_res = V_VD1,
132                 .pixclock = OUT_CLK1,
133                 .lcdc_aclk = LCD_ACLK,
134                 .left_margin = H_BP1,
135                 .right_margin = H_FP1,
136                 .hsync_len = H_PW1,
137                 .upper_margin = V_BP1,
138                 .lower_margin = V_FP1,
139                 .vsync_len = V_PW1,
140                 .pin_hsync = 1,
141                 .pin_vsync = 1,
142                 .pin_den = 0,
143                 .pin_dclk = DCLK_POL,
144                 .swap_rb = SWAP_RB,
145                 .swap_rg = 0,
146                 .swap_gb = 0,
147                 .swap_delta = 0,
148                 .swap_dumy = 0,
149                 .init = anx7150_init,
150                 .standby = anx7150_standby,     
151         },              //HDMI_1280x720p_60Hz   
152         {
153             .hdmi_resolution = HDMI_720x576p_50Hz_4x3,
154                 .type = OUT_TYPE,
155                 .face = OUT_FACE,
156                 .x_res = H_VD2,
157                 .y_res = V_VD2,
158                 .pixclock = OUT_CLK2,
159                 .lcdc_aclk = LCD_ACLK,
160                 .left_margin = H_BP2,
161                 .right_margin = H_FP2,
162                 .hsync_len = H_PW2,
163                 .upper_margin = V_BP2,
164                 .lower_margin = V_FP2,
165                 .vsync_len = V_PW2,
166                 .pin_hsync = 0,
167                 .pin_vsync = 0,
168                 .pin_den = 0,
169                 .pin_dclk = DCLK_POL,
170                 .swap_rb = SWAP_RB,
171                 .swap_rg = 0,
172                 .swap_gb = 0,
173                 .swap_delta = 0,
174                 .swap_dumy = 0,
175                 .init = anx7150_init,
176                 .standby = anx7150_standby,     
177         },              //HDMI_720x576p_50Hz_4x3
178         {
179             .hdmi_resolution = HDMI_720x576p_50Hz_16x9,
180                 .type = OUT_TYPE,
181                 .face = OUT_FACE,
182                 .x_res = H_VD2,
183                 .y_res = V_VD2,
184                 .pixclock = OUT_CLK2,
185                 .lcdc_aclk = LCD_ACLK,
186                 .left_margin = H_BP2,
187                 .right_margin = H_FP2,
188                 .hsync_len = H_PW2,
189                 .upper_margin = V_BP2,
190                 .lower_margin = V_FP2,
191                 .vsync_len = V_PW2,
192                 .pin_hsync = 0,
193                 .pin_vsync = 0,
194                 .pin_den = 0,
195                 .pin_dclk = DCLK_POL,
196                 .swap_rb = SWAP_RB,
197                 .swap_rg = 0,
198                 .swap_gb = 0,
199                 .swap_delta = 0,
200                 .swap_dumy = 0,
201                 .init = anx7150_init,
202                 .standby = anx7150_standby,     
203         },              //HDMI_720x576p_50Hz_16x9
204         {
205             .hdmi_resolution = HDMI_720x480p_60Hz_4x3,
206                 .type = OUT_TYPE,
207                 .face = OUT_FACE,
208                 .x_res = H_VD3,
209                 .y_res = V_VD3,
210                 .pixclock = OUT_CLK3,
211                 .lcdc_aclk = LCD_ACLK,
212                 .left_margin = H_BP3,
213                 .right_margin = H_FP3,
214                 .hsync_len = H_PW3,
215                 .upper_margin = V_BP3,
216                 .lower_margin = V_FP3,
217                 .vsync_len = V_PW3,
218                 .pin_hsync = 0,
219                 .pin_vsync = 0,
220                 .pin_den = 0,
221                 .pin_dclk = DCLK_POL,
222                 .swap_rb = SWAP_RB,
223                 .swap_rg = 0,
224                 .swap_gb = 0,
225                 .swap_delta = 0,
226                 .swap_dumy = 0,
227                 .init = anx7150_init,
228                 .standby = anx7150_standby,     
229         },              //HDMI_720x480p_60Hz_4x3
230         {
231             .hdmi_resolution = HDMI_720x480p_60Hz_16x9,
232                 .type = OUT_TYPE,
233                 .face = OUT_FACE,
234                 .x_res = H_VD3,
235                 .y_res = V_VD3,
236                 .pixclock = OUT_CLK3,
237                 .lcdc_aclk = LCD_ACLK,
238                 .left_margin = H_BP3,
239                 .right_margin = H_FP3,
240                 .hsync_len = H_PW3,
241                 .upper_margin = V_BP3,
242                 .lower_margin = V_FP3,
243                 .vsync_len = V_PW3,
244                 .pin_hsync = 0,
245                 .pin_vsync = 0,
246                 .pin_den = 0,
247                 .pin_dclk = DCLK_POL,
248                 .swap_rb = SWAP_RB,
249                 .swap_rg = 0,
250                 .swap_gb = 0,
251                 .swap_delta = 0,
252                 .swap_dumy = 0,
253                 .init = anx7150_init,
254                 .standby = anx7150_standby,     
255         },              //HDMI_720x480p_60Hz_16x9
256         {
257             .hdmi_resolution = HDMI_1920x1080p_50Hz,
258                 .type = OUT_TYPE,
259                 .face = OUT_FACE,
260                 .x_res = H_VD4,
261                 .y_res = V_VD4,
262                 .pixclock = OUT_CLK4,
263                 .lcdc_aclk = LCD_ACLK,
264                 .left_margin = H_BP4,
265                 .right_margin = H_FP4,
266                 .hsync_len = H_PW4,
267                 .upper_margin = V_BP4,
268                 .lower_margin = V_FP4,
269                 .vsync_len = V_PW4,
270                 .pin_hsync = 1,
271                 .pin_vsync = 1,
272                 .pin_den = 0,
273                 .pin_dclk = DCLK_POL,
274                 .swap_rb = SWAP_RB,
275                 .swap_rg = 0,
276                 .swap_gb = 0,
277                 .swap_delta = 0,
278                 .swap_dumy = 0,
279                 .init = anx7150_init,
280                 .standby = anx7150_standby,     
281         },              //HDMI_1920x1080p_50Hz
282         {
283             .hdmi_resolution = HDMI_1920x1080p_60Hz,
284                 .type = OUT_TYPE,
285                 .face = OUT_FACE,
286                 .x_res = H_VD5,
287                 .y_res = V_VD5,
288                 .pixclock = OUT_CLK5,
289                 .lcdc_aclk = LCD_ACLK,
290                 .left_margin = H_BP5,
291                 .right_margin = H_FP5,
292                 .hsync_len = H_PW5,
293                 .upper_margin = V_BP5,
294                 .lower_margin = V_FP5,
295                 .vsync_len = V_PW5,
296                 .pin_hsync = 1,
297                 .pin_vsync = 1,
298                 .pin_den = 0,
299                 .pin_dclk = DCLK_POL,
300                 .swap_rb = SWAP_RB,
301                 .swap_rg = 0,
302                 .swap_gb = 0,
303                 .swap_delta = 0,
304                 .swap_dumy = 0,
305                 .init = anx7150_init,
306                 .standby = anx7150_standby,     
307         },              //HDMI_1920x1080p_60Hz
308 };
309
310 int hdmi_switch_fb(struct hdmi *hdmi, int type)
311 {
312         int rc = 0;
313         
314         switch(hdmi->resolution)
315         {
316                 case HDMI_1280x720p_50Hz:
317                         rc = FB_Switch_Screen(&hdmi_info[0], type);
318                         break;
319                 case HDMI_1280x720p_60Hz:
320                         rc = FB_Switch_Screen(&hdmi_info[1], type);
321                         break;
322                 case HDMI_720x576p_50Hz_4x3:
323                         rc = FB_Switch_Screen(&hdmi_info[2], type);
324                         break;
325                 case HDMI_720x576p_50Hz_16x9:
326                         rc = FB_Switch_Screen(&hdmi_info[3], type);
327                         break;
328                 case HDMI_720x480p_60Hz_4x3:
329                         rc = FB_Switch_Screen(&hdmi_info[4], type);
330                         break;
331                 case HDMI_720x480p_60Hz_16x9:
332                         rc = FB_Switch_Screen(&hdmi_info[5], type);
333                         break;
334                 case HDMI_1920x1080p_50Hz:
335                         rc = FB_Switch_Screen(&hdmi_info[6], type);
336                         break;
337                 case HDMI_1920x1080p_60Hz:
338                         rc = FB_Switch_Screen(&hdmi_info[7], type);
339                         break;
340                 default:
341                         rc = FB_Switch_Screen(&hdmi_info[0], type);
342                         break;          
343         }
344         if(hdmi->wait == 1) {
345                 complete(&hdmi->complete);
346                 hdmi->wait = 0;
347         }
348         return rc;
349 }