Merge branch 'develop-3.0' of ssh://192.168.1.29/rk/kernel into develop-3.0
[firefly-linux-kernel-4.4.55.git] / drivers / video / hdmi / hdmi-fb.c
1 #include <linux/console.h>
2 #include <linux/fb.h>
3
4 #include <linux/completion.h>
5 #include "../display/screen/screen.h"
6 #include <linux/hdmi.h>
7 #include "../rk29_fb.h"
8
9
10 /* Base */
11 #define LCD_ACLK                500000000// 312000000
12
13 #define OUT_TYPE                SCREEN_HDMI
14 #define OUT_FACE                OUT_P888
15 #define DCLK_POL                1
16 #define SWAP_RB                 0
17
18
19 /* 720p@50Hz Timing */
20 #define OUT_CLK0            74250000
21 #define H_PW0                   40
22 #define H_BP0                   220
23 #define H_VD0                   1280
24 #define H_FP0                   440
25 #define V_PW0                   5
26 #define V_BP0                   20
27 #define V_VD0                   720
28 #define V_FP0                   5
29
30 /* 720p@60Hz Timing */
31 #define OUT_CLK1                74250000
32 #define H_PW1                   40
33 #define H_BP1                   220
34 #define H_VD1                   1280
35 #define H_FP1                   110
36 #define V_PW1                   5
37 #define V_BP1                   20
38 #define V_VD1                   720
39 #define V_FP1                   5
40
41 /* 576p@50Hz Timing */
42 #define OUT_CLK2                27000000
43 #define H_PW2                   64
44 #define H_BP2                   68
45 #define H_VD2                   720
46 #define H_FP2                   12
47 #define V_PW2                   5
48 #define V_BP2                   39
49 #define V_VD2                   576
50 #define V_FP2                   5
51
52 /* 720x480p@60Hz Timing */
53 #define OUT_CLK3                27000000
54 #define H_PW3                   62
55 #define H_BP3                   60
56 #define H_VD3                   720
57 #define H_FP3                   16
58 #define V_PW3                   5
59 #define V_BP3                   35
60 #define V_VD3                   480
61 #define V_FP3                   5
62
63 /* 1080p@50Hz Timing */
64 #define OUT_CLK5                148500000
65 #define H_PW4                   44
66 #define H_BP4                   148
67 #define H_VD4                   1920
68 #define H_FP4                   528
69 #define V_PW4                   5
70 #define V_BP4                   35
71 #define V_VD4                   1080
72 #define V_FP4                   5
73
74 /* 1080p@60Hz Timing */
75 #define OUT_CLK4                148500000
76 #define H_PW5                   44
77 #define H_BP5                   148
78 #define H_VD5                   1920
79 #define H_FP5                   88
80 #define V_PW5                   5
81 #define V_BP5                   35
82 #define V_VD5                   1080
83 #define V_FP5                   5
84
85
86 extern int FB_Switch_Screen( struct rk29fb_screen *screen, u32 enable );
87
88 static int anx7150_init(void)
89 {
90     return 0;
91 }
92
93 static int anx7150_standby(u8 enable)
94 {
95     return 0;
96 }
97
98
99 struct rk29fb_screen hdmi_info[] = {
100         {
101                 .type = OUT_TYPE,
102                 .face = OUT_FACE,
103                 .x_res = H_VD0,
104                 .y_res = V_VD0,
105                 .pixclock = OUT_CLK0,
106                 .lcdc_aclk = LCD_ACLK,
107                 .left_margin = H_BP0,
108                 .right_margin = H_FP0,
109                 .hsync_len = H_PW0,
110                 .upper_margin = V_BP0,
111                 .lower_margin = V_FP0,
112                 .vsync_len = V_PW0,
113                 .pin_hsync = 1,
114                 .pin_vsync = 1,
115                 .pin_den = 0,
116                 .pin_dclk = DCLK_POL,
117                 .swap_rb = SWAP_RB,
118                 .swap_rg = 0,
119                 .swap_gb = 0,
120                 .swap_delta = 0,
121                 .swap_dumy = 0,
122                 .init = anx7150_init,
123                 .standby = anx7150_standby,     
124         },              //HDMI_1280x720p_50Hz
125         {
126                 .type = OUT_TYPE,
127                 .face = OUT_FACE,
128                 .x_res = H_VD1,
129                 .y_res = V_VD1,
130                 .pixclock = OUT_CLK1,
131                 .lcdc_aclk = LCD_ACLK,
132                 .left_margin = H_BP1,
133                 .right_margin = H_FP1,
134                 .hsync_len = H_PW1,
135                 .upper_margin = V_BP1,
136                 .lower_margin = V_FP1,
137                 .vsync_len = V_PW1,
138                 .pin_hsync = 1,
139                 .pin_vsync = 1,
140                 .pin_den = 0,
141                 .pin_dclk = DCLK_POL,
142                 .swap_rb = SWAP_RB,
143                 .swap_rg = 0,
144                 .swap_gb = 0,
145                 .swap_delta = 0,
146                 .swap_dumy = 0,
147                 .init = anx7150_init,
148                 .standby = anx7150_standby,     
149         },              //HDMI_1280x720p_60Hz   
150         {
151                 .type = OUT_TYPE,
152                 .face = OUT_FACE,
153                 .x_res = H_VD2,
154                 .y_res = V_VD2,
155                 .pixclock = OUT_CLK2,
156                 .lcdc_aclk = LCD_ACLK,
157                 .left_margin = H_BP2,
158                 .right_margin = H_FP2,
159                 .hsync_len = H_PW2,
160                 .upper_margin = V_BP2,
161                 .lower_margin = V_FP2,
162                 .vsync_len = V_PW2,
163                 .pin_hsync = 0,
164                 .pin_vsync = 0,
165                 .pin_den = 0,
166                 .pin_dclk = DCLK_POL,
167                 .swap_rb = SWAP_RB,
168                 .swap_rg = 0,
169                 .swap_gb = 0,
170                 .swap_delta = 0,
171                 .swap_dumy = 0,
172                 .init = anx7150_init,
173                 .standby = anx7150_standby,     
174         },              //HDMI_720x576p_50Hz_4x3
175         {
176                 .type = OUT_TYPE,
177                 .face = OUT_FACE,
178                 .x_res = H_VD2,
179                 .y_res = V_VD2,
180                 .pixclock = OUT_CLK2,
181                 .lcdc_aclk = LCD_ACLK,
182                 .left_margin = H_BP2,
183                 .right_margin = H_FP2,
184                 .hsync_len = H_PW2,
185                 .upper_margin = V_BP2,
186                 .lower_margin = V_FP2,
187                 .vsync_len = V_PW2,
188                 .pin_hsync = 0,
189                 .pin_vsync = 0,
190                 .pin_den = 0,
191                 .pin_dclk = DCLK_POL,
192                 .swap_rb = SWAP_RB,
193                 .swap_rg = 0,
194                 .swap_gb = 0,
195                 .swap_delta = 0,
196                 .swap_dumy = 0,
197                 .init = anx7150_init,
198                 .standby = anx7150_standby,     
199         },              //HDMI_720x576p_50Hz_16x9
200         {
201                 .type = OUT_TYPE,
202                 .face = OUT_FACE,
203                 .x_res = H_VD3,
204                 .y_res = V_VD3,
205                 .pixclock = OUT_CLK3,
206                 .lcdc_aclk = LCD_ACLK,
207                 .left_margin = H_BP3,
208                 .right_margin = H_FP3,
209                 .hsync_len = H_PW3,
210                 .upper_margin = V_BP3,
211                 .lower_margin = V_FP3,
212                 .vsync_len = V_PW3,
213                 .pin_hsync = 0,
214                 .pin_vsync = 0,
215                 .pin_den = 0,
216                 .pin_dclk = DCLK_POL,
217                 .swap_rb = SWAP_RB,
218                 .swap_rg = 0,
219                 .swap_gb = 0,
220                 .swap_delta = 0,
221                 .swap_dumy = 0,
222                 .init = anx7150_init,
223                 .standby = anx7150_standby,     
224         },              //HDMI_720x480p_60Hz_4x3
225         {
226                 .type = OUT_TYPE,
227                 .face = OUT_FACE,
228                 .x_res = H_VD3,
229                 .y_res = V_VD3,
230                 .pixclock = OUT_CLK3,
231                 .lcdc_aclk = LCD_ACLK,
232                 .left_margin = H_BP3,
233                 .right_margin = H_FP3,
234                 .hsync_len = H_PW3,
235                 .upper_margin = V_BP3,
236                 .lower_margin = V_FP3,
237                 .vsync_len = V_PW3,
238                 .pin_hsync = 0,
239                 .pin_vsync = 0,
240                 .pin_den = 0,
241                 .pin_dclk = DCLK_POL,
242                 .swap_rb = SWAP_RB,
243                 .swap_rg = 0,
244                 .swap_gb = 0,
245                 .swap_delta = 0,
246                 .swap_dumy = 0,
247                 .init = anx7150_init,
248                 .standby = anx7150_standby,     
249         },              //HDMI_720x480p_60Hz_16x9
250         {
251                 .type = OUT_TYPE,
252                 .face = OUT_FACE,
253                 .x_res = H_VD4,
254                 .y_res = V_VD4,
255                 .pixclock = OUT_CLK4,
256                 .lcdc_aclk = LCD_ACLK,
257                 .left_margin = H_BP4,
258                 .right_margin = H_FP4,
259                 .hsync_len = H_PW4,
260                 .upper_margin = V_BP4,
261                 .lower_margin = V_FP4,
262                 .vsync_len = V_PW4,
263                 .pin_hsync = 0,
264                 .pin_vsync = 0,
265                 .pin_den = 0,
266                 .pin_dclk = DCLK_POL,
267                 .swap_rb = SWAP_RB,
268                 .swap_rg = 0,
269                 .swap_gb = 0,
270                 .swap_delta = 0,
271                 .swap_dumy = 0,
272                 .init = anx7150_init,
273                 .standby = anx7150_standby,     
274         },              //HDMI_1920x1080p_50Hz
275         {
276                 .type = OUT_TYPE,
277                 .face = OUT_FACE,
278                 .x_res = H_VD5,
279                 .y_res = V_VD5,
280                 .pixclock = OUT_CLK5,
281                 .lcdc_aclk = LCD_ACLK,
282                 .left_margin = H_BP5,
283                 .right_margin = H_FP5,
284                 .hsync_len = H_PW5,
285                 .upper_margin = V_BP5,
286                 .lower_margin = V_FP5,
287                 .vsync_len = V_PW5,
288                 .pin_hsync = 0,
289                 .pin_vsync = 0,
290                 .pin_den = 0,
291                 .pin_dclk = DCLK_POL,
292                 .swap_rb = SWAP_RB,
293                 .swap_rg = 0,
294                 .swap_gb = 0,
295                 .swap_delta = 0,
296                 .swap_dumy = 0,
297                 .init = anx7150_init,
298                 .standby = anx7150_standby,     
299         },              //HDMI_1920x1080p_60Hz
300 };
301
302 int hdmi_switch_fb(struct hdmi *hdmi, int type)
303 {
304         int rc = 0;
305         
306         switch(hdmi->resolution)
307         {
308                 case HDMI_1280x720p_50Hz:
309                         rc = FB_Switch_Screen(&hdmi_info[0], type);
310                         break;
311                 case HDMI_1280x720p_60Hz:
312                         rc = FB_Switch_Screen(&hdmi_info[1], type);
313                         break;
314                 case HDMI_720x576p_50Hz_4x3:
315                         rc = FB_Switch_Screen(&hdmi_info[2], type);
316                         break;
317                 case HDMI_720x576p_50Hz_16x9:
318                         rc = FB_Switch_Screen(&hdmi_info[3], type);
319                         break;
320                 case HDMI_720x480p_60Hz_4x3:
321                         rc = FB_Switch_Screen(&hdmi_info[4], type);
322                         break;
323                 case HDMI_720x480p_60Hz_16x9:
324                         rc = FB_Switch_Screen(&hdmi_info[5], type);
325                         break;
326                 case HDMI_1920x1080p_50Hz:
327                         rc = FB_Switch_Screen(&hdmi_info[6], type);
328                         break;
329                 case HDMI_1920x1080p_60Hz:
330                         rc = FB_Switch_Screen(&hdmi_info[7], type);
331                         break;
332                 default:
333                         rc = FB_Switch_Screen(&hdmi_info[0], type);
334                         break;          
335         }
336         if(hdmi->wait == 1) {
337                 complete(&hdmi->complete);
338                 hdmi->wait = 0;
339         }
340         return rc;
341 }