2 tristate "OMAP2+ Display Subsystem support"
3 depends on ARCH_OMAP2PLUS
5 OMAP2+ Display Subsystem support.
9 config OMAP2_DSS_DEBUG_SUPPORT
13 This enables debug messages. You need to enable printing
14 with 'debug' module parameter.
16 config OMAP2_DSS_COLLECT_IRQ_STATS
17 bool "Collect DSS IRQ statistics"
18 depends on OMAP2_DSS_DEBUG_SUPPORT
21 Collect DSS IRQ statistics, printable via debugfs.
23 The statistics can be found from
24 <debugfs>/omapdss/dispc_irq for DISPC interrupts, and
25 <debugfs>/omapdss/dsi_irq for DSI interrupts.
31 DPI Interface. This is the Parallel Display Interface.
37 MIPI DBI support (RFBI, Remote Framebuffer Interface, in Texas
38 Instrument's terminology).
40 DBI is a bus between the host processor and a peripheral,
41 such as a display or a framebuffer chip.
43 See http://www.mipi.org/ for DBI specifications.
49 OMAP Video Encoder support for S-Video and composite TV-out.
56 HDMI Interface. This adds the High Definition Multimedia Interface.
57 See http://www.hdmi.org/ for HDMI specification.
59 config OMAP4_DSS_HDMI_AUDIO
61 depends on OMAP4_DSS_HDMI
68 SDI (Serial Display Interface) support.
70 SDI is a high speed one-way display serial bus between the host
71 processor and a display.
75 depends on ARCH_OMAP3 || ARCH_OMAP4 || ARCH_OMAP5
78 MIPI DSI (Display Serial Interface) support.
80 DSI is a high speed half-duplex serial interface between the host
81 processor and a peripheral, such as a display or a framebuffer chip.
83 See http://www.mipi.org/ for DSI specifications.
85 config OMAP2_DSS_MIN_FCK_PER_PCK
86 int "Minimum FCK/PCK ratio (for scaling)"
90 This can be used to adjust the minimum FCK/PCK ratio.
92 With this you can make sure that DISPC FCK is at least
93 n x PCK. Video plane scaling requires higher FCK than
96 If this is set to 0, there's no extra constraint on the
97 DISPC FCK. However, the FCK will at minimum be
98 2xPCK (if active matrix) or 3xPCK (if passive matrix).
100 Max FCK is 173MHz, so this doesn't work if your PCK
103 config OMAP2_DSS_SLEEP_AFTER_VENC_RESET
104 bool "Sleep 20ms after VENC reset"
107 There is a 20ms sleep after VENC reset which seemed to fix the
108 reset. The reason for the bug is unclear, and it's also unclear
109 on what platforms this happens.
111 This option enables the sleep, and is enabled by default. You can
112 disable the sleep if it doesn't cause problems on your platform.