2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
31 extern bool dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
38 #define DSSDBG(format, ...) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
51 #define DSSDBGF(format, ...) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
70 #define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
79 #define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
88 #define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
100 enum dss_io_pad_mode {
101 DSS_IO_PAD_MODE_RESET,
102 DSS_IO_PAD_MODE_RFBI,
103 DSS_IO_PAD_MODE_BYPASS,
106 enum dss_hdmi_venc_clk_source_select {
111 enum dss_dsi_content_type {
113 DSS_DSI_CONTENT_GENERIC,
116 struct dss_clock_info {
117 /* rates that we get with dividers below */
124 struct dispc_clock_info {
125 /* rates that we get with dividers below */
134 struct dsi_clock_info {
135 /* rates that we get with dividers below */
137 unsigned long clkin4ddr;
139 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
140 * OMAP4: PLLx_CLK1 */
141 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
142 * OMAP4: PLLx_CLK2 */
143 unsigned long lp_clk;
148 u16 regm_dispc; /* OMAP3: REGM3
150 u16 regm_dsi; /* OMAP3: REGM4
156 struct platform_device;
159 struct bus_type *dss_get_bus(void);
160 struct regulator *dss_get_vdds_dsi(void);
161 struct regulator *dss_get_vdds_sdi(void);
162 int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
165 void dss_apply_init(void);
166 int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr);
167 int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
168 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
169 int omap_dss_mgr_apply(struct omap_overlay_manager *mgr);
171 int dss_mgr_enable(struct omap_overlay_manager *mgr);
172 void dss_mgr_disable(struct omap_overlay_manager *mgr);
173 int dss_mgr_set_info(struct omap_overlay_manager *mgr,
174 struct omap_overlay_manager_info *info);
175 void dss_mgr_get_info(struct omap_overlay_manager *mgr,
176 struct omap_overlay_manager_info *info);
177 int dss_mgr_set_device(struct omap_overlay_manager *mgr,
178 struct omap_dss_device *dssdev);
179 int dss_mgr_unset_device(struct omap_overlay_manager *mgr);
181 bool dss_ovl_is_enabled(struct omap_overlay *ovl);
182 int dss_ovl_enable(struct omap_overlay *ovl);
183 int dss_ovl_disable(struct omap_overlay *ovl);
184 int dss_ovl_set_info(struct omap_overlay *ovl,
185 struct omap_overlay_info *info);
186 void dss_ovl_get_info(struct omap_overlay *ovl,
187 struct omap_overlay_info *info);
188 int dss_ovl_set_manager(struct omap_overlay *ovl,
189 struct omap_overlay_manager *mgr);
190 int dss_ovl_unset_manager(struct omap_overlay *ovl);
193 int dss_suspend_all_devices(void);
194 int dss_resume_all_devices(void);
195 void dss_disable_all_devices(void);
197 void dss_init_device(struct platform_device *pdev,
198 struct omap_dss_device *dssdev);
199 void dss_uninit_device(struct platform_device *pdev,
200 struct omap_dss_device *dssdev);
201 bool dss_use_replication(struct omap_dss_device *dssdev,
202 enum omap_color_mode mode);
205 int dss_init_overlay_managers(struct platform_device *pdev);
206 void dss_uninit_overlay_managers(struct platform_device *pdev);
207 int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
208 const struct omap_overlay_manager_info *info);
209 int dss_mgr_check(struct omap_overlay_manager *mgr,
210 struct omap_dss_device *dssdev,
211 struct omap_overlay_manager_info *info,
212 struct omap_overlay_info **overlay_infos);
215 void dss_init_overlays(struct platform_device *pdev);
216 void dss_uninit_overlays(struct platform_device *pdev);
217 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
218 void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
219 int dss_ovl_simple_check(struct omap_overlay *ovl,
220 const struct omap_overlay_info *info);
221 int dss_ovl_check(struct omap_overlay *ovl,
222 struct omap_overlay_info *info, struct omap_dss_device *dssdev);
225 int dss_init_platform_driver(void);
226 void dss_uninit_platform_driver(void);
228 int dss_runtime_get(void);
229 void dss_runtime_put(void);
231 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
232 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
233 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
234 void dss_dump_clocks(struct seq_file *s);
236 void dss_dump_regs(struct seq_file *s);
237 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
238 void dss_debug_dump_clocks(struct seq_file *s);
241 void dss_sdi_init(u8 datapairs);
242 int dss_sdi_enable(void);
243 void dss_sdi_disable(void);
245 void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
246 void dss_select_dsi_clk_source(int dsi_module,
247 enum omap_dss_clk_source clk_src);
248 void dss_select_lcd_clk_source(enum omap_channel channel,
249 enum omap_dss_clk_source clk_src);
250 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
251 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
252 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
254 void dss_set_venc_output(enum omap_dss_venc_type type);
255 void dss_set_dac_pwrdn_bgz(bool enable);
257 unsigned long dss_get_dpll4_rate(void);
258 int dss_calc_clock_rates(struct dss_clock_info *cinfo);
259 int dss_set_clock_div(struct dss_clock_info *cinfo);
260 int dss_get_clock_div(struct dss_clock_info *cinfo);
261 int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
262 struct dss_clock_info *dss_cinfo,
263 struct dispc_clock_info *dispc_cinfo);
266 #ifdef CONFIG_OMAP2_DSS_SDI
269 int sdi_init_display(struct omap_dss_device *display);
271 static inline int sdi_init(void)
275 static inline void sdi_exit(void)
281 #ifdef CONFIG_OMAP2_DSS_DSI
284 struct file_operations;
286 int dsi_init_platform_driver(void);
287 void dsi_uninit_platform_driver(void);
289 int dsi_runtime_get(struct platform_device *dsidev);
290 void dsi_runtime_put(struct platform_device *dsidev);
292 void dsi_dump_clocks(struct seq_file *s);
293 void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir,
294 const struct file_operations *debug_fops);
295 void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir,
296 const struct file_operations *debug_fops);
298 int dsi_init_display(struct omap_dss_device *display);
299 void dsi_irq_handler(void);
300 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
302 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
303 int dsi_pll_set_clock_div(struct platform_device *dsidev,
304 struct dsi_clock_info *cinfo);
305 int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
306 unsigned long req_pck, struct dsi_clock_info *cinfo,
307 struct dispc_clock_info *dispc_cinfo);
308 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
310 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
311 void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
312 void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
313 struct platform_device *dsi_get_dsidev_from_id(int module);
315 static inline int dsi_init_platform_driver(void)
319 static inline void dsi_uninit_platform_driver(void)
322 static inline int dsi_runtime_get(struct platform_device *dsidev)
326 static inline void dsi_runtime_put(struct platform_device *dsidev)
329 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
331 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
334 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
336 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
339 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
340 struct dsi_clock_info *cinfo)
342 WARN("%s: DSI not compiled in\n", __func__);
345 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
346 bool is_tft, unsigned long req_pck,
347 struct dsi_clock_info *dsi_cinfo,
348 struct dispc_clock_info *dispc_cinfo)
350 WARN("%s: DSI not compiled in\n", __func__);
353 static inline int dsi_pll_init(struct platform_device *dsidev,
354 bool enable_hsclk, bool enable_hsdiv)
356 WARN("%s: DSI not compiled in\n", __func__);
359 static inline void dsi_pll_uninit(struct platform_device *dsidev,
360 bool disconnect_lanes)
363 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
366 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
369 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
371 WARN("%s: DSI not compiled in, returning platform device as NULL\n",
378 #ifdef CONFIG_OMAP2_DSS_DPI
381 int dpi_init_display(struct omap_dss_device *dssdev);
383 static inline int dpi_init(void)
387 static inline void dpi_exit(void)
393 int dispc_init_platform_driver(void);
394 void dispc_uninit_platform_driver(void);
395 void dispc_dump_clocks(struct seq_file *s);
396 void dispc_dump_irqs(struct seq_file *s);
397 void dispc_dump_regs(struct seq_file *s);
398 void dispc_irq_handler(void);
399 void dispc_fake_vsync_irq(void);
401 int dispc_runtime_get(void);
402 void dispc_runtime_put(void);
404 void dispc_enable_sidle(void);
405 void dispc_disable_sidle(void);
407 void dispc_lcd_enable_signal_polarity(bool act_high);
408 void dispc_lcd_enable_signal(bool enable);
409 void dispc_pck_free_enable(bool enable);
410 void dispc_enable_fifomerge(bool enable);
411 void dispc_enable_gamma_table(bool enable);
412 void dispc_set_loadmode(enum omap_dss_load_mode mode);
414 bool dispc_mgr_timings_ok(enum omap_channel channel,
415 struct omap_video_timings *timings);
416 unsigned long dispc_fclk_rate(void);
417 void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
418 struct dispc_clock_info *cinfo);
419 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
420 struct dispc_clock_info *cinfo);
423 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
424 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
425 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge);
426 int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
427 bool ilace, bool replication);
428 int dispc_ovl_enable(enum omap_plane plane, bool enable);
429 void dispc_ovl_set_channel_out(enum omap_plane plane,
430 enum omap_channel channel);
432 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
433 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
434 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
435 bool dispc_mgr_go_busy(enum omap_channel channel);
436 void dispc_mgr_go(enum omap_channel channel);
437 bool dispc_mgr_is_enabled(enum omap_channel channel);
438 void dispc_mgr_enable(enum omap_channel channel, bool enable);
439 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
440 void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
441 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
442 void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
443 void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
444 enum omap_lcd_display_type type);
445 void dispc_mgr_set_timings(enum omap_channel channel,
446 struct omap_video_timings *timings);
447 void dispc_mgr_set_pol_freq(enum omap_channel channel,
448 enum omap_panel_config config, u8 acbi, u8 acb);
449 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
450 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
451 int dispc_mgr_set_clock_div(enum omap_channel channel,
452 struct dispc_clock_info *cinfo);
453 int dispc_mgr_get_clock_div(enum omap_channel channel,
454 struct dispc_clock_info *cinfo);
455 void dispc_mgr_setup(enum omap_channel channel,
456 struct omap_overlay_manager_info *info);
459 #ifdef CONFIG_OMAP2_DSS_VENC
460 int venc_init_platform_driver(void);
461 void venc_uninit_platform_driver(void);
462 void venc_dump_regs(struct seq_file *s);
463 int venc_init_display(struct omap_dss_device *display);
464 unsigned long venc_get_pixel_clock(void);
466 static inline int venc_init_platform_driver(void)
470 static inline void venc_uninit_platform_driver(void)
473 static inline unsigned long venc_get_pixel_clock(void)
475 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
481 #ifdef CONFIG_OMAP4_DSS_HDMI
482 int hdmi_init_platform_driver(void);
483 void hdmi_uninit_platform_driver(void);
484 int hdmi_init_display(struct omap_dss_device *dssdev);
485 unsigned long hdmi_get_pixel_clock(void);
486 void hdmi_dump_regs(struct seq_file *s);
488 static inline int hdmi_init_display(struct omap_dss_device *dssdev)
492 static inline int hdmi_init_platform_driver(void)
496 static inline void hdmi_uninit_platform_driver(void)
499 static inline unsigned long hdmi_get_pixel_clock(void)
501 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
505 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
506 void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
507 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev);
508 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
509 struct omap_video_timings *timings);
510 int omapdss_hdmi_read_edid(u8 *buf, int len);
511 bool omapdss_hdmi_detect(void);
512 int hdmi_panel_init(void);
513 void hdmi_panel_exit(void);
516 #ifdef CONFIG_OMAP2_DSS_RFBI
517 int rfbi_init_platform_driver(void);
518 void rfbi_uninit_platform_driver(void);
519 void rfbi_dump_regs(struct seq_file *s);
520 int rfbi_init_display(struct omap_dss_device *display);
522 static inline int rfbi_init_platform_driver(void)
526 static inline void rfbi_uninit_platform_driver(void)
532 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
533 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
536 for (b = 0; b < 32; ++b) {
537 if (irqstatus & (1 << b))