2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
31 extern unsigned int dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
38 #define DSSDBG(format, ...) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
51 #define DSSDBGF(format, ...) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
70 #define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
79 #define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
88 #define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
100 enum dss_io_pad_mode {
101 DSS_IO_PAD_MODE_RESET,
102 DSS_IO_PAD_MODE_RFBI,
103 DSS_IO_PAD_MODE_BYPASS,
106 enum dss_hdmi_venc_clk_source_select {
111 enum dss_dsi_content_type {
113 DSS_DSI_CONTENT_GENERIC,
116 struct dss_clock_info {
117 /* rates that we get with dividers below */
124 struct dispc_clock_info {
125 /* rates that we get with dividers below */
134 struct dsi_clock_info {
135 /* rates that we get with dividers below */
137 unsigned long clkin4ddr;
139 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
140 * OMAP4: PLLx_CLK1 */
141 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
142 * OMAP4: PLLx_CLK2 */
143 unsigned long lp_clk;
148 u16 regm_dispc; /* OMAP3: REGM3
150 u16 regm_dsi; /* OMAP3: REGM4
159 struct platform_device;
162 struct bus_type *dss_get_bus(void);
163 struct regulator *dss_get_vdds_dsi(void);
164 struct regulator *dss_get_vdds_sdi(void);
167 int dss_suspend_all_devices(void);
168 int dss_resume_all_devices(void);
169 void dss_disable_all_devices(void);
171 void dss_init_device(struct platform_device *pdev,
172 struct omap_dss_device *dssdev);
173 void dss_uninit_device(struct platform_device *pdev,
174 struct omap_dss_device *dssdev);
175 bool dss_use_replication(struct omap_dss_device *dssdev,
176 enum omap_color_mode mode);
177 void default_get_overlay_fifo_thresholds(enum omap_plane plane,
178 u32 fifo_size, u32 burst_size,
179 u32 *fifo_low, u32 *fifo_high);
182 int dss_init_overlay_managers(struct platform_device *pdev);
183 void dss_uninit_overlay_managers(struct platform_device *pdev);
184 int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
185 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
188 void dss_init_overlays(struct platform_device *pdev);
189 void dss_uninit_overlays(struct platform_device *pdev);
190 int dss_check_overlay(struct omap_overlay *ovl, struct omap_dss_device *dssdev);
191 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
192 void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
195 int dss_init_platform_driver(void);
196 void dss_uninit_platform_driver(void);
198 int dss_runtime_get(void);
199 void dss_runtime_put(void);
201 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
202 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
203 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
204 void dss_dump_clocks(struct seq_file *s);
206 void dss_dump_regs(struct seq_file *s);
207 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
208 void dss_debug_dump_clocks(struct seq_file *s);
211 void dss_sdi_init(u8 datapairs);
212 int dss_sdi_enable(void);
213 void dss_sdi_disable(void);
215 void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
216 void dss_select_dsi_clk_source(int dsi_module,
217 enum omap_dss_clk_source clk_src);
218 void dss_select_lcd_clk_source(enum omap_channel channel,
219 enum omap_dss_clk_source clk_src);
220 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
221 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
222 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
224 void dss_set_venc_output(enum omap_dss_venc_type type);
225 void dss_set_dac_pwrdn_bgz(bool enable);
227 unsigned long dss_get_dpll4_rate(void);
228 int dss_calc_clock_rates(struct dss_clock_info *cinfo);
229 int dss_set_clock_div(struct dss_clock_info *cinfo);
230 int dss_get_clock_div(struct dss_clock_info *cinfo);
231 int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
232 struct dss_clock_info *dss_cinfo,
233 struct dispc_clock_info *dispc_cinfo);
236 #ifdef CONFIG_OMAP2_DSS_SDI
239 int sdi_init_display(struct omap_dss_device *display);
241 static inline int sdi_init(void)
245 static inline void sdi_exit(void)
251 #ifdef CONFIG_OMAP2_DSS_DSI
254 struct file_operations;
256 int dsi_init_platform_driver(void);
257 void dsi_uninit_platform_driver(void);
259 int dsi_runtime_get(struct platform_device *dsidev);
260 void dsi_runtime_put(struct platform_device *dsidev);
262 void dsi_dump_clocks(struct seq_file *s);
263 void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir,
264 const struct file_operations *debug_fops);
265 void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir,
266 const struct file_operations *debug_fops);
268 int dsi_init_display(struct omap_dss_device *display);
269 void dsi_irq_handler(void);
270 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
272 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
273 int dsi_pll_set_clock_div(struct platform_device *dsidev,
274 struct dsi_clock_info *cinfo);
275 int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
276 unsigned long req_pck, struct dsi_clock_info *cinfo,
277 struct dispc_clock_info *dispc_cinfo);
278 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
280 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
281 void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
282 u32 fifo_size, u32 burst_size,
283 u32 *fifo_low, u32 *fifo_high);
284 void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
285 void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
286 struct platform_device *dsi_get_dsidev_from_id(int module);
288 static inline int dsi_init_platform_driver(void)
292 static inline void dsi_uninit_platform_driver(void)
295 static inline int dsi_runtime_get(struct platform_device *dsidev)
299 static inline void dsi_runtime_put(struct platform_device *dsidev)
302 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
304 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
307 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
309 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
312 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
313 struct dsi_clock_info *cinfo)
315 WARN("%s: DSI not compiled in\n", __func__);
318 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
319 bool is_tft, unsigned long req_pck,
320 struct dsi_clock_info *dsi_cinfo,
321 struct dispc_clock_info *dispc_cinfo)
323 WARN("%s: DSI not compiled in\n", __func__);
326 static inline int dsi_pll_init(struct platform_device *dsidev,
327 bool enable_hsclk, bool enable_hsdiv)
329 WARN("%s: DSI not compiled in\n", __func__);
332 static inline void dsi_pll_uninit(struct platform_device *dsidev,
333 bool disconnect_lanes)
336 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
339 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
342 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
344 WARN("%s: DSI not compiled in, returning platform device as NULL\n",
351 #ifdef CONFIG_OMAP2_DSS_DPI
354 int dpi_init_display(struct omap_dss_device *dssdev);
356 static inline int dpi_init(void)
360 static inline void dpi_exit(void)
366 int dispc_init_platform_driver(void);
367 void dispc_uninit_platform_driver(void);
368 void dispc_dump_clocks(struct seq_file *s);
369 void dispc_dump_irqs(struct seq_file *s);
370 void dispc_dump_regs(struct seq_file *s);
371 void dispc_irq_handler(void);
372 void dispc_fake_vsync_irq(void);
374 int dispc_runtime_get(void);
375 void dispc_runtime_put(void);
377 void dispc_enable_sidle(void);
378 void dispc_disable_sidle(void);
380 void dispc_lcd_enable_signal_polarity(bool act_high);
381 void dispc_lcd_enable_signal(bool enable);
382 void dispc_pck_free_enable(bool enable);
383 void dispc_set_digit_size(u16 width, u16 height);
384 void dispc_enable_fifomerge(bool enable);
385 void dispc_enable_gamma_table(bool enable);
386 void dispc_set_loadmode(enum omap_dss_load_mode mode);
388 bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
389 unsigned long dispc_fclk_rate(void);
390 void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
391 struct dispc_clock_info *cinfo);
392 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
393 struct dispc_clock_info *cinfo);
396 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
397 u32 dispc_ovl_get_fifo_size(enum omap_plane plane);
398 u32 dispc_ovl_get_burst_size(enum omap_plane plane);
399 int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
400 bool ilace, bool replication);
401 int dispc_ovl_enable(enum omap_plane plane, bool enable);
402 void dispc_ovl_set_channel_out(enum omap_plane plane,
403 enum omap_channel channel);
406 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
407 void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
408 bool dispc_mgr_go_busy(enum omap_channel channel);
409 void dispc_mgr_go(enum omap_channel channel);
410 bool dispc_mgr_is_enabled(enum omap_channel channel);
411 void dispc_mgr_enable(enum omap_channel channel, bool enable);
412 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
413 void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
414 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
415 void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
416 void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
417 enum omap_lcd_display_type type);
418 void dispc_mgr_set_lcd_timings(enum omap_channel channel,
419 struct omap_video_timings *timings);
420 void dispc_mgr_set_pol_freq(enum omap_channel channel,
421 enum omap_panel_config config, u8 acbi, u8 acb);
422 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
423 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
424 int dispc_mgr_set_clock_div(enum omap_channel channel,
425 struct dispc_clock_info *cinfo);
426 int dispc_mgr_get_clock_div(enum omap_channel channel,
427 struct dispc_clock_info *cinfo);
428 void dispc_mgr_setup(enum omap_channel channel,
429 struct omap_overlay_manager_info *info);
432 #ifdef CONFIG_OMAP2_DSS_VENC
433 int venc_init_platform_driver(void);
434 void venc_uninit_platform_driver(void);
435 void venc_dump_regs(struct seq_file *s);
436 int venc_init_display(struct omap_dss_device *display);
437 unsigned long venc_get_pixel_clock(void);
439 static inline int venc_init_platform_driver(void)
443 static inline void venc_uninit_platform_driver(void)
446 static inline unsigned long venc_get_pixel_clock(void)
448 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
454 #ifdef CONFIG_OMAP4_DSS_HDMI
455 int hdmi_init_platform_driver(void);
456 void hdmi_uninit_platform_driver(void);
457 int hdmi_init_display(struct omap_dss_device *dssdev);
458 unsigned long hdmi_get_pixel_clock(void);
459 void hdmi_dump_regs(struct seq_file *s);
461 static inline int hdmi_init_display(struct omap_dss_device *dssdev)
465 static inline int hdmi_init_platform_driver(void)
469 static inline void hdmi_uninit_platform_driver(void)
472 static inline unsigned long hdmi_get_pixel_clock(void)
474 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
478 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
479 void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
480 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev);
481 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
482 struct omap_video_timings *timings);
483 int omapdss_hdmi_read_edid(u8 *buf, int len);
484 bool omapdss_hdmi_detect(void);
485 int hdmi_panel_init(void);
486 void hdmi_panel_exit(void);
489 #ifdef CONFIG_OMAP2_DSS_RFBI
490 int rfbi_init_platform_driver(void);
491 void rfbi_uninit_platform_driver(void);
492 void rfbi_dump_regs(struct seq_file *s);
493 int rfbi_init_display(struct omap_dss_device *display);
495 static inline int rfbi_init_platform_driver(void)
499 static inline void rfbi_uninit_platform_driver(void)
505 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
506 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
509 for (b = 0; b < 32; ++b) {
510 if (irqstatus & (1 << b))