drivers/video/rockchip/chips/rk30_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk30_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include "rk30_lcdc.h"
  34
  35
  36
  37
  38
  39
  40 static int dbg_thresd = 0;
  41 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  42 #define DBG(level,x...) do { if(unlikely(dbg_thresd > level)) printk(KERN_INFO x); } while (0)
  43
  44
  45 static int init_rk30_lcdc(struct rk_lcdc_device_driver *dev_drv)
  46 {
  47         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
  48         if(lcdc_dev->id == 0) //lcdc0
  49         {
  50                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  51                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  52                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  53         }
  54         else if(lcdc_dev->id == 1)
  55         {
  56                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  57                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  58                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  59         }
  60         else
  61         {
  62                 printk(KERN_ERR "invalid lcdc device!\n");
  63                 return -EINVAL;
  64         }
  65         if ((IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  66         {
  67                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  68         }
  69         clk_enable(lcdc_dev->hclk);  //enable aclk for register config
  70         LcdMskReg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
  71                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID |
  72                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) |
  73                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) |
  74                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
  75                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
  76         LcdSetBit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
  77         LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
  78               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
  79               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
  80         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
  81         return 0;
  82 }
  83
  84 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
  85 {
  86         LcdSetBit(lcdc_dev,SYS_CTRL0,m_LCDC_STANDBY);
  87         clk_disable(lcdc_dev->aclk);
  88         clk_disable(lcdc_dev->dclk);
  89         clk_disable(lcdc_dev->hclk);
  90         clk_put(lcdc_dev->aclk);
  91         clk_put(lcdc_dev->dclk);
  92         clk_put(lcdc_dev->hclk);
  93
  94         return 0;
  95 }
  96
  97 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
  98 {
  99         int ret = -EINVAL;
 100         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 101         rk_screen *screen = lcdc_dev->screen;
 102         u16 face;
 103         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 104         u16 right_margin = screen->right_margin;
 105         u16 lower_margin = screen->lower_margin;
 106         u16 x_res = screen->x_res, y_res = screen->y_res;
 107
 108         // set the rgb or mcu
 109         spin_lock(&lcdc_dev->reg_lock);
 110         if(screen->type==SCREEN_MCU)
 111         {
 112                 LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 113                 // set out format and mcu timing
 114                 mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 115                 if(mcu_total>31)
 116                         mcu_total = 31;
 117                 if(mcu_total<3)
 118                         mcu_total = 3;
 119                 mcu_rwstart = (mcu_total+1)/4 - 1;
 120                 mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 121                 mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 122                 mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 123
 124                 DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 125                         mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 126
 127                 // set horizontal & vertical out timing
 128
 129                 right_margin = x_res/6;
 130                 screen->pixclock = 150000000; //mcu fix to 150 MHz
 131                 LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 132                         m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 133                         v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 134                         v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 135                         v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 136
 137         }
 138
 139
 140
 141         // set synchronous pin polarity and data pin swap rule
 142         switch (screen->face)
 143         {
 144                 case OUT_P565:
 145                         face = OUT_P565;
 146                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 147                         break;
 148                 case OUT_P666:
 149                         face = OUT_P666;
 150                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 151                         break;
 152                 case OUT_D888_P565:
 153                         face = OUT_P888;
 154                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 155                         break;
 156                 case OUT_D888_P666:
 157                         face = OUT_P888;
 158                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 159                         break;
 160                 case OUT_P888:
 161                         face = OUT_P888;
 162                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 163                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 164                         break;
 165                 default:
 166                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 167                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 168                         face = screen->face;
 169                         break;
 170         }
 171
 172         //use default overlay,set vsyn hsync den dclk polarity
 173         LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 174                 m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 175                 v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 176                 v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 177
 178         //set background color to black,set swap according to the screen panel,disable blank mode
 179         LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 180                 m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 181                 v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 182                 v_BLACK_MODE(0));
 183
 184
 185         LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 186              v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 187         LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 188              v_HASP(screen->hsync_len + screen->left_margin));
 189
 190         LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 191               v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 192         LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 193               v_VASP(screen->vsync_len + screen->upper_margin));
 194         // let above to take effect
 195         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 196
 197
 198
 199         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 200         if(ret)
 201         {
 202                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 203         }
 204         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 205         clk_enable(lcdc_dev->dclk);
 206         printk("%s: dclk:%lu ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk));
 207         if(initscreen)
 208         {
 209                 if(screen->lcdc_aclk)
 210                 {
 211                         ret = clk_set_rate(lcdc_dev->aclk, screen->lcdc_aclk);
 212                         if(ret)
 213                         {
 214                                 printk(KERN_ERR ">>>>>> set lcdc%d aclk  rate failed\n",lcdc_dev->id);
 215                         }
 216
 217                         clk_enable(lcdc_dev->aclk);
 218                         printk("aclk:%lu\n",clk_get_rate(lcdc_dev->aclk));
 219                 }
 220
 221         }
 222
 223         spin_unlock(&lcdc_dev->reg_lock);
 224         if(screen->init)
 225         {
 226                 screen->init();
 227         }
 228
 229         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 230         return 0;
 231 }
 232
 233 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
 234 {
 235
 236     return 0;
 237 }
 238
 239
 240
 241 //enable layer,open:1,enable;0 disable
 242 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 243 {
 244
 245         spin_lock(&lcdc_dev->reg_lock);
 246         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
 247         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 248         lcdc_dev->driver.layer_par[0]->state = open;
 249         spin_unlock(&lcdc_dev->reg_lock);
 250         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 251         return 0;
 252 }
 253 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 254 {
 255
 256         spin_lock(&lcdc_dev->reg_lock);
 257         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
 258         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 259         lcdc_dev->driver.layer_par[1]->state = open;
 260         spin_unlock(&lcdc_dev->reg_lock);
 261         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 262         return 0;
 263 }
 264
 265
 266 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 267 {
 268         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
 269
 270         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 271         switch(blank_mode)
 272         {
 273                 case FB_BLANK_UNBLANK:
 274                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 275                         break;
 276                 case FB_BLANK_NORMAL:
 277                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 278                         break;
 279                 default:
 280                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 281                         break;
 282         }
 283         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 284         return 0;
 285 }
 286
 287 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 288 {
 289         u32 y_addr;
 290         u32 uv_addr;
 291         y_addr = par->smem_start + par->y_offset;
 292         uv_addr = par->cbr_start + par->c_offset;
 293         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 294         LcdWrReg(lcdc_dev, WIN0_YRGB_MST0, y_addr);
 295         LcdWrReg(lcdc_dev, WIN0_CBR_MST0, uv_addr);
 296         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 297         return 0;
 298
 299 }
 300
 301 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 302 {
 303         u32 y_addr;
 304         u32 uv_addr;
 305         y_addr = par->smem_start + par->y_offset;
 306         uv_addr = par->cbr_start + par->c_offset;
 307         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 308         LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 309         LcdWrReg(lcdc_dev, WIN1_CBR_MST, uv_addr);
 310         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 311         return 0;
 312 }
 313
 314 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 315         struct layer_par *par )
 316 {
 317         u32 xact, yact, xvir, yvir, xpos, ypos;
 318         u32 ScaleYrgbX = 0x1000;
 319         u32 ScaleYrgbY = 0x1000;
 320         u32 ScaleCbrX = 0x1000;
 321         u32 ScaleCbrY = 0x1000;
 322
 323         xact = par->xact;                           //active (origin) picture window width/height
 324         yact = par->yact;
 325         xvir = par->xvir;                          // virtual resolution
 326         yvir = par->yvir;
 327         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 328         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 329
 330
 331         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 332         ScaleYrgbY = CalScale(yact, par->ysize);
 333         switch (par->format)
 334         {
 335                 case YUV422:// yuv422
 336                         ScaleCbrX = CalScale((xact/2), par->xsize);
 337                         ScaleCbrY = CalScale(yact, par->ysize);
 338                         break;
 339                 case YUV420: // yuv420
 340                         ScaleCbrX = CalScale(xact/2, par->xsize);
 341                         ScaleCbrY = CalScale(yact/2, par->ysize);
 342                         break;
 343                 case YUV444:// yuv444
 344                         ScaleCbrX = CalScale(xact, par->xsize);
 345                         ScaleCbrY = CalScale(yact, par->ysize);
 346                         break;
 347                 default:
 348                    break;
 349         }
 350
 351         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 352                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 353         spin_lock(&lcdc_dev->reg_lock);
 354         LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 355         LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 356         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));          //(inf->video_mode==0)
 357         LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 358         LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 359         LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 360         LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 361                 v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 362         switch(par->format)
 363         {
 364                 case ARGB888:
 365                         LcdWrReg(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
 366                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 367                         break;
 368                 case RGB888:  //rgb888
 369                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 370                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
 371                         break;
 372                 case RGB565:  //rgb565
 373                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
 374                         break;
 375                 case YUV422:
 376                 case YUV420:
 377                         LcdWrReg(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
 378                         break;
 379                 default:
 380                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 381                         break;
 382         }
 383
 384         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 385         spin_unlock(&lcdc_dev->reg_lock);
 386
 387     return 0;
 388
 389 }
 390
 391 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 392         struct layer_par *par )
 393 {
 394         u32 xact, yact, xvir, yvir, xpos, ypos;
 395         u32 ScaleYrgbX = 0x1000;
 396         u32 ScaleYrgbY = 0x1000;
 397         u32 ScaleCbrX = 0x1000;
 398         u32 ScaleCbrY = 0x1000;
 399
 400         xact = par->xact;
 401         yact = par->yact;
 402         xvir = par->xvir;
 403         yvir = par->yvir;
 404         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 405         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 406
 407         ScaleYrgbX = CalScale(xact, par->xsize);
 408         ScaleYrgbY = CalScale(yact, par->ysize);
 409         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 410                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 411
 412
 413         spin_lock(&lcdc_dev->reg_lock);
 414         switch (par->format)
 415         {
 416                 case YUV422:// yuv422
 417                         ScaleCbrX = CalScale((xact/2), par->xsize);
 418                         ScaleCbrY = CalScale(yact, par->ysize);
 419                         break;
 420                 case YUV420: // yuv420
 421                         ScaleCbrX = CalScale(xact/2, par->xsize);
 422                         ScaleCbrY = CalScale(yact/2, par->ysize);
 423                         break;
 424                 case YUV444:// yuv444
 425                         ScaleCbrX = CalScale(xact, par->xsize);
 426                         ScaleCbrY = CalScale(yact, par->ysize);
 427                         break;
 428                 default:
 429                         break;
 430         }
 431
 432         LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 433         LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
 434         LcdMskReg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
 435         LcdWrReg(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 436         LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 437         LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 438         // enable win1 color key and set the color to black(rgb=0)
 439         LcdMskReg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 440                 v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 441         switch(par->format)
 442         {
 443                 case ARGB888:
 444                         LcdWrReg(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
 445                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 446                         break;
 447                 case RGB888:  //rgb888
 448                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 449                         // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 450                         break;
 451                 case RGB565:  //rgb565
 452                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
 453                         break;
 454                 case YUV422:
 455                 case YUV420:
 456                         LcdWrReg(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
 457                         break;
 458                 default:
 459                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 460                         break;
 461         }
 462
 463         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 464         spin_unlock(&lcdc_dev->reg_lock);
 465     return 0;
 466 }
 467
 468 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 469 {
 470         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 471         if(layer_id == 0)
 472         {
 473                 win0_open(lcdc_dev,open);
 474         }
 475         else if(layer_id == 1)
 476         {
 477                 win1_open(lcdc_dev,open);
 478         }
 479
 480         return 0;
 481 }
 482 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 483 {
 484         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 485         struct layer_par *par = NULL;
 486         rk_screen *screen = lcdc_dev->screen;
 487         if(!screen)
 488         {
 489                 printk(KERN_ERR "screen is null!\n");
 490                 return -ENOENT;
 491         }
 492         if(layer_id==0)
 493         {
 494                 par = dev_drv->layer_par[0];
 495                 win0_set_par(lcdc_dev,screen,par);
 496         }
 497         else if(layer_id==1)
 498         {
 499                 par = dev_drv->layer_par[1];
 500                 win1_set_par(lcdc_dev,screen,par);
 501         }
 502
 503         return 0;
 504 }
 505
 506 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 507 {
 508         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 509         struct layer_par *par = NULL;
 510         rk_screen *screen = lcdc_dev->screen;
 511         unsigned long flags;
 512         int timeout;
 513         if(!screen)
 514         {
 515                 printk(KERN_ERR "screen is null!\n");
 516                 return -ENOENT;
 517         }
 518         if(layer_id==0)
 519         {
 520                 par = dev_drv->layer_par[0];
 521                 win0_display(lcdc_dev,par);
 522         }
 523         else if(layer_id==1)
 524         {
 525                 par = dev_drv->layer_par[1];
 526                 win1_display(lcdc_dev,par);
 527         }
 528         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 529         {
 530                 dev_drv->first_frame = 0;
 531                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
 532                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
 533                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
 534
 535         }
 536
 537         spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 538         init_completion(&dev_drv->frame_done);
 539         spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 540         timeout = wait_for_completion_interruptible_timeout(&dev_drv->frame_done,msecs_to_jiffies(25));
 541         if(!timeout)
 542         {
 543                 printk(KERN_ERR "wait for new frame start time out!\n");
 544                 return -ETIMEDOUT;
 545         }
 546         else if(timeout < 0)
 547         {
 548                 return timeout;
 549         }
 550
 551         return 0;
 552 }
 553
 554 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 555 {
 556         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 557         u32 panel_size[2];
 558         void __user *argp = (void __user *)arg;
 559         switch(cmd)
 560         {
 561                 case FB1_IOCTL_GET_PANEL_SIZE:    //get panel size
 562                         panel_size[0] = lcdc_dev->screen->x_res;
 563                         panel_size[1] = lcdc_dev->screen->y_res;
 564                         if(copy_to_user(argp, panel_size, 8))
 565                                 return -EFAULT;
 566                         break;
 567                 default:
 568                         break;
 569         }
 570
 571         return 0;
 572 }
 573 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 574 {
 575         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 576         struct layer_par *par = dev_drv->layer_par[layer_id];
 577
 578         if(layer_id == 0)
 579         {
 580                 par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W0_EN);
 581         }
 582         else if( layer_id == 1)
 583         {
 584                 par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W1_EN);
 585         }
 586
 587         return par->state;
 588
 589 }
 590
 591 static int rk30_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 592 {
 593         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 594         return 0;
 595 }
 596
 597 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 598 {
 599         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 600         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 601         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 602         return 0;
 603 }
 604
 605
 606 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 607 {
 608         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 609         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 610         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 611         return 0;
 612 }
 613 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
 614 {
 615         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
 616         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 617         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 618         spin_lock(&(lcdc_dev->driver.cpl_lock));
 619         complete(&(lcdc_dev->driver.frame_done));
 620         spin_unlock(&(lcdc_dev->driver.cpl_lock));
 621         return IRQ_HANDLED;
 622 }
 623
 624 static struct layer_par lcdc_layer[] = {
 625         [0] = {
 626                 .name           = "win0",
 627                 .id             = 0,
 628                 .support_3d     = true,
 629         },
 630         [1] = {
 631                 .name           = "win1",
 632                 .id             = 1,
 633                 .support_3d     = false,
 634         },
 635 };
 636
 637 static struct rk_lcdc_device_driver lcdc_driver = {
 638         .name                   = "lcdc",
 639         .def_layer_par          = lcdc_layer,
 640         .num_layer              = ARRAY_SIZE(lcdc_layer),
 641         .open                   = rk30_lcdc_open,
 642         .init_lcdc              = init_rk30_lcdc,
 643         .ioctl                  = rk30_lcdc_ioctl,
 644         .suspend                = rk30_lcdc_early_suspend,
 645         .resume                 = rk30_lcdc_early_resume,
 646         .set_par                = rk30_lcdc_set_par,
 647         .blank                  = rk30_lcdc_blank,
 648         .pan_display            = rk30_lcdc_pan_display,
 649         .load_screen            = rk30_load_screen,
 650         .get_layer_state        = rk30_lcdc_get_layer_state,
 651         .get_disp_info          = rk30_get_disp_info,
 652 };
 653 #ifdef CONFIG_PM
 654 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 655 {
 656         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 657
 658
 659         clk_disable(lcdc_dev->dclk);
 660         clk_disable(lcdc_dev->hclk);
 661         clk_disable(lcdc_dev->aclk);
 662         return 0;
 663 }
 664
 665 static int rk30_lcdc_resume(struct platform_device *pdev)
 666 {
 667         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 668
 669         clk_enable(lcdc_dev->hclk);
 670         clk_enable(lcdc_dev->dclk);
 671         clk_enable(lcdc_dev->aclk);
 672         usleep_range(10*1000, 10*1000);
 673         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 674         usleep_range(40*1000, 40*1000);
 675         return 0;
 676 }
 677
 678 #else
 679 #define rk30_lcdc_suspend NULL
 680 #define rk30_lcdc_resume NULL
 681 #endif
 682
 683 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
 684 {
 685         struct rk30_lcdc_device *lcdc_dev=NULL;
 686         rk_screen *screen;
 687         struct rk29fb_info *screen_ctr_info;
 688         struct resource *res = NULL;
 689         struct resource *mem;
 690         int ret = 0;
 691
 692         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
 693         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
 694         if(!lcdc_dev)
 695         {
 696                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
 697                 return -ENOMEM;
 698         }
 699         platform_set_drvdata(pdev, lcdc_dev);
 700         lcdc_dev->id = pdev->id;
 701         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
 702         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 703         if(!screen)
 704         {
 705                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
 706                 ret =  -ENOMEM;
 707                 goto err0;
 708         }
 709         else
 710         {
 711                 lcdc_dev->screen = screen;
 712         }
 713         /****************get lcdc0 reg  *************************/
 714         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 715         if (res == NULL)
 716         {
 717                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 718                 ret = -ENOENT;
 719                 goto err1;
 720         }
 721         lcdc_dev->reg_phy_base = res->start;
 722         lcdc_dev->len = resource_size(res);
 723         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 724         if (mem == NULL)
 725         {
 726                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 727                 ret = -ENOENT;
 728                 goto err1;
 729         }
 730         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 731         if (lcdc_dev->reg_vir_base == NULL)
 732         {
 733                 dev_err(&pdev->dev, "cannot map IO\n");
 734                 ret = -ENXIO;
 735                 goto err2;
 736         }
 737
 738         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 739         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 740         lcdc_dev->driver.dev=&pdev->dev;
 741         lcdc_dev->driver.screen = screen;
 742         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
 743         spin_lock_init(&lcdc_dev->reg_lock);
 744         lcdc_dev->irq = platform_get_irq(pdev, 0);
 745         if(lcdc_dev->irq < 0)
 746         {
 747                 dev_err(&pdev->dev, "cannot find IRQ\n");
 748                 goto err3;
 749         }
 750         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
 751         if (ret)
 752         {
 753                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
 754                ret = -EBUSY;
 755                goto err3;
 756         }
 757         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
 758         if(ret < 0)
 759         {
 760                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
 761                 goto err4;
 762         }
 763         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
 764
 765         return 0;
 766
 767 err4:
 768         free_irq(lcdc_dev->irq,lcdc_dev);
 769 err3:
 770         iounmap(lcdc_dev->reg_vir_base);
 771 err2:
 772         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
 773 err1:
 774         kfree(screen);
 775 err0:
 776         platform_set_drvdata(pdev, NULL);
 777         kfree(lcdc_dev);
 778         return ret;
 779
 780 }
 781 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
 782 {
 783         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 784         rk_fb_unregister(&(lcdc_dev->driver));
 785         rk30_lcdc_deinit(lcdc_dev);
 786         iounmap(lcdc_dev->reg_vir_base);
 787         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 788         kfree(lcdc_dev->screen);
 789         kfree(lcdc_dev);
 790         return 0;
 791 }
 792
 793 static void rk30_lcdc_shutdown(struct platform_device *pdev)
 794 {
 795         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 796         rk_fb_unregister(&(lcdc_dev->driver));
 797         rk30_lcdc_deinit(lcdc_dev);
 798         /*iounmap(lcdc_dev->reg_vir_base);
 799         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 800         kfree(lcdc_dev->screen);
 801         kfree(lcdc_dev);*/
 802 }
 803
 804
 805 static struct platform_driver rk30lcdc_driver = {
 806         .probe          = rk30_lcdc_probe,
 807         .remove         = __devexit_p(rk30_lcdc_remove),
 808         .driver         = {
 809                 .name   = "rk30-lcdc",
 810                 .owner  = THIS_MODULE,
 811         },
 812         .suspend        = rk30_lcdc_suspend,
 813         .resume         = rk30_lcdc_resume,
 814         .shutdown   = rk30_lcdc_shutdown,
 815 };
 816
 817 static int __init rk30_lcdc_init(void)
 818 {
 819     return platform_driver_register(&rk30lcdc_driver);
 820 }
 821
 822 static void __exit rk30_lcdc_exit(void)
 823 {
 824     platform_driver_unregister(&rk30lcdc_driver);
 825 }
 826
 827
 828
 829 fs_initcall(rk30_lcdc_init);
 830 module_exit(rk30_lcdc_exit);
 831
 832
 833