drivers/video/rockchip/chips/rk30_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk30_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include "rk30_lcdc.h"
  34
  35
  36
  37
  38
  39
  40 static int dbg_thresd = 0;
  41 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  42 #define DBG(level,x...) do { if(unlikely(dbg_thresd > level)) printk(KERN_INFO x); } while (0)
  43
  44
  45 static int init_rk30_lcdc(struct rk_lcdc_device_driver *dev_drv)
  46 {
  47         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
  48         if(lcdc_dev->id == 0) //lcdc0
  49         {
  50                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  51                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  52                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  53         }
  54         else if(lcdc_dev->id == 1)
  55         {
  56                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  57                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  58                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  59         }
  60         else
  61         {
  62                 printk(KERN_ERR "invalid lcdc device!\n");
  63                 return -EINVAL;
  64         }
  65         if ((IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  66         {
  67                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  68         }
  69         clk_enable(lcdc_dev->hclk);  //enable aclk for register config
  70         LcdMskReg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
  71                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID |
  72                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) |
  73                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) |
  74                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
  75                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
  76         LcdSetBit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
  77         LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
  78               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
  79               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
  80         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
  81         return 0;
  82 }
  83
  84 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
  85 {
  86         clk_disable(lcdc_dev->aclk);
  87         clk_disable(lcdc_dev->dclk);
  88         clk_disable(lcdc_dev->hclk);
  89         clk_put(lcdc_dev->aclk);
  90         clk_put(lcdc_dev->dclk);
  91         clk_put(lcdc_dev->hclk);
  92
  93         return 0;
  94 }
  95
  96 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
  97 {
  98         int ret = -EINVAL;
  99         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 100         rk_screen *screen = lcdc_dev->screen;
 101         u16 face;
 102         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 103         u16 right_margin = screen->right_margin;
 104         u16 lower_margin = screen->lower_margin;
 105         u16 x_res = screen->x_res, y_res = screen->y_res;
 106
 107         // set the rgb or mcu
 108         spin_lock(&lcdc_dev->reg_lock);
 109         if(screen->type==SCREEN_MCU)
 110         {
 111                 LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 112                 // set out format and mcu timing
 113                 mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 114                 if(mcu_total>31)
 115                         mcu_total = 31;
 116                 if(mcu_total<3)
 117                         mcu_total = 3;
 118                 mcu_rwstart = (mcu_total+1)/4 - 1;
 119                 mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 120                 mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 121                 mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 122
 123                 DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 124                         mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 125
 126                 // set horizontal & vertical out timing
 127
 128                 right_margin = x_res/6;
 129                 screen->pixclock = 150000000; //mcu fix to 150 MHz
 130                 LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 131                         m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 132                         v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 133                         v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 134                         v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 135
 136         }
 137
 138
 139
 140         // set synchronous pin polarity and data pin swap rule
 141         switch (screen->face)
 142         {
 143                 case OUT_P565:
 144                         face = OUT_P565;
 145                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 146                         break;
 147                 case OUT_P666:
 148                         face = OUT_P666;
 149                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 150                         break;
 151                 case OUT_D888_P565:
 152                         face = OUT_P888;
 153                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 154                         break;
 155                 case OUT_D888_P666:
 156                         face = OUT_P888;
 157                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 158                         break;
 159                 case OUT_P888:
 160                         face = OUT_P888;
 161                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 162                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 163                         break;
 164                 default:
 165                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 166                         LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 167                         face = screen->face;
 168                         break;
 169         }
 170
 171         //use default overlay,set vsyn hsync den dclk polarity
 172         LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 173                 m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 174                 v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 175                 v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 176
 177         //set background color to black,set swap according to the screen panel,disable blank mode
 178         LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 179                 m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 180                 v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 181                 v_BLACK_MODE(0));
 182
 183
 184         LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 185              v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 186         LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 187              v_HASP(screen->hsync_len + screen->left_margin));
 188
 189         LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 190               v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 191         LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 192               v_VASP(screen->vsync_len + screen->upper_margin));
 193         // let above to take effect
 194         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 195
 196
 197
 198         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 199         if(ret)
 200         {
 201                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 202         }
 203         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 204         clk_enable(lcdc_dev->dclk);
 205         printk("%s: dclk:%lu ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk));
 206         if(initscreen)
 207         {
 208                 if(screen->lcdc_aclk)
 209                 {
 210                         ret = clk_set_rate(lcdc_dev->aclk, screen->lcdc_aclk);
 211                         if(ret)
 212                         {
 213                                 printk(KERN_ERR ">>>>>> set lcdc%d aclk  rate failed\n",lcdc_dev->id);
 214                         }
 215
 216                         clk_enable(lcdc_dev->aclk);
 217                         printk("aclk:%lu\n",clk_get_rate(lcdc_dev->aclk));
 218                 }
 219
 220         }
 221
 222         spin_unlock(&lcdc_dev->reg_lock);
 223         if(screen->init)
 224         {
 225                 screen->init();
 226         }
 227
 228         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 229         return 0;
 230 }
 231
 232 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
 233 {
 234
 235     return 0;
 236 }
 237
 238
 239
 240 //enable layer,open:1,enable;0 disable
 241 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 242 {
 243
 244         spin_lock(&lcdc_dev->reg_lock);
 245         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
 246         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 247         lcdc_dev->driver.layer_par[0]->state = open;
 248         spin_unlock(&lcdc_dev->reg_lock);
 249         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 250         return 0;
 251 }
 252 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 253 {
 254
 255         spin_lock(&lcdc_dev->reg_lock);
 256         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
 257         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 258         lcdc_dev->driver.layer_par[1]->state = open;
 259         spin_unlock(&lcdc_dev->reg_lock);
 260         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 261         return 0;
 262 }
 263
 264
 265 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 266 {
 267         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
 268
 269         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 270         switch(blank_mode)
 271         {
 272                 case FB_BLANK_UNBLANK:
 273                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 274                         break;
 275                 case FB_BLANK_NORMAL:
 276                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 277                         break;
 278                 default:
 279                         LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 280                         break;
 281         }
 282         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 283         return 0;
 284 }
 285
 286 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 287 {
 288         u32 y_addr;
 289         u32 uv_addr;
 290         y_addr = par->smem_start + par->y_offset;
 291         uv_addr = par->cbr_start + par->c_offset;
 292         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 293         LcdWrReg(lcdc_dev, WIN0_YRGB_MST0, y_addr);
 294         LcdWrReg(lcdc_dev, WIN0_CBR_MST0, uv_addr);
 295         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 296         return 0;
 297
 298 }
 299
 300 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 301 {
 302         u32 y_addr;
 303         u32 uv_addr;
 304         y_addr = par->smem_start + par->y_offset;
 305         uv_addr = par->cbr_start + par->c_offset;
 306         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 307         LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 308         LcdWrReg(lcdc_dev, WIN1_CBR_MST, uv_addr);
 309         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 310         return 0;
 311 }
 312
 313 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 314         struct layer_par *par )
 315 {
 316         u32 xact, yact, xvir, yvir, xpos, ypos;
 317         u32 ScaleYrgbX = 0x1000;
 318         u32 ScaleYrgbY = 0x1000;
 319         u32 ScaleCbrX = 0x1000;
 320         u32 ScaleCbrY = 0x1000;
 321
 322         xact = par->xact;                           //active (origin) picture window width/height
 323         yact = par->yact;
 324         xvir = par->xvir;                          // virtual resolution
 325         yvir = par->yvir;
 326         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 327         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 328
 329
 330         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 331         ScaleYrgbY = CalScale(yact, par->ysize);
 332         switch (par->format)
 333         {
 334                 case YUV422:// yuv422
 335                         ScaleCbrX = CalScale((xact/2), par->xsize);
 336                         ScaleCbrY = CalScale(yact, par->ysize);
 337                         break;
 338                 case YUV420: // yuv420
 339                         ScaleCbrX = CalScale(xact/2, par->xsize);
 340                         ScaleCbrY = CalScale(yact/2, par->ysize);
 341                         break;
 342                 case YUV444:// yuv444
 343                         ScaleCbrX = CalScale(xact, par->xsize);
 344                         ScaleCbrY = CalScale(yact, par->ysize);
 345                         break;
 346                 default:
 347                    break;
 348         }
 349
 350         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 351                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 352         spin_lock(&lcdc_dev->reg_lock);
 353         LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 354         LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 355         LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));          //(inf->video_mode==0)
 356         LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 357         LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 358         LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 359         LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 360                 v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 361         switch(par->format)
 362         {
 363                 case ARGB888:
 364                         LcdWrReg(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
 365                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 366                         break;
 367                 case RGB888:  //rgb888
 368                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 369                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
 370                         break;
 371                 case RGB565:  //rgb565
 372                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
 373                         break;
 374                 case YUV422:
 375                 case YUV420:
 376                         LcdWrReg(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
 377                         break;
 378                 default:
 379                         LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 380                         break;
 381         }
 382
 383         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 384         spin_unlock(&lcdc_dev->reg_lock);
 385
 386     return 0;
 387
 388 }
 389
 390 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 391         struct layer_par *par )
 392 {
 393         u32 xact, yact, xvir, yvir, xpos, ypos;
 394         u32 ScaleYrgbX = 0x1000;
 395         u32 ScaleYrgbY = 0x1000;
 396         u32 ScaleCbrX = 0x1000;
 397         u32 ScaleCbrY = 0x1000;
 398
 399         xact = par->xact;
 400         yact = par->yact;
 401         xvir = par->xvir;
 402         yvir = par->yvir;
 403         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 404         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 405
 406         ScaleYrgbX = CalScale(xact, par->xsize);
 407         ScaleYrgbY = CalScale(yact, par->ysize);
 408         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 409                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 410
 411
 412         spin_lock(&lcdc_dev->reg_lock);
 413         switch (par->format)
 414         {
 415                 case YUV422:// yuv422
 416                         ScaleCbrX = CalScale((xact/2), par->xsize);
 417                         ScaleCbrY = CalScale(yact, par->ysize);
 418                         break;
 419                 case YUV420: // yuv420
 420                         ScaleCbrX = CalScale(xact/2, par->xsize);
 421                         ScaleCbrY = CalScale(yact/2, par->ysize);
 422                         break;
 423                 case YUV444:// yuv444
 424                         ScaleCbrX = CalScale(xact, par->xsize);
 425                         ScaleCbrY = CalScale(yact, par->ysize);
 426                         break;
 427                 default:
 428                         break;
 429         }
 430
 431         LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 432         LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
 433         LcdMskReg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
 434         LcdWrReg(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 435         LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 436         LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 437         // enable win1 color key and set the color to black(rgb=0)
 438         LcdMskReg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 439                 v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 440         switch(par->format)
 441         {
 442                 case ARGB888:
 443                         LcdWrReg(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
 444                         //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 445                         break;
 446                 case RGB888:  //rgb888
 447                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 448                         // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 449                         break;
 450                 case RGB565:  //rgb565
 451                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
 452                         break;
 453                 case YUV422:
 454                 case YUV420:
 455                         LcdWrReg(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
 456                         break;
 457                 default:
 458                         LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 459                         break;
 460         }
 461
 462         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 463         spin_unlock(&lcdc_dev->reg_lock);
 464     return 0;
 465 }
 466
 467 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 468 {
 469         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 470         if(layer_id == 0)
 471         {
 472                 win0_open(lcdc_dev,open);
 473         }
 474         else if(layer_id == 1)
 475         {
 476                 win1_open(lcdc_dev,open);
 477         }
 478
 479         return 0;
 480 }
 481 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 482 {
 483         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 484         struct layer_par *par = NULL;
 485         rk_screen *screen = lcdc_dev->screen;
 486         if(!screen)
 487         {
 488                 printk(KERN_ERR "screen is null!\n");
 489                 return -ENOENT;
 490         }
 491         if(layer_id==0)
 492         {
 493                 par = dev_drv->layer_par[0];
 494                 win0_set_par(lcdc_dev,screen,par);
 495         }
 496         else if(layer_id==1)
 497         {
 498                 par = dev_drv->layer_par[1];
 499                 win1_set_par(lcdc_dev,screen,par);
 500         }
 501
 502         return 0;
 503 }
 504
 505 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 506 {
 507         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 508         struct layer_par *par = NULL;
 509         rk_screen *screen = lcdc_dev->screen;
 510         unsigned long flags;
 511         int timeout;
 512         if(!screen)
 513         {
 514                 printk(KERN_ERR "screen is null!\n");
 515                 return -ENOENT;
 516         }
 517         if(layer_id==0)
 518         {
 519                 par = dev_drv->layer_par[0];
 520                 win0_display(lcdc_dev,par);
 521         }
 522         else if(layer_id==1)
 523         {
 524                 par = dev_drv->layer_par[1];
 525                 win1_display(lcdc_dev,par);
 526         }
 527         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 528         {
 529                 dev_drv->first_frame = 0;
 530                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
 531                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
 532                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
 533
 534         }
 535
 536         spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 537         init_completion(&dev_drv->frame_done);
 538         spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 539         timeout = wait_for_completion_interruptible_timeout(&dev_drv->frame_done,msecs_to_jiffies(25));
 540         if(!timeout)
 541         {
 542                 printk(KERN_ERR "wait for new frame start time out!\n");
 543                 return -ETIMEDOUT;
 544         }
 545         else if(timeout < 0)
 546         {
 547                 return timeout;
 548         }
 549
 550         return 0;
 551 }
 552
 553 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 554 {
 555         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 556         u32 panel_size[2];
 557         void __user *argp = (void __user *)arg;
 558         switch(cmd)
 559         {
 560                 case FB1_IOCTL_GET_PANEL_SIZE:    //get panel size
 561                         panel_size[0] = lcdc_dev->screen->x_res;
 562                         panel_size[1] = lcdc_dev->screen->y_res;
 563                         if(copy_to_user(argp, panel_size, 8))
 564                                 return -EFAULT;
 565                         break;
 566                 default:
 567                         break;
 568         }
 569
 570         return 0;
 571 }
 572 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 573 {
 574         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 575         struct layer_par *par = dev_drv->layer_par[layer_id];
 576
 577         if(layer_id == 0)
 578         {
 579                 par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W0_EN);
 580         }
 581         else if( layer_id == 1)
 582         {
 583                 par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W1_EN);
 584         }
 585
 586         return par->state;
 587
 588 }
 589
 590 static int rk30_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 591 {
 592         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 593         return 0;
 594 }
 595
 596 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 597 {
 598         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 599         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 600         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 601         return 0;
 602 }
 603
 604
 605 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 606 {
 607         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 608         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 609         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 610         return 0;
 611 }
 612 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
 613 {
 614         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
 615         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 616         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 617         spin_lock(&(lcdc_dev->driver.cpl_lock));
 618         complete(&(lcdc_dev->driver.frame_done));
 619         spin_unlock(&(lcdc_dev->driver.cpl_lock));
 620         return IRQ_HANDLED;
 621 }
 622
 623 static struct layer_par lcdc_layer[] = {
 624         [0] = {
 625                 .name           = "win0",
 626                 .id             = 0,
 627                 .support_3d     = true,
 628         },
 629         [1] = {
 630                 .name           = "win1",
 631                 .id             = 1,
 632                 .support_3d     = false,
 633         },
 634 };
 635
 636 static struct rk_lcdc_device_driver lcdc_driver = {
 637         .name                   = "lcdc",
 638         .def_layer_par          = lcdc_layer,
 639         .num_layer              = ARRAY_SIZE(lcdc_layer),
 640         .open                   = rk30_lcdc_open,
 641         .init_lcdc              = init_rk30_lcdc,
 642         .ioctl                  = rk30_lcdc_ioctl,
 643         .suspend                = rk30_lcdc_early_suspend,
 644         .resume                 = rk30_lcdc_early_resume,
 645         .set_par                = rk30_lcdc_set_par,
 646         .blank                  = rk30_lcdc_blank,
 647         .pan_display            = rk30_lcdc_pan_display,
 648         .load_screen            = rk30_load_screen,
 649         .get_layer_state        = rk30_lcdc_get_layer_state,
 650         .get_disp_info          = rk30_get_disp_info,
 651 };
 652 #ifdef CONFIG_PM
 653 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 654 {
 655         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 656
 657
 658         clk_disable(lcdc_dev->dclk);
 659         clk_disable(lcdc_dev->hclk);
 660         clk_disable(lcdc_dev->aclk);
 661         return 0;
 662 }
 663
 664 static int rk30_lcdc_resume(struct platform_device *pdev)
 665 {
 666         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 667
 668         clk_enable(lcdc_dev->hclk);
 669         clk_enable(lcdc_dev->dclk);
 670         clk_enable(lcdc_dev->aclk);
 671         usleep_range(10*1000, 10*1000);
 672         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 673         usleep_range(40*1000, 40*1000);
 674         return 0;
 675 }
 676
 677 #else
 678 #define rk30_lcdc_suspend NULL
 679 #define rk30_lcdc_resume NULL
 680 #endif
 681
 682 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
 683 {
 684         struct rk30_lcdc_device *lcdc_dev=NULL;
 685         rk_screen *screen;
 686         struct resource *res = NULL;
 687         struct resource *mem;
 688         int ret = 0;
 689
 690         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
 691         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
 692         if(!lcdc_dev)
 693         {
 694                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
 695                 return -ENOMEM;
 696         }
 697         platform_set_drvdata(pdev, lcdc_dev);
 698         lcdc_dev->id = pdev->id;
 699         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 700         if(!screen)
 701         {
 702                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
 703                 ret =  -ENOMEM;
 704                 goto err0;
 705         }
 706         else
 707         {
 708                 lcdc_dev->screen = screen;
 709         }
 710         /****************get lcdc0 reg  *************************/
 711         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 712         if (res == NULL)
 713         {
 714                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 715                 ret = -ENOENT;
 716                 goto err1;
 717         }
 718         lcdc_dev->reg_phy_base = res->start;
 719         lcdc_dev->len = resource_size(res);
 720         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 721         if (mem == NULL)
 722         {
 723                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 724                 ret = -ENOENT;
 725                 goto err1;
 726         }
 727         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 728         if (lcdc_dev->reg_vir_base == NULL)
 729         {
 730                 dev_err(&pdev->dev, "cannot map IO\n");
 731                 ret = -ENXIO;
 732                 goto err2;
 733         }
 734
 735         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 736         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 737         lcdc_dev->driver.dev=&pdev->dev;
 738         lcdc_dev->driver.screen = screen;
 739         spin_lock_init(&lcdc_dev->reg_lock);
 740         lcdc_dev->irq = platform_get_irq(pdev, 0);
 741         if(lcdc_dev->irq < 0)
 742         {
 743                 dev_err(&pdev->dev, "cannot find IRQ\n");
 744                 goto err3;
 745         }
 746         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
 747         if (ret)
 748         {
 749                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
 750                ret = -EBUSY;
 751                goto err3;
 752         }
 753         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
 754         if(ret < 0)
 755         {
 756                 printk(KERN_ERR "registe fb for lcdc0 failed!\n");
 757                 goto err4;
 758         }
 759         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
 760
 761         return 0;
 762
 763 err4:
 764         free_irq(lcdc_dev->irq, pdev);
 765 err3:
 766         iounmap(lcdc_dev->reg_vir_base);
 767 err2:
 768         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
 769 err1:
 770         kfree(screen);
 771 err0:
 772         platform_set_drvdata(pdev, NULL);
 773         kfree(lcdc_dev);
 774         return ret;
 775
 776 }
 777 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
 778 {
 779         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 780         rk_fb_unregister(&(lcdc_dev->driver));
 781         rk30_lcdc_deinit(lcdc_dev);
 782         iounmap(lcdc_dev->reg_vir_base);
 783         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 784         kfree(lcdc_dev->screen);
 785         kfree(lcdc_dev);
 786         return 0;
 787 }
 788
 789 static void rk30_lcdc_shutdown(struct platform_device *pdev)
 790 {
 791         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 792         rk_fb_unregister(&(lcdc_dev->driver));
 793         rk30_lcdc_deinit(lcdc_dev);
 794         iounmap(lcdc_dev->reg_vir_base);
 795         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 796         kfree(lcdc_dev->screen);
 797         kfree(lcdc_dev);
 798 }
 799
 800
 801 static struct platform_driver rk30lcdc_driver = {
 802         .probe          = rk30_lcdc_probe,
 803         .remove         = __devexit_p(rk30_lcdc_remove),
 804         .driver         = {
 805                 .name   = "rk30-lcdc",
 806                 .owner  = THIS_MODULE,
 807         },
 808         .suspend        = rk30_lcdc_suspend,
 809         .resume         = rk30_lcdc_resume,
 810         .shutdown   = rk30_lcdc_shutdown,
 811 };
 812
 813 static int __init rk30_lcdc_init(void)
 814 {
 815     return platform_driver_register(&rk30lcdc_driver);
 816 }
 817
 818 static void __exit rk30_lcdc_exit(void)
 819 {
 820     platform_driver_unregister(&rk30lcdc_driver);
 821 }
 822
 823
 824
 825 fs_initcall(rk30_lcdc_init);
 826 module_exit(rk30_lcdc_exit);
 827
 828
 829