drivers/video/rockchip/chips/rk30_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk30_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include "rk30_lcdc.h"
  34
  35
  36
  37
  38
  39
  40 static int dbg_thresd = 0;
  41 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  42 #define DBG(level,x...) do { if(unlikely(dbg_thresd >= level)) printk(KERN_INFO x); } while (0)
  43
  44
  45 static int rk30_lcdc_init(struct rk_lcdc_device_driver *dev_drv)
  46 {
  47         int i = 0;
  48         int __iomem *c;
  49         int v;
  50         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
  51         if(lcdc_dev->id == 0) //lcdc0
  52         {
  53                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
  54                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  55                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  56                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  57         }
  58         else if(lcdc_dev->id == 1)
  59         {
  60                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
  61                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  62                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  63                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  64         }
  65         else
  66         {
  67                 printk(KERN_ERR "invalid lcdc device!\n");
  68                 return -EINVAL;
  69         }
  70         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  71         {
  72                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  73         }
  74         clk_enable(lcdc_dev->pd);
  75         clk_enable(lcdc_dev->hclk);  //enable aclk and hclk for register config
  76         clk_enable(lcdc_dev->aclk);
  77         lcdc_dev->clk_on = 1;
  78         LcdMskReg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
  79                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID |
  80                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) |
  81                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) |
  82                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
  83                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
  84         LcdSetBit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
  85         LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
  86               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
  87               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
  88         if(dev_drv->cur_screen->dsp_lut)
  89         {
  90                 LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
  91                 LCDC_REG_CFG_DONE();
  92                 msleep(25);
  93                 for(i=0;i<256;i++)
  94                 {
  95                         v = dev_drv->cur_screen->dsp_lut[i];
  96                         c = lcdc_dev->dsp_lut_addr_base+i;
  97                         writel_relaxed(v,c);
  98
  99                 }
 100                 LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
 101         }
 102         LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 103         return 0;
 104 }
 105
 106 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
 107 {
 108         spin_lock(&lcdc_dev->reg_lock);
 109         if(likely(lcdc_dev->clk_on))
 110         {
 111                 lcdc_dev->clk_on = 0;
 112                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 113                 LcdMskReg(lcdc_dev, INT_STATUS, m_HOR_START_INT_EN | m_FRM_START_INT_EN |
 114                         m_LINE_FLAG_INT_EN | m_BUS_ERR_INT_EN,v_HOR_START_INT_EN(0) | v_FRM_START_INT_EN(0) |
 115                         v_LINE_FLAG_INT_EN(0) | v_BUS_ERR_INT_EN(0));  //disable all lcdc interrupt
 116                 LcdSetBit(lcdc_dev,SYS_CTRL0,m_LCDC_STANDBY);
 117                 LCDC_REG_CFG_DONE();
 118                 spin_unlock(&lcdc_dev->reg_lock);
 119         }
 120         else   //clk already disabled
 121         {
 122                 spin_unlock(&lcdc_dev->reg_lock);
 123                 return 0;
 124         }
 125         mdelay(1);
 126
 127         return 0;
 128 }
 129
 130 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
 131 {
 132         int ret = -EINVAL;
 133         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 134         rk_screen *screen = dev_drv->cur_screen;
 135         u64 ft;
 136         int fps;
 137         u16 face;
 138         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 139         u16 right_margin = screen->right_margin;
 140         u16 lower_margin = screen->lower_margin;
 141         u16 x_res = screen->x_res, y_res = screen->y_res;
 142
 143         // set the rgb or mcu
 144         spin_lock(&lcdc_dev->reg_lock);
 145         if(likely(lcdc_dev->clk_on))
 146         {
 147                 if(screen->type==SCREEN_MCU)
 148                 {
 149                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 150                         // set out format and mcu timing
 151                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 152                         if(mcu_total>31)
 153                                 mcu_total = 31;
 154                         if(mcu_total<3)
 155                                 mcu_total = 3;
 156                         mcu_rwstart = (mcu_total+1)/4 - 1;
 157                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 158                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 159                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 160
 161                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 162                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 163
 164                         // set horizontal & vertical out timing
 165
 166                         right_margin = x_res/6;
 167                         screen->pixclock = 150000000; //mcu fix to 150 MHz
 168                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 169                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 170                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 171                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 172                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 173
 174                 }
 175
 176                 switch (screen->face)
 177                 {
 178                         case OUT_P565:
 179                                 face = OUT_P565;
 180                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 181                                 break;
 182                         case OUT_P666:
 183                                 face = OUT_P666;
 184                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 185                                 break;
 186                         case OUT_D888_P565:
 187                                 face = OUT_P888;
 188                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 189                                 break;
 190                         case OUT_D888_P666:
 191                                 face = OUT_P888;
 192                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 193                                 break;
 194                         case OUT_P888:
 195                                 face = OUT_P888;
 196                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 197                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 198                                 break;
 199                         default:
 200                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 201                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 202                                 face = screen->face;
 203                                 break;
 204                 }
 205
 206                 //use default overlay,set vsyn hsync den dclk polarity
 207                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 208                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 209                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 210                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 211
 212                 //set background color to black,set swap according to the screen panel,disable blank mode
 213                 LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 214                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 215                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 216                         v_BLACK_MODE(0));
 217
 218
 219                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 220                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 221                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 222                      v_HASP(screen->hsync_len + screen->left_margin));
 223
 224                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 225                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 226                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 227                       v_VASP(screen->vsync_len + screen->upper_margin));
 228                 // let above to take effect
 229                 LCDC_REG_CFG_DONE();
 230         }
 231         spin_unlock(&lcdc_dev->reg_lock);
 232
 233         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 234         if(ret)
 235         {
 236                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 237         }
 238         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 239         clk_enable(lcdc_dev->dclk);
 240
 241         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 242                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 243                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
 244         fps = div64_u64(1000000000000llu,ft);
 245         screen->ft = 1000/fps;
 246         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
 247
 248         if(screen->init)
 249         {
 250                 screen->init();
 251         }
 252
 253         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 254         return 0;
 255 }
 256
 257 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
 258 {
 259
 260     return 0;
 261 }
 262
 263
 264
 265 //enable layer,open:1,enable;0 disable
 266 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 267 {
 268
 269         spin_lock(&lcdc_dev->reg_lock);
 270         if(likely(lcdc_dev->clk_on))
 271         {
 272                 if(open)
 273                 {
 274                         if(!lcdc_dev->atv_layer_cnt)
 275                         {
 276                                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 277                         }
 278                         lcdc_dev->atv_layer_cnt++;
 279                 }
 280                 else
 281                 {
 282                         lcdc_dev->atv_layer_cnt--;
 283                 }
 284                 lcdc_dev->driver.layer_par[0]->state = open;
 285
 286                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
 287                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 288                 {
 289                         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 290                 }
 291                 LCDC_REG_CFG_DONE();
 292         }
 293         spin_unlock(&lcdc_dev->reg_lock);
 294         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 295         return 0;
 296 }
 297 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 298 {
 299         spin_lock(&lcdc_dev->reg_lock);
 300         if(likely(lcdc_dev->clk_on))
 301         {
 302                 if(open)
 303                 {
 304                         if(!lcdc_dev->atv_layer_cnt)
 305                         {
 306                                 printk("lcdc%d wakeup from stanby\n",lcdc_dev->id);
 307                                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 308                         }
 309                         lcdc_dev->atv_layer_cnt++;
 310                 }
 311                 else
 312                 {
 313                         lcdc_dev->atv_layer_cnt--;
 314                 }
 315                 lcdc_dev->driver.layer_par[1]->state = open;
 316
 317                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
 318                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 319                 {
 320                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
 321                         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 322                 }
 323                 LCDC_REG_CFG_DONE();
 324         }
 325         spin_unlock(&lcdc_dev->reg_lock);
 326         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 327         return 0;
 328 }
 329
 330 static int win2_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 331 {
 332         spin_lock(&lcdc_dev->reg_lock);
 333         if(likely(lcdc_dev->clk_on))
 334         {
 335                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W2_EN, v_W2_EN(open));
 336                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 337                 lcdc_dev->driver.layer_par[1]->state = open;
 338         }
 339         spin_unlock(&lcdc_dev->reg_lock);
 340         printk(KERN_INFO "lcdc%d win2 %s\n",lcdc_dev->id,open?"open":"closed");
 341         return 0;
 342 }
 343
 344 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 345 {
 346         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
 347
 348         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 349
 350         spin_lock(&lcdc_dev->reg_lock);
 351         if(likely(lcdc_dev->clk_on))
 352         {
 353                 switch(blank_mode)
 354                 {
 355                         case FB_BLANK_UNBLANK:
 356                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 357                                 break;
 358                         case FB_BLANK_NORMAL:
 359                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 360                                 break;
 361                         default:
 362                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 363                                 break;
 364                 }
 365                 LCDC_REG_CFG_DONE();
 366         }
 367         spin_unlock(&lcdc_dev->reg_lock);
 368
 369         return 0;
 370 }
 371
 372 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 373 {
 374         u32 y_addr;
 375         u32 uv_addr;
 376         y_addr = par->smem_start + par->y_offset;
 377         uv_addr = par->cbr_start + par->c_offset;
 378         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 379
 380         spin_lock(&lcdc_dev->reg_lock);
 381         if(likely(lcdc_dev->clk_on))
 382         {
 383                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST0, y_addr);
 384                 LcdWrReg(lcdc_dev, WIN0_CBR_MST0, uv_addr);
 385                 LCDC_REG_CFG_DONE();
 386         }
 387         spin_unlock(&lcdc_dev->reg_lock);
 388
 389         return 0;
 390
 391 }
 392
 393 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 394 {
 395         u32 y_addr;
 396         u32 uv_addr;
 397         y_addr = par->smem_start + par->y_offset;
 398         uv_addr = par->cbr_start + par->c_offset;
 399         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 400
 401         spin_lock(&lcdc_dev->reg_lock);
 402         if(likely(lcdc_dev->clk_on))
 403         {
 404                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 405                 LcdWrReg(lcdc_dev, WIN1_CBR_MST, uv_addr);
 406                 LCDC_REG_CFG_DONE();
 407         }
 408         spin_unlock(&lcdc_dev->reg_lock);
 409
 410         return 0;
 411 }
 412
 413 static  int win2_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 414 {
 415         u32 y_addr;
 416         u32 uv_addr;
 417         y_addr = par->smem_start + par->y_offset;
 418         uv_addr = par->cbr_start + par->c_offset;
 419         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 420
 421         spin_lock(&lcdc_dev->reg_lock);
 422         if(likely(lcdc_dev->clk_on))
 423         {
 424                 LcdWrReg(lcdc_dev, WIN2_MST, y_addr);
 425                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 426         }
 427         spin_unlock(&lcdc_dev->reg_lock);
 428
 429         return 0;
 430 }
 431
 432 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 433         struct layer_par *par )
 434 {
 435         u32 xact, yact, xvir, yvir, xpos, ypos;
 436         u32 ScaleYrgbX = 0x1000;
 437         u32 ScaleYrgbY = 0x1000;
 438         u32 ScaleCbrX = 0x1000;
 439         u32 ScaleCbrY = 0x1000;
 440
 441         xact = par->xact;                           //active (origin) picture window width/height
 442         yact = par->yact;
 443         xvir = par->xvir;                          // virtual resolution
 444         yvir = par->yvir;
 445         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 446         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 447
 448
 449         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 450         ScaleYrgbY = CalScale(yact, par->ysize);
 451         switch (par->format)
 452         {
 453                 case YUV422:// yuv422
 454                         ScaleCbrX = CalScale((xact/2), par->xsize);
 455                         ScaleCbrY = CalScale(yact, par->ysize);
 456                         break;
 457                 case YUV420: // yuv420
 458                         ScaleCbrX = CalScale(xact/2, par->xsize);
 459                         ScaleCbrY = CalScale(yact/2, par->ysize);
 460                         break;
 461                 case YUV444:// yuv444
 462                         ScaleCbrX = CalScale(xact, par->xsize);
 463                         ScaleCbrY = CalScale(yact, par->ysize);
 464                         break;
 465                 default:
 466                    break;
 467         }
 468
 469         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 470                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 471
 472         spin_lock(&lcdc_dev->reg_lock);
 473         if(likely(lcdc_dev->clk_on))
 474         {
 475                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 476                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 477                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));          //(inf->video_mode==0)
 478                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 479                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 480                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 481                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 482                         v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 483                 switch(par->format)
 484                 {
 485                         case ARGB888:
 486                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
 487                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 488                                 break;
 489                         case RGB888:  //rgb888
 490                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 491                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
 492                                 break;
 493                         case RGB565:  //rgb565
 494                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
 495                                 break;
 496                         case YUV422:
 497                         case YUV420:
 498                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
 499                                 break;
 500                         default:
 501                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 502                                 break;
 503                 }
 504
 505                 LCDC_REG_CFG_DONE();
 506         }
 507         spin_unlock(&lcdc_dev->reg_lock);
 508
 509     return 0;
 510
 511 }
 512
 513 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 514         struct layer_par *par )
 515 {
 516         u32 xact, yact, xvir, yvir, xpos, ypos;
 517         u32 ScaleYrgbX = 0x1000;
 518         u32 ScaleYrgbY = 0x1000;
 519         u32 ScaleCbrX = 0x1000;
 520         u32 ScaleCbrY = 0x1000;
 521
 522         xact = par->xact;
 523         yact = par->yact;
 524         xvir = par->xvir;
 525         yvir = par->yvir;
 526         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 527         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 528
 529         ScaleYrgbX = CalScale(xact, par->xsize);
 530         ScaleYrgbY = CalScale(yact, par->ysize);
 531         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 532                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 533
 534
 535         spin_lock(&lcdc_dev->reg_lock);
 536         if(likely(lcdc_dev->clk_on))
 537         {
 538                 switch (par->format)
 539                 {
 540                         case YUV422:// yuv422
 541                                 ScaleCbrX = CalScale((xact/2), par->xsize);
 542                                 ScaleCbrY = CalScale(yact, par->ysize);
 543                                 break;
 544                         case YUV420: // yuv420
 545                                 ScaleCbrX = CalScale(xact/2, par->xsize);
 546                                 ScaleCbrY = CalScale(yact/2, par->ysize);
 547                                 break;
 548                         case YUV444:// yuv444
 549                                 ScaleCbrX = CalScale(xact, par->xsize);
 550                                 ScaleCbrY = CalScale(yact, par->ysize);
 551                                 break;
 552                         default:
 553                                 break;
 554                 }
 555
 556                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 557                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
 558                 LcdMskReg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
 559                 LcdWrReg(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 560                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 561                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 562                 // enable win1 color key and set the color to black(rgb=0)
 563                 LcdMskReg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 564                 switch(par->format)
 565                 {
 566                         case ARGB888:
 567                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
 568                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 569                                 break;
 570                         case RGB888:  //rgb888
 571                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 572                                 // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 573                                 break;
 574                         case RGB565:  //rgb565
 575                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
 576                                 break;
 577                         case YUV422:
 578                         case YUV420:
 579                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
 580                                 break;
 581                         default:
 582                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 583                                 break;
 584                 }
 585
 586                 LCDC_REG_CFG_DONE();
 587         }
 588         spin_unlock(&lcdc_dev->reg_lock);
 589     return 0;
 590 }
 591
 592 static int win2_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 593         struct layer_par *par )
 594 {
 595         u32 xact, yact, xvir, yvir, xpos, ypos;
 596         u32 ScaleYrgbX = 0x1000;
 597         u32 ScaleYrgbY = 0x1000;
 598         u32 ScaleCbrX = 0x1000;
 599         u32 ScaleCbrY = 0x1000;
 600
 601         xact = par->xact;
 602         yact = par->yact;
 603         xvir = par->xvir;
 604         yvir = par->yvir;
 605         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 606         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 607
 608         ScaleYrgbX = CalScale(xact, par->xsize);
 609         ScaleYrgbY = CalScale(yact, par->ysize);
 610         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 611                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 612
 613
 614         spin_lock(&lcdc_dev->reg_lock);
 615         if(likely(lcdc_dev->clk_on))
 616         {
 617
 618                 LcdMskReg(lcdc_dev,SYS_CTRL1, m_W2_FORMAT, v_W2_FORMAT(par->format));
 619                 LcdWrReg(lcdc_dev, WIN2_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 620                 LcdWrReg(lcdc_dev, WIN2_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 621                 // enable win1 color key and set the color to black(rgb=0)
 622                 LcdMskReg(lcdc_dev, WIN2_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 623                 switch(par->format)
 624                 {
 625                         case ARGB888:
 626                                 LcdWrReg(lcdc_dev, WIN2_VIR,v_ARGB888_VIRWIDTH(xvir));
 627                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 628                                 break;
 629                         case RGB888:  //rgb888
 630                                 LcdWrReg(lcdc_dev, WIN2_VIR,v_RGB888_VIRWIDTH(xvir));
 631                                 // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 632                                 break;
 633                         case RGB565:  //rgb565
 634                                 LcdWrReg(lcdc_dev, WIN2_VIR,v_RGB565_VIRWIDTH(xvir));
 635                                 break;
 636                         case YUV422:
 637                         case YUV420:
 638                                 LcdWrReg(lcdc_dev, WIN2_VIR,v_YUV_VIRWIDTH(xvir));
 639                                 break;
 640                         default:
 641                                 LcdWrReg(lcdc_dev, WIN2_VIR,v_RGB888_VIRWIDTH(xvir));
 642                                 break;
 643                 }
 644
 645                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 646         }
 647         spin_unlock(&lcdc_dev->reg_lock);
 648     return 0;
 649 }
 650
 651 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 652 {
 653         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 654         if(layer_id == 0)
 655         {
 656                 win0_open(lcdc_dev,open);
 657         }
 658         else if(layer_id == 1)
 659         {
 660                 win1_open(lcdc_dev,open);
 661         }
 662         else if(layer_id == 2)
 663         {
 664                 win2_open(lcdc_dev,open);
 665         }
 666
 667         return 0;
 668 }
 669
 670 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 671 {
 672         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 673         struct layer_par *par = NULL;
 674         rk_screen *screen = dev_drv->cur_screen;
 675         if(!screen)
 676         {
 677                 printk(KERN_ERR "screen is null!\n");
 678                 return -ENOENT;
 679         }
 680         if(layer_id==0)
 681         {
 682                 par = dev_drv->layer_par[0];
 683                 win0_set_par(lcdc_dev,screen,par);
 684         }
 685         else if(layer_id==1)
 686         {
 687                 par = dev_drv->layer_par[1];
 688                 win1_set_par(lcdc_dev,screen,par);
 689         }
 690         else if(layer_id == 2)
 691         {
 692                 par = dev_drv->layer_par[2];
 693                 win2_set_par(lcdc_dev,screen,par);
 694         }
 695
 696         return 0;
 697 }
 698
 699 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 700 {
 701         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 702         struct layer_par *par = NULL;
 703         rk_screen *screen = dev_drv->cur_screen;
 704         unsigned long flags;
 705         int timeout;
 706         if(!screen)
 707         {
 708                 printk(KERN_ERR "screen is null!\n");
 709                 return -ENOENT;
 710         }
 711         if(layer_id==0)
 712         {
 713                 par = dev_drv->layer_par[0];
 714                 win0_display(lcdc_dev,par);
 715         }
 716         else if(layer_id==1)
 717         {
 718                 par = dev_drv->layer_par[1];
 719                 win1_display(lcdc_dev,par);
 720         }
 721         else if(layer_id == 2)
 722         {
 723                 par = dev_drv->layer_par[2];
 724                 win2_display(lcdc_dev,par);
 725         }
 726         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 727         {
 728                 dev_drv->first_frame = 0;
 729                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
 730                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
 731                 LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 732
 733         }
 734
 735         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
 736         {
 737                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 738                 init_completion(&dev_drv->frame_done);
 739                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 740                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->cur_screen->ft+5));
 741                 if(!timeout&&(!dev_drv->frame_done.done))
 742                 {
 743                         printk(KERN_ERR "wait for new frame start time out!\n");
 744                         return -ETIMEDOUT;
 745                 }
 746         }
 747
 748         return 0;
 749 }
 750
 751 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 752 {
 753         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 754         u32 panel_size[2];
 755         void __user *argp = (void __user *)arg;
 756         int ret = 0;
 757         switch(cmd)
 758         {
 759                 case FBIOGET_PANEL_SIZE:    //get panel size
 760                         panel_size[0] = dev_drv->screen0->x_res;
 761                         panel_size[1] = dev_drv->screen0->y_res;
 762                         if(copy_to_user(argp, panel_size, 8))
 763                                 return -EFAULT;
 764                         break;
 765                 default:
 766                         break;
 767         }
 768
 769         return ret;
 770 }
 771 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 772 {
 773         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 774         struct layer_par *par = dev_drv->layer_par[layer_id];
 775
 776         spin_lock(&lcdc_dev->reg_lock);
 777         if(lcdc_dev->clk_on)
 778         {
 779                 if(layer_id == 0)
 780                 {
 781                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W0_EN);
 782                 }
 783                 else if( layer_id == 1)
 784                 {
 785                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W1_EN);
 786                 }
 787         }
 788         spin_unlock(&lcdc_dev->reg_lock);
 789
 790         return par->state;
 791
 792 }
 793
 794 /***********************************
 795 overlay manager
 796 swap:1 win0 on the top of win1
 797         0 win1 on the top of win0
 798 set  : 1 set overlay
 799         0 get overlay state
 800 ************************************/
 801 static int rk30_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
 802 {
 803         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 804         int ovl;
 805         spin_lock(&lcdc_dev->reg_lock);
 806         if(lcdc_dev->clk_on)
 807         {
 808                 if(set)  //set overlay
 809                 {
 810                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
 811                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 812                         LCDC_REG_CFG_DONE();
 813                         ovl = swap;
 814                 }
 815                 else  //get overlay
 816                 {
 817                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
 818                 }
 819         }
 820         else
 821         {
 822                 ovl = -EPERM;
 823         }
 824         spin_unlock(&lcdc_dev->reg_lock);
 825
 826         return ovl;
 827 }
 828 static int rk30_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 829 {
 830         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 831         return 0;
 832 }
 833
 834
 835 /*******************************************
 836 lcdc fps manager,set or get lcdc fps
 837 set:0 get
 838      1 set
 839 ********************************************/
 840 static int rk30_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
 841 {
 842         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 843         rk_screen * screen = dev_drv->cur_screen;
 844         u64 ft = 0;
 845         u32 dotclk;
 846         int ret;
 847
 848         if(set)
 849         {
 850                 ft = div_u64(1000000000000llu,fps);
 851                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 852                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
 853                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
 854                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
 855                 if(ret)
 856                 {
 857                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 858                 }
 859                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 860
 861         }
 862
 863         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 864         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 865         (dev_drv->pixclock);       // one frame time ,(pico seconds)
 866         fps = div64_u64(1000000000000llu,ft);
 867         screen->ft = 1000/fps ;  //one frame time in ms
 868         return fps;
 869 }
 870
 871 static int rk30_fb_layer_remap(struct rk_lcdc_device_driver *dev_drv,
 872         enum fb_win_map_order order)
 873 {
 874        mutex_lock(&dev_drv->fb_win_id_mutex);
 875        if(order == FB_DEFAULT_ORDER )
 876         {
 877                 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
 878         }
 879        dev_drv->fb2_win_id  = order/100;
 880        dev_drv->fb1_win_id = (order/10)%10;
 881        dev_drv->fb0_win_id = order%10;
 882        mutex_unlock(&dev_drv->fb_win_id_mutex);
 883
 884        printk("fb0:win%d\nfb1:win%d\nfb2:win%d\n",dev_drv->fb0_win_id,dev_drv->fb1_win_id,
 885                dev_drv->fb2_win_id);
 886
 887        return 0;
 888 }
 889
 890 static int rk30_fb_get_layer(struct rk_lcdc_device_driver *dev_drv,const char *id)
 891 {
 892        int layer_id = 0;
 893        mutex_lock(&dev_drv->fb_win_id_mutex);
 894        if(!strcmp(id,"fb0")||!strcmp(id,"fb3"))
 895        {
 896                layer_id = dev_drv->fb0_win_id;
 897        }
 898        else if(!strcmp(id,"fb1")||!strcmp(id,"fb4"))
 899        {
 900                layer_id = dev_drv->fb1_win_id;
 901        }
 902        else if(!strcmp(id,"fb2")||!strcmp(id,"fb5"))
 903        {
 904                layer_id = dev_drv->fb2_win_id;
 905        }
 906        mutex_unlock(&dev_drv->fb_win_id_mutex);
 907
 908        return  layer_id;
 909 }
 910
 911 static int rk30_read_dsp_lut(struct rk_lcdc_device_driver *dev_drv,int *lut)
 912 {
 913
 914         return 0;
 915 }
 916
 917 static int rk30_set_dsp_lut(struct rk_lcdc_device_driver *dev_drv,int *lut)
 918 {
 919         int i=0;
 920         int __iomem *c;
 921         int v;
 922         int ret = 0;
 923
 924         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 925         LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
 926         LCDC_REG_CFG_DONE();
 927         msleep(25);
 928         if(dev_drv->cur_screen->dsp_lut)
 929         {
 930                 for(i=0;i<256;i++)
 931                 {
 932                         v = dev_drv->cur_screen->dsp_lut[i] = lut[i];
 933                         c = lcdc_dev->dsp_lut_addr_base+i;
 934                         writel_relaxed(v,c);
 935
 936                 }
 937         }
 938         else
 939         {
 940                 printk(KERN_WARNING "no buffer to backup lut data!\n");
 941                 ret =  -1;
 942         }
 943         LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
 944         LCDC_REG_CFG_DONE();
 945
 946         return ret;
 947 }
 948 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 949 {
 950         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 951
 952         spin_lock(&lcdc_dev->reg_lock);
 953         if(likely(lcdc_dev->clk_on))
 954         {
 955                 lcdc_dev->clk_on = 0;
 956                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 957                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 958                 LCDC_REG_CFG_DONE();
 959                 spin_unlock(&lcdc_dev->reg_lock);
 960         }
 961         else  //clk already disabled
 962         {
 963                 spin_unlock(&lcdc_dev->reg_lock);
 964                 return 0;
 965         }
 966
 967
 968         mdelay(1);
 969         clk_disable(lcdc_dev->dclk);
 970         clk_disable(lcdc_dev->hclk);
 971         clk_disable(lcdc_dev->aclk);
 972         clk_disable(lcdc_dev->pd);
 973
 974         return 0;
 975 }
 976
 977
 978 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 979 {
 980         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 981         int i=0;
 982         int __iomem *c;
 983         int v;
 984         if(!lcdc_dev->clk_on)
 985         {
 986                 clk_enable(lcdc_dev->pd);
 987                 clk_enable(lcdc_dev->hclk);
 988                 clk_enable(lcdc_dev->dclk);
 989                 clk_enable(lcdc_dev->aclk);
 990         }
 991         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 992
 993         spin_lock(&lcdc_dev->reg_lock);
 994         if(dev_drv->cur_screen->dsp_lut)                        //resume dsp lut
 995         {
 996                 LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
 997                 LCDC_REG_CFG_DONE();
 998                 mdelay(25);
 999                 for(i=0;i<256;i++)
1000                 {
1001                         v = dev_drv->cur_screen->dsp_lut[i];
1002                         c = lcdc_dev->dsp_lut_addr_base+i;
1003                         writel_relaxed(v,c);
1004
1005                 }
1006                 LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
1007         }
1008         if(lcdc_dev->atv_layer_cnt)
1009         {
1010                 LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
1011                 LCDC_REG_CFG_DONE();
1012         }
1013         lcdc_dev->clk_on = 1;
1014         spin_unlock(&lcdc_dev->reg_lock);
1015
1016         return 0;
1017 }
1018 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
1019 {
1020         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
1021
1022         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
1023         LCDC_REG_CFG_DONE();
1024         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
1025
1026         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
1027         {
1028                 spin_lock(&(lcdc_dev->driver.cpl_lock));
1029                 complete(&(lcdc_dev->driver.frame_done));
1030                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
1031         }
1032         return IRQ_HANDLED;
1033 }
1034
1035 static struct layer_par lcdc_layer[] = {
1036         [0] = {
1037                 .name           = "win0",
1038                 .id             = 0,
1039                 .support_3d     = true,
1040         },
1041         [1] = {
1042                 .name           = "win1",
1043                 .id             = 1,
1044                 .support_3d     = false,
1045         },
1046         [2] = {
1047                 .name           = "win2",
1048                 .id             = 2,
1049                 .support_3d     = false,
1050         },
1051 };
1052
1053 static struct rk_lcdc_device_driver lcdc_driver = {
1054         .name                   = "lcdc",
1055         .def_layer_par          = lcdc_layer,
1056         .num_layer              = ARRAY_SIZE(lcdc_layer),
1057         .open                   = rk30_lcdc_open,
1058         .init_lcdc              = rk30_lcdc_init,
1059         .ioctl                  = rk30_lcdc_ioctl,
1060         .suspend                = rk30_lcdc_early_suspend,
1061         .resume                 = rk30_lcdc_early_resume,
1062         .set_par                = rk30_lcdc_set_par,
1063         .blank                  = rk30_lcdc_blank,
1064         .pan_display            = rk30_lcdc_pan_display,
1065         .load_screen            = rk30_load_screen,
1066         .get_layer_state        = rk30_lcdc_get_layer_state,
1067         .ovl_mgr                = rk30_lcdc_ovl_mgr,
1068         .get_disp_info          = rk30_lcdc_get_disp_info,
1069         .fps_mgr                = rk30_lcdc_fps_mgr,
1070         .fb_get_layer           = rk30_fb_get_layer,
1071         .fb_layer_remap         = rk30_fb_layer_remap,
1072         .set_dsp_lut            = rk30_set_dsp_lut,
1073         .read_dsp_lut           = rk30_read_dsp_lut,
1074 };
1075 #ifdef CONFIG_PM
1076 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1077 {
1078         return 0;
1079 }
1080
1081 static int rk30_lcdc_resume(struct platform_device *pdev)
1082 {
1083         return 0;
1084 }
1085
1086 #else
1087 #define rk30_lcdc_suspend NULL
1088 #define rk30_lcdc_resume NULL
1089 #endif
1090
1091 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
1092 {
1093         struct rk30_lcdc_device *lcdc_dev=NULL;
1094         rk_screen *screen;
1095         struct rk29fb_info *screen_ctr_info;
1096         struct resource *res = NULL;
1097         struct resource *mem;
1098         int ret = 0;
1099
1100         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
1101         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
1102         if(!lcdc_dev)
1103         {
1104                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
1105                 return -ENOMEM;
1106         }
1107         platform_set_drvdata(pdev, lcdc_dev);
1108         lcdc_dev->id = pdev->id;
1109         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
1110         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
1111         if(!screen)
1112         {
1113                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
1114                 ret =  -ENOMEM;
1115                 goto err0;
1116         }
1117         /****************get lcdc0 reg  *************************/
1118         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
1119         if (res == NULL)
1120         {
1121                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
1122                 ret = -ENOENT;
1123                 goto err1;
1124         }
1125         lcdc_dev->reg_phy_base = res->start;
1126         lcdc_dev->len = resource_size(res);
1127         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
1128         if (mem == NULL)
1129         {
1130                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
1131                 ret = -ENOENT;
1132                 goto err1;
1133         }
1134         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
1135         if (lcdc_dev->reg_vir_base == NULL)
1136         {
1137                 dev_err(&pdev->dev, "cannot map IO\n");
1138                 ret = -ENXIO;
1139                 goto err2;
1140         }
1141
1142         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
1143         lcdc_dev->dsp_lut_addr_base = &lcdc_dev->preg->DSP_LUT_ADDR;
1144         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
1145         lcdc_dev->driver.dev=&pdev->dev;
1146         lcdc_dev->driver.screen0 = screen;
1147         lcdc_dev->driver.cur_screen = screen;
1148         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
1149         spin_lock_init(&lcdc_dev->reg_lock);
1150         lcdc_dev->irq = platform_get_irq(pdev, 0);
1151         if(lcdc_dev->irq < 0)
1152         {
1153                 dev_err(&pdev->dev, "cannot find IRQ\n");
1154                 goto err3;
1155         }
1156         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
1157         if (ret)
1158         {
1159                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
1160                ret = -EBUSY;
1161                goto err3;
1162         }
1163         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
1164         if(ret < 0)
1165         {
1166                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
1167                 goto err4;
1168         }
1169         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
1170
1171         return 0;
1172
1173 err4:
1174         free_irq(lcdc_dev->irq,lcdc_dev);
1175 err3:
1176         iounmap(lcdc_dev->reg_vir_base);
1177 err2:
1178         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
1179 err1:
1180         kfree(screen);
1181 err0:
1182         platform_set_drvdata(pdev, NULL);
1183         kfree(lcdc_dev);
1184         return ret;
1185
1186 }
1187 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
1188 {
1189         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1190         rk_fb_unregister(&(lcdc_dev->driver));
1191         rk30_lcdc_deinit(lcdc_dev);
1192         iounmap(lcdc_dev->reg_vir_base);
1193         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1194         kfree(lcdc_dev->screen);
1195         kfree(lcdc_dev);
1196         return 0;
1197 }
1198
1199 static void rk30_lcdc_shutdown(struct platform_device *pdev)
1200 {
1201         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1202         if(lcdc_dev->driver.cur_screen->standby) //standby the screen if necessary
1203                 lcdc_dev->driver.cur_screen->standby(1);
1204         if(lcdc_dev->driver.screen_ctr_info->io_disable) //power off the screen if necessary
1205                 lcdc_dev->driver.screen_ctr_info->io_disable();
1206         if(lcdc_dev->driver.cur_screen->sscreen_set) //turn off  lvds if necessary
1207                 lcdc_dev->driver.cur_screen->sscreen_set(lcdc_dev->driver.cur_screen , 0);
1208         rk_fb_unregister(&(lcdc_dev->driver));
1209         rk30_lcdc_deinit(lcdc_dev);
1210         /*iounmap(lcdc_dev->reg_vir_base);
1211         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1212         kfree(lcdc_dev->screen);
1213         kfree(lcdc_dev);*/
1214 }
1215
1216
1217 static struct platform_driver rk30lcdc_driver = {
1218         .probe          = rk30_lcdc_probe,
1219         .remove         = __devexit_p(rk30_lcdc_remove),
1220         .driver         = {
1221                 .name   = "rk30-lcdc",
1222                 .owner  = THIS_MODULE,
1223         },
1224         .suspend        = rk30_lcdc_suspend,
1225         .resume         = rk30_lcdc_resume,
1226         .shutdown   = rk30_lcdc_shutdown,
1227 };
1228
1229 static int __init rk30_lcdc_module_init(void)
1230 {
1231     return platform_driver_register(&rk30lcdc_driver);
1232 }
1233
1234 static void __exit rk30_lcdc_module_exit(void)
1235 {
1236     platform_driver_unregister(&rk30lcdc_driver);
1237 }
1238
1239
1240
1241 fs_initcall(rk30_lcdc_module_init);
1242 module_exit(rk30_lcdc_module_exit);
1243
1244
1245