drivers/video/rockchip/chips/rk30_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk30_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include "rk30_lcdc.h"
  34
  35
  36
  37
  38
  39
  40 static int dbg_thresd = 0;
  41 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  42 #define DBG(level,x...) do { if(unlikely(dbg_thresd > level)) printk(KERN_INFO x); } while (0)
  43
  44
  45 static int init_rk30_lcdc(struct rk_lcdc_device_driver *dev_drv)
  46 {
  47         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
  48         if(lcdc_dev->id == 0) //lcdc0
  49         {
  50                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  51                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  52                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  53         }
  54         else if(lcdc_dev->id == 1)
  55         {
  56                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  57                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  58                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  59         }
  60         else
  61         {
  62                 printk(KERN_ERR "invalid lcdc device!\n");
  63                 return -EINVAL;
  64         }
  65         if ((IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  66         {
  67                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  68         }
  69         clk_enable(lcdc_dev->hclk);  //enable aclk and hclk for register config
  70         clk_enable(lcdc_dev->aclk);
  71         lcdc_dev->clk_on = 1;
  72         LcdMskReg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
  73                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID |
  74                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) |
  75                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) |
  76                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
  77                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
  78         LcdSetBit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
  79         LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
  80               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
  81               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
  82         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
  83         return 0;
  84 }
  85
  86 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
  87 {
  88         LcdSetBit(lcdc_dev,SYS_CTRL0,m_LCDC_STANDBY);
  89         clk_disable(lcdc_dev->aclk);
  90         clk_disable(lcdc_dev->dclk);
  91         clk_disable(lcdc_dev->hclk);
  92         clk_put(lcdc_dev->aclk);
  93         clk_put(lcdc_dev->dclk);
  94         clk_put(lcdc_dev->hclk);
  95
  96         return 0;
  97 }
  98
  99 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
 100 {
 101         int ret = -EINVAL;
 102         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 103         rk_screen *screen = lcdc_dev->screen;
 104         u16 face;
 105         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 106         u16 right_margin = screen->right_margin;
 107         u16 lower_margin = screen->lower_margin;
 108         u16 x_res = screen->x_res, y_res = screen->y_res;
 109
 110         // set the rgb or mcu
 111         spin_lock(&lcdc_dev->reg_lock);
 112         if(likely(lcdc_dev->clk_on))
 113         {
 114                 if(screen->type==SCREEN_MCU)
 115                 {
 116                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 117                         // set out format and mcu timing
 118                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 119                         if(mcu_total>31)
 120                                 mcu_total = 31;
 121                         if(mcu_total<3)
 122                                 mcu_total = 3;
 123                         mcu_rwstart = (mcu_total+1)/4 - 1;
 124                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 125                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 126                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 127
 128                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 129                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 130
 131                         // set horizontal & vertical out timing
 132
 133                         right_margin = x_res/6;
 134                         screen->pixclock = 150000000; //mcu fix to 150 MHz
 135                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 136                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 137                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 138                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 139                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 140
 141                 }
 142
 143                 switch (screen->face)
 144                 {
 145                         case OUT_P565:
 146                                 face = OUT_P565;
 147                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 148                                 break;
 149                         case OUT_P666:
 150                                 face = OUT_P666;
 151                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 152                                 break;
 153                         case OUT_D888_P565:
 154                                 face = OUT_P888;
 155                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 156                                 break;
 157                         case OUT_D888_P666:
 158                                 face = OUT_P888;
 159                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 160                                 break;
 161                         case OUT_P888:
 162                                 face = OUT_P888;
 163                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 164                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 165                                 break;
 166                         default:
 167                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 168                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 169                                 face = screen->face;
 170                                 break;
 171                 }
 172
 173                 //use default overlay,set vsyn hsync den dclk polarity
 174                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 175                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 176                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 177                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 178
 179                 //set background color to black,set swap according to the screen panel,disable blank mode
 180                 LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 181                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 182                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 183                         v_BLACK_MODE(0));
 184
 185
 186                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 187                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 188                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 189                      v_HASP(screen->hsync_len + screen->left_margin));
 190
 191                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 192                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 193                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 194                       v_VASP(screen->vsync_len + screen->upper_margin));
 195                 // let above to take effect
 196                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 197         }
 198         spin_unlock(&lcdc_dev->reg_lock);
 199
 200         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 201         if(ret)
 202         {
 203                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 204         }
 205         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 206         clk_enable(lcdc_dev->dclk);
 207         printk("%s: dclk:%lu ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk));
 208         if(initscreen)
 209         {
 210                 if(screen->lcdc_aclk)
 211                 {
 212                         ret = clk_set_rate(lcdc_dev->aclk, screen->lcdc_aclk);
 213                         if(ret)
 214                         {
 215                                 printk(KERN_ERR ">>>>>> set lcdc%d aclk  rate failed\n",lcdc_dev->id);
 216                         }
 217
 218                         clk_enable(lcdc_dev->aclk);
 219                         printk("aclk:%lu\n",clk_get_rate(lcdc_dev->aclk));
 220                 }
 221
 222         }
 223
 224         if(screen->init)
 225         {
 226                 screen->init();
 227         }
 228
 229         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 230         return 0;
 231 }
 232
 233 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
 234 {
 235
 236     return 0;
 237 }
 238
 239
 240
 241 //enable layer,open:1,enable;0 disable
 242 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 243 {
 244
 245         spin_lock(&lcdc_dev->reg_lock);
 246         if(likely(lcdc_dev->clk_on))
 247         {
 248                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
 249                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 250                 lcdc_dev->driver.layer_par[0]->state = open;
 251         }
 252         spin_unlock(&lcdc_dev->reg_lock);
 253         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 254         return 0;
 255 }
 256 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
 257 {
 258         spin_lock(&lcdc_dev->reg_lock);
 259         if(likely(lcdc_dev->clk_on))
 260         {
 261                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
 262                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 263                 lcdc_dev->driver.layer_par[1]->state = open;
 264         }
 265         spin_unlock(&lcdc_dev->reg_lock);
 266         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 267         return 0;
 268 }
 269
 270
 271 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 272 {
 273         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
 274
 275         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 276
 277         spin_lock(&lcdc_dev->reg_lock);
 278         if(likely(lcdc_dev->clk_on))
 279         {
 280                 switch(blank_mode)
 281                 {
 282                         case FB_BLANK_UNBLANK:
 283                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 284                                 break;
 285                         case FB_BLANK_NORMAL:
 286                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 287                                 break;
 288                         default:
 289                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 290                                 break;
 291                 }
 292                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 293         }
 294         spin_unlock(&lcdc_dev->reg_lock);
 295
 296         return 0;
 297 }
 298
 299 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 300 {
 301         u32 y_addr;
 302         u32 uv_addr;
 303         y_addr = par->smem_start + par->y_offset;
 304         uv_addr = par->cbr_start + par->c_offset;
 305         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 306
 307         spin_lock(&lcdc_dev->reg_lock);
 308         if(likely(lcdc_dev->clk_on))
 309         {
 310                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST0, y_addr);
 311                 LcdWrReg(lcdc_dev, WIN0_CBR_MST0, uv_addr);
 312                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 313         }
 314         spin_unlock(&lcdc_dev->reg_lock);
 315
 316         return 0;
 317
 318 }
 319
 320 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
 321 {
 322         u32 y_addr;
 323         u32 uv_addr;
 324         y_addr = par->smem_start + par->y_offset;
 325         uv_addr = par->cbr_start + par->c_offset;
 326         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 327
 328         spin_lock(&lcdc_dev->reg_lock);
 329         if(likely(lcdc_dev->clk_on))
 330         {
 331                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 332                 LcdWrReg(lcdc_dev, WIN1_CBR_MST, uv_addr);
 333                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 334         }
 335         spin_unlock(&lcdc_dev->reg_lock);
 336
 337         return 0;
 338 }
 339
 340 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 341         struct layer_par *par )
 342 {
 343         u32 xact, yact, xvir, yvir, xpos, ypos;
 344         u32 ScaleYrgbX = 0x1000;
 345         u32 ScaleYrgbY = 0x1000;
 346         u32 ScaleCbrX = 0x1000;
 347         u32 ScaleCbrY = 0x1000;
 348
 349         xact = par->xact;                           //active (origin) picture window width/height
 350         yact = par->yact;
 351         xvir = par->xvir;                          // virtual resolution
 352         yvir = par->yvir;
 353         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 354         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 355
 356
 357         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 358         ScaleYrgbY = CalScale(yact, par->ysize);
 359         switch (par->format)
 360         {
 361                 case YUV422:// yuv422
 362                         ScaleCbrX = CalScale((xact/2), par->xsize);
 363                         ScaleCbrY = CalScale(yact, par->ysize);
 364                         break;
 365                 case YUV420: // yuv420
 366                         ScaleCbrX = CalScale(xact/2, par->xsize);
 367                         ScaleCbrY = CalScale(yact/2, par->ysize);
 368                         break;
 369                 case YUV444:// yuv444
 370                         ScaleCbrX = CalScale(xact, par->xsize);
 371                         ScaleCbrY = CalScale(yact, par->ysize);
 372                         break;
 373                 default:
 374                    break;
 375         }
 376
 377         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 378                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 379
 380         spin_lock(&lcdc_dev->reg_lock);
 381         if(likely(lcdc_dev->clk_on))
 382         {
 383                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 384                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 385                 LcdMskReg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));          //(inf->video_mode==0)
 386                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 387                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 388                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 389                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 390                         v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 391                 switch(par->format)
 392                 {
 393                         case ARGB888:
 394                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
 395                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 396                                 break;
 397                         case RGB888:  //rgb888
 398                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 399                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
 400                                 break;
 401                         case RGB565:  //rgb565
 402                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
 403                                 break;
 404                         case YUV422:
 405                         case YUV420:
 406                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
 407                                 break;
 408                         default:
 409                                 LcdWrReg(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
 410                                 break;
 411                 }
 412
 413                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 414         }
 415         spin_unlock(&lcdc_dev->reg_lock);
 416
 417     return 0;
 418
 419 }
 420
 421 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
 422         struct layer_par *par )
 423 {
 424         u32 xact, yact, xvir, yvir, xpos, ypos;
 425         u32 ScaleYrgbX = 0x1000;
 426         u32 ScaleYrgbY = 0x1000;
 427         u32 ScaleCbrX = 0x1000;
 428         u32 ScaleCbrY = 0x1000;
 429
 430         xact = par->xact;
 431         yact = par->yact;
 432         xvir = par->xvir;
 433         yvir = par->yvir;
 434         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 435         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 436
 437         ScaleYrgbX = CalScale(xact, par->xsize);
 438         ScaleYrgbY = CalScale(yact, par->ysize);
 439         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 440                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 441
 442
 443         spin_lock(&lcdc_dev->reg_lock);
 444         if(likely(lcdc_dev->clk_on))
 445         {
 446                 switch (par->format)
 447                 {
 448                         case YUV422:// yuv422
 449                                 ScaleCbrX = CalScale((xact/2), par->xsize);
 450                                 ScaleCbrY = CalScale(yact, par->ysize);
 451                                 break;
 452                         case YUV420: // yuv420
 453                                 ScaleCbrX = CalScale(xact/2, par->xsize);
 454                                 ScaleCbrY = CalScale(yact/2, par->ysize);
 455                                 break;
 456                         case YUV444:// yuv444
 457                                 ScaleCbrX = CalScale(xact, par->xsize);
 458                                 ScaleCbrY = CalScale(yact, par->ysize);
 459                                 break;
 460                         default:
 461                                 break;
 462                 }
 463
 464                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 465                 LcdWrReg(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
 466                 LcdMskReg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
 467                 LcdWrReg(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 468                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 469                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 470                 // enable win1 color key and set the color to black(rgb=0)
 471                 LcdMskReg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
 472                 switch(par->format)
 473                 {
 474                         case ARGB888:
 475                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
 476                                 //LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 477                                 break;
 478                         case RGB888:  //rgb888
 479                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 480                                 // LcdMskReg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
 481                                 break;
 482                         case RGB565:  //rgb565
 483                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
 484                                 break;
 485                         case YUV422:
 486                         case YUV420:
 487                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
 488                                 break;
 489                         default:
 490                                 LcdWrReg(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
 491                                 break;
 492                 }
 493
 494                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 495         }
 496         spin_unlock(&lcdc_dev->reg_lock);
 497     return 0;
 498 }
 499
 500 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 501 {
 502         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 503         if(layer_id == 0)
 504         {
 505                 win0_open(lcdc_dev,open);
 506         }
 507         else if(layer_id == 1)
 508         {
 509                 win1_open(lcdc_dev,open);
 510         }
 511
 512         return 0;
 513 }
 514
 515 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 516 {
 517         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 518         struct layer_par *par = NULL;
 519         rk_screen *screen = lcdc_dev->screen;
 520         if(!screen)
 521         {
 522                 printk(KERN_ERR "screen is null!\n");
 523                 return -ENOENT;
 524         }
 525         if(layer_id==0)
 526         {
 527                 par = dev_drv->layer_par[0];
 528                 win0_set_par(lcdc_dev,screen,par);
 529         }
 530         else if(layer_id==1)
 531         {
 532                 par = dev_drv->layer_par[1];
 533                 win1_set_par(lcdc_dev,screen,par);
 534         }
 535
 536         return 0;
 537 }
 538
 539 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 540 {
 541         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 542         struct layer_par *par = NULL;
 543         rk_screen *screen = lcdc_dev->screen;
 544         unsigned long flags;
 545         int timeout;
 546         if(!screen)
 547         {
 548                 printk(KERN_ERR "screen is null!\n");
 549                 return -ENOENT;
 550         }
 551         if(layer_id==0)
 552         {
 553                 par = dev_drv->layer_par[0];
 554                 win0_display(lcdc_dev,par);
 555         }
 556         else if(layer_id==1)
 557         {
 558                 par = dev_drv->layer_par[1];
 559                 win1_display(lcdc_dev,par);
 560         }
 561         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 562         {
 563                 dev_drv->first_frame = 0;
 564                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
 565                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
 566                 LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);  // write any value to  REG_CFG_DONE let config become effective
 567
 568         }
 569
 570         spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 571         init_completion(&dev_drv->frame_done);
 572         spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 573         timeout = wait_for_completion_interruptible_timeout(&dev_drv->frame_done,msecs_to_jiffies(25));
 574         if(!timeout)
 575         {
 576                 printk(KERN_ERR "wait for new frame start time out!\n");
 577                 return -ETIMEDOUT;
 578         }
 579         else if(timeout < 0)
 580         {
 581                 return timeout;
 582         }
 583
 584         return 0;
 585 }
 586
 587 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 588 {
 589         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 590         u32 panel_size[2];
 591         void __user *argp = (void __user *)arg;
 592         int ret = 0;
 593         switch(cmd)
 594         {
 595                 case FBIOGET_PANEL_SIZE:    //get panel size
 596                         panel_size[0] = lcdc_dev->screen->x_res;
 597                         panel_size[1] = lcdc_dev->screen->y_res;
 598                         if(copy_to_user(argp, panel_size, 8))
 599                                 return -EFAULT;
 600                         break;
 601                 default:
 602                         break;
 603         }
 604
 605         return ret;
 606 }
 607 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 608 {
 609         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 610         struct layer_par *par = dev_drv->layer_par[layer_id];
 611
 612         spin_lock(&lcdc_dev->reg_lock);
 613         if(lcdc_dev->clk_on)
 614         {
 615                 if(layer_id == 0)
 616                 {
 617                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W0_EN);
 618                 }
 619                 else if( layer_id == 1)
 620                 {
 621                         par->state = LcdReadBit(lcdc_dev,SYS_CTRL1,m_W1_EN);
 622                 }
 623         }
 624         spin_unlock(&lcdc_dev->reg_lock);
 625
 626         return par->state;
 627
 628 }
 629
 630 /***********************************
 631 overlay manager
 632 swap:1 win0 on the top of win1
 633         0 win1 on the top of win0
 634 set  : 1 set overlay
 635         0 get overlay state
 636 ************************************/
 637 static int rk30_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
 638 {
 639         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 640         int ovl;
 641         spin_lock(&lcdc_dev->reg_lock);
 642         if(lcdc_dev->clk_on)
 643         {
 644                 if(set)  //set overlay
 645                 {
 646                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
 647                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 648                         ovl = swap;
 649                 }
 650                 else  //get overlay
 651                 {
 652                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
 653                 }
 654         }
 655         else
 656         {
 657                 ovl = -EPERM;
 658         }
 659         spin_unlock(&lcdc_dev->reg_lock);
 660
 661         return ovl;
 662 }
 663 static int rk30_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 664 {
 665         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 666         return 0;
 667 }
 668
 669 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 670 {
 671         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 672
 673         spin_lock(&lcdc_dev->reg_lock);
 674         lcdc_dev->clk_on = 0;
 675         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 676         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 677         spin_unlock(&lcdc_dev->reg_lock);
 678
 679         return 0;
 680 }
 681
 682
 683 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 684 {
 685         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 686
 687         spin_lock(&lcdc_dev->reg_lock);
 688         LcdMskReg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 689         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 690         lcdc_dev->clk_on = 1;
 691         spin_unlock(&lcdc_dev->reg_lock);
 692
 693         return 0;
 694 }
 695 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
 696 {
 697         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
 698         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
 699         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 700         spin_lock(&(lcdc_dev->driver.cpl_lock));
 701         complete(&(lcdc_dev->driver.frame_done));
 702         spin_unlock(&(lcdc_dev->driver.cpl_lock));
 703         return IRQ_HANDLED;
 704 }
 705
 706 static struct layer_par lcdc_layer[] = {
 707         [0] = {
 708                 .name           = "win0",
 709                 .id             = 0,
 710                 .support_3d     = true,
 711         },
 712         [1] = {
 713                 .name           = "win1",
 714                 .id             = 1,
 715                 .support_3d     = false,
 716         },
 717 };
 718
 719 static struct rk_lcdc_device_driver lcdc_driver = {
 720         .name                   = "lcdc",
 721         .def_layer_par          = lcdc_layer,
 722         .num_layer              = ARRAY_SIZE(lcdc_layer),
 723         .open                   = rk30_lcdc_open,
 724         .init_lcdc              = init_rk30_lcdc,
 725         .ioctl                  = rk30_lcdc_ioctl,
 726         .suspend                = rk30_lcdc_early_suspend,
 727         .resume                 = rk30_lcdc_early_resume,
 728         .set_par                = rk30_lcdc_set_par,
 729         .blank                  = rk30_lcdc_blank,
 730         .pan_display            = rk30_lcdc_pan_display,
 731         .load_screen            = rk30_load_screen,
 732         .get_layer_state        = rk30_lcdc_get_layer_state,
 733         .ovl_mgr                = rk30_ovl_mgr,
 734         .get_disp_info          = rk30_get_disp_info,
 735 };
 736 #ifdef CONFIG_PM
 737 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 738 {
 739         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 740
 741
 742         clk_disable(lcdc_dev->dclk);
 743         clk_disable(lcdc_dev->hclk);
 744         clk_disable(lcdc_dev->aclk);
 745
 746         return 0;
 747 }
 748
 749 static int rk30_lcdc_resume(struct platform_device *pdev)
 750 {
 751         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 752
 753         clk_enable(lcdc_dev->hclk);
 754         clk_enable(lcdc_dev->dclk);
 755         clk_enable(lcdc_dev->aclk);
 756         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 757
 758         return 0;
 759 }
 760
 761 #else
 762 #define rk30_lcdc_suspend NULL
 763 #define rk30_lcdc_resume NULL
 764 #endif
 765
 766 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
 767 {
 768         struct rk30_lcdc_device *lcdc_dev=NULL;
 769         rk_screen *screen;
 770         struct rk29fb_info *screen_ctr_info;
 771         struct resource *res = NULL;
 772         struct resource *mem;
 773         int ret = 0;
 774
 775         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
 776         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
 777         if(!lcdc_dev)
 778         {
 779                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
 780                 return -ENOMEM;
 781         }
 782         platform_set_drvdata(pdev, lcdc_dev);
 783         lcdc_dev->id = pdev->id;
 784         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
 785         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 786         if(!screen)
 787         {
 788                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
 789                 ret =  -ENOMEM;
 790                 goto err0;
 791         }
 792         else
 793         {
 794                 lcdc_dev->screen = screen;
 795         }
 796         /****************get lcdc0 reg  *************************/
 797         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 798         if (res == NULL)
 799         {
 800                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 801                 ret = -ENOENT;
 802                 goto err1;
 803         }
 804         lcdc_dev->reg_phy_base = res->start;
 805         lcdc_dev->len = resource_size(res);
 806         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 807         if (mem == NULL)
 808         {
 809                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 810                 ret = -ENOENT;
 811                 goto err1;
 812         }
 813         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 814         if (lcdc_dev->reg_vir_base == NULL)
 815         {
 816                 dev_err(&pdev->dev, "cannot map IO\n");
 817                 ret = -ENXIO;
 818                 goto err2;
 819         }
 820
 821         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 822         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 823         lcdc_dev->driver.dev=&pdev->dev;
 824         lcdc_dev->driver.screen = screen;
 825         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
 826         spin_lock_init(&lcdc_dev->reg_lock);
 827         lcdc_dev->irq = platform_get_irq(pdev, 0);
 828         if(lcdc_dev->irq < 0)
 829         {
 830                 dev_err(&pdev->dev, "cannot find IRQ\n");
 831                 goto err3;
 832         }
 833         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
 834         if (ret)
 835         {
 836                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
 837                ret = -EBUSY;
 838                goto err3;
 839         }
 840         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
 841         if(ret < 0)
 842         {
 843                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
 844                 goto err4;
 845         }
 846         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
 847
 848         return 0;
 849
 850 err4:
 851         free_irq(lcdc_dev->irq,lcdc_dev);
 852 err3:
 853         iounmap(lcdc_dev->reg_vir_base);
 854 err2:
 855         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
 856 err1:
 857         kfree(screen);
 858 err0:
 859         platform_set_drvdata(pdev, NULL);
 860         kfree(lcdc_dev);
 861         return ret;
 862
 863 }
 864 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
 865 {
 866         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 867         rk_fb_unregister(&(lcdc_dev->driver));
 868         rk30_lcdc_deinit(lcdc_dev);
 869         iounmap(lcdc_dev->reg_vir_base);
 870         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 871         kfree(lcdc_dev->screen);
 872         kfree(lcdc_dev);
 873         return 0;
 874 }
 875
 876 static void rk30_lcdc_shutdown(struct platform_device *pdev)
 877 {
 878         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
 879         rk_fb_unregister(&(lcdc_dev->driver));
 880         rk30_lcdc_deinit(lcdc_dev);
 881         /*iounmap(lcdc_dev->reg_vir_base);
 882         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
 883         kfree(lcdc_dev->screen);
 884         kfree(lcdc_dev);*/
 885 }
 886
 887
 888 static struct platform_driver rk30lcdc_driver = {
 889         .probe          = rk30_lcdc_probe,
 890         .remove         = __devexit_p(rk30_lcdc_remove),
 891         .driver         = {
 892                 .name   = "rk30-lcdc",
 893                 .owner  = THIS_MODULE,
 894         },
 895         .suspend        = rk30_lcdc_suspend,
 896         .resume         = rk30_lcdc_resume,
 897         .shutdown   = rk30_lcdc_shutdown,
 898 };
 899
 900 static int __init rk30_lcdc_init(void)
 901 {
 902     return platform_driver_register(&rk30lcdc_driver);
 903 }
 904
 905 static void __exit rk30_lcdc_exit(void)
 906 {
 907     platform_driver_unregister(&rk30lcdc_driver);
 908 }
 909
 910
 911
 912 fs_initcall(rk30_lcdc_init);
 913 module_exit(rk30_lcdc_exit);
 914
 915
 916