drivers/video/rockchip/hdmi/rk_hdmi.h

   1 #ifndef __RK_HDMI_H__
   2 #define __RK_HDMI_H__
   3
   4 #include <linux/kernel.h>
   5 #include <linux/fb.h>
   6 #include <linux/spinlock.h>
   7 #include <linux/mutex.h>
   8 #include <linux/device.h>
   9 #include <linux/workqueue.h>
  10 #include <linux/display-sys.h>
  11 #ifdef CONFIG_SWITCH
  12 #include <linux/switch.h>
  13 #endif
  14 #ifdef CONFIG_HAS_EARLYSUSPEND
  15 #include <linux/earlysuspend.h>
  16 #endif
  17 #include <asm/atomic.h>
  18 #include<linux/rk_screen.h>
  19 #include <linux/rk_fb.h>
  20
  21 /* default HDMI output video mode */
  22 #define HDMI_VIDEO_DEFAULT_MODE                 HDMI_1280x720p_60Hz//HDMI_1920x1080p_60Hz
  23
  24 // HDMI video source
  25 enum {
  26         HDMI_SOURCE_LCDC0 = 0,
  27         HDMI_SOURCE_LCDC1 = 1
  28 };
  29
  30 /* If HDMI_ENABLE, system will auto configure output mode according to EDID
  31  * If HDMI_DISABLE, system will output mode according to macro HDMI_VIDEO_DEFAULT_MODE
  32  */
  33 #define HDMI_AUTO_CONFIGURE                     HDMI_DISABLE
  34
  35 /* default HDMI output audio mode */
  36 #define HDMI_AUDIO_DEFAULT_CHANNEL              2
  37 #define HDMI_AUDIO_DEFAULT_RATE                 HDMI_AUDIO_FS_44100
  38 #define HDMI_AUDIO_DEFAULT_WORD_LENGTH  HDMI_AUDIO_WORD_LENGTH_16bit
  39
  40 enum {
  41         VIDEO_INPUT_RGB_YCBCR_444 = 0,
  42         VIDEO_INPUT_YCBCR422,
  43         VIDEO_INPUT_YCBCR422_EMBEDDED_SYNC,
  44         VIDEO_INPUT_2X_CLOCK,
  45         VIDEO_INPUT_2X_CLOCK_EMBEDDED_SYNC,
  46         VIDEO_INPUT_RGB444_DDR,
  47         VIDEO_INPUT_YCBCR422_DDR
  48 };
  49
  50 enum {
  51         VIDEO_OUTPUT_RGB444 = 0,
  52         VIDEO_OUTPUT_YCBCR444,
  53         VIDEO_OUTPUT_YCBCR422
  54 };
  55
  56 enum {
  57         VIDEO_INPUT_COLOR_RGB = 0,
  58         VIDEO_INPUT_COLOR_YCBCR
  59 };
  60 /********************************************************************
  61 **                          ½á¹¹¶¨Òå                                *
  62 ********************************************************************/
  63 /* HDMI video mode code according CEA-861-E*/
  64 enum hdmi_video_mode
  65 {
  66         HDMI_640x480p_60Hz = 1,
  67         HDMI_720x480p_60Hz_4_3,
  68         HDMI_720x480p_60Hz_16_9,
  69         HDMI_1280x720p_60Hz,
  70         HDMI_1920x1080i_60Hz,           //5
  71         HDMI_720x480i_60Hz_4_3,
  72         HDMI_720x480i_60Hz_16_9,
  73         HDMI_720x240p_60Hz_4_3,
  74         HDMI_720x240p_60Hz_16_9,
  75         HDMI_2880x480i_60Hz_4_3,        //10
  76         HDMI_2880x480i_60Hz_16_9,
  77         HDMI_2880x240p_60Hz_4_3,
  78         HDMI_2880x240p_60Hz_16_9,
  79         HDMI_1440x480p_60Hz_4_3,
  80         HDMI_1440x480p_60Hz_16_9,       //15
  81         HDMI_1920x1080p_60Hz,
  82         HDMI_720x576p_50Hz_4_3,
  83         HDMI_720x576p_50Hz_16_9,
  84         HDMI_1280x720p_50Hz,
  85         HDMI_1920x1080i_50Hz,           //20
  86         HDMI_720x576i_50Hz_4_3,
  87         HDMI_720x576i_50Hz_16_9,
  88         HDMI_720x288p_50Hz_4_3,
  89         HDMI_720x288p_50Hz_16_9,
  90         HDMI_2880x576i_50Hz_4_3,        //25
  91         HDMI_2880x576i_50Hz_16_9,
  92         HDMI_2880x288p_50Hz_4_3,
  93         HDMI_2880x288p_50Hz_16_9,
  94         HDMI_1440x576p_50Hz_4_3,
  95         HDMI_1440x576p_50Hz_16_9,       //30
  96         HDMI_1920x1080p_50Hz,
  97         HDMI_1920x1080p_24Hz,
  98         HDMI_1920x1080p_25Hz,
  99         HDMI_1920x1080p_30Hz,
 100         HDMI_2880x480p_60Hz_4_3,        //35
 101         HDMI_2880x480p_60Hz_16_9,
 102         HDMI_2880x576p_50Hz_4_3,
 103         HDMI_2880x576p_50Hz_16_9,
 104         HDMI_1920x1080i_50Hz_2,         // V Line 1250 total
 105         HDMI_1920x1080i_100Hz,          //40
 106         HDMI_1280x720p_100Hz,
 107         HDMI_720x576p_100Hz_4_3,
 108         HDMI_720x576p_100Hz_16_9,
 109         HDMI_720x576i_100Hz_4_3,
 110         HDMI_720x576i_100Hz_16_9,       //45
 111         HDMI_1920x1080i_120Hz,
 112         HDMI_1280x720p_120Hz,
 113         HDMI_720x480p_120Hz_4_3,
 114         HDMI_720x480p_120Hz_16_9,
 115         HDMI_720x480i_120Hz_4_3,        //50
 116         HDMI_720x480i_120Hz_16_9,
 117         HDMI_720x576p_200Hz_4_3,
 118         HDMI_720x576p_200Hz_16_9,
 119         HDMI_720x576i_200Hz_4_3,
 120         HDMI_720x576i_200Hz_16_9,       //55
 121         HDMI_720x480p_240Hz_4_3,
 122         HDMI_720x480p_240Hz_16_9,
 123         HDMI_720x480i_240Hz_4_3,
 124         HDMI_720x480i_240Hz_16_9,
 125         HDMI_1280x720p_24Hz,            //60
 126         HDMI_1280x720p_25Hz,
 127         HDMI_1280x720p_30Hz,
 128         HDMI_1920x1080p_120Hz,
 129         HDMI_1920x1080p_100Hz,
 130 };
 131
 132 /* HDMI Video Data Color Mode */
 133 enum {
 134         HDMI_COLOR_RGB = 0,
 135         HDMI_COLOR_YCbCr422,
 136         HDMI_COLOR_YCbCr444
 137 };
 138
 139 /* HDMI Audio type */
 140 enum hdmi_audio_type
 141 {
 142         HDMI_AUDIO_LPCM = 1,
 143         HDMI_AUDIO_AC3,
 144         HDMI_AUDIO_MPEG1,
 145         HDMI_AUDIO_MP3,
 146         HDMI_AUDIO_MPEG2,
 147         HDMI_AUDIO_AAC_LC,              //AAC
 148         HDMI_AUDIO_DTS,
 149         HDMI_AUDIO_ATARC,
 150         HDMI_AUDIO_DSD,                 //One bit Audio
 151         HDMI_AUDIO_E_AC3,
 152         HDMI_AUDIO_DTS_HD,
 153         HDMI_AUDIO_MLP,
 154         HDMI_AUDIO_DST,
 155         HDMI_AUDIO_WMA_PRO
 156 };
 157
 158 /* I2S Fs */
 159 enum hdmi_audio_fs {
 160         HDMI_AUDIO_FS_32000  = 0x1,
 161         HDMI_AUDIO_FS_44100  = 0x2,
 162         HDMI_AUDIO_FS_48000  = 0x4,
 163         HDMI_AUDIO_FS_88200  = 0x8,
 164         HDMI_AUDIO_FS_96000  = 0x10,
 165         HDMI_AUDIO_FS_176400 = 0x20,
 166         HDMI_AUDIO_FS_192000 = 0x40
 167 };
 168
 169 /* Audio Word Length */
 170 enum hdmi_audio_word_length {
 171         HDMI_AUDIO_WORD_LENGTH_16bit = 0x1,
 172         HDMI_AUDIO_WORD_LENGTH_20bit = 0x2,
 173         HDMI_AUDIO_WORD_LENGTH_24bit = 0x4
 174 };
 175
 176 /* EDID block size */
 177 #define HDMI_EDID_BLOCK_SIZE    128
 178
 179 // HDMI state machine
 180 enum hdmi_state{
 181         HDMI_SLEEP = 0,
 182         HDMI_INITIAL,
 183         WAIT_HOTPLUG,
 184         READ_PARSE_EDID,
 185         WAIT_HDMI_ENABLE,
 186         SYSTEM_CONFIG,
 187         CONFIG_VIDEO,
 188         CONFIG_AUDIO,
 189         PLAY_BACK,
 190 };
 191
 192 // HDMI configuration command
 193 enum hdmi_change {
 194         HDMI_CONFIG_NONE = 0,
 195         HDMI_CONFIG_VIDEO,
 196         HDMI_CONFIG_AUDIO,
 197         HDMI_CONFIG_COLOR,
 198         HDMI_CONFIG_HDCP,
 199         HDMI_CONFIG_ENABLE,
 200         HDMI_CONFIG_DISABLE,
 201         HDMI_CONFIG_DISPLAY
 202 };
 203
 204 // HDMI Hotplug status
 205 enum {
 206         HDMI_HPD_REMOVED = 0,
 207         HDMI_HPD_INSERT,
 208         HDMI_HPD_ACTIVED
 209 };
 210
 211 /* HDMI STATUS */
 212 #define HDMI_DISABLE    0
 213 #define HDMI_ENABLE             1
 214 #define HDMI_UNKOWN             0xFF
 215
 216 /* HDMI Error Code */
 217 enum hdmi_errorcode
 218 {
 219         HDMI_ERROR_SUCESS = 0,
 220         HDMI_ERROR_FALSE,
 221         HDMI_ERROR_I2C,
 222         HDMI_ERROR_EDID,
 223 };
 224
 225 /* HDMI audio parameters */
 226 struct hdmi_audio {
 227         u32 type;                                                       //Audio type
 228         u32     channel;                                                //Audio channel number
 229         u32     rate;                                                   //Audio sampling rate
 230         u32     word_length;                                    //Audio data word length
 231 };
 232
 233 struct hdmi_edid {
 234         unsigned char sink_hdmi;                        //HDMI display device flag
 235         unsigned char ycbcr444;                         //Display device support YCbCr444
 236         unsigned char ycbcr422;                         //Display device support YCbCr422
 237         unsigned char deepcolor;                        //bit3:DC_48bit; bit2:DC_36bit; bit1:DC_30bit; bit0:DC_Y444;
 238         struct fb_monspecs      *specs;                 //Device spec
 239         struct list_head modelist;                      //Device supported display mode list
 240         struct hdmi_audio *audio;                       //Device supported audio info
 241         int     audio_num;                                              //Device supported audio type number
 242         int     base_audio_support;                             //Device supported base audio
 243 };
 244
 245 /* RK HDMI Video Configure Parameters */
 246 struct hdmi_video_para {
 247         int vic;
 248         int input_mode;         //input video data interface
 249         int input_color;        //input video color mode
 250         int output_mode;        //output hdmi or dvi
 251         int output_color;       //output video color mode
 252 };
 253
 254 struct hdmi {
 255         struct device   *dev;
 256         struct clk              *hclk;                          //HDMI AHP clk
 257         int             id;
 258         int                     regbase;
 259         int                             irq;
 260         int                             regbase_phy;
 261         int                             regsize_phy;
 262         struct rk_lcdc_driver *lcdc;
 263
 264         #ifdef CONFIG_SWITCH
 265         struct switch_dev       switch_hdmi;
 266         #endif
 267
 268         struct workqueue_struct *workqueue;
 269         struct delayed_work delay_work;
 270
 271         spinlock_t      irq_lock;
 272         struct mutex enable_mutex;
 273
 274         int wait;
 275         struct completion       complete;
 276
 277         int suspend;
 278 #ifdef CONFIG_HAS_EARLYSUSPEND
 279         struct early_suspend    early_suspend;
 280 #endif
 281
 282         struct hdmi_edid edid;
 283         int enable;                                     // Enable HDMI output or not
 284         int vic;                                        // HDMI output video mode code
 285         struct hdmi_audio audio;        // HDMI output audio type.
 286
 287         int pwr_mode;                           // power mode
 288         int hotplug;                            // hot plug status
 289         int state;                                      // hdmi state machine status
 290         int autoconfig;                         // if true, auto config hdmi output mode according to EDID.
 291         int command;                            // HDMI configuration command
 292         int display;                            // HDMI display status
 293         int xscale;                                     // x direction scale value
 294         int yscale;                                     // y directoon scale value
 295         int tmdsclk;                            // TDMS Clock frequency
 296
 297         struct list_head pwrlist_head;
 298
 299         int (*insert)(struct hdmi  *hdmi);
 300         int (*remove)(struct hdmi  *hdmi);
 301         void (*control_output)(struct hdmi  *hdmi, int enable);
 302         int (*config_video)(struct hdmi  *hdmi, struct hdmi_video_para *vpara);
 303         int (*config_audio)(struct hdmi  *hdmi, struct hdmi_audio *audio);
 304         int (*detect_hotplug)(struct hdmi  *hdmi);
 305         // call back for edid
 306         int (*read_edid)(struct hdmi  *hdmi, int block, unsigned char *buff);
 307         int (*set_vif)(struct hdmi *hdmi, struct rk_screen *screen, bool connect);
 308
 309         // call back for hdcp operatoion
 310         void (*hdcp_cb)(void);
 311         void (*hdcp_irq_cb)(int);
 312         int (*hdcp_power_on_cb)(void);
 313         void (*hdcp_power_off_cb)(void);
 314 };
 315
 316 #define hdmi_err(dev, format, arg...)           \
 317         dev_printk(KERN_ERR , dev , format , ## arg)
 318
 319 #ifdef HDMI_DEBUG
 320 #define hdmi_dbg(dev, format, arg...)           \
 321         dev_printk(KERN_INFO , dev , format , ## arg)
 322 #else
 323 #define hdmi_dbg(dev, format, arg...)
 324 #endif
 325
 326 //extern struct hdmi *hdmi;
 327 extern int hdmi_get_hotplug(void);
 328 extern int hdmi_set_info(struct rk_screen *screen, unsigned int vic);
 329 extern void hdmi_init_lcdc(struct rk_screen *screen, struct rk29lcd_info *lcd_info);
 330 extern int hdmi_sys_init(struct hdmi *hdmi);
 331 extern int hdmi_sys_parse_edid(struct hdmi* hdmi);
 332 extern const char *hdmi_get_video_mode_name(unsigned char vic);
 333 extern int hdmi_videomode_to_vic(struct fb_videomode *vmode);
 334 extern const struct fb_videomode* hdmi_vic_to_videomode(int vic);
 335 extern int hdmi_add_videomode(const struct fb_videomode *mode, struct list_head *head);
 336 extern struct hdmi_video_timing * hdmi_find_mode(int vic);
 337 extern int hdmi_find_best_mode(struct hdmi* hdmi, int vic);
 338 extern int hdmi_ouputmode_select(struct hdmi *hdmi, int edid_ok);
 339 extern int hdmi_switch_fb(struct hdmi *hdmi, int vic);
 340 extern void hdmi_work(struct work_struct *work);
 341 int rk_hdmi_parse_dt(struct hdmi *hdmi_drv);
 342 int rk_hdmi_pwr_enable(struct hdmi *dev_drv);
 343 int rk_hdmi_pwr_disable(struct hdmi *dev_drv);
 344 #endif