drivers/video/rockchip/hdmi/rk_hdmi.h

   1 #ifndef __RK_HDMI_H__
   2 #define __RK_HDMI_H__
   3
   4 #include <linux/kernel.h>
   5 #include <linux/fb.h>
   6 #include <linux/spinlock.h>
   7 #include <linux/mutex.h>
   8 #include <linux/device.h>
   9 #include <linux/workqueue.h>
  10 #include <linux/display-sys.h>
  11 #ifdef CONFIG_SWITCH
  12 #include <linux/switch.h>
  13 #endif
  14 #ifdef CONFIG_HAS_EARLYSUSPEND
  15 #include <linux/earlysuspend.h>
  16 #endif
  17 #include <asm/atomic.h>
  18 #include<linux/rk_screen.h>
  19 #include <linux/rk_fb.h>
  20
  21 /* default HDMI output video mode */
  22 #define HDMI_VIDEO_DEFAULT_MODE                 HDMI_1280x720p_60Hz//HDMI_1920x1080p_60Hz
  23
  24 // HDMI video source
  25 enum {
  26         HDMI_SOURCE_LCDC0 = 0,
  27         HDMI_SOURCE_LCDC1 = 1
  28 };
  29
  30 /* If HDMI_ENABLE, system will auto configure output mode according to EDID
  31  * If HDMI_DISABLE, system will output mode according to macro HDMI_VIDEO_DEFAULT_MODE
  32  */
  33 #define HDMI_AUTO_CONFIGURE                     HDMI_DISABLE
  34
  35 /* default HDMI output audio mode */
  36 #define HDMI_AUDIO_DEFAULT_CHANNEL              2
  37 #define HDMI_AUDIO_DEFAULT_RATE                 HDMI_AUDIO_FS_44100
  38 #define HDMI_AUDIO_DEFAULT_WORD_LENGTH  HDMI_AUDIO_WORD_LENGTH_16bit
  39
  40 enum {
  41         VIDEO_INPUT_RGB_YCBCR_444 = 0,
  42         VIDEO_INPUT_YCBCR422,
  43         VIDEO_INPUT_YCBCR422_EMBEDDED_SYNC,
  44         VIDEO_INPUT_2X_CLOCK,
  45         VIDEO_INPUT_2X_CLOCK_EMBEDDED_SYNC,
  46         VIDEO_INPUT_RGB444_DDR,
  47         VIDEO_INPUT_YCBCR422_DDR
  48 };
  49
  50 enum {
  51         VIDEO_OUTPUT_RGB444 = 0,
  52         VIDEO_OUTPUT_YCBCR444,
  53         VIDEO_OUTPUT_YCBCR422,
  54         VIDEO_OUTPUT_YCBCR420
  55 };
  56
  57 enum {
  58         VIDEO_INPUT_COLOR_RGB = 0,
  59         VIDEO_INPUT_COLOR_YCBCR444,
  60         VIDEO_INPUT_COLOR_YCBCR422,
  61         VIDEO_INPUT_COLOR_YCBCR420
  62 };
  63 /********************************************************************
  64 **                          ½á¹¹¶¨Òå                                *
  65 ********************************************************************/
  66 /* HDMI video mode code according CEA-861-E*/
  67 enum hdmi_video_mode
  68 {
  69         HDMI_640x480p_60Hz = 1,
  70         HDMI_720x480p_60Hz_4_3,
  71         HDMI_720x480p_60Hz_16_9,
  72         HDMI_1280x720p_60Hz,
  73         HDMI_1920x1080i_60Hz,           //5
  74         HDMI_720x480i_60Hz_4_3,
  75         HDMI_720x480i_60Hz_16_9,
  76         HDMI_720x240p_60Hz_4_3,
  77         HDMI_720x240p_60Hz_16_9,
  78         HDMI_2880x480i_60Hz_4_3,        //10
  79         HDMI_2880x480i_60Hz_16_9,
  80         HDMI_2880x240p_60Hz_4_3,
  81         HDMI_2880x240p_60Hz_16_9,
  82         HDMI_1440x480p_60Hz_4_3,
  83         HDMI_1440x480p_60Hz_16_9,       //15
  84         HDMI_1920x1080p_60Hz,
  85         HDMI_720x576p_50Hz_4_3,
  86         HDMI_720x576p_50Hz_16_9,
  87         HDMI_1280x720p_50Hz,
  88         HDMI_1920x1080i_50Hz,           //20
  89         HDMI_720x576i_50Hz_4_3,
  90         HDMI_720x576i_50Hz_16_9,
  91         HDMI_720x288p_50Hz_4_3,
  92         HDMI_720x288p_50Hz_16_9,
  93         HDMI_2880x576i_50Hz_4_3,        //25
  94         HDMI_2880x576i_50Hz_16_9,
  95         HDMI_2880x288p_50Hz_4_3,
  96         HDMI_2880x288p_50Hz_16_9,
  97         HDMI_1440x576p_50Hz_4_3,
  98         HDMI_1440x576p_50Hz_16_9,       //30
  99         HDMI_1920x1080p_50Hz,
 100         HDMI_1920x1080p_24Hz,
 101         HDMI_1920x1080p_25Hz,
 102         HDMI_1920x1080p_30Hz,
 103         HDMI_2880x480p_60Hz_4_3,        //35
 104         HDMI_2880x480p_60Hz_16_9,
 105         HDMI_2880x576p_50Hz_4_3,
 106         HDMI_2880x576p_50Hz_16_9,
 107         HDMI_1920x1080i_50Hz_2,         // V Line 1250 total
 108         HDMI_1920x1080i_100Hz,          //40
 109         HDMI_1280x720p_100Hz,
 110         HDMI_720x576p_100Hz_4_3,
 111         HDMI_720x576p_100Hz_16_9,
 112         HDMI_720x576i_100Hz_4_3,
 113         HDMI_720x576i_100Hz_16_9,       //45
 114         HDMI_1920x1080i_120Hz,
 115         HDMI_1280x720p_120Hz,
 116         HDMI_720x480p_120Hz_4_3,
 117         HDMI_720x480p_120Hz_16_9,
 118         HDMI_720x480i_120Hz_4_3,        //50
 119         HDMI_720x480i_120Hz_16_9,
 120         HDMI_720x576p_200Hz_4_3,
 121         HDMI_720x576p_200Hz_16_9,
 122         HDMI_720x576i_200Hz_4_3,
 123         HDMI_720x576i_200Hz_16_9,       //55
 124         HDMI_720x480p_240Hz_4_3,
 125         HDMI_720x480p_240Hz_16_9,
 126         HDMI_720x480i_240Hz_4_3,
 127         HDMI_720x480i_240Hz_16_9,
 128         HDMI_1280x720p_24Hz,            //60
 129         HDMI_1280x720p_25Hz,
 130         HDMI_1280x720p_30Hz,
 131         HDMI_1920x1080p_120Hz,
 132         HDMI_1920x1080p_100Hz,
 133 };
 134
 135 /* HDMI Video Data Color Mode */
 136 enum {
 137         HDMI_COLOR_RGB = 0,
 138         HDMI_COLOR_YCbCr422,
 139         HDMI_COLOR_YCbCr444
 140 };
 141
 142 /*HDMI Video Color Depth*/
 143 enum {
 144         HDMI_COLOR_DEPTH_8BIT = 0x1,
 145         HDMI_COLOR_DEPTH_10BIT = 0x2,
 146         HDMI_COLOR_DEPTH_12BIT = 0x4,
 147         HDMI_COLOR_DEPTH_16BIT = 0x8
 148 };
 149
 150 /* HDMI Audio type */
 151 enum hdmi_audio_type
 152 {
 153         HDMI_AUDIO_LPCM = 1,
 154         HDMI_AUDIO_AC3,
 155         HDMI_AUDIO_MPEG1,
 156         HDMI_AUDIO_MP3,
 157         HDMI_AUDIO_MPEG2,
 158         HDMI_AUDIO_AAC_LC,              //AAC
 159         HDMI_AUDIO_DTS,
 160         HDMI_AUDIO_ATARC,
 161         HDMI_AUDIO_DSD,                 //One bit Audio
 162         HDMI_AUDIO_E_AC3,
 163         HDMI_AUDIO_DTS_HD,
 164         HDMI_AUDIO_MLP,
 165         HDMI_AUDIO_DST,
 166         HDMI_AUDIO_WMA_PRO
 167 };
 168
 169 /* I2S Fs */
 170 enum hdmi_audio_fs {
 171         HDMI_AUDIO_FS_32000  = 0x1,
 172         HDMI_AUDIO_FS_44100  = 0x2,
 173         HDMI_AUDIO_FS_48000  = 0x4,
 174         HDMI_AUDIO_FS_88200  = 0x8,
 175         HDMI_AUDIO_FS_96000  = 0x10,
 176         HDMI_AUDIO_FS_176400 = 0x20,
 177         HDMI_AUDIO_FS_192000 = 0x40
 178 };
 179
 180 /* Audio Word Length */
 181 enum hdmi_audio_word_length {
 182         HDMI_AUDIO_WORD_LENGTH_16bit = 0x1,
 183         HDMI_AUDIO_WORD_LENGTH_20bit = 0x2,
 184         HDMI_AUDIO_WORD_LENGTH_24bit = 0x4
 185 };
 186
 187 /* EDID block size */
 188 #define HDMI_EDID_BLOCK_SIZE    128
 189
 190 // HDMI state machine
 191 enum hdmi_state{
 192         HDMI_SLEEP = 0,
 193         HDMI_INITIAL,
 194         WAIT_HOTPLUG,
 195         READ_PARSE_EDID,
 196         WAIT_HDMI_ENABLE,
 197         SYSTEM_CONFIG,
 198         CONFIG_VIDEO,
 199         CONFIG_AUDIO,
 200         PLAY_BACK,
 201 };
 202
 203 // HDMI configuration command
 204 enum hdmi_change {
 205         HDMI_CONFIG_NONE = 0,
 206         HDMI_CONFIG_VIDEO,
 207         HDMI_CONFIG_AUDIO,
 208         HDMI_CONFIG_COLOR,
 209         HDMI_CONFIG_HDCP,
 210         HDMI_CONFIG_ENABLE,
 211         HDMI_CONFIG_DISABLE,
 212         HDMI_CONFIG_DISPLAY
 213 };
 214
 215 // HDMI Hotplug status
 216 enum {
 217         HDMI_HPD_REMOVED = 0,
 218         HDMI_HPD_INSERT,
 219         HDMI_HPD_ACTIVED
 220 };
 221
 222 /* HDMI STATUS */
 223 #define HDMI_DISABLE    0
 224 #define HDMI_ENABLE             1
 225 #define HDMI_UNKOWN             0xFF
 226
 227 /* HDMI Error Code */
 228 enum hdmi_errorcode
 229 {
 230         HDMI_ERROR_SUCESS = 0,
 231         HDMI_ERROR_FALSE,
 232         HDMI_ERROR_I2C,
 233         HDMI_ERROR_EDID,
 234 };
 235
 236 /* HDMI audio parameters */
 237 struct hdmi_audio {
 238         u32 type;                                                       //Audio type
 239         u32     channel;                                                //Audio channel number
 240         u32     rate;                                                   //Audio sampling rate
 241         u32     word_length;                                    //Audio data word length
 242 };
 243
 244 struct hdmi_edid {
 245         unsigned char sink_hdmi;                        //HDMI display device flag
 246         unsigned char ycbcr444;                         //Display device support YCbCr444
 247         unsigned char ycbcr422;                         //Display device support YCbCr422
 248         unsigned char deepcolor;                        //bit3:DC_48bit; bit2:DC_36bit; bit1:DC_30bit; bit0:DC_Y444;
 249         unsigned char latency_fields_present;
 250         unsigned char i_latency_fields_present;
 251         unsigned char video_latency;
 252         unsigned char audio_latency;
 253         unsigned char interlaced_video_latency;
 254         unsigned char interlaced_audio_latency;
 255         unsigned char video_present;                    //have additional video format abount 4k and/or 3d
 256         unsigned char support_3d;                       //3D format support
 257         unsigned int maxtmdsclock;                      //max tmds clock freq support
 258         struct fb_monspecs      *specs;                 //Device spec
 259         struct list_head modelist;                      //Device supported display mode list
 260         struct hdmi_audio *audio;                       //Device supported audio info
 261         int     audio_num;                                              //Device supported audio type number
 262         int     base_audio_support;                             //Device supported base audio
 263 };
 264
 265 /* RK HDMI Video Configure Parameters */
 266 struct hdmi_video_para {
 267         int vic;
 268         int input_mode;         //input video data interface
 269         int input_color;        //input video color mode
 270         int output_mode;        //output hdmi or dvi
 271         int output_color;       //output video color mode
 272         unsigned char format_3d;                //output 3d format
 273         unsigned char color_depth;      //color depth: 8bit; 10bit; 12bit; 16bit;
 274         unsigned char pixel_repet;      //pixel repettion
 275         unsigned char pixel_pack_phase; //pixel packing default phase
 276 };
 277
 278 struct hdmi {
 279         struct device   *dev;
 280         int             id;
 281         int             irq;
 282         struct rk_lcdc_driver *lcdc;
 283
 284         #ifdef CONFIG_SWITCH
 285         struct switch_dev       switch_hdmi;
 286         #endif
 287
 288         struct workqueue_struct *workqueue;
 289         struct delayed_work delay_work;
 290
 291         spinlock_t      irq_lock;
 292         struct mutex enable_mutex;
 293
 294         int wait;
 295         struct completion       complete;
 296
 297         int suspend;
 298 #ifdef CONFIG_HAS_EARLYSUSPEND
 299         struct early_suspend    early_suspend;
 300 #endif
 301
 302         struct hdmi_edid edid;
 303         int enable;                                     // Enable HDMI output or not
 304         int vic;                                        // HDMI output video mode code
 305         struct hdmi_audio audio;        // HDMI output audio type.
 306
 307         int pwr_mode;                           // power mode
 308         int hotplug;                            // hot plug status
 309         int state;                                      // hdmi state machine status
 310         int autoconfig;                         // if true, auto config hdmi output mode according to EDID.
 311         int command;                            // HDMI configuration command
 312         int display;                            // HDMI display status
 313         int xscale;                                     // x direction scale value
 314         int yscale;                                     // y directoon scale value
 315         int tmdsclk;                            // TDMS Clock frequency
 316
 317         struct list_head pwrlist_head;
 318
 319         int (*insert)(struct hdmi  *hdmi);
 320         int (*remove)(struct hdmi  *hdmi);
 321         void (*control_output)(struct hdmi  *hdmi, int enable);
 322         int (*config_video)(struct hdmi  *hdmi, struct hdmi_video_para *vpara);
 323         int (*config_audio)(struct hdmi  *hdmi, struct hdmi_audio *audio);
 324         int (*detect_hotplug)(struct hdmi  *hdmi);
 325         // call back for edid
 326         int (*read_edid)(struct hdmi  *hdmi, int block, unsigned char *buff);
 327         int (*set_vif)(struct hdmi *hdmi, struct rk_screen *screen, bool connect);
 328
 329         // call back for hdcp operatoion
 330         void (*hdcp_cb)(void);
 331         void (*hdcp_irq_cb)(int);
 332         int (*hdcp_power_on_cb)(void);
 333         void (*hdcp_power_off_cb)(void);
 334 };
 335
 336 #define hdmi_err(dev, format, arg...)           \
 337         dev_printk(KERN_ERR , dev , format , ## arg)
 338
 339 #ifdef HDMI_DEBUG
 340 #define hdmi_dbg(dev, format, arg...)           \
 341         dev_printk(KERN_INFO , dev , format , ## arg)
 342 #else
 343 #define hdmi_dbg(dev, format, arg...)
 344 #endif
 345
 346 extern int hdmi_drv_register(struct hdmi *hdmi_drv);
 347 extern int hdmi_get_hotplug(void);
 348 extern int hdmi_set_info(struct rk_screen *screen, unsigned int vic);
 349 extern void hdmi_init_lcdc(struct rk_screen *screen, struct rk29lcd_info *lcd_info);
 350 extern int hdmi_sys_init(struct hdmi *hdmi_drv);
 351 extern int hdmi_sys_parse_edid(struct hdmi* hdmi_drv);
 352 extern const char *hdmi_get_video_mode_name(unsigned char vic);
 353 extern int hdmi_videomode_to_vic(struct fb_videomode *vmode);
 354 extern const struct fb_videomode* hdmi_vic_to_videomode(int vic);
 355 extern int hdmi_add_videomode(const struct fb_videomode *mode, struct list_head *head);
 356 extern struct hdmi_video_timing * hdmi_find_mode(int vic);
 357 extern int hdmi_find_best_mode(struct hdmi* hdmi_drv, int vic);
 358 extern int hdmi_ouputmode_select(struct hdmi *hdmi_drv, int edid_ok);
 359 extern int hdmi_switch_fb(struct hdmi *hdmi_drv, int vic);
 360 extern int hdmi_init_video_para(struct hdmi *hdmi_drv, struct hdmi_video_para *video);
 361 extern void hdmi_work(struct work_struct *work);
 362 extern void hdmi_register_display_sysfs(struct hdmi *hdmi_drv, struct device *parent);
 363 extern void hdmi_unregister_display_sysfs(struct hdmi *hdmi_drv);
 364
 365 int rk_hdmi_parse_dt(struct hdmi *hdmi_drv);
 366 int rk_hdmi_pwr_enable(struct hdmi *dev_drv);
 367 int rk_hdmi_pwr_disable(struct hdmi *dev_drv);
 368
 369 #endif