drivers/video/rockchip/hdmi/rk_hdmi.h

   1 #ifndef __RK_HDMI_H__
   2 #define __RK_HDMI_H__
   3
   4 #include <linux/kernel.h>
   5 #include <linux/fb.h>
   6 #include <linux/spinlock.h>
   7 #include <linux/mutex.h>
   8 #include <linux/device.h>
   9 #include <linux/workqueue.h>
  10 #include <linux/display-sys.h>
  11 #ifdef CONFIG_SWITCH
  12 #include <linux/switch.h>
  13 #endif
  14 #ifdef CONFIG_HAS_EARLYSUSPEND
  15 #include <linux/earlysuspend.h>
  16 #endif
  17 #include <linux/atomic.h>
  18 #include<linux/rk_screen.h>
  19 #include <linux/rk_fb.h>
  20
  21 /* default HDMI output video mode */
  22 #define HDMI_VIDEO_DEFAULT_MODE                 HDMI_1280x720p_60Hz
  23
  24 /* HDMI video source */
  25 enum {
  26         HDMI_SOURCE_LCDC0 = 0,
  27         HDMI_SOURCE_LCDC1 = 1
  28 };
  29
  30 /*
  31  * If HDMI_ENABLE, system will auto configure output mode according to EDID
  32  * If HDMI_DISABLE, system will output mode according to
  33  * macro HDMI_VIDEO_DEFAULT_MODE
  34  */
  35 #define HDMI_AUTO_CONFIGURE                     HDMI_DISABLE
  36
  37 /* default HDMI output audio mode */
  38 #define HDMI_AUDIO_DEFAULT_CHANNEL              2
  39 #define HDMI_AUDIO_DEFAULT_RATE                 HDMI_AUDIO_FS_44100
  40 #define HDMI_AUDIO_DEFAULT_WORD_LENGTH  HDMI_AUDIO_WORD_LENGTH_16bit
  41
  42 enum {
  43         VIDEO_INPUT_RGB_YCBCR_444 = 0,
  44         VIDEO_INPUT_YCBCR422,
  45         VIDEO_INPUT_YCBCR422_EMBEDDED_SYNC,
  46         VIDEO_INPUT_2X_CLOCK,
  47         VIDEO_INPUT_2X_CLOCK_EMBEDDED_SYNC,
  48         VIDEO_INPUT_RGB444_DDR,
  49         VIDEO_INPUT_YCBCR422_DDR
  50 };
  51
  52 enum {
  53         VIDEO_OUTPUT_RGB444 = 0,
  54         VIDEO_OUTPUT_YCBCR444,
  55         VIDEO_OUTPUT_YCBCR422,
  56         VIDEO_OUTPUT_YCBCR420
  57 };
  58
  59 enum {
  60         VIDEO_INPUT_COLOR_RGB = 0,
  61         VIDEO_INPUT_COLOR_YCBCR444,
  62         VIDEO_INPUT_COLOR_YCBCR422,
  63         VIDEO_INPUT_COLOR_YCBCR420
  64 };
  65 /********************************************************************
  66 **                          ½á¹¹¶¨Òå                                *
  67 ********************************************************************/
  68 /* HDMI video mode code according CEA-861-E */
  69 enum hdmi_video_mode {
  70         HDMI_640x480p_60Hz = 1,
  71         HDMI_720x480p_60Hz_4_3,
  72         HDMI_720x480p_60Hz_16_9,
  73         HDMI_1280x720p_60Hz,
  74         HDMI_1920x1080i_60Hz,           /* 5 */
  75         HDMI_720x480i_60Hz_4_3,
  76         HDMI_720x480i_60Hz_16_9,
  77         HDMI_720x240p_60Hz_4_3,
  78         HDMI_720x240p_60Hz_16_9,
  79         HDMI_2880x480i_60Hz_4_3,        /* 10 */
  80         HDMI_2880x480i_60Hz_16_9,
  81         HDMI_2880x240p_60Hz_4_3,
  82         HDMI_2880x240p_60Hz_16_9,
  83         HDMI_1440x480p_60Hz_4_3,
  84         HDMI_1440x480p_60Hz_16_9,       /* 15 */
  85         HDMI_1920x1080p_60Hz,
  86         HDMI_720x576p_50Hz_4_3,
  87         HDMI_720x576p_50Hz_16_9,
  88         HDMI_1280x720p_50Hz,
  89         HDMI_1920x1080i_50Hz,           /* 20 */
  90         HDMI_720x576i_50Hz_4_3,
  91         HDMI_720x576i_50Hz_16_9,
  92         HDMI_720x288p_50Hz_4_3,
  93         HDMI_720x288p_50Hz_16_9,
  94         HDMI_2880x576i_50Hz_4_3,        /* 25 */
  95         HDMI_2880x576i_50Hz_16_9,
  96         HDMI_2880x288p_50Hz_4_3,
  97         HDMI_2880x288p_50Hz_16_9,
  98         HDMI_1440x576p_50Hz_4_3,
  99         HDMI_1440x576p_50Hz_16_9,       /* 30 */
 100         HDMI_1920x1080p_50Hz,
 101         HDMI_1920x1080p_24Hz,
 102         HDMI_1920x1080p_25Hz,
 103         HDMI_1920x1080p_30Hz,
 104         HDMI_2880x480p_60Hz_4_3,        /* 35 */
 105         HDMI_2880x480p_60Hz_16_9,
 106         HDMI_2880x576p_50Hz_4_3,
 107         HDMI_2880x576p_50Hz_16_9,
 108         HDMI_1920x1080i_50Hz_2, /* V Line 1250 total */
 109         HDMI_1920x1080i_100Hz,          /* 40 */
 110         HDMI_1280x720p_100Hz,
 111         HDMI_720x576p_100Hz_4_3,
 112         HDMI_720x576p_100Hz_16_9,
 113         HDMI_720x576i_100Hz_4_3,
 114         HDMI_720x576i_100Hz_16_9,       /* 45 */
 115         HDMI_1920x1080i_120Hz,
 116         HDMI_1280x720p_120Hz,
 117         HDMI_720x480p_120Hz_4_3,
 118         HDMI_720x480p_120Hz_16_9,
 119         HDMI_720x480i_120Hz_4_3,        /* 50 */
 120         HDMI_720x480i_120Hz_16_9,
 121         HDMI_720x576p_200Hz_4_3,
 122         HDMI_720x576p_200Hz_16_9,
 123         HDMI_720x576i_200Hz_4_3,
 124         HDMI_720x576i_200Hz_16_9,       /* 55 */
 125         HDMI_720x480p_240Hz_4_3,
 126         HDMI_720x480p_240Hz_16_9,
 127         HDMI_720x480i_240Hz_4_3,
 128         HDMI_720x480i_240Hz_16_9,
 129         HDMI_1280x720p_24Hz,            /* 60 */
 130         HDMI_1280x720p_25Hz,
 131         HDMI_1280x720p_30Hz,
 132         HDMI_1920x1080p_120Hz,
 133         HDMI_1920x1080p_100Hz,
 134 };
 135
 136 /* HDMI Video Data Color Mode */
 137 enum {
 138         HDMI_COLOR_RGB = 0,
 139         HDMI_COLOR_YCbCr422,
 140         HDMI_COLOR_YCbCr444
 141 };
 142
 143 /* HDMI Video Color Depth */
 144 enum {
 145         HDMI_COLOR_DEPTH_8BIT = 0x1,
 146         HDMI_COLOR_DEPTH_10BIT = 0x2,
 147         HDMI_COLOR_DEPTH_12BIT = 0x4,
 148         HDMI_COLOR_DEPTH_16BIT = 0x8
 149 };
 150
 151 /* HDMI Audio type */
 152 enum hdmi_audio_type {
 153         HDMI_AUDIO_LPCM = 1,
 154         HDMI_AUDIO_AC3,
 155         HDMI_AUDIO_MPEG1,
 156         HDMI_AUDIO_MP3,
 157         HDMI_AUDIO_MPEG2,
 158         HDMI_AUDIO_AAC_LC,      /* AAC */
 159         HDMI_AUDIO_DTS,
 160         HDMI_AUDIO_ATARC,
 161         HDMI_AUDIO_DSD,         /* One bit Audio */
 162         HDMI_AUDIO_E_AC3,
 163         HDMI_AUDIO_DTS_HD,
 164         HDMI_AUDIO_MLP,
 165         HDMI_AUDIO_DST,
 166         HDMI_AUDIO_WMA_PRO
 167 };
 168
 169 /* I2S Fs */
 170 enum hdmi_audio_fs {
 171         HDMI_AUDIO_FS_32000 = 0x1,
 172         HDMI_AUDIO_FS_44100 = 0x2,
 173         HDMI_AUDIO_FS_48000 = 0x4,
 174         HDMI_AUDIO_FS_88200 = 0x8,
 175         HDMI_AUDIO_FS_96000 = 0x10,
 176         HDMI_AUDIO_FS_176400 = 0x20,
 177         HDMI_AUDIO_FS_192000 = 0x40
 178 };
 179
 180 /* Audio Word Length */
 181 enum hdmi_audio_word_length {
 182         HDMI_AUDIO_WORD_LENGTH_16bit = 0x1,
 183         HDMI_AUDIO_WORD_LENGTH_20bit = 0x2,
 184         HDMI_AUDIO_WORD_LENGTH_24bit = 0x4
 185 };
 186
 187 /* EDID block size */
 188 #define HDMI_EDID_BLOCK_SIZE    128
 189
 190 /* HDMI state machine */
 191 enum hdmi_state {
 192         HDMI_SLEEP = 0,
 193         HDMI_INITIAL,
 194         WAIT_HOTPLUG,
 195         READ_PARSE_EDID,
 196         WAIT_HDMI_ENABLE,
 197         SYSTEM_CONFIG,
 198         CONFIG_VIDEO,
 199         CONFIG_AUDIO,
 200         PLAY_BACK,
 201 };
 202
 203 /* HDMI configuration command */
 204 enum hdmi_change {
 205         HDMI_CONFIG_NONE = 0,
 206         HDMI_CONFIG_VIDEO,
 207         HDMI_CONFIG_AUDIO,
 208         HDMI_CONFIG_COLOR,
 209         HDMI_CONFIG_HDCP,
 210         HDMI_CONFIG_ENABLE,
 211         HDMI_CONFIG_DISABLE,
 212         HDMI_CONFIG_DISPLAY
 213 };
 214
 215 /* HDMI Hotplug status */
 216 enum {
 217         HDMI_HPD_REMOVED = 0,
 218         HDMI_HPD_INSERT,
 219         HDMI_HPD_ACTIVED
 220 };
 221
 222 /* HDMI STATUS */
 223 #define HDMI_DISABLE            0
 224 #define HDMI_ENABLE             1
 225 #define HDMI_UNKOWN             0xFF
 226
 227 /* HDMI Error Code */
 228 enum hdmi_errorcode {
 229         HDMI_ERROR_SUCESS = 0,
 230         HDMI_ERROR_FALSE,
 231         HDMI_ERROR_I2C,
 232         HDMI_ERROR_EDID,
 233 };
 234
 235 /* HDMI audio parameters */
 236 struct hdmi_audio {
 237         u32 type;               /* Audio type */
 238         u32 channel;            /* Audio channel number */
 239         u32 rate;               /* Audio sampling rate */
 240         u32 word_length;        /* Audio data word length */
 241 };
 242
 243 struct hdmi_edid {
 244         unsigned char sink_hdmi;        /* HDMI display device flag */
 245         unsigned char ycbcr444;         /* Display device support YCbCr444 */
 246         unsigned char ycbcr422;         /* Display device support YCbCr422 */
 247         unsigned char deepcolor;        /* bit3:DC_48bit; bit2:DC_36bit;
 248                                          * bit1:DC_30bit; bit0:DC_Y444;
 249                                          */
 250         unsigned char latency_fields_present;
 251         unsigned char i_latency_fields_present;
 252         unsigned char video_latency;
 253         unsigned char audio_latency;
 254         unsigned char interlaced_video_latency;
 255         unsigned char interlaced_audio_latency;
 256         unsigned char video_present;    /* have additional video format
 257                                          * abount 4k and/or 3d
 258                                          */
 259         unsigned char support_3d;       /* 3D format support */
 260         unsigned int maxtmdsclock;      /* max tmds clock freq support */
 261         struct fb_monspecs *specs;      /* Device spec */
 262         struct list_head modelist;      /* Device supported display mode list */
 263         struct hdmi_audio *audio;       /* Device supported audio info */
 264         int audio_num;                  /* Device supported audio type number */
 265         int base_audio_support;         /* Device supported base audio */
 266 };
 267
 268 /* RK HDMI Video Configure Parameters */
 269 struct hdmi_video_para {
 270         int vic;
 271         int input_mode;                 /* input video data interface */
 272         int input_color;                /* input video color mode */
 273         int output_mode;                /* output hdmi or dvi */
 274         int output_color;               /* output video color mode */
 275         unsigned char format_3d;        /* output 3d format */
 276         unsigned char color_depth;      /* color depth: 8bit; 10bit;
 277                                          * 12bit; 16bit;
 278                                          */
 279         unsigned char pixel_repet;      /* pixel repettion */
 280         unsigned char pixel_pack_phase; /* pixel packing default phase */
 281         unsigned char color_limit_range;        /* quantization range
 282                                                  * 0: full range(0~255)
 283                                                  * 1:limit range(16~235)
 284                                                  */
 285 };
 286
 287 struct hdmi {
 288         struct device *dev;
 289         int id;
 290         int irq;
 291         struct rk_lcdc_driver *lcdc;
 292
 293 #ifdef CONFIG_SWITCH
 294         struct switch_dev switch_hdmi;
 295 #endif
 296
 297         struct workqueue_struct *workqueue;
 298         struct delayed_work delay_work;
 299
 300         spinlock_t irq_lock;
 301         struct mutex enable_mutex;
 302
 303         int wait;
 304         struct completion complete;
 305
 306         int suspend;
 307 #ifdef CONFIG_HAS_EARLYSUSPEND
 308         struct early_suspend early_suspend;
 309 #endif
 310
 311         struct hdmi_edid edid;
 312         int enable;             /* Enable HDMI output or not */
 313         int vic;                /* HDMI output video mode code */
 314         struct hdmi_audio audio;        /* HDMI output audio type */
 315
 316         int pwr_mode;           /* power mode */
 317         int hotplug;            /* hot plug status */
 318         int state;              /* hdmi state machine status */
 319         int autoconfig;         /* if true, auto config hdmi output mode
 320                                  * according to EDID
 321                                  */
 322         int command;            /* HDMI configuration command */
 323         int display;            /* HDMI display status */
 324         int xscale;             /* x direction scale value */
 325         int yscale;             /* y directoon scale value */
 326         int tmdsclk;            /* TDMS Clock frequency */
 327         int pixclock;           /* Pixel Clcok frequency */
 328
 329         struct list_head pwrlist_head;
 330
 331         int (*insert) (struct hdmi *hdmi);
 332         int (*remove) (struct hdmi *hdmi);
 333         void (*control_output) (struct hdmi *hdmi, int enable);
 334         int (*config_video) (struct hdmi *hdmi,
 335                              struct hdmi_video_para *vpara);
 336         int (*config_audio) (struct hdmi *hdmi, struct hdmi_audio *audio);
 337         int (*detect_hotplug) (struct hdmi *hdmi);
 338         /* call back for edid */
 339         int (*read_edid) (struct hdmi *hdmi, int block, unsigned char *buff);
 340         int (*set_vif) (struct hdmi *hdmi, struct rk_screen *screen,
 341                         bool connect);
 342
 343         /* call back for hdcp operatoion */
 344         void (*hdcp_cb) (void);
 345         void (*hdcp_irq_cb) (int);
 346         int (*hdcp_power_on_cb) (void);
 347         void (*hdcp_power_off_cb) (void);
 348 };
 349
 350 #define hdmi_err(dev, format, arg...)           \
 351         dev_err(dev , format , ## arg)
 352
 353 #ifdef HDMI_DEBUG
 354 #define hdmi_dbg(dev, format, arg...)           \
 355         dev_info(dev , format , ## arg)
 356 #else
 357 #define hdmi_dbg(dev, format, arg...)
 358 #endif
 359
 360 extern int hdmi_drv_register(struct hdmi *hdmi_drv);
 361 extern int hdmi_get_hotplug(void);
 362 extern int hdmi_set_info(struct rk_screen *screen, unsigned int vic);
 363 extern void hdmi_init_lcdc(struct rk_screen *screen,
 364                            struct rk29lcd_info *lcd_info);
 365 extern int hdmi_sys_init(struct hdmi *hdmi_drv);
 366 extern int hdmi_sys_parse_edid(struct hdmi *hdmi_drv);
 367 extern const char *hdmi_get_video_mode_name(unsigned char vic);
 368 extern int hdmi_videomode_to_vic(struct fb_videomode *vmode);
 369 extern const struct fb_videomode *hdmi_vic_to_videomode(int vic);
 370 extern int hdmi_add_videomode(const struct fb_videomode *mode,
 371                               struct list_head *head);
 372 extern struct hdmi_video_timing *hdmi_find_mode(int vic);
 373 extern int hdmi_find_best_mode(struct hdmi *hdmi_drv, int vic);
 374 extern int hdmi_ouputmode_select(struct hdmi *hdmi_drv, int edid_ok);
 375 extern int hdmi_switch_fb(struct hdmi *hdmi_drv, int vic);
 376 extern int hdmi_init_video_para(struct hdmi *hdmi_drv,
 377                                 struct hdmi_video_para *video);
 378 extern void hdmi_work(struct work_struct *work);
 379 extern void hdmi_register_display_sysfs(struct hdmi *hdmi_drv,
 380                                         struct device *parent);
 381 extern void hdmi_unregister_display_sysfs(struct hdmi *hdmi_drv);
 382
 383 int rk_hdmi_parse_dt(struct hdmi *hdmi_drv);
 384 int rk_hdmi_pwr_enable(struct hdmi *dev_drv);
 385 int rk_hdmi_pwr_disable(struct hdmi *dev_drv);
 386
 387 #endif