1 #include "rockchip-hdmi.h"
3 static const struct hdmi_video_timing hdmi_mode[] = {
6 .name = "720x480i@60Hz",
18 .vmode = FB_VMODE_INTERLACED,
21 .vic = HDMI_720X480I_60HZ_4_3,
22 .vic_2nd = HDMI_720X480I_60HZ_16_9,
24 .interface = OUT_P888,
28 .name = "720x576i@50Hz",
40 .vmode = FB_VMODE_INTERLACED,
43 .vic = HDMI_720X576I_50HZ_4_3,
44 .vic_2nd = HDMI_720X576I_50HZ_16_9,
46 .interface = OUT_P888,
50 .name = "720x480p@60Hz",
65 .vic = HDMI_720X480P_60HZ_4_3,
66 .vic_2nd = HDMI_720X480P_60HZ_16_9,
68 .interface = OUT_P888,
72 .name = "720x576p@50Hz",
87 .vic = HDMI_720X576P_50HZ_4_3,
88 .vic_2nd = HDMI_720X576P_50HZ_16_9,
90 .interface = OUT_P888,
94 .name = "1280x720p@24Hz",
100 .right_margin = 1760,
105 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
109 .vic = HDMI_1280X720P_24HZ,
110 .vic_2nd = HDMI_1280X720P_24HZ_21_9,
112 .interface = OUT_P888,
116 .name = "1280x720p@25Hz",
120 .pixclock = 74250000,
122 .right_margin = 2420,
127 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
131 .vic = HDMI_1280X720P_25HZ,
132 .vic_2nd = HDMI_1280X720P_25HZ_21_9,
134 .interface = OUT_P888,
138 .name = "1280x720p@30Hz",
142 .pixclock = 74250000,
144 .right_margin = 1760,
149 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
153 .vic = HDMI_1280X720P_30HZ,
154 .vic_2nd = HDMI_1280X720P_30HZ_21_9,
156 .interface = OUT_P888,
160 .name = "1280x720p@50Hz",
164 .pixclock = 74250000,
171 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
175 .vic = HDMI_1280X720P_50HZ,
176 .vic_2nd = HDMI_1280X720P_50HZ_21_9,
178 .interface = OUT_P888,
182 .name = "1280x720p@60Hz",
186 .pixclock = 74250000,
193 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
197 .vic = HDMI_1280X720P_60HZ,
198 .vic_2nd = HDMI_1280X720P_60HZ_21_9,
200 .interface = OUT_P888,
204 .name = "1920x1080i@50Hz",
208 .pixclock = 74250000,
215 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
216 .vmode = FB_VMODE_INTERLACED,
219 .vic = HDMI_1920X1080I_50HZ,
222 .interface = OUT_P888,
226 .name = "1920x1080i@60Hz",
230 .pixclock = 74250000,
237 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
238 .vmode = FB_VMODE_INTERLACED,
241 .vic = HDMI_1920X1080I_60HZ,
244 .interface = OUT_P888,
248 .name = "1920x1080p@24Hz",
252 .pixclock = 74250000,
259 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
263 .vic = HDMI_1920X1080P_24HZ,
264 .vic_2nd = HDMI_1920X1080P_24HZ_21_9,
266 .interface = OUT_P888,
270 .name = "1920x1080p@25Hz",
274 .pixclock = 74250000,
281 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
285 .vic = HDMI_1920X1080P_25HZ,
286 .vic_2nd = HDMI_1920X1080P_25HZ_21_9,
288 .interface = OUT_P888,
292 .name = "1920x1080p@30Hz",
296 .pixclock = 74250000,
303 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
307 .vic = HDMI_1920X1080P_30HZ,
308 .vic_2nd = HDMI_1920X1080P_30HZ_21_9,
310 .interface = OUT_P888,
314 .name = "1920x1080p@50Hz",
318 .pixclock = 148500000,
325 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
329 .vic = HDMI_1920X1080P_50HZ,
330 .vic_2nd = HDMI_1920X1080P_50HZ_21_9,
332 .interface = OUT_P888,
336 .name = "1920x1080p@60Hz",
340 .pixclock = 148500000,
347 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
351 .vic = HDMI_1920X1080P_60HZ,
352 .vic_2nd = HDMI_1920X1080P_60HZ_21_9,
354 .interface = OUT_P888,
358 .name = "3840x2160p@24Hz",
362 .pixclock = 297000000,
364 .right_margin = 1276,
369 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
373 .vic = HDMI_3840X2160P_24HZ,
374 .vic_2nd = HDMI_3840X2160P_24HZ_21_9,
376 .interface = OUT_P888,
380 .name = "3840x2160p@25Hz",
384 .pixclock = 297000000,
386 .right_margin = 1056,
391 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
395 .vic = HDMI_3840X2160P_25HZ,
396 .vic_2nd = HDMI_3840X2160P_25HZ_21_9,
398 .interface = OUT_P888,
402 .name = "3840x2160p@30Hz",
406 .pixclock = 297000000,
413 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
417 .vic = HDMI_3840X2160P_30HZ,
418 .vic_2nd = HDMI_3840X2160P_30HZ_21_9,
420 .interface = OUT_P888,
424 .name = "4096x2160p@24Hz",
428 .pixclock = 297000000,
430 .right_margin = 1020,
435 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
439 .vic = HDMI_4096X2160P_24HZ,
442 .interface = OUT_P888,
446 .name = "4096x2160p@25Hz",
450 .pixclock = 297000000,
457 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
461 .vic = HDMI_4096X2160P_25HZ,
464 .interface = OUT_P888,
468 .name = "4096x2160p@30Hz",
472 .pixclock = 297000000,
479 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
483 .vic = HDMI_4096X2160P_30HZ,
486 .interface = OUT_P888,
490 .name = "3840x2160p@50Hz",
494 .pixclock = 594000000,
496 .right_margin = 1056,
501 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
505 .vic = HDMI_3840X2160P_50HZ,
506 .vic_2nd = HDMI_3840X2160P_50HZ_21_9,
508 .interface = OUT_P888,
512 .name = "3840x2160p@60Hz",
516 .pixclock = 594000000,
523 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
527 .vic = HDMI_3840X2160P_60HZ,
528 .vic_2nd = HDMI_3840X2160P_60HZ_21_9,
530 .interface = OUT_P888,
534 .name = "4096x2160p@50Hz",
538 .pixclock = 594000000,
545 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
549 .vic = HDMI_4096X2160P_50HZ,
552 .interface = OUT_P888,
556 .name = "4096x2160p@60Hz",
560 .pixclock = 594000000,
567 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
571 .vic = HDMI_4096X2160P_60HZ,
574 .interface = OUT_P888,
578 .name = "800x600p@60Hz",
582 .pixclock = 40000000,
589 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
593 .vic = HDMI_VIDEO_DMT | 1,
596 .interface = OUT_P888,
600 .name = "1024x768p@60Hz",
604 .pixclock = 65000000,
615 .vic = HDMI_VIDEO_DMT | 2,
618 .interface = OUT_P888,
622 .name = "1280x960p@60Hz",
626 .pixclock = 108000000,
633 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
637 .vic = HDMI_VIDEO_DMT | 3,
640 .interface = OUT_P888,
644 .name = "1280x1024p@60Hz",
648 .pixclock = 108000000,
655 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
659 .vic = HDMI_VIDEO_DMT | 4,
662 .interface = OUT_P888,
666 .name = "1360x768p@60Hz",
670 .pixclock = 85500000,
677 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
681 .vic = HDMI_VIDEO_DMT | 5,
684 .interface = OUT_P888,
688 .name = "1366x768p@60Hz",
692 .pixclock = 85500000,
699 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
703 .vic = HDMI_VIDEO_DMT | 6,
706 .interface = OUT_P888,
710 .name = "1440x900p@60Hz",
714 .pixclock = 106500000,
721 .sync = FB_SYNC_VERT_HIGH_ACT,
725 .vic = HDMI_VIDEO_DMT | 7,
728 .interface = OUT_P888,
732 .name = "1600x900p@60Hz",
736 .pixclock = 108000000,
743 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
747 .vic = HDMI_VIDEO_DMT | 8,
750 .interface = OUT_P888,
754 .name = "1680x1050@60Hz",
758 .pixclock = 146250000,
765 .sync = FB_SYNC_VERT_HIGH_ACT,
769 .vic = HDMI_VIDEO_DMT | 9,
772 .interface = OUT_P888,
776 static int hdmi_set_info(struct rk_screen *screen, struct hdmi *hdmi)
779 struct fb_videomode *mode;
781 if (screen == NULL || hdmi == NULL)
782 return HDMI_ERROR_FALSE;
785 hdmi->vic = hdmi->property->defaultmode;
787 if (hdmi->vic & HDMI_VIDEO_DMT)
790 vic = hdmi->vic & HDMI_VIC_MASK;
791 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
792 if (hdmi_mode[i].vic == vic ||
793 hdmi_mode[i].vic_2nd == vic)
796 if (i == ARRAY_SIZE(hdmi_mode))
797 return HDMI_ERROR_FALSE;
799 memset(screen, 0, sizeof(struct rk_screen));
801 /* screen type & face */
802 screen->type = SCREEN_HDMI;
803 if (hdmi->video.color_input == HDMI_COLOR_RGB_0_255)
804 screen->color_mode = COLOR_RGB;
806 screen->color_mode = COLOR_YCBCR;
807 if (hdmi->vic & HDMI_VIDEO_YUV420) {
808 if (hdmi->video.color_output_depth == 10)
809 screen->face = OUT_YUV_420_10BIT;
811 screen->face = OUT_YUV_420;
813 if (hdmi->video.color_output_depth == 10)
814 screen->face = OUT_P101010;
816 screen->face = hdmi_mode[i].interface;
818 screen->pixelrepeat = hdmi_mode[i].pixelrepeat - 1;
819 mode = (struct fb_videomode *)&(hdmi_mode[i].mode);
821 screen->mode = *mode;
822 if (hdmi->video.format_3d == HDMI_3D_FRAME_PACKING) {
823 screen->mode.pixclock = 2 * mode->pixclock;
824 if (mode->vmode == 0) {
825 screen->mode.yres = 2 * mode->yres +
830 screen->mode.yres = 2 * mode->yres +
831 3 * (mode->upper_margin +
833 mode->vsync_len) + 2;
834 screen->mode.vmode = 0;
838 if (FB_SYNC_HOR_HIGH_ACT & mode->sync)
839 screen->pin_hsync = 1;
841 screen->pin_hsync = 0;
842 if (FB_SYNC_VERT_HIGH_ACT & mode->sync)
843 screen->pin_vsync = 1;
845 screen->pin_vsync = 0;
848 screen->pin_dclk = 1;
851 if (hdmi->soctype > HDMI_SOC_RK3288 &&
852 screen->color_mode > COLOR_RGB &&
853 (screen->face == OUT_P888 ||
854 screen->face == OUT_P101010))
860 screen->swap_delta = 0;
861 screen->swap_dumy = 0;
863 /* Operation function*/
865 screen->standby = NULL;
867 screen->overscan.left = hdmi->xscale;
868 screen->overscan.top = hdmi->yscale;
869 screen->overscan.right = hdmi->xscale;
870 screen->overscan.bottom = hdmi->yscale;
875 * hdmi_find_best_mode: find the video mode nearest to input vic
880 * If vic is zero, return the high resolution video mode vic.
882 int hdmi_find_best_mode(struct hdmi *hdmi, int vic)
884 struct list_head *pos, *head = &hdmi->edid.modelist;
885 struct display_modelist *modelist;
889 list_for_each(pos, head) {
892 struct display_modelist, list);
893 if (modelist->vic == vic) {
899 if ((!vic || !found) && head->next != head) {
900 /* If parse edid error, we select default mode; */
901 if (hdmi->edid.specs &&
902 hdmi->edid.specs->modedb_len)
903 modelist = list_entry(head->next,
904 struct display_modelist, list);
906 return hdmi->property->defaultmode;
909 if (modelist != NULL)
910 return modelist->vic;
915 * hdmi_set_lcdc: switch lcdc mode to required video mode
921 int hdmi_set_lcdc(struct hdmi *hdmi)
924 struct rk_screen screen;
926 rc = hdmi_set_info(&screen, hdmi);
928 rk_fb_switch_screen(&screen, 1, hdmi->lcdc->id);
933 * hdmi_videomode_compare - compare 2 videomodes
934 * @mode1: first videomode
935 * @mode2: second videomode
938 * 1 if mode1 > mode2, 0 if mode1 = mode2, -1 mode1 < mode2
940 static int hdmi_videomode_compare(const struct fb_videomode *mode1,
941 const struct fb_videomode *mode2)
943 if (mode1->xres > mode2->xres)
946 if (mode1->xres == mode2->xres) {
947 if (mode1->yres > mode2->yres)
949 if (mode1->yres == mode2->yres) {
950 if (mode1->vmode < mode2->vmode)
952 if (mode1->pixclock > mode2->pixclock)
954 if (mode1->pixclock == mode2->pixclock) {
955 if (mode1->refresh > mode2->refresh)
957 if (mode1->refresh == mode2->refresh) {
958 if (mode2->flag > mode1->flag)
960 if (mode2->flag < mode1->flag)
962 if (mode2->vmode > mode1->vmode)
964 if (mode2->vmode == mode1->vmode)
974 * hdmi_add_vic - add entry to modelist according vic
975 * @vic: vic to be added
976 * @head: struct list_head of modelist
979 * Will only add unmatched mode entries
981 int hdmi_add_vic(int vic, struct list_head *head)
983 struct list_head *pos;
984 struct display_modelist *modelist;
987 /*pr_info("%s vic %d\n", __FUNCTION__, vic);*/
991 list_for_each(pos, head) {
992 modelist = list_entry(pos, struct display_modelist, list);
1000 modelist = kmalloc(sizeof(*modelist),
1005 memset(modelist, 0, sizeof(struct display_modelist));
1006 modelist->vic = vic;
1007 list_add_tail(&modelist->list, head);
1013 * hdmi_add_videomode: adds videomode entry to modelist
1014 * @mode: videomode to be added
1015 * @head: struct list_head of modelist
1018 * Will only add unmatched mode entries
1020 static int hdmi_add_videomode(const struct fb_videomode *mode,
1021 struct list_head *head)
1023 struct list_head *pos;
1024 struct display_modelist *modelist, *modelist_new;
1025 struct fb_videomode *m;
1028 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1029 m = (struct fb_videomode *)&(hdmi_mode[i].mode);
1030 if (fb_mode_is_equal(m, mode)) {
1037 list_for_each(pos, head) {
1038 modelist = list_entry(pos,
1039 struct display_modelist, list);
1040 m = &modelist->mode;
1041 if (fb_mode_is_equal(m, mode))
1043 else if (hdmi_videomode_compare(m, mode) == -1)
1047 modelist_new = kmalloc(sizeof(*modelist_new), GFP_KERNEL);
1050 memset(modelist_new, 0, sizeof(struct display_modelist));
1051 modelist_new->mode = hdmi_mode[i].mode;
1052 modelist_new->vic = hdmi_mode[i].vic;
1053 list_add_tail(&modelist_new->list, pos);
1060 * hdmi_sort_modelist: sort modelist of edid
1061 * @edid: edid to be sort
1063 static void hdmi_sort_modelist(struct hdmi_edid *edid, int feature)
1065 struct list_head *pos, *pos_new;
1066 struct list_head head_new, *head = &edid->modelist;
1067 struct display_modelist *modelist, *modelist_new, *modelist_n;
1068 struct fb_videomode *m, *m_new;
1069 int i, compare, vic;
1071 INIT_LIST_HEAD(&head_new);
1072 list_for_each(pos, head) {
1073 modelist = list_entry(pos, struct display_modelist, list);
1074 /*pr_info("%s vic %d\n", __function__, modelist->vic);*/
1075 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1076 if (modelist->vic & HDMI_VIDEO_DMT) {
1077 if (feature & SUPPORT_VESA_DMT)
1078 vic = modelist->vic;
1082 vic = modelist->vic & HDMI_VIC_MASK;
1084 if (vic == hdmi_mode[i].vic ||
1085 vic == hdmi_mode[i].vic_2nd) {
1086 if ((feature & SUPPORT_4K) == 0 &&
1087 hdmi_mode[i].mode.xres >= 3840)
1089 if ((feature & SUPPORT_4K_4096) == 0 &&
1090 hdmi_mode[i].mode.xres == 4096)
1092 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1093 !(modelist->vic & HDMI_VIDEO_YUV420) &&
1094 hdmi_mode[i].mode.pixclock > 340000000)
1096 if ((modelist->vic & HDMI_VIDEO_YUV420) &&
1097 (feature & SUPPORT_YUV420) == 0)
1099 if ((feature & SUPPORT_1080I) == 0 &&
1100 hdmi_mode[i].mode.xres == 1920 &&
1101 (hdmi_mode[i].mode.vmode &
1102 FB_VMODE_INTERLACED))
1104 if ((feature & SUPPORT_480I_576I) == 0 &&
1105 hdmi_mode[i].mode.xres == 720 &&
1106 hdmi_mode[i].mode.vmode &
1107 FB_VMODE_INTERLACED)
1109 modelist->mode = hdmi_mode[i].mode;
1110 if (modelist->vic & HDMI_VIDEO_YUV420)
1111 modelist->mode.flag = 1;
1114 m = (struct fb_videomode *)&(modelist->mode);
1115 list_for_each(pos_new, &head_new) {
1118 struct display_modelist,
1120 m_new = &modelist_new->mode;
1122 hdmi_videomode_compare(m, m_new);
1128 kmalloc(sizeof(*modelist_n),
1132 *modelist_n = *modelist;
1133 list_add_tail(&modelist_n->list,
1140 fb_destroy_modelist(head);
1141 if (head_new.next == &head_new) {
1142 pr_info("There is no available video mode in EDID.\n");
1143 INIT_LIST_HEAD(&edid->modelist);
1145 edid->modelist = head_new;
1146 edid->modelist.prev->next = &edid->modelist;
1147 edid->modelist.next->prev = &edid->modelist;
1152 * hdmi_ouputmode_select - select hdmi transmitter output mode: hdmi or dvi?
1153 * @hdmi: handle of hdmi
1154 * @edid_ok: get EDID data success or not, HDMI_ERROR_SUCESS means success.
1156 int hdmi_ouputmode_select(struct hdmi *hdmi, int edid_ok)
1158 struct list_head *head = &hdmi->edid.modelist;
1159 struct fb_monspecs *specs = hdmi->edid.specs;
1160 struct fb_videomode *modedb = NULL, *mode = NULL;
1161 int i, pixclock, feature = hdmi->property->feature;
1163 if (edid_ok != HDMI_ERROR_SUCESS) {
1164 dev_err(hdmi->dev, "warning: EDID error, assume sink as HDMI !!!!");
1165 hdmi->edid.status = -1;
1166 hdmi->edid.sink_hdmi = 1;
1167 hdmi->edid.baseaudio_support = 1;
1168 hdmi->edid.ycbcr444 = 0;
1169 hdmi->edid.ycbcr422 = 0;
1172 if (head->next == head) {
1174 "warning: no CEA video mode parsed from EDID !!!!\n");
1175 /* If EDID get error, list all system supported mode.
1176 * If output mode is set to DVI and EDID is ok, check
1177 * the output timing.
1179 if (hdmi->edid.sink_hdmi == 0 && specs && specs->modedb_len) {
1180 /* Get max resolution timing */
1181 modedb = &specs->modedb[0];
1182 for (i = 0; i < specs->modedb_len; i++) {
1183 if (specs->modedb[i].xres > modedb->xres)
1184 modedb = &specs->modedb[i];
1185 else if (specs->modedb[i].xres ==
1187 specs->modedb[i].yres > modedb->yres)
1188 modedb = &specs->modedb[i];
1190 /* For some monitor, the max pixclock read from EDID
1191 * is smaller than the clock of max resolution mode
1192 * supported. We fix it.
1194 pixclock = PICOS2KHZ(modedb->pixclock);
1198 if (pixclock == 148250000)
1199 pixclock = 148500000;
1200 if (pixclock > specs->dclkmax)
1201 specs->dclkmax = pixclock;
1204 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1205 mode = (struct fb_videomode *)&(hdmi_mode[i].mode);
1207 if ((mode->pixclock < specs->dclkmin) ||
1208 (mode->pixclock > specs->dclkmax) ||
1209 (mode->refresh < specs->vfmin) ||
1210 (mode->refresh > specs->vfmax) ||
1211 (mode->xres > modedb->xres) ||
1212 (mode->yres > modedb->yres))
1215 /* If there is no valid information in EDID,
1216 * just list common hdmi foramt.
1218 if (mode->xres > 3840 ||
1219 mode->refresh < 50 ||
1220 (mode->vmode & FB_VMODE_INTERLACED) ||
1221 hdmi_mode[i].vic & HDMI_VIDEO_DMT)
1224 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1225 mode->pixclock > 340000000)
1227 if ((feature & SUPPORT_4K) == 0 &&
1230 if ((feature & SUPPORT_4K_4096) == 0 &&
1233 if ((feature & SUPPORT_1080I) == 0 &&
1234 mode->xres == 1920 &&
1235 (mode->vmode & FB_VMODE_INTERLACED))
1237 if ((feature & SUPPORT_480I_576I) == 0 &&
1238 mode->xres == 720 &&
1239 (mode->vmode & FB_VMODE_INTERLACED))
1241 hdmi_add_videomode(mode, head);
1244 /* There are some video mode is not defined in EDID extend
1245 * block, so we need to check first block data.
1247 if (specs && specs->modedb_len) {
1248 for (i = 0; i < specs->modedb_len; i++) {
1249 modedb = &specs->modedb[i];
1250 pixclock = hdmi_videomode_to_vic(modedb);
1252 hdmi_add_vic(pixclock, head);
1255 hdmi_sort_modelist(&hdmi->edid, hdmi->property->feature);
1258 return HDMI_ERROR_SUCESS;
1262 * hdmi_videomode_to_vic: transverse video mode to vic
1263 * @vmode: videomode to transverse
1266 int hdmi_videomode_to_vic(struct fb_videomode *vmode)
1268 struct fb_videomode *mode;
1269 unsigned int vic = 0;
1272 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1273 mode = (struct fb_videomode *)&(hdmi_mode[i].mode);
1274 if (vmode->vmode == mode->vmode &&
1275 vmode->refresh == mode->refresh &&
1276 vmode->xres == mode->xres &&
1277 vmode->yres == mode->yres &&
1278 vmode->left_margin == mode->left_margin &&
1279 vmode->right_margin == mode->right_margin &&
1280 vmode->upper_margin == mode->upper_margin &&
1281 vmode->lower_margin == mode->lower_margin &&
1282 vmode->hsync_len == mode->hsync_len &&
1283 vmode->vsync_len == mode->vsync_len) {
1284 vic = hdmi_mode[i].vic;
1292 * hdmi_vic2timing: transverse vic mode to video timing
1293 * @vmode: vic to transverse
1296 const struct hdmi_video_timing *hdmi_vic2timing(int vic)
1303 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1304 if (hdmi_mode[i].vic == vic || hdmi_mode[i].vic_2nd == vic)
1305 return &(hdmi_mode[i]);
1311 * hdmi_vic_to_videomode: transverse vic mode to video mode
1312 * @vmode: vic to transverse
1315 const struct fb_videomode *hdmi_vic_to_videomode(int vic)
1321 else if (vic & HDMI_VIDEO_DMT)
1324 vid = vic & HDMI_VIC_MASK;
1325 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1326 if (hdmi_mode[i].vic == vid ||
1327 hdmi_mode[i].vic_2nd == vid)
1328 return &hdmi_mode[i].mode;
1334 * hdmi_init_modelist: initial hdmi mode list
1340 void hdmi_init_modelist(struct hdmi *hdmi)
1343 struct list_head *head = &hdmi->edid.modelist;
1345 feature = hdmi->property->feature;
1346 INIT_LIST_HEAD(&hdmi->edid.modelist);
1347 for (i = 0; i < ARRAY_SIZE(hdmi_mode); i++) {
1348 if (hdmi_mode[i].vic & HDMI_VIDEO_DMT)
1350 if ((feature & SUPPORT_TMDS_600M) == 0 &&
1351 hdmi_mode[i].mode.pixclock > 340000000)
1353 if ((feature & SUPPORT_4K) == 0 &&
1354 hdmi_mode[i].mode.xres >= 3840)
1356 if ((feature & SUPPORT_4K_4096) == 0 &&
1357 hdmi_mode[i].mode.xres == 4096)
1359 if ((feature & SUPPORT_1080I) == 0 &&
1360 hdmi_mode[i].mode.xres == 1920 &&
1361 (hdmi_mode[i].mode.vmode & FB_VMODE_INTERLACED))
1363 if ((feature & SUPPORT_480I_576I) == 0 &&
1364 hdmi_mode[i].mode.xres == 720 &&
1365 (hdmi_mode[i].mode.vmode & FB_VMODE_INTERLACED))
1367 hdmi_add_videomode(&(hdmi_mode[i].mode), head);