1 #ifndef __ROCKCHIP_HDMI_H__
2 #define __ROCKCHIP_HDMI_H__
5 #include <linux/rk_fb.h>
6 #include <linux/display-sys.h>
8 #include <linux/switch.h>
11 #define HDMI_VIDEO_NORMAL (0 << 8)
12 #define HDMI_VIDEO_EXT (1 << 8)
13 #define HDMI_VIDEO_3D (2 << 8)
14 #define HDMI_VIDEO_DVI (3 << 8)
15 #define HDMI_VIDEO_YUV420 (4 << 8)
16 #define HDMI_VIC_MASK (0xFF)
17 #define HDMI_TYPE_MASK (0xFF << 8)
20 /* HDMI video information code according CEA-861-F */
21 enum hdmi_video_infomation_code {
22 HDMI_640X480P_60HZ = 1,
23 HDMI_720X480P_60HZ_4_3,
24 HDMI_720X480P_60HZ_16_9,
26 HDMI_1920X1080I_60HZ, /*5*/
27 HDMI_720X480I_60HZ_4_3,
28 HDMI_720X480I_60HZ_16_9,
29 HDMI_720X240P_60HZ_4_3,
30 HDMI_720X240P_60HZ_16_9,
31 HDMI_2880X480I_60HZ_4_3, /*10*/
32 HDMI_2880X480I_60HZ_16_9,
33 HDMI_2880X240P_60HZ_4_3,
34 HDMI_2880X240P_60HZ_16_9,
35 HDMI_1440X480P_60HZ_4_3,
36 HDMI_1440X480P_60HZ_16_9, /*15*/
38 HDMI_720X576P_50HZ_4_3,
39 HDMI_720X576P_50HZ_16_9,
41 HDMI_1920X1080I_50HZ, /*20*/
42 HDMI_720X576I_50HZ_4_3,
43 HDMI_720X576I_50HZ_16_9,
44 HDMI_720X288P_50HZ_4_3,
45 HDMI_720X288P_50HZ_16_9,
46 HDMI_2880X576I_50HZ_4_3, /*25*/
47 HDMI_2880X576I_50HZ_16_9,
48 HDMI_2880X288P_50HZ_4_3,
49 HDMI_2880X288P_50HZ_16_9,
50 HDMI_1440X576P_50HZ_4_3,
51 HDMI_1440X576P_50HZ_16_9, /*30*/
56 HDMI_2880X480P_60HZ_4_3, /*35*/
57 HDMI_2880X480P_60HZ_16_9,
58 HDMI_2880X576P_50HZ_4_3,
59 HDMI_2880X576P_50HZ_16_9,
60 HDMI_1920X1080I_50HZ_1250, /* V Line 1250 total*/
61 HDMI_1920X1080I_100HZ, /*40*/
63 HDMI_720X576P_100HZ_4_3,
64 HDMI_720X576P_100HZ_16_9,
65 HDMI_720X576I_100HZ_4_3,
66 HDMI_720X576I_100HZ_16_9, /*45*/
67 HDMI_1920X1080I_120HZ,
69 HDMI_720X480P_120HZ_4_3,
70 HDMI_720X480P_120HZ_16_9,
71 HDMI_720X480I_120HZ_4_3, /*50*/
72 HDMI_720X480I_120HZ_16_9,
73 HDMI_720X576P_200HZ_4_3,
74 HDMI_720X576P_200HZ_16_9,
75 HDMI_720X576I_200HZ_4_3,
76 HDMI_720X576I_200HZ_16_9, /*55*/
77 HDMI_720X480P_240HZ_4_3,
78 HDMI_720X480P_240HZ_16_9,
79 HDMI_720X480I_240HZ_4_3,
80 HDMI_720X480I_240HZ_16_9,
81 HDMI_1280X720P_24HZ, /*60*/
84 HDMI_1920X1080P_120HZ,
85 HDMI_1920X1080P_100HZ,
86 HDMI_1280X720P_24HZ_4_3, /*65*/
87 HDMI_1280X720P_25HZ_4_3,
88 HDMI_1280X720P_30HZ_4_3,
89 HDMI_1280X720P_50HZ_4_3,
90 HDMI_1280X720P_60HZ_4_3,
91 HDMI_1280X720P_100HZ_4_3, /*70*/
92 HDMI_1280X720P_120HZ_4_3,
93 HDMI_1920X1080P_24HZ_4_3,
94 HDMI_1920X1080P_25HZ_4_3,
95 HDMI_1920X1080P_30HZ_4_3,
96 HDMI_1920X1080P_50HZ_4_3, /*75*/
97 HDMI_1920X1080P_60HZ_4_3,
98 HDMI_1920X1080P_100HZ_4_3,
99 HDMI_1920X1080P_120HZ_4_3,
101 HDMI_1680X720P_25HZ, /*80*/
105 HDMI_1680X720P_100HZ,
106 HDMI_1680X720P_120HZ, /*85*/
107 HDMI_2560X1080P_24HZ,
108 HDMI_2560X1080P_25HZ,
109 HDMI_2560X1080P_30HZ,
110 HDMI_2560X1080P_50HZ,
111 HDMI_2560X1080P_60HZ, /*90*/
112 HDMI_2560X1080P_100HZ,
113 HDMI_2560X1080P_120HZ,
114 HDMI_3840X2160P_24HZ,
115 HDMI_3840X2160P_25HZ,
116 HDMI_3840X2160P_30HZ, /*95*/
117 HDMI_3840X2160P_50HZ,
118 HDMI_3840X2160P_60HZ,
119 HDMI_4096X2160P_24HZ,
120 HDMI_4096X2160P_25HZ,
121 HDMI_4096X2160P_30HZ, /*100*/
122 HDMI_4096X2160P_50HZ,
123 HDMI_4096X2160P_60HZ,
124 HDMI_3840X2160P_24HZ_4_3,
125 HDMI_3840X2160P_25HZ_4_3,
126 HDMI_3840X2160P_30HZ_4_3, /*105*/
127 HDMI_3840X2160P_50HZ_4_3,
128 HDMI_3840X2160P_60HZ_4_3,
131 /* HDMI Extended Resolution */
133 HDMI_VIC_4KX2K_30HZ = 1,
136 HDMI_VIC_4KX2K_24HZ_SMPTE
139 /* HDMI Video Format */
141 HDMI_VIDEO_FORMAT_NORMAL = 0,
142 HDMI_VIDEO_FORMAT_4KX2K,
143 HDMI_VIDEO_FORMAT_3D,
149 HDMI_3D_FRAME_PACKING = 0,
150 HDMI_3D_TOP_BOOTOM = 6,
151 HDMI_3D_SIDE_BY_SIDE_HALF = 8,
154 /* HDMI Video Data Color Mode */
155 enum hdmi_video_color_mode {
157 HDMI_COLOR_RGB_0_255,
158 HDMI_COLOR_RGB_16_235,
164 /* HDMI Video Data Color Depth */
165 enum hdmi_deep_color {
166 HDMI_DEPP_COLOR_AUTO = 0,
167 HDMI_DEEP_COLOR_Y444 = 0x1,
168 HDMI_DEEP_COLOR_30BITS = 0x2,
169 HDMI_DEEP_COLOR_36BITS = 0x4,
170 HDMI_DEEP_COLOR_48BITS = 0x8,
173 /* HDMI Audio source */
175 HDMI_AUDIO_SRC_IIS = 0,
179 /* HDMI Audio Type */
180 enum hdmi_audio_type {
181 HDMI_AUDIO_NLPCM = 0,
187 HDMI_AUDIO_AAC_LC, /*AAC */
190 HDMI_AUDIO_DSD, /* One bit Audio */
198 /* HDMI Audio Sample Rate */
199 enum hdmi_audio_samplerate {
200 HDMI_AUDIO_FS_32000 = 0x1,
201 HDMI_AUDIO_FS_44100 = 0x2,
202 HDMI_AUDIO_FS_48000 = 0x4,
203 HDMI_AUDIO_FS_88200 = 0x8,
204 HDMI_AUDIO_FS_96000 = 0x10,
205 HDMI_AUDIO_FS_176400 = 0x20,
206 HDMI_AUDIO_FS_192000 = 0x40
209 /* HDMI Audio Word Length */
210 enum hdmi_audio_word_length {
211 HDMI_AUDIO_WORD_LENGTH_16bit = 0x1,
212 HDMI_AUDIO_WORD_LENGTH_20bit = 0x2,
213 HDMI_AUDIO_WORD_LENGTH_24bit = 0x4
216 /* HDMI Hotplug Status */
217 enum hdmi_hotpulg_status {
218 HDMI_HPD_REMOVED = 0, /* HDMI is disconnected */
219 HDMI_HPD_INSERT, /* HDMI is connected, but HDP is low
220 or TMDS link is not pull up to 3.3V*/
221 HDMI_HPD_ACTIVED /* HDMI is connected, all singnal
225 enum hdmi_mute_status {
227 HDMI_VIDEO_MUTE = 0x1,
228 HDMI_AUDIO_MUTE = 0x2,
231 /* HDMI Error Code */
232 enum hdmi_error_code {
233 HDMI_ERROR_SUCESS = 0,
239 /* HDMI Video Timing */
240 struct hdmi_video_timing {
241 struct fb_videomode mode; /* Video timing*/
242 unsigned int vic; /* Video information code*/
243 unsigned int vic_2nd;
244 unsigned int pixelrepeat; /* Video pixel repeat rate*/
245 unsigned int interface; /* Video input interface*/
248 /* HDMI Video Parameters */
250 unsigned int vic; /* Video information code*/
251 unsigned int color_input; /* Input video color mode*/
252 unsigned int color_output; /* Output video color mode*/
253 unsigned int color_output_depth;/* Output video Color Depth*/
254 unsigned int sink_hdmi; /* Output signal is DVI or HDMI*/
255 unsigned int format_3d; /* Output 3D mode*/
258 /* HDMI Audio Parameters */
260 u32 type; /*Audio type*/
261 u32 channel; /*Audio channel number*/
262 u32 rate; /*Audio sampling rate*/
263 u32 word_length; /*Audio data word length*/
266 #define HDMI_MAX_EDID_BLOCK 8
267 /* HDMI EDID Information */
269 unsigned char sink_hdmi; /*HDMI display device flag*/
270 unsigned char ycbcr444; /*Display device support YCbCr444*/
271 unsigned char ycbcr422; /*Display device support YCbCr422*/
272 unsigned char ycbcr420; /*Display device support YCbCr420*/
273 unsigned char deepcolor; /*bit3:DC_48bit; bit2:DC_36bit;
274 bit1:DC_30bit; bit0:DC_Y444;*/
275 unsigned char deepcolor_420;
276 unsigned int cecaddress; /*CEC physical address*/
277 unsigned int maxtmdsclock; /*Max supported tmds clock*/
278 unsigned char fields_present; /*bit7: latency
281 unsigned char video_latency;
282 unsigned char audio_latency;
283 unsigned char interlaced_video_latency;
284 unsigned char interlaced_audio_latency;
286 unsigned char hf_vsdb_version;
287 unsigned char scdc_present;
288 unsigned char rr_capable;
289 unsigned char lte_340mcsc_scramble;
290 unsigned char independent_view;
291 unsigned char dual_view;
292 unsigned char osd_disparity_3d;
294 struct fb_monspecs *specs; /*Device spec*/
295 struct list_head modelist; /*Device supported display mode list*/
296 unsigned char baseaudio_support;
297 struct hdmi_audio *audio; /*Device supported audio info*/
298 unsigned int audio_num; /*Device supported audio type number*/
300 unsigned int status; /*EDID read status, success or failed*/
301 char *raw[HDMI_MAX_EDID_BLOCK]; /*Raw EDID Data*/
307 int (*enable)(struct hdmi *);
308 int (*disable)(struct hdmi *);
309 int (*getstatus)(struct hdmi *);
310 int (*insert)(struct hdmi *);
311 int (*remove)(struct hdmi *);
312 int (*getedid)(struct hdmi *, int, unsigned char *);
313 int (*setvideo)(struct hdmi *, struct hdmi_video *);
314 int (*setaudio)(struct hdmi *, struct hdmi_audio *);
315 int (*setmute)(struct hdmi *, int);
316 int (*setvsi)(struct hdmi *, unsigned char, unsigned char);
317 int (*setcec)(struct hdmi *);
318 /* call back for hdcp operatoion */
319 void (*hdcp_cb)(struct hdmi *);
320 void (*hdcp_auth2nd)(struct hdmi *);
321 void (*hdcp_irq_cb)(int);
322 int (*hdcp_power_on_cb)(void);
323 void (*hdcp_power_off_cb)(struct hdmi *);
326 enum rk_hdmi_feature {
327 SUPPORT_480I_576I = (1 << 0),
328 SUPPORT_1080I = (1 << 1),
329 SUPPORT_DEEP_10BIT = (1 << 2),
330 SUPPORT_DEEP_12BIT = (1 << 3),
331 SUPPORT_DEEP_16BIT = (1 << 4),
332 SUPPORT_4K = (1 << 5),
333 SUPPORT_4K_4096 = (1 << 6),
334 SUPPORT_TMDS_600M = (1 << 7),
335 SUPPORT_YUV420 = (1 << 8),
336 SUPPORT_CEC = (1 << 9),
337 SUPPORT_HDCP = (1 << 10),
338 SUPPORT_HDCP2 = (1 << 11),
339 SUPPORT_YCBCR_INPUT = (1 << 12),
342 struct hdmi_property {
358 /* HDMI Information */
362 struct device *dev; /*HDMI device*/
363 struct rk_lcdc_driver *lcdc; /*HDMI linked lcdc*/
364 struct rk_display_device *ddev; /*Registered display device*/
366 struct switch_dev switchdev; /*Registered switch device*/
369 struct hdmi_property *property;
370 struct hdmi_ops *ops;
372 struct mutex lock; /* mutex for hdmi operation*/
373 struct workqueue_struct *workqueue;
375 bool uboot; /* if true, HDMI is initialized in uboot*/
377 int hotplug; /* hot plug status*/
378 int autoset; /* if true, auto set hdmi output mode according EDID.*/
379 int mute; /* HDMI display status:
381 1 means mute display;
383 int colordepth; /* Ouput color depth*/
384 int colormode; /* Ouput color mode*/
385 int colormode_input; /* Input color mode*/
386 struct hdmi_edid edid; /* EDID information*/
387 int enable; /* Enable flag*/
388 int sleep; /* Sleep flag*/
389 int vic; /* HDMI output video information code*/
390 int mode_3d; /* HDMI output video 3d mode*/
391 struct hdmi_audio audio; /* HDMI output audio information.*/
397 /* HDMI EDID Block Size */
398 #define HDMI_EDID_BLOCK_SIZE 128
401 #define SCDC_SINK_VER 0x01 /* sink version */
402 #define SCDC_SOURCE_VER 0x02 /* source version */
403 #define SCDC_UPDATE_0 0x10 /* Update_0 */
404 #define SCDC_UPDATE_1 0x11 /* Update_1 */
405 #define SCDC_UPDATE_RESERVED 0x12 /* 0x12-0x1f - Reserved */
406 #define SCDC_TMDS_CONFIG 0x20 /* TMDS_Config */
407 #define SCDC_SCRAMBLER_STAT 0x21 /* Scrambler_Status */
408 #define SCDC_CONFIG_0 0x30 /* Config_0 */
409 #define SCDC_CONFIG_RESERVED 0x31 /* 0x31-0x3f - Reserved */
410 #define SCDC_STATUS_FLAG_0 0x40 /* Status_Flag_0 */
411 #define SCDC_STATUS_FLAG_1 0x41 /* Status_Flag_1 */
412 #define SCDC_STATUS_RESERVED 0x42 /* 0x42-0x4f - Reserved */
413 #define SCDC_ERR_DET_0_L 0x50 /* Err_Det_0_L */
414 #define SCDC_ERR_DET_0_H 0x51 /* Err_Det_0_H */
415 #define SCDC_ERR_DET_1_L 0x52 /* Err_Det_1_L */
416 #define SCDC_ERR_DET_1_H 0x53 /* Err_Det_1_H */
417 #define SCDC_ERR_DET_2_L 0x54 /* Err_Det_2_L */
418 #define SCDC_ERR_DET_2_H 0x55 /* Err_Det_2_H */
419 #define SCDC_ERR_DET_CHKSUM 0x56 /* Err_Det_Checksum */
420 #define SCDC_TEST_CFG_0 0xc0 /* Test_config_0 */
421 #define SCDC_TEST_RESERVED 0xc1 /* 0xc1-0xcf */
422 #define SCDC_MAN_OUI_3RD 0xd0 /* Manufacturer IEEE OUI,
424 #define SCDC_MAN_OUI_2ND 0xd1 /* Manufacturer IEEE OUI,
426 #define SCDC_MAN_OUI_1ST 0xd2 /* Manufacturer IEEE OUI,
428 #define SCDC_DEVICE_ID 0xd3 /* 0xd3-0xdd - Device ID */
429 #define SCDC_MAN_SPECIFIC 0xde /* 0xde-0xff - ManufacturerSpecific */
432 #define HDMI_SRC_SHIFT 8
433 #define HDMI_SYSFS_SRC (0x1 << HDMI_SRC_SHIFT)
434 #define HDMI_SUSPEND_SRC (0x2 << HDMI_SRC_SHIFT)
435 #define HDMI_IRQ_SRC (0x4 << HDMI_SRC_SHIFT)
436 #define HDMI_WORKQUEUE_SRC (0x8 << HDMI_SRC_SHIFT)
439 #define HDMI_ENABLE_CTL (HDMI_SYSFS_SRC | 0)
440 #define HDMI_DISABLE_CTL (HDMI_SYSFS_SRC | 1)
441 #define HDMI_SUSPEND_CTL (HDMI_SUSPEND_SRC | 2)
442 #define HDMI_RESUME_CTL (HDMI_SUSPEND_SRC | 3)
443 #define HDMI_HPD_CHANGE (HDMI_IRQ_SRC | 4)
444 #define HDMI_SET_VIDEO (HDMI_SYSFS_SRC | 5)
445 #define HDMI_SET_AUDIO (HDMI_SYSFS_SRC | 6)
446 #define HDMI_SET_3D (HDMI_SYSFS_SRC | 7)
447 #define HDMI_MUTE_AUDIO (HDMI_SYSFS_SRC | 8)
448 #define HDMI_UNMUTE_AUDIO (HDMI_SYSFS_SRC | 9)
449 #define HDMI_SET_COLOR (HDMI_SYSFS_SRC | 10)
450 #define HDMI_ENABLE_HDCP (HDMI_SYSFS_SRC | 11)
451 #define HDMI_HDCP_AUTH_2ND (HDMI_IRQ_SRC | 12)
453 #define HDMI_DEFAULT_SCALE 95
454 #define HDMI_AUTO_CONFIG false
456 /* HDMI default vide mode */
457 #define HDMI_VIDEO_DEFAULT_MODE HDMI_1280X720P_60HZ
458 /*HDMI_1920X1080P_60HZ*/
459 #define HDMI_VIDEO_DEFAULT_COLORMODE HDMI_COLOR_AUTO
460 #define HDMI_VIDEO_DEFAULT_COLORDEPTH HDMI_DEPP_COLOR_AUTO
462 /* HDMI default audio parameter */
463 #define HDMI_AUDIO_DEFAULT_TYPE HDMI_AUDIO_LPCM
464 #define HDMI_AUDIO_DEFAULT_CHANNEL 2
465 #define HDMI_AUDIO_DEFAULT_RATE HDMI_AUDIO_FS_44100
466 #define HDMI_AUDIO_DEFAULT_WORDLENGTH HDMI_AUDIO_WORD_LENGTH_16bit
469 #define DBG(format, ...) \
470 pr_info(format, ## __VA_ARGS__)
472 #define DBG(format, ...)
475 struct hdmi *rockchip_hdmi_register(struct hdmi_property *property,
476 struct hdmi_ops *ops);
477 void rockchip_hdmi_unregister(struct hdmi *hdmi);
478 struct delayed_work *hdmi_submit_work(struct hdmi *hdmi,
479 int event, int delay, void *data);
481 struct rk_display_device *hdmi_register_display_sysfs(struct hdmi *hdmi,
482 struct device *parent);
483 void hdmi_unregister_display_sysfs(struct hdmi *hdmi);
485 int hdmi_edid_parse_base(unsigned char *buf,
486 int *extend_num, struct hdmi_edid *pedid);
487 int hdmi_edid_parse_extensions(unsigned char *buf,
488 struct hdmi_edid *pedid);
490 void hdmi_init_modelist(struct hdmi *hdmi);
491 int hdmi_set_lcdc(struct hdmi *hdmi);
492 int hdmi_ouputmode_select(struct hdmi *hdmi, int edid_ok);
493 int hdmi_add_vic(int vic, struct list_head *head);
494 int hdmi_find_best_mode(struct hdmi *hdmi, int vic);
495 int hdmi_videomode_to_vic(struct fb_videomode *vmode);
496 const struct fb_videomode *hdmi_vic_to_videomode(int vic);
497 const struct hdmi_video_timing *hdmi_vic2timing(int vic);
498 int hdmi_config_audio(struct hdmi_audio *audio);
499 int hdmi_get_hotplug(void);