drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2.h

   1 #ifndef __RK32_HDMI_H__
   2 #define __RK32_HDMI_H__
   3 #include <linux/gpio.h>
   4 #include <linux/regmap.h>
   5 #include <linux/reset.h>
   6 #ifdef CONFIG_HAS_EARLYSUSPEND
   7 #include <linux/earlysuspend.h>
   8 #endif
   9 #include "../rockchip-hdmi.h"
  10
  11 #ifdef DEBUG
  12 #define HDMIDBG(format, ...) \
  13                 pr_info(format, ## __VA_ARGS__)
  14 #else
  15 #define HDMIDBG(format, ...)
  16 #endif
  17
  18 struct hdmi_dev_phy_para {
  19         u32 maxfreq;
  20         int pre_emphasis;
  21         int slopeboost;
  22         int clk_level;
  23         int data0_level;
  24         int data1_level;
  25         int data2_level;
  26 };
  27
  28 struct hdmi_dev {
  29         void __iomem            *regbase;
  30         void __iomem            *phybase;
  31         struct regmap           *grf_base;
  32         int                     grf_reg_offset;
  33         int                     grf_reg_shift;
  34         struct reset_control    *reset;
  35         struct clk              *pd;
  36         struct clk              *pclk;
  37         struct clk              *hdcp_clk;
  38         struct clk              *cec_clk;
  39         struct clk              *pclk_phy;
  40         struct hdmi             *hdmi;
  41         struct device           *dev;
  42         struct dentry           *debugfs_dir;
  43         int                     irq;
  44
  45         struct work_struct      irq_work;
  46         struct delayed_work     delay_work;
  47         struct workqueue_struct *workqueue;
  48
  49 #ifdef CONFIG_HAS_EARLYSUSPEND
  50         struct early_suspend    early_suspend;
  51 #endif
  52         int                     soctype;
  53         int                     audiosrc;
  54         int                     enable;
  55         int                     hdcp2_enable;
  56         unsigned char           clk_disable;
  57         unsigned char           clk_on;
  58
  59         unsigned long           pixelclk;
  60         unsigned int            tmdsclk;
  61         unsigned int            pixelrepeat;
  62         unsigned char           colordepth;
  63
  64         bool                    tmdsclk_ratio_change;
  65         struct mutex            ddc_lock;       /*mutex for ddc operation */
  66
  67         void                    (*hdcp2_en)(int);
  68         void                    (*hdcp2_reset)(void);
  69         void                    (*hdcp2_start)(void);
  70
  71         struct hdmi_dev_phy_para *phy_table;
  72         int                     phy_table_size;
  73         const char              *vendor_name;
  74         const char              *product_name;
  75         unsigned char           deviceinfo;
  76 };
  77
  78 void ext_pll_set_27m_out(void);
  79
  80 #endif /*__RK32_HDMI_H__*/