drivers/video/rockchip/lcdc/rk3036_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk3036_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:zhengyang<zhengyang@rock-chips.com>
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/errno.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/slab.h>
  23 #include <linux/device.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/clk.h>
  29 #include <asm/div64.h>
  30 #include <asm/uaccess.h>
  31 #include <linux/rockchip/cpu.h>
  32 #include <linux/rockchip/iomap.h>
  33 #include <linux/rockchip/grf.h>
  34 #include <linux/rockchip/common.h>
  35 #include <dt-bindings/clock/rk_system_status.h>
  36 #if defined(CONFIG_ION_ROCKCHIP)
  37 #include <linux/rockchip/iovmm.h>
  38 #include <linux/rockchip/sysmmu.h>
  39 #endif
  40 #include "rk3036_lcdc.h"
  41
  42 static int dbg_thresd;
  43 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  44
  45 #define DBG(level, x...) do {                   \
  46         if (unlikely(dbg_thresd >= level))      \
  47                 printk(KERN_INFO x); } while (0)
  48
  49 static struct rk_lcdc_win lcdc_win[] = {
  50         [0] = {
  51                .name = "win0",
  52                .id = 0,
  53                .support_3d = false,
  54                },
  55         [1] = {
  56                .name = "win1",
  57                .id = 1,
  58                .support_3d = false,
  59                },
  60         [2] = {
  61                .name = "hwc",
  62                .id = 2,
  63                .support_3d = false,
  64                },
  65 };
  66
  67 static irqreturn_t rk3036_lcdc_isr(int irq, void *dev_id)
  68 {
  69         struct lcdc_device *lcdc_dev =
  70             (struct lcdc_device *)dev_id;
  71         ktime_t timestamp = ktime_get();
  72         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  73
  74         if (int_reg & m_FS_INT_STA) {
  75                 timestamp = ktime_get();
  76                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  77                              v_FS_INT_CLEAR(1));
  78                 //if (lcdc_dev->driver.wait_fs) {
  79                 if (0) {
  80                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  81                         complete(&(lcdc_dev->driver.frame_done));
  82                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  83                 }
  84                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  85                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  86
  87         } else if (int_reg & m_LF_INT_STA) {
  88                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  89                              v_LF_INT_CLEAR(1));
  90         }
  91         return IRQ_HANDLED;
  92 }
  93
  94 static int rk3036_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
  95 {
  96 #ifdef CONFIG_RK_FPGA
  97         lcdc_dev->clk_on = 1;
  98         return 0;
  99 #endif
 100         if (!lcdc_dev->clk_on) {
 101                 clk_prepare_enable(lcdc_dev->hclk);
 102                 clk_prepare_enable(lcdc_dev->dclk);
 103                 clk_prepare_enable(lcdc_dev->aclk);
 104 //              clk_prepare_enable(lcdc_dev->pd);
 105                 spin_lock(&lcdc_dev->reg_lock);
 106                 lcdc_dev->clk_on = 1;
 107                 spin_unlock(&lcdc_dev->reg_lock);
 108         }
 109
 110         return 0;
 111 }
 112
 113 static int rk3036_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 114 {
 115 #ifdef CONFIG_RK_FPGA
 116         lcdc_dev->clk_on = 0;
 117         return 0;
 118 #endif
 119         if (lcdc_dev->clk_on) {
 120                 spin_lock(&lcdc_dev->reg_lock);
 121                 lcdc_dev->clk_on = 0;
 122                 spin_unlock(&lcdc_dev->reg_lock);
 123                 mdelay(25);
 124                 clk_disable_unprepare(lcdc_dev->dclk);
 125                 clk_disable_unprepare(lcdc_dev->hclk);
 126                 clk_disable_unprepare(lcdc_dev->aclk);
 127 //              clk_disable_unprepare(lcdc_dev->pd);
 128         }
 129
 130         return 0;
 131 }
 132
 133 static int rk3036_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 134 {
 135         u32 mask, val;
 136         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 137                                         struct lcdc_device, driver);
 138         mask = m_FS_INT_CLEAR |m_FS_INT_EN;
 139         val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1);
 140         lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 141         return 0;
 142 }
 143
 144 static int rk3036_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 145 {
 146         u32 mask, val;
 147         spin_lock(&lcdc_dev->reg_lock);
 148         if (likely(lcdc_dev->clk_on)) {
 149                 mask = m_FS_INT_CLEAR |m_FS_INT_EN;
 150                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0);
 151                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 152                 spin_unlock(&lcdc_dev->reg_lock);
 153         } else {
 154                 spin_unlock(&lcdc_dev->reg_lock);
 155         }
 156         mdelay(1);
 157         return 0;
 158 }
 159
 160 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device
 161                                              *lcdc_dev)
 162 {
 163         int reg = 0;
 164         u32 value = 0;
 165
 166         spin_lock(&lcdc_dev->reg_lock);
 167         for (reg = 0; reg < 0xdc; reg += 4) {
 168                 value = lcdc_readl(lcdc_dev, reg);
 169         }
 170         spin_unlock(&lcdc_dev->reg_lock);
 171 }
 172
 173 static int rk3036_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 174 {
 175         return 0;
 176 }
 177
 178 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev, struct rk_lcdc_win *win) {
 179
 180         u32 mask, val;
 181
 182         if(win->state == 1){
 183                 if(win->id == 0) {
 184                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 185                         val = v_WIN0_EN(win->state) | v_WIN0_FORMAT(win->fmt_cfg) | v_WIN0_RB_SWAP(win->swap_rb);
 186                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 187
 188                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 189                             v_X_SCL_FACTOR(win->scale_yrgb_x) |
 190                             v_Y_SCL_FACTOR(win->scale_yrgb_y));
 191                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 192                             v_X_SCL_FACTOR(win->scale_cbcr_x) |
 193                             v_Y_SCL_FACTOR(win->scale_cbcr_y));
 194                         lcdc_msk_reg(lcdc_dev, WIN0_VIR, m_YRGB_VIR | m_CBBR_VIR,
 195                              v_YRGB_VIR(win->area[0].y_vir_stride) | v_CBBR_VIR(win->area[0].uv_vir_stride));
 196                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO, v_ACT_WIDTH(win->area[0].xact) |
 197                                 v_ACT_HEIGHT(win->area[0].yact));
 198                         lcdc_writel(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(win->area[0].dsp_stx) |
 199                                 v_DSP_STY(win->area[0].dsp_sty));
 200                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(win->area[0].xsize) |
 201                             v_DSP_HEIGHT(win->area[0].ysize));
 202
 203                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST, win->area[0].y_addr);
 204                         lcdc_writel(lcdc_dev, WIN0_CBR_MST, win->area[0].uv_addr);
 205                 }
 206                 else if(win->id == 1) {
 207                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 208                         val = v_WIN1_EN(win->state) | v_WIN1_FORMAT(win->fmt_cfg) | v_WIN1_RB_SWAP(win->swap_rb);
 209                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 210
 211                         lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 212                             v_X_SCL_FACTOR(win->scale_yrgb_x) |
 213                             v_Y_SCL_FACTOR(win->scale_yrgb_y));
 214
 215                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR, v_YRGB_VIR(win->area[0].y_vir_stride));
 216                         lcdc_writel(lcdc_dev, WIN1_ACT_INFO, v_ACT_WIDTH(win->area[0].xact) |
 217                                 v_ACT_HEIGHT(win->area[0].yact));
 218                         lcdc_writel(lcdc_dev, WIN1_DSP_INFO, v_DSP_WIDTH(win->area[0].xsize) |
 219                             v_DSP_HEIGHT(win->area[0].ysize));
 220                         lcdc_writel(lcdc_dev, WIN1_DSP_ST, v_DSP_STX(win->area[0].dsp_stx) |
 221                             v_DSP_STY(win->area[0].dsp_sty));
 222
 223                         lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 224
 225                 }
 226                 else if(win->id == 2) {
 227                 }
 228         }else{
 229                 win->area[0].y_addr = 0;
 230                 win->area[0].uv_addr = 0;
 231                 if(win->id == 0) {
 232                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN0_EN, v_WIN0_EN(0));
 233                 }
 234                 else if(win->id == 1)
 235                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN1_EN, v_WIN1_EN(0));
 236                 else if(win->id == 2)
 237                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 238         }
 239 }
 240
 241 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev, unsigned int win_id, bool open)
 242 {
 243         spin_lock(&lcdc_dev->reg_lock);
 244         if (likely(lcdc_dev->clk_on) && lcdc_dev->driver.win[win_id]->state != open) {
 245                 if (open) {
 246                         if (!lcdc_dev->atv_layer_cnt) {
 247                                 dev_info(lcdc_dev->dev, "wakeup from standby!\n");
 248                                 lcdc_dev->standby = 0;
 249                         }
 250                         lcdc_dev->atv_layer_cnt++;
 251                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 252                         lcdc_dev->atv_layer_cnt--;
 253                 }
 254                 lcdc_dev->driver.win[win_id]->state = open;
 255                 if(!open) {
 256                         lcdc_layer_update_regs(lcdc_dev, lcdc_dev->driver.win[win_id]);
 257                         lcdc_cfg_done(lcdc_dev);
 258                 }
 259                 /*if no layer used,disable lcdc*/
 260                 if (!lcdc_dev->atv_layer_cnt) {
 261                         dev_info(lcdc_dev->dev, "no layer is used,go to standby!\n");
 262                         lcdc_dev->standby = 1;
 263                 }
 264         }
 265         spin_unlock(&lcdc_dev->reg_lock);
 266 }
 267
 268 static int rk3036_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 269 {
 270         struct lcdc_device *lcdc_dev =
 271             container_of(dev_drv, struct lcdc_device, driver);
 272         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 273         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 274         int timeout;
 275         unsigned long flags;
 276         spin_lock(&lcdc_dev->reg_lock);
 277         if (likely(lcdc_dev->clk_on)) {
 278                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 279                              v_LCDC_STANDBY(lcdc_dev->standby));
 280                 lcdc_layer_update_regs(lcdc_dev, win0);
 281                 lcdc_layer_update_regs(lcdc_dev, win1);
 282                 rk3036_lcdc_alpha_cfg(lcdc_dev);
 283                 lcdc_cfg_done(lcdc_dev);
 284
 285         }
 286         spin_unlock(&lcdc_dev->reg_lock);
 287         //if (dev_drv->wait_fs) {
 288         if (0) {
 289                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 290                 init_completion(&dev_drv->frame_done);
 291                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 292                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 293                                                       msecs_to_jiffies
 294                                                       (dev_drv->cur_screen->ft +
 295                                                        5));
 296                 if (!timeout && (!dev_drv->frame_done.done)) {
 297                         dev_warn(lcdc_dev->dev, "wait for new frame start time out!\n");
 298                         return -ETIMEDOUT;
 299                 }
 300         }
 301         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 302         return 0;
 303
 304 }
 305
 306 static void rk3036_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 307 {
 308         memcpy((u8 *) lcdc_dev->regs, (u8 *) lcdc_dev->regsbak, 0xdc);
 309 }
 310
 311 static void rk3036_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 312 {
 313         u32 mask,val;
 314         struct lcdc_device *lcdc_dev =
 315             container_of(dev_drv, struct lcdc_device, driver);
 316         spin_lock(&lcdc_dev->reg_lock);
 317         if (likely(lcdc_dev->clk_on)) {
 318                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN | m_AXI_OUTSTANDING_MAX_NUM;;
 319                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) | v_AXI_MAX_OUTSTANDING_EN(1);
 320                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 321         }
 322         spin_unlock(&lcdc_dev->reg_lock);
 323 }
 324
 325 static int rk3036_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 326 {
 327 #ifdef CONFIG_RK_FPGA
 328         return 0;
 329 #endif
 330         int ret,fps;
 331         struct lcdc_device *lcdc_dev =
 332             container_of(dev_drv, struct lcdc_device, driver);
 333         struct rk_screen *screen = dev_drv->cur_screen;
 334
 335         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 336         if (ret)
 337                 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
 338         lcdc_dev->pixclock =
 339                  div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 340         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 341
 342         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 343         screen->ft = 1000 / fps;
 344         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 345                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 346         return 0;
 347
 348 }
 349
 350 /********do basic init*********/
 351 static int rk3036_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 352 {
 353         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 354                                 struct lcdc_device, driver);
 355         if (lcdc_dev->pre_init)
 356                 return 0;
 357
 358         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 359         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 360         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 361 //      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
 362
 363         if (/*IS_ERR(lcdc_dev->pd) ||*/ (IS_ERR(lcdc_dev->aclk)) ||
 364             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 365                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 366                         lcdc_dev->id);
 367         }
 368
 369         rk_disp_pwr_enable(dev_drv);
 370         rk3036_lcdc_clk_enable(lcdc_dev);
 371
 372         /*backup reg config at uboot*/
 373         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 374         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN,v_AUTO_GATING_EN(0));
 375         lcdc_cfg_done(lcdc_dev);
 376         if (dev_drv->iommu_enabled) /*disable win0 to workaround iommu pagefault*/
 377                 lcdc_layer_enable(lcdc_dev, 0, 0);
 378         lcdc_dev->pre_init = true;
 379
 380         return 0;
 381 }
 382
 383 static int rk3036_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 384 {
 385         int ret = -EINVAL;
 386         int fps;
 387         u16 face = 0;
 388         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 389                                                 struct lcdc_device, driver);
 390         struct rk_screen *screen = dev_drv->cur_screen;
 391         u16 right_margin = screen->mode.right_margin;
 392         u16 left_margin = screen->mode.left_margin;
 393         u16 lower_margin = screen->mode.lower_margin;
 394         u16 upper_margin = screen->mode.upper_margin;
 395         u16 x_res = screen->mode.xres;
 396         u16 y_res = screen->mode.yres;
 397         u32 mask, val;
 398
 399         spin_lock(&lcdc_dev->reg_lock);
 400         if (likely(lcdc_dev->clk_on)) {
 401                 switch (screen->type) {
 402                 case SCREEN_HDMI:
 403                         mask = m_HDMI_DCLK_EN;
 404                         val = v_HDMI_DCLK_EN(1);
 405                         if(screen->pixelrepeat) {
 406                                 mask |= m_CORE_CLK_DIV_EN;
 407                                 val |= v_CORE_CLK_DIV_EN(1);
 408                         } else {
 409                                 mask |= m_CORE_CLK_DIV_EN;
 410                                 val |= v_CORE_CLK_DIV_EN(0);
 411                         }
 412                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 413                         break;
 414                 case SCREEN_TVOUT:
 415                         mask = m_TVE_DAC_DCLK_EN;
 416                         val = v_TVE_DAC_DCLK_EN(1);
 417                         if(screen->pixelrepeat) {
 418                                 mask |= m_CORE_CLK_DIV_EN;
 419                                 val |= v_CORE_CLK_DIV_EN(1);
 420                         } else {
 421                                 mask |= m_CORE_CLK_DIV_EN;
 422                                 val |= v_CORE_CLK_DIV_EN(0);
 423                         }
 424                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 425                         if(x_res == 720 && y_res == 576)
 426                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE, v_TVE_MODE(TV_PAL));
 427                         else if(x_res == 720 && y_res == 480)
 428                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE, v_TVE_MODE(TV_NTSC));
 429                         else {
 430                                 dev_err(lcdc_dev->dev, "unsupported video timing!\n");
 431                                 return -1;
 432                         }
 433                         break;
 434                 default:
 435                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 436                         break;
 437                 }
 438
 439                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 440                     m_DEN_POL | m_DCLK_POL;
 441                 val = v_DSP_OUT_FORMAT(face) | v_HSYNC_POL(screen->pin_hsync) |
 442                     v_VSYNC_POL(screen->pin_vsync) | v_DEN_POL(screen->pin_den) |
 443                     v_DCLK_POL(screen->pin_dclk);
 444                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 445
 446                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 447                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 448                     m_DSP_DUMMY_SWAP | m_BLANK_EN;
 449
 450                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 451                     v_DSP_RB_SWAP(screen->swap_rb) | v_DSP_RG_SWAP(screen->
 452                                                                    swap_rg) |
 453                     v_DSP_DELTA_SWAP(screen->
 454                                      swap_delta) | v_DSP_DUMMY_SWAP(screen->
 455                                                                     swap_dumy) |
 456                     v_BLANK_EN(0) | v_BLACK_EN(0);
 457                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 458                 val =
 459                     v_HSYNC(screen->mode.hsync_len) | v_HORPRD(screen->mode.
 460                                                                hsync_len +
 461                                                                left_margin +
 462                                                                x_res +
 463                                                                right_margin);
 464                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 465                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 466                     v_HASP(screen->mode.hsync_len + left_margin);
 467                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 468
 469                 if(screen->mode.vmode == FB_VMODE_INTERLACED) {
 470                         //First Field Timing
 471                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->mode.vsync_len) |
 472                                     v_VERPRD(2 * (screen->mode.vsync_len + upper_margin + lower_margin) + y_res + 1));
 473                         lcdc_writel(lcdc_dev,DSP_VACT_ST_END,v_VAEP(screen->mode.vsync_len + upper_margin + y_res/2)|
 474                                     v_VASP(screen->mode.vsync_len + upper_margin));
 475                         //Second Field Timing
 476                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1, v_VSYNC_ST_F1(screen->mode.vsync_len + upper_margin + y_res/2 + lower_margin) |
 477                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len + upper_margin + y_res/2 + lower_margin));
 478                         lcdc_writel(lcdc_dev,DSP_VACT_ST_END_F1,v_VAEP(2 * (screen->mode.vsync_len + upper_margin) + y_res + lower_margin + 1)|
 479                                     v_VASP(2 * (screen->mode.vsync_len + upper_margin) + y_res/2 + lower_margin + 1));
 480
 481                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_INTERLACE_DSP_EN | m_WIN1_DIFF_DCLK_EN | m_WIN0_YRGB_DEFLICK_EN | m_WIN0_CBR_DEFLICK_EN,
 482                                 v_INTERLACE_DSP_EN(1) | v_WIN1_DIFF_DCLK_EN(1) | v_WIN0_YRGB_DEFLICK_EN(1) | v_WIN0_CBR_DEFLICK_EN(1) );
 483                 } else {
 484                         val = v_VSYNC(screen->mode.vsync_len) |
 485                               v_VERPRD(screen->mode.vsync_len + upper_margin +
 486                                         y_res + lower_margin);
 487                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 488
 489                         val = v_VAEP(screen->mode.vsync_len + upper_margin + y_res) |
 490                             v_VASP(screen->mode.vsync_len + screen->mode.upper_margin);
 491                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 492
 493                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_INTERLACE_DSP_EN | m_WIN1_DIFF_DCLK_EN | m_WIN0_YRGB_DEFLICK_EN | m_WIN0_CBR_DEFLICK_EN,
 494                                 v_INTERLACE_DSP_EN(0) | v_WIN1_DIFF_DCLK_EN(0) | v_WIN0_YRGB_DEFLICK_EN(0) | v_WIN0_CBR_DEFLICK_EN(0) );
 495                 }
 496
 497         }
 498         spin_unlock(&lcdc_dev->reg_lock);
 499
 500         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 501         if (ret)
 502                 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
 503         lcdc_dev->pixclock =
 504             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 505         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 506
 507         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 508         screen->ft = 1000 / fps;
 509         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 510                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 511         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 512                 dev_drv->trsm_ops->enable();
 513         if (screen->init)
 514                 screen->init();
 515
 516         return 0;
 517 }
 518
 519 static int rk3036_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
 520                             bool open)
 521 {
 522         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 523                                         struct lcdc_device, driver);
 524
 525         /*enable clk,when first layer open */
 526         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
 527                 rk3036_lcdc_pre_init(dev_drv);
 528                 rk3036_lcdc_clk_enable(lcdc_dev);
 529                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 530                 if(dev_drv->iommu_enabled) {
 531                         if(!dev_drv->mmu_dev) {
 532                                 dev_drv->mmu_dev = rockchip_get_sysmmu_device_by_compatible(dev_drv->mmu_dts_name);
 533                                 if (dev_drv->mmu_dev)
 534                                         platform_set_sysmmu(dev_drv->mmu_dev, dev_drv->dev);
 535                                 else {
 536                                         dev_err(dev_drv->dev, "failed to get rockchip iommu device\n");
 537                                         return -1;
 538                                 }
 539                         }
 540                         iovmm_activate(dev_drv->dev);
 541                 }
 542                 #endif
 543                 rk3036_lcdc_reg_restore(lcdc_dev);
 544                 if (dev_drv->iommu_enabled)
 545                         rk3036_lcdc_mmu_en(dev_drv);
 546                 if ((support_uboot_display()&&(lcdc_dev->prop == PRMRY))) {
 547                         rk3036_lcdc_set_dclk(dev_drv);
 548                         rk3036_lcdc_enable_irq(dev_drv);
 549                 } else {
 550                         rk3036_load_screen(dev_drv, 1);
 551                 }
 552         }
 553
 554         if(win_id < ARRAY_SIZE(lcdc_win)) {
 555                 lcdc_layer_enable(lcdc_dev, win_id, open);
 556         }
 557         else
 558                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
 559
 560         /*when all layer closed,disable clk */
 561         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
 562                 rk3036_lcdc_disable_irq(lcdc_dev);
 563                 rk3036_lcdc_reg_update(dev_drv);
 564                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 565                 if (dev_drv->iommu_enabled) {
 566 //                      for (reg = MMU_DTE_ADDR; reg <= MMU_AUTO_GATING; reg +=4)
 567 //                      lcdc_readl(lcdc_dev, reg);
 568                         if(dev_drv->mmu_dev)
 569                                 iovmm_deactivate(dev_drv->dev);
 570                 }
 571                 #endif
 572                 rk3036_lcdc_clk_disable(lcdc_dev);
 573         }
 574
 575         return 0;
 576 }
 577
 578 static int rk3036_lcdc_set_par(struct rk_lcdc_driver *dev_drv,int win_id)
 579 {
 580         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 581                                                 struct lcdc_device, driver);
 582         struct rk_screen *screen = dev_drv->cur_screen;
 583         struct rk_lcdc_win *win = NULL;
 584         char fmt[9] = "NULL";
 585
 586         if (!screen) {
 587                 dev_err(dev_drv->dev, "screen is null!\n");
 588                 return -ENOENT;
 589         }
 590
 591         if (win_id == 0) {
 592                 win = dev_drv->win[0];
 593         } else if (win_id == 1) {
 594                 win = dev_drv->win[1];
 595         } else {
 596                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
 597                 return -EINVAL;
 598         }
 599
 600         spin_lock(&lcdc_dev->reg_lock);
 601         win->area[0].dsp_stx = win->area[0].xpos + screen->mode.left_margin + screen->mode.hsync_len;
 602         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 603                 win->area[0].ysize /= 2;
 604                 win->area[0].dsp_sty = win->area[0].ypos/2+screen->mode.upper_margin + screen->mode.vsync_len;
 605         } else {
 606                 win->area[0].dsp_sty = win->area[0].ypos + screen->mode.upper_margin + screen->mode.vsync_len;
 607         }
 608         win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
 609         win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
 610         switch (win->format) {
 611                 case ARGB888:
 612                         win->fmt_cfg = VOP_FORMAT_ARGB888;
 613                         win->swap_rb = 0;
 614                         break;
 615                 case XBGR888:
 616                         win->fmt_cfg = VOP_FORMAT_ARGB888;
 617                         win->swap_rb = 1;
 618                         break;
 619                 case ABGR888:
 620                         win->fmt_cfg = VOP_FORMAT_ARGB888;
 621                         win->swap_rb = 1;
 622                         break;
 623                 case RGB888:
 624                         win->fmt_cfg = VOP_FORMAT_RGB888;
 625                         win->swap_rb = 0;
 626                         break;
 627                 case RGB565:
 628                         win->fmt_cfg = VOP_FORMAT_RGB565;
 629                         win->swap_rb = 0;
 630                         break;
 631                 case YUV444:
 632                         if(win_id == 0) {
 633                                 win->fmt_cfg = VOP_FORMAT_YCBCR444;
 634                                 win->scale_cbcr_x = CalScale(win->area[0].xact, win->area[0].xsize);
 635                                 win->scale_cbcr_y = CalScale(win->area[0].yact, win->area[0].ysize);
 636                                 win->swap_rb = 0;
 637                         } else {
 638                                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 639                                 __func__);
 640                         }
 641                         break;
 642                 case YUV422:
 643                         if(win_id == 0) {
 644                                 win->fmt_cfg = VOP_FORMAT_YCBCR422;
 645                                 win->scale_cbcr_x = CalScale((win->area[0].xact / 2), win->area[0].xsize);
 646                                 win->scale_cbcr_y = CalScale(win->area[0].yact, win->area[0].ysize);
 647                                 win->swap_rb = 0;
 648                         } else {
 649                                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 650                                 __func__);
 651                         }
 652                         break;
 653                 case YUV420:
 654                         if(win_id == 0) {
 655                                 win->fmt_cfg = VOP_FORMAT_YCBCR420;
 656                                 win->scale_cbcr_x = CalScale(win->area[0].xact / 2, win->area[0].xsize);
 657                                 win->scale_cbcr_y = CalScale(win->area[0].yact / 2, win->area[0].ysize);
 658                                 win->swap_rb = 0;
 659                         }
 660                         else {
 661                                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 662                                 __func__);
 663                         }
 664                         break;
 665                 default:
 666                         dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 667                                 __func__);
 668                         break;
 669         }
 670         spin_unlock(&lcdc_dev->reg_lock);
 671
 672         DBG(1, "lcdc%d>>%s\n>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
 673                 ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id,
 674                 __func__, get_format_string(win->format, fmt), win->area[0].xact,
 675                 win->area[0].yact, win->area[0].xsize, win->area[0].ysize, win->area[0].xvir,
 676                 win->area[0].yvir, win->area[0].xpos, win->area[0].ypos);
 677         return 0;
 678 }
 679
 680 static int rk3036_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
 681 {
 682         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 683                                                 struct lcdc_device, driver);
 684         struct rk_lcdc_win *win = NULL;
 685         struct rk_screen *screen = dev_drv->cur_screen;
 686
 687         if (!screen) {
 688                 dev_err(dev_drv->dev,"screen is null!\n");
 689                 return -ENOENT;
 690         }
 691
 692         if (win_id == 0) {
 693                 win = dev_drv->win[0];
 694         } else if(win_id==1) {
 695                 win = dev_drv->win[1];
 696         } else {
 697                 dev_err(dev_drv->dev,"invalid win number:%d!\n", win_id);
 698                 return -EINVAL;
 699         }
 700
 701
 702         spin_lock(&lcdc_dev->reg_lock);
 703         if (likely(lcdc_dev->clk_on)) {
 704                 win->area[0].y_addr = win->area[0].smem_start+win->area[0].y_offset;
 705                 win->area[0].uv_addr = win->area[0].cbr_start + win->area[0].c_offset;
 706                 if(win->area[0].y_addr)
 707                         lcdc_layer_update_regs(lcdc_dev, win);
 708                 /*lcdc_cfg_done(lcdc_dev);*/
 709         }
 710         spin_unlock(&lcdc_dev->reg_lock);
 711
 712         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
 713             lcdc_dev->id, __func__, win->area[0].y_addr, win->area[0].uv_addr,win->area[0].y_offset);
 714          /*this is the first frame of the system ,enable frame start interrupt*/
 715         if ((dev_drv->first_frame))  {
 716                 dev_drv->first_frame = 0;
 717                 rk3036_lcdc_enable_irq(dev_drv);
 718
 719         }
 720
 721         return 0;
 722 }
 723
 724 static int rk3036_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
 725                              unsigned long arg, int win_id)
 726 {
 727         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 728                                         struct lcdc_device, driver);
 729         u32 panel_size[2];
 730         void __user *argp = (void __user *)arg;
 731         struct color_key_cfg clr_key_cfg;
 732
 733         switch (cmd) {
 734         case RK_FBIOGET_PANEL_SIZE:
 735                 panel_size[0] = lcdc_dev->screen->mode.xres;
 736                 panel_size[1] = lcdc_dev->screen->mode.yres;
 737                 if (copy_to_user(argp, panel_size, 8))
 738                         return -EFAULT;
 739                 break;
 740         case RK_FBIOPUT_COLOR_KEY_CFG:
 741                 if (copy_from_user(&clr_key_cfg, argp,
 742                                    sizeof(struct color_key_cfg)))
 743                         return -EFAULT;
 744                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
 745                             clr_key_cfg.win0_color_key_cfg);
 746                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
 747                             clr_key_cfg.win1_color_key_cfg);
 748                 break;
 749
 750         default:
 751                 break;
 752         }
 753         return 0;
 754 }
 755
 756 static int rk3036_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
 757                                   const char *id)
 758 {
 759         int win_id = 0;
 760         mutex_lock(&dev_drv->fb_win_id_mutex);
 761         if (!strcmp(id, "fb0"))
 762                 win_id = dev_drv->fb0_win_id;
 763         else if (!strcmp(id, "fb1"))
 764                 win_id = dev_drv->fb1_win_id;
 765         else if (!strcmp(id, "fb2"))
 766                 win_id = dev_drv->fb2_win_id;
 767         mutex_unlock(&dev_drv->fb_win_id_mutex);
 768
 769         return win_id;
 770 }
 771
 772 static int rk3036_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
 773 {
 774         return 0;
 775 }
 776
 777 static int rk3036_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
 778                                bool set)
 779 {
 780         struct lcdc_device *lcdc_dev =
 781             container_of(dev_drv, struct lcdc_device, driver);
 782         int ovl;
 783         spin_lock(&lcdc_dev->reg_lock);
 784         if (lcdc_dev->clk_on) {
 785                 if (set) {
 786                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
 787                                      v_WIN0_TOP(swap));
 788                         ovl = swap;
 789                 } else {
 790                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
 791                 }
 792         } else {
 793                 ovl = -EPERM;
 794         }
 795         spin_unlock(&lcdc_dev->reg_lock);
 796
 797         return ovl;
 798 }
 799
 800 static int rk3036_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
 801 {
 802
 803         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 804                                         struct lcdc_device, driver);
 805         if (dev_drv->suspend_flag)
 806                 return 0;
 807         dev_drv->suspend_flag = 1;
 808         flush_kthread_worker(&dev_drv->update_regs_worker);
 809
 810         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
 811                 dev_drv->trsm_ops->disable();
 812         spin_lock(&lcdc_dev->reg_lock);
 813         if (likely(lcdc_dev->clk_on)) {
 814                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
 815                              v_BLANK_EN(1));
 816                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
 817                              v_FS_INT_CLEAR(1));
 818                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
 819                              v_DSP_OUT_ZERO(1));
 820                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 821                              v_LCDC_STANDBY(1));
 822                 lcdc_cfg_done(lcdc_dev);
 823                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 824                 if (dev_drv->iommu_enabled) {
 825 //                      for (reg = MMU_DTE_ADDR; reg <= MMU_AUTO_GATING; reg +=4)
 826 //                      lcdc_readl(lcdc_dev, reg);
 827                         if(dev_drv->mmu_dev)
 828                                 iovmm_deactivate(dev_drv->dev);
 829                 }
 830                 #endif
 831                 spin_unlock(&lcdc_dev->reg_lock);
 832         } else {
 833                 spin_unlock(&lcdc_dev->reg_lock);
 834                 return 0;
 835         }
 836         rk3036_lcdc_clk_disable(lcdc_dev);
 837         rk_disp_pwr_disable(dev_drv);
 838         return 0;
 839 }
 840
 841 static int rk3036_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
 842 {
 843         struct lcdc_device *lcdc_dev =
 844             container_of(dev_drv, struct lcdc_device, driver);
 845
 846         if (!dev_drv->suspend_flag)
 847                 return 0;
 848         rk_disp_pwr_enable(dev_drv);
 849         dev_drv->suspend_flag = 0;
 850
 851         if (lcdc_dev->atv_layer_cnt) {
 852                 rk3036_lcdc_clk_enable(lcdc_dev);
 853                 rk3036_lcdc_reg_restore(lcdc_dev);
 854
 855                 spin_lock(&lcdc_dev->reg_lock);
 856
 857                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
 858                              v_DSP_OUT_ZERO(0));
 859                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 860                              v_LCDC_STANDBY(0));
 861                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
 862                              v_BLANK_EN(0));
 863                 lcdc_cfg_done(lcdc_dev);
 864
 865                 spin_unlock(&lcdc_dev->reg_lock);
 866         }
 867
 868         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 869                 dev_drv->trsm_ops->enable();
 870         return 0;
 871 }
 872
 873
 874 static int rk3036_lcdc_blank(struct rk_lcdc_driver *dev_drv,
 875                              int win_id, int blank_mode)
 876 {
 877         switch (blank_mode) {
 878         case FB_BLANK_UNBLANK:
 879                 rk3036_lcdc_early_resume(dev_drv);
 880                 break;
 881         case FB_BLANK_NORMAL:
 882                 rk3036_lcdc_early_suspend(dev_drv);
 883                 break;
 884         default:
 885                 rk3036_lcdc_early_suspend(dev_drv);
 886                 break;
 887         }
 888
 889         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
 890
 891         return 0;
 892 }
 893
 894 static int rk3036_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
 895 {
 896         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 897                                         struct lcdc_device, driver);
 898         spin_lock(&lcdc_dev->reg_lock);
 899         if (lcdc_dev->clk_on) {
 900                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 901                              v_LCDC_STANDBY(lcdc_dev->standby));
 902                 lcdc_cfg_done(lcdc_dev);
 903         }
 904         spin_unlock(&lcdc_dev->reg_lock);
 905         return 0;
 906 }
 907
 908 /*
 909         a:[-30~0]:
 910             sin_hue = sin(a)*256 +0x100;
 911             cos_hue = cos(a)*256;
 912         a:[0~30]
 913             sin_hue = sin(a)*256;
 914             cos_hue = cos(a)*256;
 915 */
 916 static int rk3036_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,bcsh_hue_mode mode)
 917 {
 918
 919         struct lcdc_device *lcdc_dev =
 920             container_of(dev_drv, struct lcdc_device, driver);
 921         u32 val;
 922
 923         spin_lock(&lcdc_dev->reg_lock);
 924         if (lcdc_dev->clk_on) {
 925                 val = lcdc_readl(lcdc_dev, BCSH_H);
 926                 switch(mode){
 927                 case H_SIN:
 928                         val &= m_BCSH_SIN_HUE;
 929                         break;
 930                 case H_COS:
 931                         val &= m_BCSH_COS_HUE;
 932                         val >>= 16;
 933                         break;
 934                 default:
 935                         break;
 936                 }
 937         }
 938         spin_unlock(&lcdc_dev->reg_lock);
 939
 940         return val;
 941 }
 942
 943
 944 static int rk3036_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv,int sin_hue, int cos_hue)
 945 {
 946
 947         struct lcdc_device *lcdc_dev =
 948             container_of(dev_drv, struct lcdc_device, driver);
 949         u32 mask, val;
 950
 951         spin_lock(&lcdc_dev->reg_lock);
 952         if (lcdc_dev->clk_on) {
 953                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
 954                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
 955                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
 956                 lcdc_cfg_done(lcdc_dev);
 957         }
 958         spin_unlock(&lcdc_dev->reg_lock);
 959
 960         return 0;
 961 }
 962
 963 static int rk3036_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode,int value)
 964 {
 965         struct lcdc_device *lcdc_dev =
 966             container_of(dev_drv, struct lcdc_device, driver);
 967         u32 mask, val;
 968
 969         spin_lock(&lcdc_dev->reg_lock);
 970         if(lcdc_dev->clk_on) {
 971                 switch (mode) {
 972                 case BRIGHTNESS:
 973                 /*from 0 to 255,typical is 128*/
 974                         if (value < 0x80)
 975                                 value += 0x80;
 976                         else if (value >= 0x80)
 977                                 value = value - 0x80;
 978                         mask =  m_BCSH_BRIGHTNESS;
 979                         val = v_BCSH_BRIGHTNESS(value);
 980                         break;
 981                 case CONTRAST:
 982                 /*from 0 to 510,typical is 256*/
 983                         mask =  m_BCSH_CONTRAST;
 984                         val =  v_BCSH_CONTRAST(value);
 985                         break;
 986                 case SAT_CON:
 987                 /*from 0 to 1015,typical is 256*/
 988                         mask = m_BCSH_SAT_CON;
 989                         val = v_BCSH_SAT_CON(value);
 990                         break;
 991                 default:
 992                         break;
 993                 }
 994                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
 995                 lcdc_cfg_done(lcdc_dev);
 996         }
 997         spin_unlock(&lcdc_dev->reg_lock);
 998         return val;
 999 }
1000
1001 static int rk3036_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode)
1002 {
1003         struct lcdc_device *lcdc_dev =
1004             container_of(dev_drv, struct lcdc_device, driver);
1005         u32 val;
1006
1007         spin_lock(&lcdc_dev->reg_lock);
1008         if(lcdc_dev->clk_on) {
1009                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1010                 switch (mode) {
1011                 case BRIGHTNESS:
1012                         val &= m_BCSH_BRIGHTNESS;
1013                         if(val > 0x80)
1014                                 val -= 0x80;
1015                         else
1016                                 val += 0x80;
1017                         break;
1018                 case CONTRAST:
1019                         val &= m_BCSH_CONTRAST;
1020                         val >>= 8;
1021                         break;
1022                 case SAT_CON:
1023                         val &= m_BCSH_SAT_CON;
1024                         val >>= 20;
1025                         break;
1026                 default:
1027                         break;
1028                 }
1029         }
1030         spin_unlock(&lcdc_dev->reg_lock);
1031         return val;
1032 }
1033
1034
1035 static int rk3036_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1036 {
1037         struct lcdc_device *lcdc_dev =
1038             container_of(dev_drv, struct lcdc_device, driver);
1039         u32 mask, val;
1040
1041         spin_lock(&lcdc_dev->reg_lock);
1042         if (lcdc_dev->clk_on) {
1043                 if (open) {
1044                         lcdc_writel(lcdc_dev,BCSH_CTRL,0x1);
1045                         lcdc_writel(lcdc_dev,BCSH_BCS,0xd0010000);
1046                         lcdc_writel(lcdc_dev,BCSH_H,0x01000000);
1047                 } else {
1048                         mask = m_BCSH_EN;
1049                         val = v_BCSH_EN(0);
1050                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1051                 }
1052                 lcdc_cfg_done(lcdc_dev);
1053         }
1054         spin_unlock(&lcdc_dev->reg_lock);
1055         return 0;
1056 }
1057
1058 static int rk3036_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1059                                enum fb_win_map_order order)
1060 {
1061         mutex_lock(&dev_drv->fb_win_id_mutex);
1062         if (order == FB_DEFAULT_ORDER)
1063                 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
1064         dev_drv->fb2_win_id = order / 100;
1065         dev_drv->fb1_win_id = (order / 10) % 10;
1066         dev_drv->fb0_win_id = order % 10;
1067         mutex_unlock(&dev_drv->fb_win_id_mutex);
1068
1069         return 0;
1070 }
1071
1072 static int rk3036_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1073                                bool set)
1074 {
1075         struct lcdc_device *lcdc_dev =
1076             container_of(dev_drv, struct lcdc_device, driver);
1077         struct rk_screen *screen = dev_drv->cur_screen;
1078         u64 ft = 0;
1079         u32 dotclk;
1080         int ret;
1081         u32 pixclock;
1082         u32 x_total, y_total;
1083         if (set) {
1084                 ft = div_u64(1000000000000llu, fps);
1085                 x_total =
1086                     screen->mode.upper_margin + screen->mode.lower_margin +
1087                     screen->mode.yres + screen->mode.vsync_len;
1088                 y_total =
1089                     screen->mode.left_margin + screen->mode.right_margin +
1090                     screen->mode.xres + screen->mode.hsync_len;
1091                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1092                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1093                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1094         }
1095
1096         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1097         dev_drv->pixclock = lcdc_dev->pixclock = pixclock;
1098         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1099         screen->ft = 1000 / fps;        /*one frame time in ms */
1100
1101         if (set)
1102                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1103                          clk_get_rate(lcdc_dev->dclk), fps);
1104
1105         return fps;
1106 }
1107
1108 static int rk3036_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1109 {
1110         struct lcdc_device *lcdc_dev =
1111             container_of(dev_drv, struct lcdc_device, driver);
1112         u32 int_reg;
1113         int ret;
1114
1115         if (lcdc_dev->clk_on) {
1116                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1117                 if (int_reg & m_LF_INT_STA) {
1118                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1119                                      v_LF_INT_CLEAR(1));
1120                         ret = RK_LF_STATUS_FC;
1121                 } else
1122                         ret = RK_LF_STATUS_FR;
1123         } else {
1124                 ret = RK_LF_STATUS_NC;
1125         }
1126
1127         return ret;
1128 }
1129
1130 static int rk3036_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,unsigned int *dsp_addr)
1131 {
1132         struct lcdc_device *lcdc_dev =
1133             container_of(dev_drv, struct lcdc_device, driver);
1134
1135         if(lcdc_dev->clk_on){
1136                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1137                 dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1138         }
1139         return 0;
1140 }
1141
1142 static ssize_t rk3036_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1143                                          char *buf, int win_id)
1144 {
1145 //      struct lcdc_device *lcdc_dev = container_of(dev_drv,
1146 //                                      struct lcdc_device, driver);
1147 //      struct rk_screen *screen = dev_drv->cur_screen;
1148         struct rk_lcdc_win *win = NULL;
1149         char fmt[9] = "NULL";
1150         u32     size;
1151
1152         if (win_id < ARRAY_SIZE(lcdc_win)) {
1153                 win = dev_drv->win[win_id];
1154         } else {
1155                 dev_err(dev_drv->dev,"invalid win number:%d!\n", win_id);
1156                 return 0;
1157         }
1158
1159         size = snprintf(buf, PAGE_SIZE, "win%d: %s\n", win_id, get_format_string(win->format, fmt));
1160         size += snprintf(buf + size, PAGE_SIZE - size, "        xact %d yact %d xvir %d yvir %d\n",
1161                 win->area[0].xact, win->area[0].yact, win->area[0].xvir, win->area[0].yvir);
1162         size += snprintf(buf + size, PAGE_SIZE - size, "        xpos %d ypos %d xsize %d ysize %d\n",
1163                 win->area[0].xpos, win->area[0].ypos, win->area[0].xsize, win->area[0].ysize);
1164         size += snprintf(buf + size, PAGE_SIZE - size, "        yaddr 0x%x uvaddr 0x%x\n",
1165                 win->area[0].y_addr, win->area[0].uv_addr);
1166         return size;
1167 }
1168
1169 static int rk3036_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1170 {
1171         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1172                                                 struct lcdc_device,
1173                                                 driver);
1174         int *cbase = (int *)lcdc_dev->regs;
1175         int *regsbak = (int *)lcdc_dev->regsbak;
1176         int i, j;
1177
1178         printk("back up reg:\n");
1179         for (i = 0; i <= (0xDC >> 4); i++) {
1180                 for (j = 0; j < 4; j++)
1181                         printk("%08x  ", *(regsbak + i * 4 + j));
1182                 printk("\n");
1183         }
1184
1185         printk("lcdc reg:\n");
1186         for (i = 0; i <= (0xDC >> 4); i++) {
1187                 for (j = 0; j < 4; j++)
1188                         printk("%08x  ", readl_relaxed(cbase + i * 4 + j));
1189                 printk("\n");
1190         }
1191         return 0;
1192 }
1193
1194 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1195         .open                   = rk3036_lcdc_open,
1196         .load_screen            = rk3036_load_screen,
1197         .set_par                = rk3036_lcdc_set_par,
1198         .pan_display            = rk3036_lcdc_pan_display,
1199         .blank                  = rk3036_lcdc_blank,
1200         .ioctl                  = rk3036_lcdc_ioctl,
1201         .get_win_state          = rk3036_lcdc_get_win_state,
1202         .ovl_mgr                = rk3036_lcdc_ovl_mgr,
1203         .get_disp_info          = rk3036_lcdc_get_disp_info,
1204         .fps_mgr                = rk3036_lcdc_fps_mgr,
1205         .fb_get_win_id          = rk3036_lcdc_get_win_id,
1206         .fb_win_remap           = rk3036_fb_win_remap,
1207         .poll_vblank            = rk3036_lcdc_poll_vblank,
1208         .get_dsp_addr           = rk3036_lcdc_get_dsp_addr,
1209         .cfg_done               = rk3036_lcdc_cfg_done,
1210         .dump_reg               = rk3036_lcdc_reg_dump,
1211         .set_dsp_bcsh_hue       = rk3036_lcdc_set_bcsh_hue,
1212         .set_dsp_bcsh_bcs       = rk3036_lcdc_set_bcsh_bcs,
1213         .get_dsp_bcsh_hue       = rk3036_lcdc_get_bcsh_hue,
1214         .get_dsp_bcsh_bcs       = rk3036_lcdc_get_bcsh_bcs,
1215         .open_bcsh              = rk3036_lcdc_open_bcsh,
1216 };
1217
1218 static int rk3036_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1219 {
1220 #if defined(CONFIG_ROCKCHIP_IOMMU)
1221         struct device_node *np = lcdc_dev->dev->of_node;
1222         int val;
1223         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1224                 lcdc_dev->driver.iommu_enabled = 0;
1225         else
1226                 lcdc_dev->driver.iommu_enabled = val;
1227 #else
1228         lcdc_dev->driver.iommu_enabled = 0;
1229 #endif
1230         return 0;
1231 }
1232
1233 static int rk3036_lcdc_probe(struct platform_device *pdev)
1234 {
1235         struct lcdc_device *lcdc_dev = NULL;
1236         struct rk_lcdc_driver *dev_drv;
1237         struct device *dev = &pdev->dev;
1238         struct resource *res;
1239         int ret;
1240
1241         lcdc_dev = devm_kzalloc(dev,
1242                                 sizeof(struct lcdc_device), GFP_KERNEL);
1243         if (!lcdc_dev) {
1244                 dev_err(&pdev->dev, "rk3036 lcdc device kmalloc fail!");
1245                 return -ENOMEM;
1246         }
1247         platform_set_drvdata(pdev, lcdc_dev);
1248         lcdc_dev->dev = dev;
1249         rk3036_lcdc_parse_dt(lcdc_dev);
1250
1251         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1252         lcdc_dev->reg_phy_base = res->start;
1253         lcdc_dev->len = resource_size(res);
1254         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1255         if (IS_ERR(lcdc_dev->regs))
1256                 return PTR_ERR(lcdc_dev->regs);
1257
1258         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1259         if (IS_ERR(lcdc_dev->regsbak))
1260                 return PTR_ERR(lcdc_dev->regsbak);
1261
1262         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1263         dev_drv = &lcdc_dev->driver;
1264         dev_drv->dev = dev;
1265         dev_drv->prop = PRMRY;
1266         dev_drv->id = lcdc_dev->id;
1267         dev_drv->ops = &lcdc_drv_ops;
1268         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1269         spin_lock_init(&lcdc_dev->reg_lock);
1270
1271         lcdc_dev->irq = platform_get_irq(pdev, 0);
1272         if (lcdc_dev->irq < 0) {
1273                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1274                         lcdc_dev->id);
1275                 return -ENXIO;
1276         }
1277
1278         ret = devm_request_irq(dev, lcdc_dev->irq, rk3036_lcdc_isr,
1279                                IRQF_DISABLED, dev_name(dev), lcdc_dev);
1280         if (ret) {
1281                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1282                         lcdc_dev->irq, ret);
1283                 return ret;
1284         }
1285
1286         if (dev_drv->iommu_enabled) {
1287                 strcpy(dev_drv->mmu_dts_name, "iommu,vop_mmu");
1288         }
1289
1290         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1291         if (ret < 0) {
1292                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1293                 return ret;
1294         }
1295         lcdc_dev->screen = dev_drv->screen0;
1296
1297         dev_info(dev, "lcdc%d probe ok, iommu %s\n",
1298                 lcdc_dev->id, dev_drv->iommu_enabled ? "enabled" : "disabled");
1299
1300         return 0;
1301 }
1302
1303 #if defined(CONFIG_PM)
1304 static int rk3036_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1305 {
1306         return 0;
1307 }
1308
1309 static int rk3036_lcdc_resume(struct platform_device *pdev)
1310 {
1311         return 0;
1312 }
1313 #else
1314 #define rk3036_lcdc_suspend NULL
1315 #define rk3036_lcdc_resume  NULL
1316 #endif
1317
1318 static int rk3036_lcdc_remove(struct platform_device *pdev)
1319 {
1320         return 0;
1321 }
1322
1323 static void rk3036_lcdc_shutdown(struct platform_device *pdev)
1324 {
1325
1326 }
1327
1328 #if defined(CONFIG_OF)
1329 static const struct of_device_id rk3036_lcdc_dt_ids[] = {
1330         {.compatible = "rockchip,rk3036-lcdc",},
1331         {}
1332 };
1333 #endif
1334
1335 static struct platform_driver rk3036_lcdc_driver = {
1336         .probe = rk3036_lcdc_probe,
1337         .remove = rk3036_lcdc_remove,
1338         .driver = {
1339                 .name = "rk3036-lcdc",
1340                 .owner = THIS_MODULE,
1341                 .of_match_table = of_match_ptr(rk3036_lcdc_dt_ids),
1342         },
1343         .suspend = rk3036_lcdc_suspend,
1344         .resume = rk3036_lcdc_resume,
1345         .shutdown = rk3036_lcdc_shutdown,
1346 };
1347
1348 static int __init rk3036_lcdc_module_init(void)
1349 {
1350         return platform_driver_register(&rk3036_lcdc_driver);
1351 }
1352
1353 static void __exit rk3036_lcdc_module_exit(void)
1354 {
1355         platform_driver_unregister(&rk3036_lcdc_driver);
1356 }
1357
1358 fs_initcall(rk3036_lcdc_module_init);
1359 module_exit(rk3036_lcdc_module_exit);