drivers/video/rockchip/lcdc/rk3036_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk3036_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:zhengyang<zhengyang@rock-chips.com>
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/errno.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/slab.h>
  23 #include <linux/device.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/clk.h>
  29 #include <asm/div64.h>
  30 #include <linux/uaccess.h>
  31 #include <linux/rockchip/cpu.h>
  32 #include <linux/rockchip/iomap.h>
  33 #include <linux/rockchip/grf.h>
  34 #include <linux/rockchip/common.h>
  35 #include <dt-bindings/clock/rk_system_status.h>
  36 #if defined(CONFIG_ION_ROCKCHIP)
  37 #include <linux/rockchip-iovmm.h>
  38 #endif
  39 #include "rk3036_lcdc.h"
  40
  41 static int dbg_thresd;
  42 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  43
  44 #define DBG(level, x...) do {                   \
  45         if (unlikely(dbg_thresd >= level))      \
  46                 dev_info(dev_drv->dev, x);              \
  47         } while (0)
  48
  49 #define grf_writel(offset, v)   do { \
  50         writel_relaxed(v, RK_GRF_VIRT + offset); \
  51         dsb(); \
  52         } while (0)
  53
  54 static struct rk_lcdc_win lcdc_win[] = {
  55         [0] = {
  56                .name = "win0",
  57                .id = 0,
  58                .support_3d = false,
  59                },
  60         [1] = {
  61                .name = "win1",
  62                .id = 1,
  63                .support_3d = false,
  64                },
  65         [2] = {
  66                .name = "hwc",
  67                .id = 2,
  68                .support_3d = false,
  69                },
  70 };
  71
  72 static irqreturn_t rk3036_lcdc_isr(int irq, void *dev_id)
  73 {
  74         struct lcdc_device *lcdc_dev =
  75             (struct lcdc_device *)dev_id;
  76         ktime_t timestamp = ktime_get();
  77         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  78
  79         if (int_reg & m_FS_INT_STA) {
  80                 timestamp = ktime_get();
  81                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  82                              v_FS_INT_CLEAR(1));
  83                 /*if (lcdc_dev->driver.wait_fs) {*/
  84                 if (0) {
  85                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  86                         complete(&(lcdc_dev->driver.frame_done));
  87                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  88                 }
  89                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  90                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  91
  92         } else if (int_reg & m_LF_INT_STA) {
  93                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  94                              v_LF_INT_CLEAR(1));
  95         }
  96         return IRQ_HANDLED;
  97 }
  98
  99 static int rk3036_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
 100 {
 101 #ifdef CONFIG_RK_FPGA
 102         lcdc_dev->clk_on = 1;
 103         return 0;
 104 #endif
 105         if (!lcdc_dev->clk_on) {
 106                 clk_prepare_enable(lcdc_dev->hclk);
 107                 clk_prepare_enable(lcdc_dev->dclk);
 108                 clk_prepare_enable(lcdc_dev->aclk);
 109 /*              clk_prepare_enable(lcdc_dev->pd);*/
 110                 spin_lock(&lcdc_dev->reg_lock);
 111                 lcdc_dev->clk_on = 1;
 112                 spin_unlock(&lcdc_dev->reg_lock);
 113         }
 114
 115         return 0;
 116 }
 117
 118 static int rk3036_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 119 {
 120 #ifdef CONFIG_RK_FPGA
 121         lcdc_dev->clk_on = 0;
 122         return 0;
 123 #endif
 124         if (lcdc_dev->clk_on) {
 125                 spin_lock(&lcdc_dev->reg_lock);
 126                 lcdc_dev->clk_on = 0;
 127                 spin_unlock(&lcdc_dev->reg_lock);
 128                 mdelay(25);
 129                 clk_disable_unprepare(lcdc_dev->dclk);
 130                 clk_disable_unprepare(lcdc_dev->hclk);
 131                 clk_disable_unprepare(lcdc_dev->aclk);
 132 /*              clk_disable_unprepare(lcdc_dev->pd);*/
 133         }
 134
 135         return 0;
 136 }
 137
 138 static int rk3036_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 139 {
 140         u32 mask, val;
 141         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 142                                         struct lcdc_device, driver);
 143         mask = m_FS_INT_CLEAR | m_FS_INT_EN;
 144         val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1);
 145         lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 146         return 0;
 147 }
 148
 149 static int rk3036_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 150 {
 151         u32 mask, val;
 152
 153         spin_lock(&lcdc_dev->reg_lock);
 154         if (likely(lcdc_dev->clk_on)) {
 155                 mask = m_FS_INT_CLEAR | m_FS_INT_EN;
 156                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0);
 157                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 158                 spin_unlock(&lcdc_dev->reg_lock);
 159         } else {
 160                 spin_unlock(&lcdc_dev->reg_lock);
 161         }
 162         mdelay(1);
 163         return 0;
 164 }
 165
 166 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device
 167                                              *lcdc_dev)
 168 {
 169         int reg = 0;
 170         u32 value = 0;
 171
 172         spin_lock(&lcdc_dev->reg_lock);
 173         for (reg = 0; reg < 0xdc; reg += 4)
 174                 value = lcdc_readl(lcdc_dev, reg);
 175
 176         spin_unlock(&lcdc_dev->reg_lock);
 177 }
 178
 179 static int rk3036_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 180 {
 181         int win0_top = 0;
 182         u32 mask, val;
 183         enum data_format win0_format = lcdc_dev->driver.win[0]->format;
 184         enum data_format win1_format = lcdc_dev->driver.win[1]->format;
 185
 186         int win0_alpha_en = ((win0_format == ARGB888) ||
 187                                 (win0_format == ABGR888)) ? 1 : 0;
 188         int win1_alpha_en = ((win1_format == ARGB888) ||
 189                                 (win1_format == ABGR888)) ? 1 : 0;
 190         u32 *_pv = (u32 *)lcdc_dev->regsbak;
 191
 192         _pv += (DSP_CTRL0 >> 2);
 193         win0_top = ((*_pv) & (m_WIN0_TOP)) >> 8;
 194         if (win0_top && (lcdc_dev->atv_layer_cnt >= 2) && (win0_alpha_en)) {
 195                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN |
 196                         m_WIN1_PREMUL_SCALE;
 197                 val = v_WIN0_ALPHA_EN(1) | v_WIN1_ALPHA_EN(0) |
 198                         v_WIN1_PREMUL_SCALE(0);
 199                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 200
 201                 mask = m_WIN0_ALPHA_MODE | m_PREMUL_ALPHA_ENABLE |
 202                         m_ALPHA_MODE_SEL1;
 203                 val = v_WIN0_ALPHA_MODE(1) | v_PREMUL_ALPHA_ENABLE(1) |
 204                         v_ALPHA_MODE_SEL1(0);
 205                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 206         } else if ((!win0_top) && (lcdc_dev->atv_layer_cnt >= 2) &&
 207                    (win1_alpha_en)) {
 208                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN |
 209                         m_WIN1_PREMUL_SCALE;
 210                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(1) |
 211                         v_WIN1_PREMUL_SCALE(0);
 212                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 213
 214                 mask = m_WIN1_ALPHA_MODE | m_PREMUL_ALPHA_ENABLE |
 215                         m_ALPHA_MODE_SEL1;
 216                 val = v_WIN1_ALPHA_MODE(1) | v_PREMUL_ALPHA_ENABLE(1) |
 217                         v_ALPHA_MODE_SEL1(0);
 218                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 219         } else {
 220                 mask = m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 221                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(0);
 222                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 223         }
 224         return 0;
 225 }
 226
 227 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
 228                                    struct rk_lcdc_win *win)
 229 {
 230         u32 mask, val;
 231
 232         if (win->state == 1) {
 233                 if (win->id == 0) {
 234                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 235                         val = v_WIN0_EN(win->state) |
 236                               v_WIN0_FORMAT(win->fmt_cfg) |
 237                               v_WIN0_RB_SWAP(win->swap_rb);
 238                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 239
 240                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 241                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 242                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 243                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 244                                     v_X_SCL_FACTOR(win->scale_cbcr_x) |
 245                                     v_Y_SCL_FACTOR(win->scale_cbcr_y));
 246                         lcdc_msk_reg(lcdc_dev, WIN0_VIR,
 247                                      m_YRGB_VIR | m_CBBR_VIR,
 248                                      v_YRGB_VIR(win->area[0].y_vir_stride) |
 249                                      v_CBBR_VIR(win->area[0].uv_vir_stride));
 250                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO,
 251                                     v_ACT_WIDTH(win->area[0].xact) |
 252                                     v_ACT_HEIGHT(win->area[0].yact));
 253                         lcdc_writel(lcdc_dev, WIN0_DSP_ST,
 254                                     v_DSP_STX(win->area[0].dsp_stx) |
 255                                     v_DSP_STY(win->area[0].dsp_sty));
 256                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO,
 257                                     v_DSP_WIDTH(win->post_cfg.xsize) |
 258                                     v_DSP_HEIGHT(win->post_cfg.ysize));
 259
 260                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST,
 261                                     win->area[0].y_addr);
 262                         lcdc_writel(lcdc_dev, WIN0_CBR_MST,
 263                                     win->area[0].uv_addr);
 264                 } else if (win->id == 1) {
 265                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 266                         val = v_WIN1_EN(win->state) |
 267                               v_WIN1_FORMAT(win->fmt_cfg) |
 268                               v_WIN1_RB_SWAP(win->swap_rb);
 269                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 270
 271                         lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 272                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 273                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 274
 275                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR,
 276                                      v_YRGB_VIR(win->area[0].y_vir_stride));
 277                         lcdc_writel(lcdc_dev, WIN1_ACT_INFO,
 278                                     v_ACT_WIDTH(win->area[0].xact) |
 279                                     v_ACT_HEIGHT(win->area[0].yact));
 280                         lcdc_writel(lcdc_dev, WIN1_DSP_INFO,
 281                                     v_DSP_WIDTH(win->post_cfg.xsize) |
 282                                     v_DSP_HEIGHT(win->post_cfg.ysize));
 283                         lcdc_writel(lcdc_dev, WIN1_DSP_ST,
 284                                     v_DSP_STX(win->area[0].dsp_stx) |
 285                                     v_DSP_STY(win->area[0].dsp_sty));
 286                         lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 287                 } /* else if (win->id == 2) {
 288                 }*/
 289         } else {
 290                 win->area[0].y_addr = 0;
 291                 win->area[0].uv_addr = 0;
 292                 if (win->id == 0)
 293                         lcdc_msk_reg(lcdc_dev,
 294                                      SYS_CTRL, m_WIN0_EN, v_WIN0_EN(0));
 295                 else if (win->id == 1)
 296                         lcdc_msk_reg(lcdc_dev,
 297                                      SYS_CTRL, m_WIN1_EN, v_WIN1_EN(0));
 298                 else if (win->id == 2)
 299                         lcdc_msk_reg(lcdc_dev,
 300                                      SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 301         }
 302         rk3036_lcdc_alpha_cfg(lcdc_dev);
 303 }
 304
 305 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev,
 306                               unsigned int win_id, bool open)
 307 {
 308         spin_lock(&lcdc_dev->reg_lock);
 309         if (likely(lcdc_dev->clk_on) &&
 310             lcdc_dev->driver.win[win_id]->state != open) {
 311                 if (open) {
 312                         if (!lcdc_dev->atv_layer_cnt) {
 313                                 dev_info(lcdc_dev->dev,
 314                                          "wakeup from standby!\n");
 315                                 lcdc_dev->standby = 0;
 316                         }
 317                         lcdc_dev->atv_layer_cnt++;
 318                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 319                         lcdc_dev->atv_layer_cnt--;
 320                 }
 321                 lcdc_dev->driver.win[win_id]->state = open;
 322                 if (!open) {
 323                         lcdc_layer_update_regs(lcdc_dev,
 324                                                lcdc_dev->driver.win[win_id]);
 325                         lcdc_cfg_done(lcdc_dev);
 326                 }
 327                 /*if no layer used,disable lcdc*/
 328                 if (!lcdc_dev->atv_layer_cnt) {
 329                         dev_info(lcdc_dev->dev,
 330                                  "no layer is used, go to standby!\n");
 331                         lcdc_dev->standby = 1;
 332                 }
 333         }
 334         spin_unlock(&lcdc_dev->reg_lock);
 335 }
 336
 337 static int rk3036_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 338 {
 339         struct lcdc_device *lcdc_dev =
 340             container_of(dev_drv, struct lcdc_device, driver);
 341         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 342         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 343         int timeout;
 344         unsigned long flags;
 345
 346         spin_lock(&lcdc_dev->reg_lock);
 347         if (likely(lcdc_dev->clk_on)) {
 348                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 349                              v_LCDC_STANDBY(lcdc_dev->standby));
 350                 lcdc_layer_update_regs(lcdc_dev, win0);
 351                 lcdc_layer_update_regs(lcdc_dev, win1);
 352                 rk3036_lcdc_alpha_cfg(lcdc_dev);
 353                 lcdc_cfg_done(lcdc_dev);
 354         }
 355         spin_unlock(&lcdc_dev->reg_lock);
 356         /* if (dev_drv->wait_fs) { */
 357         if (0) {
 358                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 359                 init_completion(&dev_drv->frame_done);
 360                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 361                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 362                                                       msecs_to_jiffies
 363                                                       (dev_drv->cur_screen->ft
 364                                                        + 5));
 365                 if (!timeout && (!dev_drv->frame_done.done)) {
 366                         dev_warn(lcdc_dev->dev,
 367                                  "wait for new frame start time out!\n");
 368                         return -ETIMEDOUT;
 369                 }
 370         }
 371         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 372         return 0;
 373 }
 374
 375 static void rk3036_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 376 {
 377         memcpy((u8 *)lcdc_dev->regs, (u8 *)lcdc_dev->regsbak, 0xdc);
 378 }
 379
 380 static void rk3036_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 381 {
 382         u32 mask, val;
 383         struct lcdc_device *lcdc_dev =
 384             container_of(dev_drv, struct lcdc_device, driver);
 385
 386         spin_lock(&lcdc_dev->reg_lock);
 387         if (likely(lcdc_dev->clk_on)) {
 388                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
 389                         m_AXI_OUTSTANDING_MAX_NUM;
 390                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) |
 391                         v_AXI_MAX_OUTSTANDING_EN(1);
 392                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 393         }
 394         spin_unlock(&lcdc_dev->reg_lock);
 395 }
 396
 397 static int rk3036_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 398 {
 399 #ifdef CONFIG_RK_FPGA
 400         return 0;
 401 #endif
 402         int ret, fps;
 403         struct lcdc_device *lcdc_dev =
 404             container_of(dev_drv, struct lcdc_device, driver);
 405         struct rk_screen *screen = dev_drv->cur_screen;
 406
 407         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 408         if (ret)
 409                 dev_err(dev_drv->dev,
 410                         "set lcdc%d dclk failed\n", lcdc_dev->id);
 411         lcdc_dev->pixclock =
 412                  div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 413         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 414
 415         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 416         screen->ft = 1000 / fps;
 417         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 418                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 419         return 0;
 420 }
 421
 422 /********do basic init*********/
 423 static int rk3036_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 424 {
 425         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 426                                 struct lcdc_device, driver);
 427
 428         if (lcdc_dev->pre_init)
 429                 return 0;
 430         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 431         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 432         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 433 /*      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc"); */
 434
 435         if (/*IS_ERR(lcdc_dev->pd) ||*/ (IS_ERR(lcdc_dev->aclk)) ||
 436             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 437                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 438                         lcdc_dev->id);
 439         }
 440
 441         rk_disp_pwr_enable(dev_drv);
 442         rk3036_lcdc_clk_enable(lcdc_dev);
 443
 444         /*backup reg config at uboot*/
 445         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 446         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN,
 447                      v_AUTO_GATING_EN(0));
 448         lcdc_cfg_done(lcdc_dev);
 449         if (dev_drv->iommu_enabled)
 450                 /*disable win0 to workaround iommu pagefault*/
 451                 lcdc_layer_enable(lcdc_dev, 0, 0);
 452         lcdc_dev->pre_init = true;
 453
 454         return 0;
 455 }
 456
 457 static int rk3036_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 458 {
 459         int ret = -EINVAL;
 460         int fps;
 461         u16 face = 0;
 462         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 463                                                 struct lcdc_device, driver);
 464         struct rk_screen *screen = dev_drv->cur_screen;
 465         u16 right_margin = screen->mode.right_margin;
 466         u16 left_margin = screen->mode.left_margin;
 467         u16 lower_margin = screen->mode.lower_margin;
 468         u16 upper_margin = screen->mode.upper_margin;
 469         u16 x_res = screen->mode.xres;
 470         u16 y_res = screen->mode.yres;
 471         u32 mask, val;
 472
 473         spin_lock(&lcdc_dev->reg_lock);
 474         if (likely(lcdc_dev->clk_on)) {
 475                 switch (screen->type) {
 476                 case SCREEN_HDMI:
 477                         mask = m_HDMI_DCLK_EN;
 478                         val = v_HDMI_DCLK_EN(1);
 479                         if (screen->pixelrepeat) {
 480                                 mask |= m_CORE_CLK_DIV_EN;
 481                                 val |= v_CORE_CLK_DIV_EN(1);
 482                         } else {
 483                                 mask |= m_CORE_CLK_DIV_EN;
 484                                 val |= v_CORE_CLK_DIV_EN(0);
 485                         }
 486                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 487                         mask = (1 << 4) | (1 << 5) | (1 << 6);
 488                         val = (screen->pin_hsync << 4) |
 489                                 (screen->pin_vsync << 5) |
 490                                 (screen->pin_den << 6);
 491                         grf_writel(RK3036_GRF_SOC_CON2, (mask << 16) | val);
 492                         break;
 493                 case SCREEN_TVOUT:
 494                         mask = m_TVE_DAC_DCLK_EN;
 495                         val = v_TVE_DAC_DCLK_EN(1);
 496                         if (screen->pixelrepeat) {
 497                                 mask |= m_CORE_CLK_DIV_EN;
 498                                 val |= v_CORE_CLK_DIV_EN(1);
 499                         } else {
 500                                 mask |= m_CORE_CLK_DIV_EN;
 501                                 val |= v_CORE_CLK_DIV_EN(0);
 502                         }
 503                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 504                         if ((x_res == 720) && (y_res == 576)) {
 505                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 506                                              m_TVE_MODE, v_TVE_MODE(TV_PAL));
 507                         } else if ((x_res == 720) && (y_res == 480)) {
 508                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 509                                              m_TVE_MODE, v_TVE_MODE(TV_NTSC));
 510                         } else {
 511                                 dev_err(lcdc_dev->dev,
 512                                         "unsupported video timing!\n");
 513                                 return -1;
 514                         }
 515                         break;
 516                 default:
 517                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 518                         break;
 519                 }
 520
 521                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 522                     m_DEN_POL | m_DCLK_POL;
 523                 val = v_DSP_OUT_FORMAT(face) |
 524                         v_HSYNC_POL(screen->pin_hsync) |
 525                         v_VSYNC_POL(screen->pin_vsync) |
 526                         v_DEN_POL(screen->pin_den) |
 527                         v_DCLK_POL(screen->pin_dclk);
 528                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 529
 530                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 531                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 532                     m_DSP_DUMMY_SWAP | m_BLANK_EN;
 533
 534                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 535                     v_DSP_RB_SWAP(screen->swap_rb) |
 536                     v_DSP_RG_SWAP(screen->swap_rg) |
 537                     v_DSP_DELTA_SWAP(screen->swap_delta) |
 538                                      v_DSP_DUMMY_SWAP(screen->swap_dumy) |
 539                                                       v_BLANK_EN(0) |
 540                                      v_BLACK_EN(0);
 541                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 542                 val =
 543                     v_HSYNC(screen->mode.hsync_len) | v_HORPRD(screen->mode.
 544                                                                hsync_len +
 545                                                                left_margin +
 546                                                                x_res +
 547                                                                right_margin);
 548                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 549                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 550                     v_HASP(screen->mode.hsync_len + left_margin);
 551                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 552
 553                 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 554                         /*First Field Timing*/
 555                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
 556                                     v_VSYNC(screen->mode.vsync_len) |
 557                                     v_VERPRD(2 * (screen->mode.vsync_len +
 558                                                   upper_margin + lower_margin)
 559                                              + y_res + 1));
 560                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END,
 561                                     v_VAEP(screen->mode.vsync_len +
 562                                         upper_margin + y_res/2) |
 563                                     v_VASP(screen->mode.vsync_len +
 564                                         upper_margin));
 565                         /*Second Field Timing*/
 566                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1,
 567                                     v_VSYNC_ST_F1(screen->mode.vsync_len +
 568                                                   upper_margin + y_res/2 +
 569                                                   lower_margin) |
 570                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len
 571                                                    + upper_margin + y_res/2 +
 572                                                    lower_margin));
 573                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END_F1,
 574                                     v_VAEP(2 * (screen->mode.vsync_len +
 575                                                 upper_margin) + y_res +
 576                                                 lower_margin + 1) |
 577                                     v_VASP(2 * (screen->mode.vsync_len +
 578                                                 upper_margin) + y_res/2 +
 579                                                 lower_margin + 1));
 580
 581                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 582                                      m_INTERLACE_DSP_EN |
 583                                      m_INTERLACE_DSP_POL |
 584                                      m_WIN1_DIFF_DCLK_EN |
 585                                      m_WIN0_YRGB_DEFLICK_EN |
 586                                      m_WIN0_CBR_DEFLICK_EN,
 587                                      v_INTERLACE_DSP_EN(1) |
 588                                      v_INTERLACE_DSP_POL(0) |
 589                                      v_WIN1_DIFF_DCLK_EN(1) |
 590                                      v_WIN0_YRGB_DEFLICK_EN(1) |
 591                                      v_WIN0_CBR_DEFLICK_EN(1));
 592                 } else {
 593                         val = v_VSYNC(screen->mode.vsync_len) |
 594                               v_VERPRD(screen->mode.vsync_len + upper_margin +
 595                                         y_res + lower_margin);
 596                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 597
 598                         val = v_VAEP(screen->mode.vsync_len +
 599                                      upper_margin + y_res) |
 600                             v_VASP(screen->mode.vsync_len +
 601                                    screen->mode.upper_margin);
 602                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 603
 604                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 605                                      m_INTERLACE_DSP_EN |
 606                                      m_WIN1_DIFF_DCLK_EN |
 607                                      m_WIN0_YRGB_DEFLICK_EN |
 608                                      m_WIN0_CBR_DEFLICK_EN,
 609                                      v_INTERLACE_DSP_EN(0) |
 610                                      v_WIN1_DIFF_DCLK_EN(0) |
 611                                      v_WIN0_YRGB_DEFLICK_EN(0) |
 612                                      v_WIN0_CBR_DEFLICK_EN(0));
 613                 }
 614         }
 615         spin_unlock(&lcdc_dev->reg_lock);
 616
 617         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 618         if (ret)
 619                 dev_err(dev_drv->dev,
 620                         "set lcdc%d dclk failed\n", lcdc_dev->id);
 621         lcdc_dev->pixclock =
 622             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 623         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 624
 625         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 626         screen->ft = 1000 / fps;
 627         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 628                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 629         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 630                 dev_drv->trsm_ops->enable();
 631         if (screen->init)
 632                 screen->init();
 633
 634         return 0;
 635 }
 636
 637 static int rk3036_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
 638                             bool open)
 639 {
 640         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 641                                         struct lcdc_device, driver);
 642
 643         /*enable clk,when first layer open */
 644         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
 645                 rk3036_lcdc_pre_init(dev_drv);
 646                 rk3036_lcdc_clk_enable(lcdc_dev);
 647         #if defined(CONFIG_ROCKCHIP_IOMMU)
 648                 if (dev_drv->iommu_enabled) {
 649                         if (!dev_drv->mmu_dev) {
 650                                 dev_drv->mmu_dev =
 651                                 rk_fb_get_sysmmu_device_by_compatible(
 652                                         dev_drv->mmu_dts_name);
 653                                 if (dev_drv->mmu_dev) {
 654                                         rk_fb_platform_set_sysmmu(dev_drv->mmu_dev,
 655                                                             dev_drv->dev);
 656                                         rockchip_iovmm_activate(dev_drv->dev);
 657                                 } else {
 658                                         dev_err(dev_drv->dev,
 659                                                 "failed to get iommu device\n"
 660                                                 );
 661                                         return -1;
 662                                 }
 663                         }
 664                 }
 665         #endif
 666                 rk3036_lcdc_reg_restore(lcdc_dev);
 667                 if (dev_drv->iommu_enabled)
 668                         rk3036_lcdc_mmu_en(dev_drv);
 669                 if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
 670                         rk3036_lcdc_set_dclk(dev_drv);
 671                         rk3036_lcdc_enable_irq(dev_drv);
 672                 } else {
 673                         rk3036_load_screen(dev_drv, 1);
 674                 }
 675         }
 676
 677         if (win_id < ARRAY_SIZE(lcdc_win))
 678                 lcdc_layer_enable(lcdc_dev, win_id, open);
 679         else
 680                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
 681
 682         /*when all layer closed,disable clk */
 683         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
 684                 rk3036_lcdc_disable_irq(lcdc_dev);
 685                 rk3036_lcdc_reg_update(dev_drv);
 686                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 687                 if (dev_drv->iommu_enabled) {
 688                         if (dev_drv->mmu_dev)
 689                                 rockchip_iovmm_deactivate(dev_drv->dev);
 690                 }
 691                 #endif
 692                 rk3036_lcdc_clk_disable(lcdc_dev);
 693         }
 694
 695         return 0;
 696 }
 697
 698 static int rk3036_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
 699 {
 700         struct lcdc_device *lcdc_dev =
 701                         container_of(dev_drv, struct lcdc_device, driver);
 702         struct rk_screen *screen = dev_drv->cur_screen;
 703         struct rk_lcdc_win *win = NULL;
 704         char fmt[9] = "NULL";
 705
 706         if (!screen) {
 707                 dev_err(dev_drv->dev, "screen is null!\n");
 708                 return -ENOENT;
 709         }
 710
 711         if (win_id == 0) {
 712                 win = dev_drv->win[0];
 713         } else if (win_id == 1) {
 714                 win = dev_drv->win[1];
 715         } else {
 716                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
 717                 return -EINVAL;
 718         }
 719
 720         spin_lock(&lcdc_dev->reg_lock);
 721         win->post_cfg.xpos = win->area[0].xpos * (dev_drv->overscan.left +
 722                 dev_drv->overscan.right)/200 + screen->mode.xres *
 723                         (100 - dev_drv->overscan.left) / 200;
 724
 725         win->post_cfg.ypos = win->area[0].ypos * (dev_drv->overscan.top +
 726                 dev_drv->overscan.bottom)/200 +
 727                 screen->mode.yres *
 728                         (100 - dev_drv->overscan.top) / 200;
 729         win->post_cfg.xsize = win->area[0].xsize *
 730                                 (dev_drv->overscan.left +
 731                                 dev_drv->overscan.right)/200;
 732         win->post_cfg.ysize = win->area[0].ysize *
 733                                 (dev_drv->overscan.top +
 734                                 dev_drv->overscan.bottom)/200;
 735
 736         win->area[0].dsp_stx = win->post_cfg.xpos + screen->mode.left_margin +
 737                                 screen->mode.hsync_len;
 738         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 739                 win->post_cfg.ysize /= 2;
 740                 win->area[0].dsp_sty = win->post_cfg.ypos/2 +
 741                                         screen->mode.upper_margin +
 742                                         screen->mode.vsync_len;
 743         } else {
 744                 win->area[0].dsp_sty = win->post_cfg.ypos +
 745                                         screen->mode.upper_margin +
 746                                         screen->mode.vsync_len;
 747         }
 748         win->scale_yrgb_x = calscale(win->area[0].xact, win->post_cfg.xsize);
 749         win->scale_yrgb_y = calscale(win->area[0].yact, win->post_cfg.ysize);
 750         switch (win->format) {
 751         case ARGB888:
 752                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 753                 win->swap_rb = 0;
 754                 break;
 755         case XBGR888:
 756                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 757                 win->swap_rb = 1;
 758                 break;
 759         case ABGR888:
 760                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 761                 win->swap_rb = 1;
 762                 break;
 763         case RGB888:
 764                 win->fmt_cfg = VOP_FORMAT_RGB888;
 765                 win->swap_rb = 0;
 766                 break;
 767         case RGB565:
 768                 win->fmt_cfg = VOP_FORMAT_RGB565;
 769                 win->swap_rb = 0;
 770                 break;
 771         case YUV444:
 772                 if (win_id == 0) {
 773                         win->fmt_cfg = VOP_FORMAT_YCBCR444;
 774                         win->scale_cbcr_x = calscale(win->area[0].xact,
 775                                                      win->post_cfg.xsize);
 776                         win->scale_cbcr_y = calscale(win->area[0].yact,
 777                                                      win->post_cfg.ysize);
 778                         win->swap_rb = 0;
 779                 } else {
 780                         dev_err(lcdc_dev->driver.dev,
 781                                 "%s:un supported format!\n",
 782                                 __func__);
 783                 }
 784                 break;
 785         case YUV422:
 786                 if (win_id == 0) {
 787                         win->fmt_cfg = VOP_FORMAT_YCBCR422;
 788                         win->scale_cbcr_x = calscale((win->area[0].xact / 2),
 789                                                      win->post_cfg.xsize);
 790                         win->scale_cbcr_y = calscale(win->area[0].yact,
 791                                                      win->post_cfg.ysize);
 792                         win->swap_rb = 0;
 793                 } else {
 794                         dev_err(lcdc_dev->driver.dev,
 795                                 "%s:un supported format!\n",
 796                                 __func__);
 797                 }
 798                 break;
 799         case YUV420:
 800                 if (win_id == 0) {
 801                         win->fmt_cfg = VOP_FORMAT_YCBCR420;
 802                         win->scale_cbcr_x = calscale(win->area[0].xact / 2,
 803                                                      win->post_cfg.xsize);
 804                         win->scale_cbcr_y = calscale(win->area[0].yact / 2,
 805                                                      win->post_cfg.ysize);
 806                         win->swap_rb = 0;
 807                 } else {
 808                         dev_err(lcdc_dev->driver.dev,
 809                                 "%s:un supported format!\n",
 810                                 __func__);
 811                 }
 812                 break;
 813         default:
 814                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 815                         __func__);
 816                 break;
 817         }
 818         spin_unlock(&lcdc_dev->reg_lock);
 819
 820         DBG(2, "lcdc%d>>%s\n"
 821                 ">>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
 822                 ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id,
 823                 __func__, get_format_string(win->format, fmt),
 824                 win->area[0].xact, win->area[0].yact, win->post_cfg.xsize,
 825                 win->post_cfg.ysize, win->area[0].xvir, win->area[0].yvir,
 826                 win->post_cfg.xpos, win->post_cfg.ypos);
 827         return 0;
 828 }
 829
 830 static int rk3036_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
 831 {
 832         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 833                                                 struct lcdc_device, driver);
 834         struct rk_lcdc_win *win = NULL;
 835         struct rk_screen *screen = dev_drv->cur_screen;
 836
 837         if (!screen) {
 838                 dev_err(dev_drv->dev, "screen is null!\n");
 839                 return -ENOENT;
 840         }
 841
 842         if (win_id == 0) {
 843                 win = dev_drv->win[0];
 844         } else if (win_id == 1) {
 845                 win = dev_drv->win[1];
 846         } else {
 847                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
 848                 return -EINVAL;
 849         }
 850
 851         spin_lock(&lcdc_dev->reg_lock);
 852         if (likely(lcdc_dev->clk_on)) {
 853                 win->area[0].y_addr = win->area[0].smem_start +
 854                                         win->area[0].y_offset;
 855                 win->area[0].uv_addr = win->area[0].cbr_start +
 856                                         win->area[0].c_offset;
 857                 if (win->area[0].y_addr)
 858                         lcdc_layer_update_regs(lcdc_dev, win);
 859                 /*lcdc_cfg_done(lcdc_dev);*/
 860         }
 861         spin_unlock(&lcdc_dev->reg_lock);
 862
 863         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
 864             lcdc_dev->id, __func__, win->area[0].y_addr,
 865             win->area[0].uv_addr, win->area[0].y_offset);
 866          /* this is the first frame of the system,
 867                 enable frame start interrupt*/
 868         if ((dev_drv->first_frame))  {
 869                 dev_drv->first_frame = 0;
 870                 rk3036_lcdc_enable_irq(dev_drv);
 871         }
 872         return 0;
 873 }
 874
 875 static int rk3036_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
 876                              unsigned long arg, int win_id)
 877 {
 878         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 879                                         struct lcdc_device, driver);
 880         u32 panel_size[2];
 881         void __user *argp = (void __user *)arg;
 882         struct color_key_cfg clr_key_cfg;
 883
 884         switch (cmd) {
 885         case RK_FBIOGET_PANEL_SIZE:
 886                 panel_size[0] = lcdc_dev->screen->mode.xres;
 887                 panel_size[1] = lcdc_dev->screen->mode.yres;
 888                 if (copy_to_user(argp, panel_size, 8))
 889                         return -EFAULT;
 890                 break;
 891         case RK_FBIOPUT_COLOR_KEY_CFG:
 892                 if (copy_from_user(&clr_key_cfg, argp,
 893                                    sizeof(struct color_key_cfg)))
 894                         return -EFAULT;
 895                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
 896                             clr_key_cfg.win0_color_key_cfg);
 897                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
 898                             clr_key_cfg.win1_color_key_cfg);
 899                 break;
 900
 901         default:
 902                 break;
 903         }
 904         return 0;
 905 }
 906
 907 static int rk3036_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
 908                                   const char *id)
 909 {
 910         int win_id = 0;
 911
 912         mutex_lock(&dev_drv->fb_win_id_mutex);
 913         if (!strcmp(id, "fb0"))
 914                 win_id = dev_drv->fb0_win_id;
 915         else if (!strcmp(id, "fb1"))
 916                 win_id = dev_drv->fb1_win_id;
 917         else if (!strcmp(id, "fb2"))
 918                 win_id = dev_drv->fb2_win_id;
 919         mutex_unlock(&dev_drv->fb_win_id_mutex);
 920
 921         return win_id;
 922 }
 923
 924 static int rk3036_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv,
 925                                      int win_id)
 926 {
 927         return dev_drv->win[win_id]->state;
 928 }
 929
 930 static int rk3036_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
 931                                bool set)
 932 {
 933         struct lcdc_device *lcdc_dev =
 934             container_of(dev_drv, struct lcdc_device, driver);
 935         int ovl;
 936
 937         spin_lock(&lcdc_dev->reg_lock);
 938         if (lcdc_dev->clk_on) {
 939                 if (set) {
 940                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
 941                                      v_WIN0_TOP(swap));
 942                         ovl = swap;
 943                 } else {
 944                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
 945                 }
 946         } else {
 947                 ovl = -EPERM;
 948         }
 949         spin_unlock(&lcdc_dev->reg_lock);
 950
 951         return ovl;
 952 }
 953
 954 static int rk3036_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
 955 {
 956         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 957                                         struct lcdc_device, driver);
 958         if (dev_drv->suspend_flag)
 959                 return 0;
 960         dev_drv->suspend_flag = 1;
 961         flush_kthread_worker(&dev_drv->update_regs_worker);
 962
 963         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
 964                 dev_drv->trsm_ops->disable();
 965         spin_lock(&lcdc_dev->reg_lock);
 966         if (likely(lcdc_dev->clk_on)) {
 967                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
 968                              v_BLANK_EN(1));
 969                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
 970                              v_FS_INT_CLEAR(1));
 971                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
 972                              v_DSP_OUT_ZERO(1));
 973                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 974                              v_LCDC_STANDBY(1));
 975                 lcdc_cfg_done(lcdc_dev);
 976                 if (dev_drv->iommu_enabled) {
 977                         if (dev_drv->mmu_dev)
 978                                 rockchip_iovmm_deactivate(dev_drv->dev);
 979                 }
 980                 spin_unlock(&lcdc_dev->reg_lock);
 981         } else {
 982                 spin_unlock(&lcdc_dev->reg_lock);
 983                 return 0;
 984         }
 985         rk3036_lcdc_clk_disable(lcdc_dev);
 986         rk_disp_pwr_disable(dev_drv);
 987         return 0;
 988 }
 989
 990 static int rk3036_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
 991 {
 992         struct lcdc_device *lcdc_dev =
 993             container_of(dev_drv, struct lcdc_device, driver);
 994
 995         if (!dev_drv->suspend_flag)
 996                 return 0;
 997         rk_disp_pwr_enable(dev_drv);
 998         dev_drv->suspend_flag = 0;
 999
1000         if (lcdc_dev->atv_layer_cnt) {
1001                 rk3036_lcdc_clk_enable(lcdc_dev);
1002                 rk3036_lcdc_reg_restore(lcdc_dev);
1003
1004                 spin_lock(&lcdc_dev->reg_lock);
1005
1006                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1007                              v_DSP_OUT_ZERO(0));
1008                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1009                              v_LCDC_STANDBY(0));
1010                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
1011                              v_BLANK_EN(0));
1012                 lcdc_cfg_done(lcdc_dev);
1013                 if (dev_drv->iommu_enabled) {
1014                         if (dev_drv->mmu_dev)
1015                                 rockchip_iovmm_activate(dev_drv->dev);
1016                 }
1017                 spin_unlock(&lcdc_dev->reg_lock);
1018         }
1019
1020         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1021                 dev_drv->trsm_ops->enable();
1022         return 0;
1023 }
1024
1025
1026 static int rk3036_lcdc_blank(struct rk_lcdc_driver *dev_drv,
1027                              int win_id, int blank_mode)
1028 {
1029         switch (blank_mode) {
1030         case FB_BLANK_UNBLANK:
1031                 rk3036_lcdc_early_resume(dev_drv);
1032                 break;
1033         case FB_BLANK_NORMAL:
1034                 rk3036_lcdc_early_suspend(dev_drv);
1035                 break;
1036         default:
1037                 rk3036_lcdc_early_suspend(dev_drv);
1038                 break;
1039         }
1040
1041         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
1042
1043         return 0;
1044 }
1045
1046 static int rk3036_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
1047 {
1048         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1049                                         struct lcdc_device, driver);
1050
1051         spin_lock(&lcdc_dev->reg_lock);
1052         if (lcdc_dev->clk_on) {
1053                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1054                              v_LCDC_STANDBY(lcdc_dev->standby));
1055                 lcdc_cfg_done(lcdc_dev);
1056         }
1057         spin_unlock(&lcdc_dev->reg_lock);
1058         return 0;
1059 }
1060
1061 /*
1062         a:[-30~0]:
1063             sin_hue = sin(a)*256 +0x100;
1064             cos_hue = cos(a)*256;
1065         a:[0~30]
1066             sin_hue = sin(a)*256;
1067             cos_hue = cos(a)*256;
1068 */
1069 static int rk3036_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1070                                     bcsh_hue_mode mode)
1071 {
1072         struct lcdc_device *lcdc_dev =
1073             container_of(dev_drv, struct lcdc_device, driver);
1074         u32 val;
1075
1076         spin_lock(&lcdc_dev->reg_lock);
1077         if (lcdc_dev->clk_on) {
1078                 val = lcdc_readl(lcdc_dev, BCSH_H);
1079                 switch (mode) {
1080                 case H_SIN:
1081                         val &= m_BCSH_SIN_HUE;
1082                         break;
1083                 case H_COS:
1084                         val &= m_BCSH_COS_HUE;
1085                         val >>= 8;
1086                         break;
1087                 default:
1088                         break;
1089                 }
1090         }
1091         spin_unlock(&lcdc_dev->reg_lock);
1092
1093         return val;
1094 }
1095
1096
1097 static int rk3036_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1098                                     int sin_hue, int cos_hue)
1099 {
1100         struct lcdc_device *lcdc_dev =
1101             container_of(dev_drv, struct lcdc_device, driver);
1102         u32 mask, val;
1103
1104         spin_lock(&lcdc_dev->reg_lock);
1105         if (lcdc_dev->clk_on) {
1106                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
1107                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
1108                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
1109                 lcdc_cfg_done(lcdc_dev);
1110         }
1111         spin_unlock(&lcdc_dev->reg_lock);
1112
1113         return 0;
1114 }
1115
1116 static int rk3036_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1117                                     bcsh_bcs_mode mode, int value)
1118 {
1119         struct lcdc_device *lcdc_dev =
1120             container_of(dev_drv, struct lcdc_device, driver);
1121         u32 mask, val;
1122
1123         spin_lock(&lcdc_dev->reg_lock);
1124         if (lcdc_dev->clk_on) {
1125                 switch (mode) {
1126                 case BRIGHTNESS:
1127                 /*from 0 to 255,typical is 128*/
1128                         if (value < 0x20)
1129                                 value += 0x20;
1130                         else if (value >= 0x20)
1131                                 value = value - 0x20;
1132                         mask =  m_BCSH_BRIGHTNESS;
1133                         val = v_BCSH_BRIGHTNESS(value);
1134                         break;
1135                 case CONTRAST:
1136                 /*from 0 to 510,typical is 256*/
1137                         mask =  m_BCSH_CONTRAST;
1138                         val =  v_BCSH_CONTRAST(value);
1139                         break;
1140                 case SAT_CON:
1141                 /*from 0 to 1015,typical is 256*/
1142                         mask = m_BCSH_SAT_CON;
1143                         val = v_BCSH_SAT_CON(value);
1144                         break;
1145                 default:
1146                         break;
1147                 }
1148                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
1149                 lcdc_cfg_done(lcdc_dev);
1150         }
1151         spin_unlock(&lcdc_dev->reg_lock);
1152         return val;
1153 }
1154
1155 static int rk3036_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1156                                     bcsh_bcs_mode mode)
1157 {
1158         struct lcdc_device *lcdc_dev =
1159             container_of(dev_drv, struct lcdc_device, driver);
1160         u32 val;
1161
1162         spin_lock(&lcdc_dev->reg_lock);
1163         if (lcdc_dev->clk_on) {
1164                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1165                 switch (mode) {
1166                 case BRIGHTNESS:
1167                         val &= m_BCSH_BRIGHTNESS;
1168                         if (val > 0x20)
1169                                 val -= 0x20;
1170                         else if (val == 0x20)
1171                                 val = -32;
1172                         break;
1173                 case CONTRAST:
1174                         val &= m_BCSH_CONTRAST;
1175                         val >>= 8;
1176                         break;
1177                 case SAT_CON:
1178                         val &= m_BCSH_SAT_CON;
1179                         val >>= 16;
1180                         break;
1181                 default:
1182                         break;
1183                 }
1184         }
1185         spin_unlock(&lcdc_dev->reg_lock);
1186         return val;
1187 }
1188
1189
1190 static int rk3036_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1191 {
1192         struct lcdc_device *lcdc_dev =
1193             container_of(dev_drv, struct lcdc_device, driver);
1194         u32 mask, val;
1195
1196         spin_lock(&lcdc_dev->reg_lock);
1197         if (lcdc_dev->clk_on) {
1198                 if (open) {
1199                         lcdc_writel(lcdc_dev, BCSH_CTRL,
1200                                     v_BCSH_EN(1) | v_BCSH_OUT_MODE(3));
1201                         lcdc_writel(lcdc_dev, BCSH_BCS,
1202                                     v_BCSH_BRIGHTNESS(0x00) |
1203                                     v_BCSH_CONTRAST(0x80) |
1204                                     v_BCSH_SAT_CON(0x80));
1205                         lcdc_writel(lcdc_dev, BCSH_H, v_BCSH_COS_HUE(0x80));
1206                 } else {
1207                         mask = m_BCSH_EN;
1208                         val = v_BCSH_EN(0);
1209                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1210                 }
1211                 lcdc_cfg_done(lcdc_dev);
1212         }
1213         spin_unlock(&lcdc_dev->reg_lock);
1214         return 0;
1215 }
1216
1217 static int rk3036_lcdc_set_overscan(struct rk_lcdc_driver *dev_drv,
1218                                     struct overscan *overscan)
1219 {
1220         int i;
1221
1222         dev_drv->overscan = *overscan;
1223         for (i = 0; i < dev_drv->lcdc_win_num; i++) {
1224                 if (dev_drv->win[i] && dev_drv->win[i]->state) {
1225                         rk3036_lcdc_set_par(dev_drv, i);
1226                         rk3036_lcdc_pan_display(dev_drv, i);
1227                 }
1228         }
1229         rk3036_lcdc_cfg_done(dev_drv);
1230         return 0;
1231 }
1232
1233 static int rk3036_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1234                                enum fb_win_map_order order)
1235 {
1236         mutex_lock(&dev_drv->fb_win_id_mutex);
1237         if (order == FB_DEFAULT_ORDER)
1238                 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
1239         dev_drv->fb2_win_id = order / 100;
1240         dev_drv->fb1_win_id = (order / 10) % 10;
1241         dev_drv->fb0_win_id = order % 10;
1242         mutex_unlock(&dev_drv->fb_win_id_mutex);
1243
1244         return 0;
1245 }
1246
1247 static int rk3036_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1248                                bool set)
1249 {
1250         struct lcdc_device *lcdc_dev =
1251             container_of(dev_drv, struct lcdc_device, driver);
1252         struct rk_screen *screen = dev_drv->cur_screen;
1253         u64 ft = 0;
1254         u32 dotclk;
1255         int ret;
1256         u32 pixclock;
1257         u32 x_total, y_total;
1258
1259         if (set) {
1260                 ft = div_u64(1000000000000llu, fps);
1261                 x_total =
1262                     screen->mode.upper_margin + screen->mode.lower_margin +
1263                     screen->mode.yres + screen->mode.vsync_len;
1264                 y_total =
1265                     screen->mode.left_margin + screen->mode.right_margin +
1266                     screen->mode.xres + screen->mode.hsync_len;
1267                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1268                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1269                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1270         }
1271
1272         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1273         lcdc_dev->pixclock = pixclock;
1274         dev_drv->pixclock = pixclock;
1275         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1276         screen->ft = 1000 / fps;        /*one frame time in ms */
1277
1278         if (set)
1279                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1280                          clk_get_rate(lcdc_dev->dclk), fps);
1281
1282         return fps;
1283 }
1284
1285 static int rk3036_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1286 {
1287         struct lcdc_device *lcdc_dev =
1288             container_of(dev_drv, struct lcdc_device, driver);
1289         u32 int_reg;
1290         int ret;
1291
1292         if (lcdc_dev->clk_on) {
1293                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1294                 if (int_reg & m_LF_INT_STA) {
1295                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1296                                      v_LF_INT_CLEAR(1));
1297                         ret = RK_LF_STATUS_FC;
1298                 } else {
1299                         ret = RK_LF_STATUS_FR;
1300                 }
1301         } else {
1302                 ret = RK_LF_STATUS_NC;
1303         }
1304
1305         return ret;
1306 }
1307
1308 static int rk3036_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
1309                                     unsigned int *dsp_addr)
1310 {
1311         struct lcdc_device *lcdc_dev =
1312             container_of(dev_drv, struct lcdc_device, driver);
1313
1314         if (lcdc_dev->clk_on) {
1315                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1316                 dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1317         }
1318         return 0;
1319 }
1320
1321 static ssize_t rk3036_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1322                                          char *buf, int win_id)
1323 {
1324         struct rk_lcdc_win *win = NULL;
1325         char fmt[9] = "NULL";
1326         u32     size;
1327
1328         if (win_id < ARRAY_SIZE(lcdc_win)) {
1329                 win = dev_drv->win[win_id];
1330         } else {
1331                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
1332                 return 0;
1333         }
1334
1335         size = snprintf(buf, PAGE_SIZE, "win%d: %s\n", win_id,
1336                         get_format_string(win->format, fmt));
1337         size += snprintf(buf + size, PAGE_SIZE - size,
1338                          "      xact %d yact %d xvir %d yvir %d\n",
1339                 win->area[0].xact, win->area[0].yact,
1340                 win->area[0].xvir, win->area[0].yvir);
1341         size += snprintf(buf + size, PAGE_SIZE - size,
1342                          "      xpos %d ypos %d xsize %d ysize %d\n",
1343                 win->area[0].xpos, win->area[0].ypos,
1344                 win->area[0].xsize, win->area[0].ysize);
1345         size += snprintf(buf + size, PAGE_SIZE - size,
1346                          "      yaddr 0x%x uvaddr 0x%x\n",
1347                 win->area[0].y_addr, win->area[0].uv_addr);
1348         return size;
1349 }
1350
1351 static int rk3036_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1352 {
1353         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1354                                                 struct lcdc_device,
1355                                                 driver);
1356         int *cbase = (int *)lcdc_dev->regs;
1357         int *regsbak = (int *)lcdc_dev->regsbak;
1358         int i, j;
1359
1360         dev_info(dev_drv->dev, "back up reg:\n");
1361         for (i = 0; i <= (0xDC >> 4); i++) {
1362                 for (j = 0; j < 4; j++)
1363                         dev_info(dev_drv->dev, "%08x  ",
1364                                  *(regsbak + i * 4 + j));
1365                 dev_info(dev_drv->dev, "\n");
1366         }
1367
1368         dev_info(dev_drv->dev, "lcdc reg:\n");
1369         for (i = 0; i <= (0xDC >> 4); i++) {
1370                 for (j = 0; j < 4; j++)
1371                         dev_info(dev_drv->dev, "%08x  ",
1372                                  readl_relaxed(cbase + i * 4 + j));
1373                 dev_info(dev_drv->dev, "\n");
1374         }
1375         return 0;
1376 }
1377
1378 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1379         .open                   = rk3036_lcdc_open,
1380         .load_screen            = rk3036_load_screen,
1381         .set_par                = rk3036_lcdc_set_par,
1382         .pan_display            = rk3036_lcdc_pan_display,
1383         .blank                  = rk3036_lcdc_blank,
1384         .ioctl                  = rk3036_lcdc_ioctl,
1385         .get_win_state          = rk3036_lcdc_get_win_state,
1386         .ovl_mgr                = rk3036_lcdc_ovl_mgr,
1387         .get_disp_info          = rk3036_lcdc_get_disp_info,
1388         .fps_mgr                = rk3036_lcdc_fps_mgr,
1389         .fb_get_win_id          = rk3036_lcdc_get_win_id,
1390         .fb_win_remap           = rk3036_fb_win_remap,
1391         .poll_vblank            = rk3036_lcdc_poll_vblank,
1392         .get_dsp_addr           = rk3036_lcdc_get_dsp_addr,
1393         .cfg_done               = rk3036_lcdc_cfg_done,
1394         .dump_reg               = rk3036_lcdc_reg_dump,
1395         .set_dsp_bcsh_hue       = rk3036_lcdc_set_bcsh_hue,
1396         .set_dsp_bcsh_bcs       = rk3036_lcdc_set_bcsh_bcs,
1397         .get_dsp_bcsh_hue       = rk3036_lcdc_get_bcsh_hue,
1398         .get_dsp_bcsh_bcs       = rk3036_lcdc_get_bcsh_bcs,
1399         .open_bcsh              = rk3036_lcdc_open_bcsh,
1400         .set_overscan           = rk3036_lcdc_set_overscan,
1401 };
1402
1403 static int rk3036_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1404 {
1405 #if defined(CONFIG_ROCKCHIP_IOMMU)
1406         struct device_node *np = lcdc_dev->dev->of_node;
1407         int val;
1408
1409         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1410                 lcdc_dev->driver.iommu_enabled = 0;
1411         else
1412                 lcdc_dev->driver.iommu_enabled = val;
1413 #else
1414         lcdc_dev->driver.iommu_enabled = 0;
1415 #endif
1416         return 0;
1417 }
1418
1419 static int rk3036_lcdc_probe(struct platform_device *pdev)
1420 {
1421         struct lcdc_device *lcdc_dev = NULL;
1422         struct rk_lcdc_driver *dev_drv;
1423         struct device *dev = &pdev->dev;
1424         struct resource *res;
1425         int ret;
1426
1427         lcdc_dev = devm_kzalloc(dev,
1428                                 sizeof(struct lcdc_device), GFP_KERNEL);
1429         if (!lcdc_dev) {
1430                 dev_err(&pdev->dev, "rk3036 lcdc device kmalloc fail!");
1431                 return -ENOMEM;
1432         }
1433         platform_set_drvdata(pdev, lcdc_dev);
1434         lcdc_dev->dev = dev;
1435         rk3036_lcdc_parse_dt(lcdc_dev);
1436
1437         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1438         lcdc_dev->reg_phy_base = res->start;
1439         lcdc_dev->len = resource_size(res);
1440         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1441         if (IS_ERR(lcdc_dev->regs))
1442                 return PTR_ERR(lcdc_dev->regs);
1443
1444         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1445         if (IS_ERR(lcdc_dev->regsbak))
1446                 return PTR_ERR(lcdc_dev->regsbak);
1447
1448         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1449         dev_drv = &lcdc_dev->driver;
1450         dev_drv->dev = dev;
1451         dev_drv->prop = PRMRY;
1452         dev_drv->id = lcdc_dev->id;
1453         dev_drv->ops = &lcdc_drv_ops;
1454         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1455         spin_lock_init(&lcdc_dev->reg_lock);
1456
1457         lcdc_dev->irq = platform_get_irq(pdev, 0);
1458         if (lcdc_dev->irq < 0) {
1459                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1460                         lcdc_dev->id);
1461                 return -ENXIO;
1462         }
1463
1464         ret = devm_request_irq(dev, lcdc_dev->irq, rk3036_lcdc_isr,
1465                                IRQF_DISABLED | IRQF_SHARED,
1466                                dev_name(dev), lcdc_dev);
1467         if (ret) {
1468                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1469                         lcdc_dev->irq, ret);
1470                 return ret;
1471         }
1472
1473         if (dev_drv->iommu_enabled)
1474                 strcpy(dev_drv->mmu_dts_name, VOP_IOMMU_COMPATIBLE_NAME);
1475
1476         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1477         if (ret < 0) {
1478                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1479                 return ret;
1480         }
1481         lcdc_dev->screen = dev_drv->screen0;
1482
1483         dev_info(dev, "lcdc probe ok, iommu %s\n",
1484                  dev_drv->iommu_enabled ? "enabled" : "disabled");
1485
1486         return 0;
1487 }
1488
1489 #if defined(CONFIG_PM)
1490 static int rk3036_lcdc_suspend(struct platform_device *pdev,
1491                                pm_message_t state)
1492 {
1493         return 0;
1494 }
1495
1496 static int rk3036_lcdc_resume(struct platform_device *pdev)
1497 {
1498         return 0;
1499 }
1500 #else
1501 #define rk3036_lcdc_suspend NULL
1502 #define rk3036_lcdc_resume  NULL
1503 #endif
1504
1505 static int rk3036_lcdc_remove(struct platform_device *pdev)
1506 {
1507         return 0;
1508 }
1509
1510 static void rk3036_lcdc_shutdown(struct platform_device *pdev)
1511 {
1512 }
1513
1514 #if defined(CONFIG_OF)
1515 static const struct of_device_id rk3036_lcdc_dt_ids[] = {
1516         {.compatible = "rockchip,rk3036-lcdc",},
1517         {}
1518 };
1519 #endif
1520
1521 static struct platform_driver rk3036_lcdc_driver = {
1522         .probe = rk3036_lcdc_probe,
1523         .remove = rk3036_lcdc_remove,
1524         .driver = {
1525                 .name = "rk3036-lcdc",
1526                 .owner = THIS_MODULE,
1527                 .of_match_table = of_match_ptr(rk3036_lcdc_dt_ids),
1528         },
1529         .suspend = rk3036_lcdc_suspend,
1530         .resume = rk3036_lcdc_resume,
1531         .shutdown = rk3036_lcdc_shutdown,
1532 };
1533
1534 static int __init rk3036_lcdc_module_init(void)
1535 {
1536         return platform_driver_register(&rk3036_lcdc_driver);
1537 }
1538
1539 static void __exit rk3036_lcdc_module_exit(void)
1540 {
1541         platform_driver_unregister(&rk3036_lcdc_driver);
1542 }
1543
1544 fs_initcall(rk3036_lcdc_module_init);
1545 module_exit(rk3036_lcdc_module_exit);