2 * drivers/video/rockchip/lcdc/rk3036_lcdc.c
4 * Copyright (C) 2014 ROCKCHIP, Inc.
5 * Author:zhengyang<zhengyang@rock-chips.com>
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/string.h>
22 #include <linux/slab.h>
23 #include <linux/device.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/platform_device.h>
28 #include <linux/clk.h>
29 #include <asm/div64.h>
30 #include <asm/uaccess.h>
31 #include <linux/rockchip/cpu.h>
32 #include <linux/rockchip/iomap.h>
33 #include <linux/rockchip/grf.h>
34 #include <linux/rockchip/common.h>
35 #include <dt-bindings/clock/rk_system_status.h>
36 #if defined(CONFIG_ION_ROCKCHIP)
37 #include <linux/rockchip/iovmm.h>
38 #include <linux/rockchip/sysmmu.h>
40 #include "rk3036_lcdc.h"
42 static int dbg_thresd;
43 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
45 #define DBG(level, x...) do { \
46 if (unlikely(dbg_thresd >= level)) \
47 printk(KERN_INFO x); } while (0)
49 static struct rk_lcdc_win lcdc_win[] = {
67 static irqreturn_t rk3036_lcdc_isr(int irq, void *dev_id)
69 struct lcdc_device *lcdc_dev =
70 (struct lcdc_device *)dev_id;
71 ktime_t timestamp = ktime_get();
72 u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
74 if (int_reg & m_FS_INT_STA) {
75 timestamp = ktime_get();
76 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
78 //if (lcdc_dev->driver.wait_fs) {
80 spin_lock(&(lcdc_dev->driver.cpl_lock));
81 complete(&(lcdc_dev->driver.frame_done));
82 spin_unlock(&(lcdc_dev->driver.cpl_lock));
84 lcdc_dev->driver.vsync_info.timestamp = timestamp;
85 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
87 } else if (int_reg & m_LF_INT_STA) {
88 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
94 static int rk3036_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
100 if (!lcdc_dev->clk_on) {
101 clk_prepare_enable(lcdc_dev->hclk);
102 clk_prepare_enable(lcdc_dev->dclk);
103 clk_prepare_enable(lcdc_dev->aclk);
104 // clk_prepare_enable(lcdc_dev->pd);
105 spin_lock(&lcdc_dev->reg_lock);
106 lcdc_dev->clk_on = 1;
107 spin_unlock(&lcdc_dev->reg_lock);
113 static int rk3036_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
115 #ifdef CONFIG_RK_FPGA
116 lcdc_dev->clk_on = 0;
119 if (lcdc_dev->clk_on) {
120 spin_lock(&lcdc_dev->reg_lock);
121 lcdc_dev->clk_on = 0;
122 spin_unlock(&lcdc_dev->reg_lock);
124 clk_disable_unprepare(lcdc_dev->dclk);
125 clk_disable_unprepare(lcdc_dev->hclk);
126 clk_disable_unprepare(lcdc_dev->aclk);
127 // clk_disable_unprepare(lcdc_dev->pd);
133 static int rk3036_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
136 struct lcdc_device *lcdc_dev = container_of(dev_drv,
137 struct lcdc_device, driver);
138 mask = m_FS_INT_CLEAR |m_FS_INT_EN;
139 val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1);
140 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
144 static int rk3036_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
147 spin_lock(&lcdc_dev->reg_lock);
148 if (likely(lcdc_dev->clk_on)) {
149 mask = m_FS_INT_CLEAR |m_FS_INT_EN;
150 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0);
151 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
152 spin_unlock(&lcdc_dev->reg_lock);
154 spin_unlock(&lcdc_dev->reg_lock);
160 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device
166 spin_lock(&lcdc_dev->reg_lock);
167 for (reg = 0; reg < 0xdc; reg += 4) {
168 value = lcdc_readl(lcdc_dev, reg);
170 spin_unlock(&lcdc_dev->reg_lock);
173 static int rk3036_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
178 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev, struct rk_lcdc_win *win) {
184 mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
185 val = v_WIN0_EN(win->state) | v_WIN0_FORMAT(win->fmt_cfg) | v_WIN0_RB_SWAP(win->swap_rb);
186 lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
188 lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
189 v_X_SCL_FACTOR(win->scale_yrgb_x) |
190 v_Y_SCL_FACTOR(win->scale_yrgb_y));
191 lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
192 v_X_SCL_FACTOR(win->scale_cbcr_x) |
193 v_Y_SCL_FACTOR(win->scale_cbcr_y));
195 lcdc_msk_reg(lcdc_dev, WIN0_VIR, m_YRGB_VIR | m_CBBR_VIR,
196 v_YRGB_VIR(win->area[0].y_vir_stride) | v_YRGB_VIR(win->area[0].uv_vir_stride));
197 lcdc_writel(lcdc_dev, WIN0_ACT_INFO, v_ACT_WIDTH(win->area[0].xact) |
198 v_ACT_HEIGHT(win->area[0].yact));
199 lcdc_writel(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(win->area[0].dsp_stx) |
200 v_DSP_STY(win->area[0].dsp_sty));
201 lcdc_writel(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(win->area[0].xsize) |
202 v_DSP_HEIGHT(win->area[0].ysize));
204 lcdc_writel(lcdc_dev, WIN0_YRGB_MST, win->area[0].y_addr);
205 lcdc_writel(lcdc_dev, WIN0_CBR_MST, win->area[0].uv_addr);
207 else if(win->id == 1) {
208 mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
209 val = v_WIN1_EN(win->state) | v_WIN1_FORMAT(win->fmt_cfg) | v_WIN1_RB_SWAP(win->swap_rb);
210 lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
212 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
213 v_X_SCL_FACTOR(win->scale_yrgb_x) |
214 v_Y_SCL_FACTOR(win->scale_yrgb_y));
216 lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR, v_YRGB_VIR(win->area[0].y_vir_stride));
217 lcdc_writel(lcdc_dev, WIN1_ACT_INFO, v_ACT_WIDTH(win->area[0].xact) |
218 v_ACT_HEIGHT(win->area[0].yact));
219 lcdc_writel(lcdc_dev, WIN1_DSP_INFO, v_DSP_WIDTH(win->area[0].xsize) |
220 v_DSP_HEIGHT(win->area[0].ysize));
221 lcdc_writel(lcdc_dev, WIN1_DSP_ST, v_DSP_STX(win->area[0].dsp_stx) |
222 v_DSP_STY(win->area[0].dsp_sty));
224 lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
227 else if(win->id == 2) {
230 win->area[0].y_addr = 0;
231 win->area[0].uv_addr = 0;
233 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN0_EN, v_WIN0_EN(0));
235 else if(win->id == 1)
236 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN1_EN, v_WIN1_EN(0));
237 else if(win->id == 2)
238 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
242 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev, unsigned int win_id, bool open)
244 spin_lock(&lcdc_dev->reg_lock);
245 if (likely(lcdc_dev->clk_on) && lcdc_dev->driver.win[win_id]->state != open) {
247 if (!lcdc_dev->atv_layer_cnt) {
248 dev_info(lcdc_dev->dev, "wakeup from standby!\n");
249 lcdc_dev->standby = 0;
251 lcdc_dev->atv_layer_cnt++;
252 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
253 lcdc_dev->atv_layer_cnt--;
255 lcdc_dev->driver.win[win_id]->state = open;
257 lcdc_layer_update_regs(lcdc_dev, lcdc_dev->driver.win[win_id]);
258 lcdc_cfg_done(lcdc_dev);
260 /*if no layer used,disable lcdc*/
261 if (!lcdc_dev->atv_layer_cnt) {
262 dev_info(lcdc_dev->dev, "no layer is used,go to standby!\n");
263 lcdc_dev->standby = 1;
266 spin_unlock(&lcdc_dev->reg_lock);
269 static int rk3036_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
271 struct lcdc_device *lcdc_dev =
272 container_of(dev_drv, struct lcdc_device, driver);
273 struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
274 struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
277 spin_lock(&lcdc_dev->reg_lock);
278 if (likely(lcdc_dev->clk_on)) {
279 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
280 v_LCDC_STANDBY(lcdc_dev->standby));
281 lcdc_layer_update_regs(lcdc_dev, win0);
282 lcdc_layer_update_regs(lcdc_dev, win1);
283 rk3036_lcdc_alpha_cfg(lcdc_dev);
284 lcdc_cfg_done(lcdc_dev);
287 spin_unlock(&lcdc_dev->reg_lock);
288 //if (dev_drv->wait_fs) {
290 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
291 init_completion(&dev_drv->frame_done);
292 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
293 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
295 (dev_drv->cur_screen->ft +
297 if (!timeout && (!dev_drv->frame_done.done)) {
298 dev_warn(lcdc_dev->dev, "wait for new frame start time out!\n");
302 DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
307 static void rk3036_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
309 memcpy((u8 *) lcdc_dev->regs, (u8 *) lcdc_dev->regsbak, 0xdc);
312 static void rk3036_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
315 struct lcdc_device *lcdc_dev =
316 container_of(dev_drv, struct lcdc_device, driver);
317 spin_lock(&lcdc_dev->reg_lock);
318 if (likely(lcdc_dev->clk_on)) {
319 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN | m_AXI_OUTSTANDING_MAX_NUM;;
320 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) | v_AXI_MAX_OUTSTANDING_EN(1);
321 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
323 spin_unlock(&lcdc_dev->reg_lock);
326 static int rk3036_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
328 #ifdef CONFIG_RK_FPGA
332 struct lcdc_device *lcdc_dev =
333 container_of(dev_drv, struct lcdc_device, driver);
334 struct rk_screen *screen = dev_drv->cur_screen;
336 ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
338 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
340 div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
341 lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
343 fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
344 screen->ft = 1000 / fps;
345 dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
346 lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
351 /********do basic init*********/
352 static int rk3036_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
354 struct lcdc_device *lcdc_dev = container_of(dev_drv,
355 struct lcdc_device, driver);
356 if (lcdc_dev->pre_init)
359 lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
360 lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
361 lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
362 // lcdc_dev->pd = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
364 if (/*IS_ERR(lcdc_dev->pd) ||*/ (IS_ERR(lcdc_dev->aclk)) ||
365 (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
366 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
370 rk_disp_pwr_enable(dev_drv);
371 rk3036_lcdc_clk_enable(lcdc_dev);
373 /*backup reg config at uboot*/
374 rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
375 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN,v_AUTO_GATING_EN(0));
376 lcdc_cfg_done(lcdc_dev);
377 if (dev_drv->iommu_enabled) /*disable win0 to workaround iommu pagefault*/
378 lcdc_layer_enable(lcdc_dev, 0, 0);
379 lcdc_dev->pre_init = true;
384 static int rk3036_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
389 struct lcdc_device *lcdc_dev = container_of(dev_drv,
390 struct lcdc_device, driver);
391 struct rk_screen *screen = dev_drv->cur_screen;
392 u16 right_margin = screen->mode.right_margin;
393 u16 left_margin = screen->mode.left_margin;
394 u16 lower_margin = screen->mode.lower_margin;
395 u16 upper_margin = screen->mode.upper_margin;
396 u16 x_res = screen->mode.xres;
397 u16 y_res = screen->mode.yres;
400 spin_lock(&lcdc_dev->reg_lock);
401 if (likely(lcdc_dev->clk_on)) {
402 switch (screen->type) {
404 mask = m_HDMI_DCLK_EN;
405 val = v_HDMI_DCLK_EN(1);
406 if(screen->pixelrepeat) {
407 mask |= m_CORE_CLK_DIV_EN;
408 val |= v_CORE_CLK_DIV_EN(1);
410 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
413 mask = m_TVE_DAC_DCLK_EN;
414 val = v_TVE_DAC_DCLK_EN(1);
415 if(screen->pixelrepeat) {
416 mask |= m_CORE_CLK_DIV_EN;
417 val |= v_CORE_CLK_DIV_EN(1);
419 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
420 if(x_res == 720 && y_res == 576)
421 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE, v_TVE_MODE(TV_PAL));
422 else if(x_res == 720 && y_res == 480)
423 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE, v_TVE_MODE(TV_NTSC));
425 dev_err(lcdc_dev->dev, "unsupported video timing!\n");
430 dev_err(lcdc_dev->dev, "un supported interface!\n");
434 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
435 m_DEN_POL | m_DCLK_POL;
436 val = v_DSP_OUT_FORMAT(face) | v_HSYNC_POL(screen->pin_hsync) |
437 v_VSYNC_POL(screen->pin_vsync) | v_DEN_POL(screen->pin_den) |
438 v_DCLK_POL(screen->pin_dclk);
439 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
441 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
442 m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
443 m_DSP_DUMMY_SWAP | m_BLANK_EN;
445 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
446 v_DSP_RB_SWAP(screen->swap_rb) | v_DSP_RG_SWAP(screen->
448 v_DSP_DELTA_SWAP(screen->
449 swap_delta) | v_DSP_DUMMY_SWAP(screen->
451 v_BLANK_EN(0) | v_BLACK_EN(0);
452 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
454 v_HSYNC(screen->mode.hsync_len) | v_HORPRD(screen->mode.
459 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
460 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
461 v_HASP(screen->mode.hsync_len + left_margin);
462 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
464 if(screen->mode.vmode == FB_VMODE_INTERLACED) {
466 lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->mode.vsync_len) |
467 v_VERPRD(2 * (screen->mode.vsync_len + upper_margin + lower_margin) + y_res + 1));
468 lcdc_writel(lcdc_dev,DSP_VACT_ST_END,v_VAEP(screen->mode.vsync_len + upper_margin + y_res/2)|
469 v_VASP(screen->mode.vsync_len + upper_margin));
470 //Second Field Timing
471 lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1, v_VSYNC_ST_F1(screen->mode.vsync_len + upper_margin + y_res/2 + lower_margin) |
472 v_VSYNC_END_F1(2 * screen->mode.vsync_len + upper_margin + y_res/2 + lower_margin));
473 lcdc_writel(lcdc_dev,DSP_VACT_ST_END_F1,v_VAEP(2 * (screen->mode.vsync_len + upper_margin) + y_res + lower_margin + 1)|
474 v_VASP(2 * (screen->mode.vsync_len + upper_margin) + y_res/2 + lower_margin + 1));
476 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_INTERLACE_DSP_EN | m_WIN1_INTERLACE_EN | m_WIN0_YRGB_DEFLICK_EN | m_WIN0_CBR_DEFLICK_EN,
477 v_INTERLACE_DSP_EN(1) | v_WIN1_INTERLACE_EN(1) | v_WIN0_YRGB_DEFLICK_EN(1) | v_WIN0_CBR_DEFLICK_EN(1) );
479 val = v_VSYNC(screen->mode.vsync_len) |
480 v_VERPRD(screen->mode.vsync_len + upper_margin +
481 y_res + lower_margin);
482 lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
484 val = v_VAEP(screen->mode.vsync_len + upper_margin + y_res) |
485 v_VASP(screen->mode.vsync_len + screen->mode.upper_margin);
486 lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
488 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_INTERLACE_DSP_EN | m_WIN1_INTERLACE_EN | m_WIN0_YRGB_DEFLICK_EN | m_WIN0_CBR_DEFLICK_EN,
489 v_INTERLACE_DSP_EN(0) | v_WIN1_INTERLACE_EN(0) | v_WIN0_YRGB_DEFLICK_EN(0) | v_WIN0_CBR_DEFLICK_EN(0) );
493 spin_unlock(&lcdc_dev->reg_lock);
495 ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
497 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
499 div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
500 lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
502 fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
503 screen->ft = 1000 / fps;
504 dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
505 lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
506 if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
507 dev_drv->trsm_ops->enable();
514 static int rk3036_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
517 struct lcdc_device *lcdc_dev = container_of(dev_drv,
518 struct lcdc_device, driver);
520 /*enable clk,when first layer open */
521 if ((open) && (!lcdc_dev->atv_layer_cnt)) {
522 rk3036_lcdc_pre_init(dev_drv);
523 rk3036_lcdc_clk_enable(lcdc_dev);
524 #if defined(CONFIG_ROCKCHIP_IOMMU)
525 if(dev_drv->iommu_enabled) {
526 if(!dev_drv->mmu_dev) {
527 dev_drv->mmu_dev = rockchip_get_sysmmu_device_by_compatible(dev_drv->mmu_dts_name);
528 if (dev_drv->mmu_dev)
529 platform_set_sysmmu(dev_drv->mmu_dev, dev_drv->dev);
531 dev_err(dev_drv->dev, "failed to get rockchip iommu device\n");
535 iovmm_activate(dev_drv->dev);
538 rk3036_lcdc_reg_restore(lcdc_dev);
539 if (dev_drv->iommu_enabled)
540 rk3036_lcdc_mmu_en(dev_drv);
541 if ((support_uboot_display()&&(lcdc_dev->prop == PRMRY))) {
542 rk3036_lcdc_set_dclk(dev_drv);
543 rk3036_lcdc_enable_irq(dev_drv);
545 rk3036_load_screen(dev_drv, 1);
549 if(win_id < ARRAY_SIZE(lcdc_win)) {
550 lcdc_layer_enable(lcdc_dev, win_id, open);
553 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
555 /*when all layer closed,disable clk */
556 if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
557 rk3036_lcdc_disable_irq(lcdc_dev);
558 rk3036_lcdc_reg_update(dev_drv);
559 #if defined(CONFIG_ROCKCHIP_IOMMU)
560 if (dev_drv->iommu_enabled) {
561 // for (reg = MMU_DTE_ADDR; reg <= MMU_AUTO_GATING; reg +=4)
562 // lcdc_readl(lcdc_dev, reg);
564 iovmm_deactivate(dev_drv->dev);
567 rk3036_lcdc_clk_disable(lcdc_dev);
573 static int rk3036_lcdc_set_par(struct rk_lcdc_driver *dev_drv,int win_id)
575 struct lcdc_device *lcdc_dev = container_of(dev_drv,
576 struct lcdc_device, driver);
577 struct rk_screen *screen = dev_drv->cur_screen;
578 struct rk_lcdc_win *win = NULL;
579 char fmt[9] = "NULL";
582 dev_err(dev_drv->dev, "screen is null!\n");
587 win = dev_drv->win[0];
588 } else if (win_id == 1) {
589 win = dev_drv->win[1];
591 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
595 spin_lock(&lcdc_dev->reg_lock);
596 win->area[0].dsp_stx = win->area[0].xpos + screen->mode.left_margin + screen->mode.hsync_len;
597 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
598 win->area[0].ysize /= 2;
599 win->area[0].dsp_sty = win->area[0].ypos/2+screen->mode.upper_margin + screen->mode.vsync_len;
601 win->area[0].dsp_sty = win->area[0].ypos + screen->mode.upper_margin + screen->mode.vsync_len;
603 win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
604 win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
605 switch (win->format) {
607 win->fmt_cfg = VOP_FORMAT_ARGB888;
611 win->fmt_cfg = VOP_FORMAT_ARGB888;
615 win->fmt_cfg = VOP_FORMAT_ARGB888;
619 win->fmt_cfg = VOP_FORMAT_RGB888;
623 win->fmt_cfg = VOP_FORMAT_RGB565;
628 win->fmt_cfg = VOP_FORMAT_YCBCR444;
629 win->scale_cbcr_x = CalScale(win->area[0].xact, win->area[0].xsize);
630 win->scale_cbcr_y = CalScale(win->area[0].yact, win->area[0].ysize);
633 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
639 win->fmt_cfg = VOP_FORMAT_YCBCR422;
640 win->scale_cbcr_x = CalScale((win->area[0].xact / 2), win->area[0].xsize);
641 win->scale_cbcr_y = CalScale(win->area[0].yact, win->area[0].ysize);
644 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
650 win->fmt_cfg = VOP_FORMAT_YCBCR420;
651 win->scale_cbcr_x = CalScale(win->area[0].xact / 2, win->area[0].xsize);
652 win->scale_cbcr_y = CalScale(win->area[0].yact / 2, win->area[0].ysize);
656 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
661 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
665 spin_unlock(&lcdc_dev->reg_lock);
667 DBG(1, "lcdc%d>>%s\n>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
668 ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id,
669 __func__, get_format_string(win->format, fmt), win->area[0].xact,
670 win->area[0].yact, win->area[0].xsize, win->area[0].ysize, win->area[0].xvir,
671 win->area[0].yvir, win->area[0].xpos, win->area[0].ypos);
675 static int rk3036_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
677 struct lcdc_device *lcdc_dev = container_of(dev_drv,
678 struct lcdc_device, driver);
679 struct rk_lcdc_win *win = NULL;
680 struct rk_screen *screen = dev_drv->cur_screen;
683 dev_err(dev_drv->dev,"screen is null!\n");
688 win = dev_drv->win[0];
689 } else if(win_id==1) {
690 win = dev_drv->win[1];
692 dev_err(dev_drv->dev,"invalid win number:%d!\n", win_id);
697 spin_lock(&lcdc_dev->reg_lock);
698 if (likely(lcdc_dev->clk_on)) {
699 win->area[0].y_addr = win->area[0].smem_start+win->area[0].y_offset;
700 win->area[0].uv_addr = win->area[0].cbr_start + win->area[0].c_offset;
701 if(win->area[0].y_addr)
702 lcdc_layer_update_regs(lcdc_dev, win);
703 /*lcdc_cfg_done(lcdc_dev);*/
705 spin_unlock(&lcdc_dev->reg_lock);
707 DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
708 lcdc_dev->id, __func__, win->area[0].y_addr, win->area[0].uv_addr,win->area[0].y_offset);
709 /*this is the first frame of the system ,enable frame start interrupt*/
710 if ((dev_drv->first_frame)) {
711 dev_drv->first_frame = 0;
712 rk3036_lcdc_enable_irq(dev_drv);
719 static int rk3036_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
720 unsigned long arg, int win_id)
722 struct lcdc_device *lcdc_dev = container_of(dev_drv,
723 struct lcdc_device, driver);
725 void __user *argp = (void __user *)arg;
726 struct color_key_cfg clr_key_cfg;
729 case RK_FBIOGET_PANEL_SIZE:
730 panel_size[0] = lcdc_dev->screen->mode.xres;
731 panel_size[1] = lcdc_dev->screen->mode.yres;
732 if (copy_to_user(argp, panel_size, 8))
735 case RK_FBIOPUT_COLOR_KEY_CFG:
736 if (copy_from_user(&clr_key_cfg, argp,
737 sizeof(struct color_key_cfg)))
739 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
740 clr_key_cfg.win0_color_key_cfg);
741 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
742 clr_key_cfg.win1_color_key_cfg);
751 static int rk3036_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
755 mutex_lock(&dev_drv->fb_win_id_mutex);
756 if (!strcmp(id, "fb0"))
757 win_id = dev_drv->fb0_win_id;
758 else if (!strcmp(id, "fb1"))
759 win_id = dev_drv->fb1_win_id;
760 else if (!strcmp(id, "fb2"))
761 win_id = dev_drv->fb2_win_id;
762 mutex_unlock(&dev_drv->fb_win_id_mutex);
767 static int rk3036_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
772 static int rk3036_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
775 struct lcdc_device *lcdc_dev =
776 container_of(dev_drv, struct lcdc_device, driver);
778 spin_lock(&lcdc_dev->reg_lock);
779 if (lcdc_dev->clk_on) {
781 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
785 ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
790 spin_unlock(&lcdc_dev->reg_lock);
795 static int rk3036_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
798 struct lcdc_device *lcdc_dev = container_of(dev_drv,
799 struct lcdc_device, driver);
800 if (dev_drv->suspend_flag)
802 dev_drv->suspend_flag = 1;
803 flush_kthread_worker(&dev_drv->update_regs_worker);
805 if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
806 dev_drv->trsm_ops->disable();
807 spin_lock(&lcdc_dev->reg_lock);
808 if (likely(lcdc_dev->clk_on)) {
809 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
811 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
813 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
815 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
817 lcdc_cfg_done(lcdc_dev);
818 #if defined(CONFIG_ROCKCHIP_IOMMU)
819 if (dev_drv->iommu_enabled) {
820 // for (reg = MMU_DTE_ADDR; reg <= MMU_AUTO_GATING; reg +=4)
821 // lcdc_readl(lcdc_dev, reg);
823 iovmm_deactivate(dev_drv->dev);
826 spin_unlock(&lcdc_dev->reg_lock);
828 spin_unlock(&lcdc_dev->reg_lock);
831 rk3036_lcdc_clk_disable(lcdc_dev);
832 rk_disp_pwr_disable(dev_drv);
836 static int rk3036_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
838 struct lcdc_device *lcdc_dev =
839 container_of(dev_drv, struct lcdc_device, driver);
841 if (!dev_drv->suspend_flag)
843 rk_disp_pwr_enable(dev_drv);
844 dev_drv->suspend_flag = 0;
846 if (lcdc_dev->atv_layer_cnt) {
847 rk3036_lcdc_clk_enable(lcdc_dev);
848 rk3036_lcdc_reg_restore(lcdc_dev);
850 spin_lock(&lcdc_dev->reg_lock);
852 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
854 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
856 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
858 lcdc_cfg_done(lcdc_dev);
860 spin_unlock(&lcdc_dev->reg_lock);
863 if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
864 dev_drv->trsm_ops->enable();
869 static int rk3036_lcdc_blank(struct rk_lcdc_driver *dev_drv,
870 int win_id, int blank_mode)
872 switch (blank_mode) {
873 case FB_BLANK_UNBLANK:
874 rk3036_lcdc_early_resume(dev_drv);
876 case FB_BLANK_NORMAL:
877 rk3036_lcdc_early_suspend(dev_drv);
880 rk3036_lcdc_early_suspend(dev_drv);
884 dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
889 static int rk3036_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
891 struct lcdc_device *lcdc_dev = container_of(dev_drv,
892 struct lcdc_device, driver);
893 spin_lock(&lcdc_dev->reg_lock);
894 if (lcdc_dev->clk_on)
895 lcdc_cfg_done(lcdc_dev);
896 spin_unlock(&lcdc_dev->reg_lock);
902 sin_hue = sin(a)*256 +0x100;
903 cos_hue = cos(a)*256;
905 sin_hue = sin(a)*256;
906 cos_hue = cos(a)*256;
908 static int rk3036_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,bcsh_hue_mode mode)
911 struct lcdc_device *lcdc_dev =
912 container_of(dev_drv, struct lcdc_device, driver);
915 spin_lock(&lcdc_dev->reg_lock);
916 if (lcdc_dev->clk_on) {
917 val = lcdc_readl(lcdc_dev, BCSH_H);
920 val &= m_BCSH_SIN_HUE;
923 val &= m_BCSH_COS_HUE;
930 spin_unlock(&lcdc_dev->reg_lock);
936 static int rk3036_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv,int sin_hue, int cos_hue)
939 struct lcdc_device *lcdc_dev =
940 container_of(dev_drv, struct lcdc_device, driver);
943 spin_lock(&lcdc_dev->reg_lock);
944 if (lcdc_dev->clk_on) {
945 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
946 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
947 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
948 lcdc_cfg_done(lcdc_dev);
950 spin_unlock(&lcdc_dev->reg_lock);
955 static int rk3036_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode,int value)
957 struct lcdc_device *lcdc_dev =
958 container_of(dev_drv, struct lcdc_device, driver);
961 spin_lock(&lcdc_dev->reg_lock);
962 if(lcdc_dev->clk_on) {
965 /*from 0 to 255,typical is 128*/
968 else if (value >= 0x80)
969 value = value - 0x80;
970 mask = m_BCSH_BRIGHTNESS;
971 val = v_BCSH_BRIGHTNESS(value);
974 /*from 0 to 510,typical is 256*/
975 mask = m_BCSH_CONTRAST;
976 val = v_BCSH_CONTRAST(value);
979 /*from 0 to 1015,typical is 256*/
980 mask = m_BCSH_SAT_CON;
981 val = v_BCSH_SAT_CON(value);
986 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
987 lcdc_cfg_done(lcdc_dev);
989 spin_unlock(&lcdc_dev->reg_lock);
993 static int rk3036_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode)
995 struct lcdc_device *lcdc_dev =
996 container_of(dev_drv, struct lcdc_device, driver);
999 spin_lock(&lcdc_dev->reg_lock);
1000 if(lcdc_dev->clk_on) {
1001 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1004 val &= m_BCSH_BRIGHTNESS;
1011 val &= m_BCSH_CONTRAST;
1015 val &= m_BCSH_SAT_CON;
1022 spin_unlock(&lcdc_dev->reg_lock);
1027 static int rk3036_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1029 struct lcdc_device *lcdc_dev =
1030 container_of(dev_drv, struct lcdc_device, driver);
1033 spin_lock(&lcdc_dev->reg_lock);
1034 if (lcdc_dev->clk_on) {
1036 lcdc_writel(lcdc_dev,BCSH_CTRL,0x1);
1037 lcdc_writel(lcdc_dev,BCSH_BCS,0xd0010000);
1038 lcdc_writel(lcdc_dev,BCSH_H,0x01000000);
1042 lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1044 lcdc_cfg_done(lcdc_dev);
1046 spin_unlock(&lcdc_dev->reg_lock);
1050 static int rk3036_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1051 enum fb_win_map_order order)
1053 mutex_lock(&dev_drv->fb_win_id_mutex);
1054 if (order == FB_DEFAULT_ORDER)
1055 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
1056 dev_drv->fb2_win_id = order / 100;
1057 dev_drv->fb1_win_id = (order / 10) % 10;
1058 dev_drv->fb0_win_id = order % 10;
1059 mutex_unlock(&dev_drv->fb_win_id_mutex);
1064 static int rk3036_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1067 struct lcdc_device *lcdc_dev =
1068 container_of(dev_drv, struct lcdc_device, driver);
1069 struct rk_screen *screen = dev_drv->cur_screen;
1074 u32 x_total, y_total;
1076 ft = div_u64(1000000000000llu, fps);
1078 screen->mode.upper_margin + screen->mode.lower_margin +
1079 screen->mode.yres + screen->mode.vsync_len;
1081 screen->mode.left_margin + screen->mode.right_margin +
1082 screen->mode.xres + screen->mode.hsync_len;
1083 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1084 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1085 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1088 pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1089 dev_drv->pixclock = lcdc_dev->pixclock = pixclock;
1090 fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1091 screen->ft = 1000 / fps; /*one frame time in ms */
1094 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1095 clk_get_rate(lcdc_dev->dclk), fps);
1100 static int rk3036_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1102 struct lcdc_device *lcdc_dev =
1103 container_of(dev_drv, struct lcdc_device, driver);
1107 if (lcdc_dev->clk_on) {
1108 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1109 if (int_reg & m_LF_INT_STA) {
1110 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1112 ret = RK_LF_STATUS_FC;
1114 ret = RK_LF_STATUS_FR;
1116 ret = RK_LF_STATUS_NC;
1122 static int rk3036_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,unsigned int *dsp_addr)
1124 struct lcdc_device *lcdc_dev =
1125 container_of(dev_drv, struct lcdc_device, driver);
1127 if(lcdc_dev->clk_on){
1128 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1129 dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1134 static ssize_t rk3036_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1135 char *buf, int win_id)
1137 // struct lcdc_device *lcdc_dev = container_of(dev_drv,
1138 // struct lcdc_device, driver);
1139 // struct rk_screen *screen = dev_drv->cur_screen;
1140 struct rk_lcdc_win *win = NULL;
1141 char fmt[9] = "NULL";
1144 if (win_id < ARRAY_SIZE(lcdc_win)) {
1145 win = dev_drv->win[win_id];
1147 dev_err(dev_drv->dev,"invalid win number:%d!\n", win_id);
1151 size = snprintf(buf, PAGE_SIZE, "win%d: %s\n", win_id, get_format_string(win->format, fmt));
1152 size += snprintf(buf + size, PAGE_SIZE - size, " xact %d yact %d xvir %d yvir %d\n",
1153 win->area[0].xact, win->area[0].yact, win->area[0].xvir, win->area[0].yvir);
1154 size += snprintf(buf + size, PAGE_SIZE - size, " xpos %d ypos %d xsize %d ysize %d\n",
1155 win->area[0].xpos, win->area[0].ypos, win->area[0].xsize, win->area[0].ysize);
1156 size += snprintf(buf + size, PAGE_SIZE - size, " yaddr 0x%x uvaddr 0x%x\n",
1157 win->area[0].y_addr, win->area[0].uv_addr);
1161 static int rk3036_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1163 struct lcdc_device *lcdc_dev = container_of(dev_drv,
1166 int *cbase = (int *)lcdc_dev->regs;
1167 int *regsbak = (int *)lcdc_dev->regsbak;
1170 printk("back up reg:\n");
1171 for (i = 0; i <= (0x90 >> 4); i++) {
1172 for (j = 0; j < 4; j++)
1173 printk("%08x ", *(regsbak + i * 4 + j));
1177 printk("lcdc reg:\n");
1178 for (i = 0; i <= (0x90 >> 4); i++) {
1179 for (j = 0; j < 4; j++)
1180 printk("%08x ", readl_relaxed(cbase + i * 4 + j));
1186 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1187 .open = rk3036_lcdc_open,
1188 .load_screen = rk3036_load_screen,
1189 .set_par = rk3036_lcdc_set_par,
1190 .pan_display = rk3036_lcdc_pan_display,
1191 .blank = rk3036_lcdc_blank,
1192 .ioctl = rk3036_lcdc_ioctl,
1193 .get_win_state = rk3036_lcdc_get_win_state,
1194 .ovl_mgr = rk3036_lcdc_ovl_mgr,
1195 .get_disp_info = rk3036_lcdc_get_disp_info,
1196 .fps_mgr = rk3036_lcdc_fps_mgr,
1197 .fb_get_win_id = rk3036_lcdc_get_win_id,
1198 .fb_win_remap = rk3036_fb_win_remap,
1199 .poll_vblank = rk3036_lcdc_poll_vblank,
1200 .get_dsp_addr = rk3036_lcdc_get_dsp_addr,
1201 .cfg_done = rk3036_lcdc_cfg_done,
1202 .dump_reg = rk3036_lcdc_reg_dump,
1203 .set_dsp_bcsh_hue = rk3036_lcdc_set_bcsh_hue,
1204 .set_dsp_bcsh_bcs = rk3036_lcdc_set_bcsh_bcs,
1205 .get_dsp_bcsh_hue = rk3036_lcdc_get_bcsh_hue,
1206 .get_dsp_bcsh_bcs = rk3036_lcdc_get_bcsh_bcs,
1207 .open_bcsh = rk3036_lcdc_open_bcsh,
1210 static int rk3036_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1212 struct device_node *np = lcdc_dev->dev->of_node;
1214 #if defined(CONFIG_ROCKCHIP_IOMMU)
1216 if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1217 lcdc_dev->driver.iommu_enabled = 0;
1219 lcdc_dev->driver.iommu_enabled = val;
1221 lcdc_dev->driver.iommu_enabled = 0;
1226 static int rk3036_lcdc_probe(struct platform_device *pdev)
1228 struct lcdc_device *lcdc_dev = NULL;
1229 struct rk_lcdc_driver *dev_drv;
1230 struct device *dev = &pdev->dev;
1231 struct resource *res;
1234 lcdc_dev = devm_kzalloc(dev,
1235 sizeof(struct lcdc_device), GFP_KERNEL);
1237 dev_err(&pdev->dev, "rk3036 lcdc device kmalloc fail!");
1240 platform_set_drvdata(pdev, lcdc_dev);
1241 lcdc_dev->dev = dev;
1242 rk3036_lcdc_parse_dt(lcdc_dev);
1244 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1245 lcdc_dev->reg_phy_base = res->start;
1246 lcdc_dev->len = resource_size(res);
1247 lcdc_dev->regs = devm_ioremap_resource(dev, res);
1248 if (IS_ERR(lcdc_dev->regs))
1249 return PTR_ERR(lcdc_dev->regs);
1251 lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1252 if (IS_ERR(lcdc_dev->regsbak))
1253 return PTR_ERR(lcdc_dev->regsbak);
1255 dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1256 dev_drv = &lcdc_dev->driver;
1259 dev_drv->id = lcdc_dev->id;
1260 dev_drv->ops = &lcdc_drv_ops;
1261 dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1262 spin_lock_init(&lcdc_dev->reg_lock);
1264 lcdc_dev->irq = platform_get_irq(pdev, 0);
1265 if (lcdc_dev->irq < 0) {
1266 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1271 ret = devm_request_irq(dev, lcdc_dev->irq, rk3036_lcdc_isr,
1272 IRQF_DISABLED, dev_name(dev), lcdc_dev);
1274 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1275 lcdc_dev->irq, ret);
1279 if (dev_drv->iommu_enabled) {
1280 strcpy(dev_drv->mmu_dts_name, "iommu,vop_mmu");
1283 ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1285 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1288 lcdc_dev->screen = dev_drv->screen0;
1290 dev_info(dev, "lcdc%d probe ok, iommu %s\n",
1291 lcdc_dev->id, dev_drv->iommu_enabled ? "enabled" : "disabled");
1296 #if defined(CONFIG_PM)
1297 static int rk3036_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1302 static int rk3036_lcdc_resume(struct platform_device *pdev)
1307 #define rk3036_lcdc_suspend NULL
1308 #define rk3036_lcdc_resume NULL
1311 static int rk3036_lcdc_remove(struct platform_device *pdev)
1316 static void rk3036_lcdc_shutdown(struct platform_device *pdev)
1321 #if defined(CONFIG_OF)
1322 static const struct of_device_id rk3036_lcdc_dt_ids[] = {
1323 {.compatible = "rockchip,rk3036-lcdc",},
1328 static struct platform_driver rk3036_lcdc_driver = {
1329 .probe = rk3036_lcdc_probe,
1330 .remove = rk3036_lcdc_remove,
1332 .name = "rk3036-lcdc",
1333 .owner = THIS_MODULE,
1334 .of_match_table = of_match_ptr(rk3036_lcdc_dt_ids),
1336 .suspend = rk3036_lcdc_suspend,
1337 .resume = rk3036_lcdc_resume,
1338 .shutdown = rk3036_lcdc_shutdown,
1341 static int __init rk3036_lcdc_module_init(void)
1343 return platform_driver_register(&rk3036_lcdc_driver);
1346 static void __exit rk3036_lcdc_module_exit(void)
1348 platform_driver_unregister(&rk3036_lcdc_driver);
1351 fs_initcall(rk3036_lcdc_module_init);
1352 module_exit(rk3036_lcdc_module_exit);