drivers/video/rockchip/lcdc/rk3066b_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk3066b_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include <mach/iomux.h>
  34
  35 #include "rk3066b_lcdc.h"
  36
  37
  38
  39
  40
  41
  42 static int dbg_thresd = 0;
  43 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  44 #define DBG(level,x...) do { if(unlikely(dbg_thresd >= level)) printk(KERN_INFO x); } while (0)
  45
  46
  47 static int init_rk3066b_lcdc(struct rk_lcdc_device_driver *dev_drv)
  48 {
  49         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
  50         if(lcdc_dev->id == 0) //lcdc0
  51         {
  52                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
  53                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  54                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  55                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  56         }
  57         else if(lcdc_dev->id == 1)
  58         {
  59                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
  60                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  61                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  62                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  63         }
  64         else
  65         {
  66                 printk(KERN_ERR "invalid lcdc device!\n");
  67                 return -EINVAL;
  68         }
  69         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  70         {
  71                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  72         }
  73         clk_enable(lcdc_dev->pd);
  74         clk_enable(lcdc_dev->hclk);  //enable aclk and hclk for register config
  75         clk_enable(lcdc_dev->aclk);
  76         lcdc_dev->clk_on = 1;
  77
  78         if(lcdc_dev->id == 1) //iomux for lcdc1
  79         {
  80                 rk30_mux_api_set(GPIO2D0_LCDC1DCLK_SMCCSN0_NAME,GPIO2D_LCDC1DCLK);
  81                 rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME,GPIO2D_LCDC1DEN);
  82                 rk30_mux_api_set(GPIO2D2_LCDC1HSYNC_SMCOEN_NAME,GPIO2D_LCDC1HSYNC);
  83                 rk30_mux_api_set(GPIO2D3_LCDC1VSYNC_SMCADVN_NAME,GPIO2D_LCDC1VSYNC);
  84                 rk30_mux_api_set(GPIO2A0_LCDC1DATA0_SMCDATA0_TRACEDATA0_NAME,GPIO2A_LCDC1DATA0);
  85                 rk30_mux_api_set(GPIO2A1_LCDC1DATA1_SMCDATA1_TRACEDATA1_NAME,GPIO2A_LCDC1DATA1);
  86                 rk30_mux_api_set(GPIO2A2_LCDC1DATA2_SMCDATA2_TRACEDATA2_NAME,GPIO2A_LCDC1DATA2);
  87                 rk30_mux_api_set(GPIO2A3_LCDC1DATA3_SMCDATA3_TRACEDATA3_NAME,GPIO2A_LCDC1DATA3);
  88                 rk30_mux_api_set(GPIO2A4_LCDC1DATA4_SMCDATA4_TRACEDATA4_NAME,GPIO2A_LCDC1DATA4);
  89                 rk30_mux_api_set(GPIO2A5_LCDC1DATA5_SMCDATA5_TRACEDATA5_NAME,GPIO2A_LCDC1DATA5);
  90                 rk30_mux_api_set(GPIO2A6_LCDC1DATA6_SMCDATA6_TRACEDATA6_NAME,GPIO2A_LCDC1DATA6);
  91                 rk30_mux_api_set(GPIO2A7_LCDC1DATA7_SMCDATA7_TRACEDATA7_NAME,GPIO2A_LCDC1DATA7);
  92                 rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME,GPIO2B_LCDC1DATA8);
  93                 rk30_mux_api_set(GPIO2B1_LCDC1DATA9_SMCDATA9_TRACEDATA9_NAME,GPIO2B_LCDC1DATA9);
  94                 rk30_mux_api_set(GPIO2B2_LCDC1DATA10_SMCDATA10_TRACEDATA10_NAME,GPIO2B_LCDC1DATA10);
  95                 rk30_mux_api_set(GPIO2B3_LCDC1DATA11_SMCDATA11_TRACEDATA11_NAME,GPIO2B_LCDC1DATA11);
  96                 rk30_mux_api_set(GPIO2B4_LCDC1DATA12_SMCDATA12_TRACEDATA12_NAME,GPIO2B_LCDC1DATA12);
  97                 rk30_mux_api_set(GPIO2B5_LCDC1DATA13_SMCDATA13_TRACEDATA13_NAME,GPIO2B_LCDC1DATA13);
  98                 rk30_mux_api_set(GPIO2B6_LCDC1DATA14_SMCDATA14_TRACEDATA14_NAME,GPIO2B_LCDC1DATA14);
  99                 rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCDATA15_TRACEDATA15_NAME,GPIO2B_LCDC1DATA15);
 100                 rk30_mux_api_set(GPIO2C0_LCDC1DATA16_SMCADDR0_TRACECLK_NAME,GPIO2C_LCDC1DATA16);
 101                 rk30_mux_api_set(GPIO2C1_LCDC1DATA17_SMCADDR1_TRACECTL_NAME,GPIO2C_LCDC1DATA17);
 102                 rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCADDR2_NAME,GPIO2C_LCDC1DATA18);
 103                 rk30_mux_api_set(GPIO2C3_LCDC1DATA19_SMCADDR3_NAME,GPIO2C_LCDC1DATA19);
 104                 rk30_mux_api_set(GPIO2C4_LCDC1DATA20_SMCADDR4_NAME,GPIO2C_LCDC1DATA20);
 105                 rk30_mux_api_set(GPIO2C5_LCDC1DATA21_SMCADDR5_NAME,GPIO2C_LCDC1DATA21);
 106                 rk30_mux_api_set(GPIO2C6_LCDC1DATA22_SMCADDR6_NAME,GPIO2C_LCDC1DATA22);
 107                 rk30_mux_api_set(GPIO2C7_LCDC1DATA23_SMCADDR7_NAME,GPIO2C_LCDC1DATA23);
 108
 109         }
 110         LcdMskReg(lcdc_dev,SYS_CFG, m_LCDC_AXICLK_AUTO_ENABLE | m_W0_AXI_OUTSTANDING2 |
 111                 m_W1_AXI_OUTSTANDING2,v_LCDC_AXICLK_AUTO_ENABLE(1) | v_W0_AXI_OUTSTANDING2(1) |
 112                 v_W1_AXI_OUTSTANDING2(1));//eanble axi-clk auto gating for low power
 113          LcdWrReg(lcdc_dev,AXI_MS_ID,v_HWC_CHANNEL_ID(5) | v_WIN2_CHANNEL_ID(4) |
 114                 v_WIN1_YRGB_CHANNEL_ID(3) | v_WIN0_CBR_CHANNEL_ID(2) |
 115                 v_WIN0_YRGB_CHANNEL_ID(1));
 116         LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK |
 117               m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) |
 118               v_SCANNING_MASK(1));  //mask all interrupt in init
 119         LcdMskReg(lcdc_dev,FIFO_WATER_MARK,m_WIN1_FIFO_FULL_LEVEL,v_WIN1_FIFO_FULL_LEVEL(0x1e0));
 120         //LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 121         return 0;
 122 }
 123
 124 static int rk3066b_lcdc_deinit(struct rk3066b_lcdc_device *lcdc_dev)
 125 {
 126         spin_lock(&lcdc_dev->reg_lock);
 127         if(likely(lcdc_dev->clk_on))
 128         {
 129                 lcdc_dev->clk_on = 0;
 130                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 131                 LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK |
 132                           m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) |
 133                           v_SCANNING_MASK(1));  //mask all interrupt in init
 134                 LcdSetBit(lcdc_dev,SYS_CFG,m_LCDC_STANDBY);
 135                 LCDC_REG_CFG_DONE();
 136                 spin_unlock(&lcdc_dev->reg_lock);
 137         }
 138         else   //clk already disabled
 139         {
 140                 spin_unlock(&lcdc_dev->reg_lock);
 141                 return 0;
 142         }
 143         mdelay(1);
 144
 145         return 0;
 146 }
 147
 148 static int rk3066b_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
 149 {
 150         int ret = -EINVAL;
 151         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 152         rk_screen *screen = dev_drv->cur_screen;
 153         u64 ft;
 154         int fps;
 155         u16 face;
 156         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 157         u16 right_margin = screen->right_margin;
 158         u16 lower_margin = screen->lower_margin;
 159         u16 x_res = screen->x_res, y_res = screen->y_res;
 160
 161         // set the rgb or mcu
 162         spin_lock(&lcdc_dev->reg_lock);
 163         if(likely(lcdc_dev->clk_on))
 164         {
 165                 if(screen->type==SCREEN_MCU)
 166                 {
 167                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 168                         // set out format and mcu timing
 169                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 170                         if(mcu_total>31)
 171                                 mcu_total = 31;
 172                         if(mcu_total<3)
 173                                 mcu_total = 3;
 174                         mcu_rwstart = (mcu_total+1)/4 - 1;
 175                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 176                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 177                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 178
 179                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 180                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 181
 182                         // set horizontal & vertical out timing
 183
 184                         right_margin = x_res/6;
 185                         screen->pixclock = 150000000; //mcu fix to 150 MHz
 186                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 187                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 188                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 189                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 190                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 191
 192                 }
 193
 194                 switch (screen->face)
 195                 {
 196                         case OUT_P565:
 197                                 face = OUT_P565;
 198                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 199                                 break;
 200                         case OUT_P666:
 201                                 face = OUT_P666;
 202                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 203                                 break;
 204                         case OUT_D888_P565:
 205                                 face = OUT_P888;
 206                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 207                                 break;
 208                         case OUT_D888_P666:
 209                                 face = OUT_P888;
 210                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 211                                 break;
 212                         case OUT_P888:
 213                                 face = OUT_P888;
 214                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 215                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 216                                 break;
 217                         default:
 218                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 219                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 220                                 face = screen->face;
 221                                 break;
 222                 }
 223
 224                 //use default overlay,set vsyn hsync den dclk polarity
 225                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 226                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 227                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 228                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 229
 230                 //set background color to black,set swap according to the screen panel,disable blank mode
 231                 LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 232                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 233                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 234                         v_BLACK_MODE(0));
 235
 236
 237                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 238                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 239                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 240                      v_HASP(screen->hsync_len + screen->left_margin));
 241
 242                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 243                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 244                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 245                       v_VASP(screen->vsync_len + screen->upper_margin));
 246                 // let above to take effect
 247                 //LCDC_REG_CFG_DONE();
 248         }
 249         spin_unlock(&lcdc_dev->reg_lock);
 250
 251         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 252         if(ret)
 253         {
 254                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 255         }
 256         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 257         clk_enable(lcdc_dev->dclk);
 258
 259         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 260                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 261                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
 262         fps = div64_u64(1000000000000llu,ft);
 263         screen->ft = 1000/fps;
 264         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
 265
 266         if(screen->init)
 267         {
 268                 screen->init();
 269         }
 270         if(screen->sscreen_set)
 271         {
 272                 screen->sscreen_set(screen,!initscreen);
 273         }
 274         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 275         return 0;
 276 }
 277
 278 static int mcu_refresh(struct rk3066b_lcdc_device *lcdc_dev)
 279 {
 280
 281     return 0;
 282 }
 283
 284
 285
 286 //enable layer,open:1,enable;0 disable
 287 static int win0_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
 288 {
 289
 290         spin_lock(&lcdc_dev->reg_lock);
 291         if(likely(lcdc_dev->clk_on))
 292         {
 293                 if(open)
 294                 {
 295                         if(!lcdc_dev->atv_layer_cnt)
 296                         {
 297                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 298                         }
 299                         lcdc_dev->atv_layer_cnt++;
 300                 }
 301                 else
 302                 {
 303                         lcdc_dev->atv_layer_cnt--;
 304                 }
 305                 lcdc_dev->driver.layer_par[0]->state = open;
 306
 307                 LcdMskReg(lcdc_dev, SYS_CFG, m_W0_EN, v_W0_EN(open));
 308                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 309                 {
 310                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 311                 }
 312                 //LCDC_REG_CFG_DONE();
 313         }
 314         spin_unlock(&lcdc_dev->reg_lock);
 315         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 316         return 0;
 317 }
 318 static int win1_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
 319 {
 320         spin_lock(&lcdc_dev->reg_lock);
 321         if(likely(lcdc_dev->clk_on))
 322         {
 323                 if(open)
 324                 {
 325                         if(!lcdc_dev->atv_layer_cnt)
 326                         {
 327                                 printk("lcdc%d wakeup from stanby\n",lcdc_dev->id);
 328                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 329                         }
 330                         lcdc_dev->atv_layer_cnt++;
 331                 }
 332                 else
 333                 {
 334                         lcdc_dev->atv_layer_cnt--;
 335                 }
 336                 lcdc_dev->driver.layer_par[1]->state = open;
 337
 338                 LcdMskReg(lcdc_dev, SYS_CFG, m_W1_EN, v_W1_EN(open));
 339                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 340                 {
 341                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
 342                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 343                 }
 344                 LCDC_REG_CFG_DONE();
 345         }
 346         spin_unlock(&lcdc_dev->reg_lock);
 347         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 348         return 0;
 349 }
 350
 351
 352 static int rk3066b_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 353 {
 354         struct rk3066b_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk3066b_lcdc_device ,driver);
 355
 356         spin_lock(&lcdc_dev->reg_lock);
 357         if(likely(lcdc_dev->clk_on))
 358         {
 359                 switch(blank_mode)
 360                 {
 361                         case FB_BLANK_UNBLANK:
 362                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 363                                 break;
 364                         case FB_BLANK_NORMAL:
 365                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 366                                 break;
 367                         default:
 368                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 369                                 break;
 370                 }
 371                 LCDC_REG_CFG_DONE();
 372                 printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 373         }
 374         spin_unlock(&lcdc_dev->reg_lock);
 375
 376         return 0;
 377 }
 378
 379 static  int win0_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
 380 {
 381         u32 y_addr;
 382         u32 uv_addr;
 383         y_addr = par->smem_start + par->y_offset;
 384         uv_addr = par->cbr_start + par->c_offset;
 385         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 386
 387         spin_lock(&lcdc_dev->reg_lock);
 388         if(likely(lcdc_dev->clk_on))
 389         {
 390                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST,y_addr);
 391                 LcdWrReg(lcdc_dev, WIN0_CBR_MST,uv_addr);
 392                 LCDC_REG_CFG_DONE();
 393         }
 394         spin_unlock(&lcdc_dev->reg_lock);
 395
 396         return 0;
 397
 398 }
 399
 400 static  int win1_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
 401 {
 402         u32 y_addr;
 403         u32 uv_addr;
 404         y_addr = par->smem_start + par->y_offset;
 405         uv_addr = par->cbr_start + par->c_offset;
 406         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 407
 408         spin_lock(&lcdc_dev->reg_lock);
 409         if(likely(lcdc_dev->clk_on))
 410         {
 411                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 412                 LCDC_REG_CFG_DONE();
 413         }
 414         spin_unlock(&lcdc_dev->reg_lock);
 415
 416         return 0;
 417 }
 418
 419 static  int win0_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
 420         struct layer_par *par )
 421 {
 422         u32 xact, yact, xvir, yvir, xpos, ypos;
 423         u32 ScaleYrgbX = 0x1000;
 424         u32 ScaleYrgbY = 0x1000;
 425         u32 ScaleCbrX = 0x1000;
 426         u32 ScaleCbrY = 0x1000;
 427         u8 fmt_cfg =0 ; //data format register config value
 428
 429         xact = par->xact;                           //active (origin) picture window width/height
 430         yact = par->yact;
 431         xvir = par->xvir;                          // virtual resolution
 432         yvir = par->yvir;
 433         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 434         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 435
 436
 437         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 438         ScaleYrgbY = CalScale(yact, par->ysize);
 439         switch (par->format)
 440         {
 441                 case ARGB888:
 442                         fmt_cfg = 0;
 443                         break;
 444                 case RGB565:
 445                         fmt_cfg = 1;
 446                         break;
 447                 case YUV422:// yuv422
 448                         fmt_cfg = 2;
 449                         ScaleCbrX = CalScale((xact/2), par->xsize);
 450                         ScaleCbrY = CalScale(yact, par->ysize);
 451                         break;
 452                 case YUV420: // yuv420
 453                         fmt_cfg = 3;
 454                         ScaleCbrX = CalScale(xact/2, par->xsize);
 455                         ScaleCbrY = CalScale(yact/2, par->ysize);
 456                         break;
 457                 case YUV444:// yuv444
 458                         fmt_cfg = 4;
 459                         ScaleCbrX = CalScale(xact, par->xsize);
 460                         ScaleCbrY = CalScale(yact, par->ysize);
 461                         break;
 462                 default:
 463                    break;
 464         }
 465
 466         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 467                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 468
 469         spin_lock(&lcdc_dev->reg_lock);
 470         if(likely(lcdc_dev->clk_on))
 471         {
 472                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 473                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 474                 LcdMskReg(lcdc_dev,SYS_CFG, m_W0_FORMAT, v_W0_FORMAT(fmt_cfg));         //(inf->video_mode==0)
 475                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 476                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 477                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 478                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 479                         v_COLORKEY_EN(0) | v_KEYCOLOR(0));
 480                 LcdWrReg(lcdc_dev,WIN0_VIR,v_VIRWIDTH(xvir));
 481                 //LCDC_REG_CFG_DONE();
 482         }
 483         spin_unlock(&lcdc_dev->reg_lock);
 484
 485     return 0;
 486
 487 }
 488
 489 static int win1_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
 490         struct layer_par *par )
 491 {
 492         u32 xact, yact, xvir, yvir, xpos, ypos;
 493         u8 fmt_cfg;
 494
 495         xact = par->xact;
 496         yact = par->yact;
 497         xvir = par->xvir;
 498         yvir = par->yvir;
 499         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 500         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 501
 502
 503         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 504                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 505
 506
 507         spin_lock(&lcdc_dev->reg_lock);
 508         if(likely(lcdc_dev->clk_on))
 509         {
 510                 switch (par->format)
 511                 {
 512                         case ARGB888:
 513                                 fmt_cfg = 0;
 514                                 break;
 515                         case RGB565:
 516                                 fmt_cfg = 1;
 517                                 break;
 518                         default:
 519                                 break;
 520                 }
 521
 522                 LcdMskReg(lcdc_dev,SYS_CFG, m_W1_FORMAT, v_W1_FORMAT(fmt_cfg));
 523                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 524                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 525                 // enable win1 color key and set the color to black(rgb=0)
 526                 LcdMskReg(lcdc_dev,WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(0) | v_KEYCOLOR(0));
 527                 LcdWrReg(lcdc_dev,WIN1_VIR,v_VIRWIDTH(xvir));
 528
 529                 //LCDC_REG_CFG_DONE();
 530         }
 531         spin_unlock(&lcdc_dev->reg_lock);
 532     return 0;
 533 }
 534
 535 static int rk3066b_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 536 {
 537         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 538         if(layer_id == 0)
 539         {
 540                 win0_open(lcdc_dev,open);
 541         }
 542         else if(layer_id == 1)
 543         {
 544                 win1_open(lcdc_dev,open);
 545         }
 546
 547         return 0;
 548 }
 549
 550 static int rk3066b_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 551 {
 552         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 553         struct layer_par *par = NULL;
 554         rk_screen *screen = dev_drv->cur_screen;
 555         if(!screen)
 556         {
 557                 printk(KERN_ERR "screen is null!\n");
 558                 return -ENOENT;
 559         }
 560         if(layer_id==0)
 561         {
 562                 par = dev_drv->layer_par[0];
 563                 win0_set_par(lcdc_dev,screen,par);
 564         }
 565         else if(layer_id==1)
 566         {
 567                 par = dev_drv->layer_par[1];
 568                 win1_set_par(lcdc_dev,screen,par);
 569         }
 570
 571         return 0;
 572 }
 573
 574 int rk3066b_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 575 {
 576         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 577         struct layer_par *par = NULL;
 578         rk_screen *screen = dev_drv->cur_screen;
 579         unsigned long flags;
 580         int timeout;
 581         if(!screen)
 582         {
 583                 printk(KERN_ERR "screen is null!\n");
 584                 return -ENOENT;
 585         }
 586         if(layer_id==0)
 587         {
 588                 par = dev_drv->layer_par[0];
 589                 win0_display(lcdc_dev,par);
 590         }
 591         else if(layer_id==1)
 592         {
 593                 par = dev_drv->layer_par[1];
 594                 win1_display(lcdc_dev,par);
 595         }
 596         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 597         {
 598                 dev_drv->first_frame = 0;
 599                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_STARTCLEAR | m_FRM_STARTMASK ,
 600                           v_FRM_STARTCLEAR(1) | v_FRM_STARTMASK(0));
 601                 LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 602
 603         }
 604
 605         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
 606         {
 607                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 608                 init_completion(&dev_drv->frame_done);
 609                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 610                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->cur_screen->ft+5));
 611                 if(!timeout&&(!dev_drv->frame_done.done))
 612                 {
 613                         printk(KERN_ERR "wait for new frame start time out!\n");
 614                         return -ETIMEDOUT;
 615                 }
 616         }
 617
 618         return 0;
 619 }
 620
 621 int rk3066b_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 622 {
 623         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 624         u32 panel_size[2];
 625         void __user *argp = (void __user *)arg;
 626         int ret = 0;
 627         switch(cmd)
 628         {
 629                 case FBIOGET_PANEL_SIZE:    //get panel size
 630                         panel_size[0] = lcdc_dev->screen->x_res;
 631                         panel_size[1] = lcdc_dev->screen->y_res;
 632                         if(copy_to_user(argp, panel_size, 8))
 633                                 return -EFAULT;
 634                         break;
 635                 default:
 636                         break;
 637         }
 638
 639         return ret;
 640 }
 641 static int rk3066b_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 642 {
 643         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 644         struct layer_par *par = dev_drv->layer_par[layer_id];
 645
 646         spin_lock(&lcdc_dev->reg_lock);
 647         if(lcdc_dev->clk_on)
 648         {
 649                 if(layer_id == 0)
 650                 {
 651                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W0_EN);
 652                 }
 653                 else if( layer_id == 1)
 654                 {
 655                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W1_EN);
 656                 }
 657         }
 658         spin_unlock(&lcdc_dev->reg_lock);
 659
 660         return par->state;
 661
 662 }
 663
 664 /***********************************
 665 overlay manager
 666 swap:1 win0 on the top of win1
 667         0 win1 on the top of win0
 668 set  : 1 set overlay
 669         0 get overlay state
 670 ************************************/
 671 static int rk3066b_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
 672 {
 673         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 674         int ovl;
 675         spin_lock(&lcdc_dev->reg_lock);
 676         if(lcdc_dev->clk_on)
 677         {
 678                 if(set)  //set overlay
 679                 {
 680                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
 681                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 682                         LCDC_REG_CFG_DONE();
 683                         ovl = swap;
 684                 }
 685                 else  //get overlay
 686                 {
 687                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
 688                 }
 689         }
 690         else
 691         {
 692                 ovl = -EPERM;
 693         }
 694         spin_unlock(&lcdc_dev->reg_lock);
 695
 696         return ovl;
 697 }
 698
 699 static ssize_t rk3066b_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,char *buf,int layer_id)
 700
 701 {
 702         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 703         return 0;
 704 }
 705
 706
 707 /*******************************************
 708 lcdc fps manager,set or get lcdc fps
 709 set:0 get
 710      1 set
 711 ********************************************/
 712 static int rk3066b_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
 713 {
 714         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 715         rk_screen * screen = dev_drv->cur_screen;
 716         u64 ft = 0;
 717         u32 dotclk;
 718         int ret;
 719
 720         if(set)
 721         {
 722                 ft = div_u64(1000000000000llu,fps);
 723                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 724                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
 725                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
 726                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
 727                 if(ret)
 728                 {
 729                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 730                 }
 731                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 732
 733         }
 734
 735         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 736         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 737         (dev_drv->pixclock);       // one frame time ,(pico seconds)
 738         fps = div64_u64(1000000000000llu,ft);
 739         screen->ft = 1000/fps ;  //one frame time in ms
 740         return fps;
 741 }
 742
 743 static int rk3066b_fb_layer_remap(struct rk_lcdc_device_driver *dev_drv,
 744         enum fb_win_map_order order)
 745 {
 746         mutex_lock(&dev_drv->fb_win_id_mutex);
 747         if(order == FB_DEFAULT_ORDER)
 748         {
 749                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;
 750         }
 751         dev_drv->fb2_win_id  = order/100;
 752         dev_drv->fb1_win_id = (order/10)%10;
 753         dev_drv->fb0_win_id = order%10;
 754         mutex_unlock(&dev_drv->fb_win_id_mutex);
 755
 756         printk("fb0:win%d\nfb1:win%d\nfb2:win%d\n",dev_drv->fb0_win_id,dev_drv->fb1_win_id,
 757                 dev_drv->fb2_win_id);
 758
 759         return 0;
 760 }
 761
 762 static int rk3066b_fb_get_layer(struct rk_lcdc_device_driver *dev_drv,const char *id)
 763 {
 764         int layer_id = 0;
 765         mutex_lock(&dev_drv->fb_win_id_mutex);
 766         if(!strcmp(id,"fb0") || !strcmp(id,"fb2"))
 767         {
 768                 layer_id = dev_drv->fb0_win_id;
 769         }
 770         else if(!strcmp(id,"fb1") || !strcmp(id,"fb3"))
 771         {
 772                 layer_id = dev_drv->fb1_win_id;
 773         }
 774         else
 775         {
 776                 printk(KERN_ERR "%s>>un supported %s\n",__func__,id);
 777                 layer_id = -1;
 778         }
 779         mutex_unlock(&dev_drv->fb_win_id_mutex);
 780
 781         return  layer_id;
 782 }
 783
 784
 785 static void rk3066b_lcdc_reg_dump(struct rk3066b_lcdc_device *lcdc_dev)
 786 {
 787         int *cbase =  (int *)lcdc_dev->reg_vir_base;
 788         int i,j;
 789
 790         for(i=0; i<=(0xa0>>4);i++)
 791         {
 792                 for(j=0;j<4;j++)
 793                         printk("%08x  ",readl(cbase+i*4 +j));
 794                 printk("\n");
 795         }
 796
 797 }
 798
 799 int rk3066b_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 800 {
 801         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 802
 803         spin_lock(&lcdc_dev->reg_lock);
 804         if(likely(lcdc_dev->clk_on))
 805         {
 806                 lcdc_dev->clk_on = 0;
 807                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 808                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 809                 LCDC_REG_CFG_DONE();
 810                 spin_unlock(&lcdc_dev->reg_lock);
 811         }
 812         else  //clk already disabled
 813         {
 814                 spin_unlock(&lcdc_dev->reg_lock);
 815                 return 0;
 816         }
 817
 818
 819         mdelay(30);
 820         clk_disable(lcdc_dev->dclk);
 821         clk_disable(lcdc_dev->hclk);
 822         clk_disable(lcdc_dev->aclk);
 823         clk_disable(lcdc_dev->pd);
 824
 825         return 0;
 826 }
 827
 828
 829 int rk3066b_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 830 {
 831         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 832
 833         if(!lcdc_dev->clk_on)
 834         {
 835                 clk_enable(lcdc_dev->pd);
 836                 clk_enable(lcdc_dev->hclk);
 837                 clk_enable(lcdc_dev->dclk);
 838                 clk_enable(lcdc_dev->aclk);
 839         }
 840         mdelay(5);
 841         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0x24);  //resume reg ,skip INT_STATUS reg
 842         memcpy(((u8*)lcdc_dev->preg) + 0x28,((u8*)&lcdc_dev->regbak) + 0x28, 0x74);
 843
 844         spin_lock(&lcdc_dev->reg_lock);
 845         if(lcdc_dev->atv_layer_cnt)
 846         {
 847                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 848                 LcdMskReg(lcdc_dev, INT_STATUS, m_SCANNING_CLEAR | m_FRM_STARTCLEAR | m_HOR_STARTCLEAR |
 849                                         m_SCANNING_MASK | m_HOR_STARTMASK | m_FRM_STARTMASK ,
 850                                         v_SCANNING_CLEAR(1) | v_FRM_STARTCLEAR(1) | v_HOR_STARTCLEAR(1) |
 851                                         v_SCANNING_MASK(1) | v_FRM_STARTMASK(0) | v_HOR_STARTMASK(1));
 852                 LCDC_REG_CFG_DONE();
 853         }
 854         lcdc_dev->clk_on = 1;
 855         spin_unlock(&lcdc_dev->reg_lock);
 856
 857         return 0;
 858 }
 859 static irqreturn_t rk3066b_lcdc_isr(int irq, void *dev_id)
 860 {
 861         struct rk3066b_lcdc_device *lcdc_dev = (struct rk3066b_lcdc_device *)dev_id;
 862
 863         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 864         LCDC_REG_CFG_DONE();
 865         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 866
 867         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
 868         {
 869                 spin_lock(&(lcdc_dev->driver.cpl_lock));
 870                 complete(&(lcdc_dev->driver.frame_done));
 871                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
 872         }
 873         return IRQ_HANDLED;
 874 }
 875
 876 static struct layer_par lcdc_layer[] = {
 877         [0] = {
 878                 .name           = "win0",
 879                 .id             = 0,
 880                 .support_3d     = true,
 881         },
 882         [1] = {
 883                 .name           = "win1",
 884                 .id             = 1,
 885                 .support_3d     = false,
 886         },
 887 };
 888
 889 static struct rk_lcdc_device_driver lcdc_driver = {
 890         .name                   = "lcdc",
 891         .def_layer_par          = lcdc_layer,
 892         .num_layer              = ARRAY_SIZE(lcdc_layer),
 893         .open                   = rk3066b_lcdc_open,
 894         .init_lcdc              = init_rk3066b_lcdc,
 895         .ioctl                  = rk3066b_lcdc_ioctl,
 896         .suspend                = rk3066b_lcdc_early_suspend,
 897         .resume                 = rk3066b_lcdc_early_resume,
 898         .set_par                = rk3066b_lcdc_set_par,
 899         .blank                  = rk3066b_lcdc_blank,
 900         .pan_display            = rk3066b_lcdc_pan_display,
 901         .load_screen            = rk3066b_load_screen,
 902         .get_layer_state        = rk3066b_lcdc_get_layer_state,
 903         .ovl_mgr                = rk3066b_lcdc_ovl_mgr,
 904         .get_disp_info          = rk3066b_lcdc_get_disp_info,
 905         .fps_mgr                = rk3066b_lcdc_fps_mgr,
 906         .fb_get_layer           = rk3066b_fb_get_layer,
 907         .fb_layer_remap         = rk3066b_fb_layer_remap,
 908 };
 909 #ifdef CONFIG_PM
 910 static int rk3066b_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 911 {
 912         return 0;
 913 }
 914
 915 static int rk3066b_lcdc_resume(struct platform_device *pdev)
 916 {
 917         return 0;
 918 }
 919
 920 #else
 921 #define rk3066b_lcdc_suspend NULL
 922 #define rk3066b_lcdc_resume NULL
 923 #endif
 924
 925 static int __devinit rk3066b_lcdc_probe (struct platform_device *pdev)
 926 {
 927         struct rk3066b_lcdc_device *lcdc_dev=NULL;
 928         rk_screen *screen;
 929         rk_screen *screen1;
 930         struct rk29fb_info *screen_ctr_info;
 931         struct resource *res = NULL;
 932         struct resource *mem;
 933         int ret = 0;
 934
 935         /*************Malloc rk3066blcdc_inf and set it to pdev for drvdata**********/
 936         lcdc_dev = kzalloc(sizeof(struct rk3066b_lcdc_device), GFP_KERNEL);
 937         if(!lcdc_dev)
 938         {
 939                 dev_err(&pdev->dev, ">>rk3066b lcdc device kmalloc fail!");
 940                 return -ENOMEM;
 941         }
 942         platform_set_drvdata(pdev, lcdc_dev);
 943         lcdc_dev->id = pdev->id;
 944         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
 945         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 946         if(!screen)
 947         {
 948                 dev_err(&pdev->dev, ">>rk3066b lcdc screen kmalloc fail!");
 949                 ret =  -ENOMEM;
 950                 goto err0;
 951         }
 952         else
 953         {
 954                 lcdc_dev->screen = screen;
 955         }
 956         screen->lcdc_id = lcdc_dev->id;
 957         screen->screen_id = 0;
 958
 959 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS)
 960         screen1 =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 961         if(!screen1)
 962         {
 963                 dev_err(&pdev->dev, ">>rk3066b lcdc screen1 kmalloc fail!");
 964                 ret =  -ENOMEM;
 965                 goto err0;
 966         }
 967         screen1->lcdc_id = 1;
 968         screen1->screen_id = 1;
 969         printk("use lcdc%d and rk610 implemention dual display!\n",lcdc_dev->id);
 970
 971 #endif
 972         /****************get lcdc0 reg  *************************/
 973         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 974         if (res == NULL)
 975         {
 976                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 977                 ret = -ENOENT;
 978                 goto err1;
 979         }
 980         lcdc_dev->reg_phy_base = res->start;
 981         lcdc_dev->len = resource_size(res);
 982         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 983         if (mem == NULL)
 984         {
 985                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 986                 ret = -ENOENT;
 987                 goto err1;
 988         }
 989         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 990         if (lcdc_dev->reg_vir_base == NULL)
 991         {
 992                 dev_err(&pdev->dev, "cannot map IO\n");
 993                 ret = -ENXIO;
 994                 goto err2;
 995         }
 996
 997         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 998         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 999         lcdc_dev->driver.dev=&pdev->dev;
1000         lcdc_dev->driver.screen0 = screen;
1001 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS)
1002         lcdc_dev->driver.screen1 = screen1;
1003 #endif
1004         lcdc_dev->driver.cur_screen = screen;
1005         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
1006         spin_lock_init(&lcdc_dev->reg_lock);
1007         lcdc_dev->irq = platform_get_irq(pdev, 0);
1008         if(lcdc_dev->irq < 0)
1009         {
1010                 dev_err(&pdev->dev, "cannot find IRQ\n");
1011                 goto err3;
1012         }
1013         ret = request_irq(lcdc_dev->irq, rk3066b_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
1014         if (ret)
1015         {
1016                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
1017                ret = -EBUSY;
1018                goto err3;
1019         }
1020         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
1021         if(ret < 0)
1022         {
1023                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
1024                 goto err4;
1025         }
1026         printk("rk3066b lcdc%d probe ok!\n",lcdc_dev->id);
1027
1028         return 0;
1029
1030 err4:
1031         free_irq(lcdc_dev->irq,lcdc_dev);
1032 err3:
1033         iounmap(lcdc_dev->reg_vir_base);
1034 err2:
1035         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
1036 err1:
1037         kfree(screen);
1038 err0:
1039         platform_set_drvdata(pdev, NULL);
1040         kfree(lcdc_dev);
1041         return ret;
1042
1043 }
1044 static int __devexit rk3066b_lcdc_remove(struct platform_device *pdev)
1045 {
1046         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1047         rk_fb_unregister(&(lcdc_dev->driver));
1048         rk3066b_lcdc_deinit(lcdc_dev);
1049         iounmap(lcdc_dev->reg_vir_base);
1050         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1051         kfree(lcdc_dev->screen);
1052         kfree(lcdc_dev);
1053         return 0;
1054 }
1055
1056 static void rk3066b_lcdc_shutdown(struct platform_device *pdev)
1057 {
1058         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1059         if(lcdc_dev->driver.cur_screen->standby) //standby the screen if necessary
1060                 lcdc_dev->driver.cur_screen->standby(1);
1061         if(lcdc_dev->driver.screen_ctr_info->io_disable) //power off the screen if necessary
1062                 lcdc_dev->driver.screen_ctr_info->io_disable();
1063         if(lcdc_dev->driver.cur_screen->sscreen_set) //turn off  lvds if necessary
1064                 lcdc_dev->driver.cur_screen->sscreen_set(lcdc_dev->driver.cur_screen , 0);
1065         rk_fb_unregister(&(lcdc_dev->driver));
1066         rk3066b_lcdc_deinit(lcdc_dev);
1067         /*iounmap(lcdc_dev->reg_vir_base);
1068         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1069         kfree(lcdc_dev->screen);
1070         kfree(lcdc_dev);*/
1071 }
1072
1073
1074 static struct platform_driver rk3066b_lcdc_driver = {
1075         .probe          = rk3066b_lcdc_probe,
1076         .remove         = __devexit_p(rk3066b_lcdc_remove),
1077         .driver         = {
1078                 .name   = "rk30-lcdc",
1079                 .owner  = THIS_MODULE,
1080         },
1081         .suspend        = rk3066b_lcdc_suspend,
1082         .resume         = rk3066b_lcdc_resume,
1083         .shutdown       = rk3066b_lcdc_shutdown,
1084 };
1085
1086 static int __init rk3066b_lcdc_init(void)
1087 {
1088         return platform_driver_register(&rk3066b_lcdc_driver);
1089 }
1090
1091 static void __exit rk3066b_lcdc_exit(void)
1092 {
1093         platform_driver_unregister(&rk3066b_lcdc_driver);
1094 }
1095
1096
1097
1098 fs_initcall(rk3066b_lcdc_init);
1099 module_exit(rk3066b_lcdc_exit);
1100
1101
1102