rk3066b lcdc:dynamic gating lcdc clk
[firefly-linux-kernel-4.4.55.git] / drivers / video / rockchip / lcdc / rk3066b_lcdc.c
1 /*
2  * drivers/video/rockchip/chips/rk3066b_lcdc.c
3  *
4  * Copyright (C) 2012 ROCKCHIP, Inc.
5  *Author:yzq<yzq@rock-chips.com>
6  *      yxj<yxj@rock-chips.com>
7  *This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/slab.h>
24 #include <linux/device.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/platform_device.h>
29 #include <linux/clk.h>
30 #include <linux/earlysuspend.h>
31 #include <asm/div64.h>
32 #include <asm/uaccess.h>
33 #include <mach/iomux.h>
34
35 #include "rk3066b_lcdc.h"
36
37
38
39
40
41
42 static int dbg_thresd = 0;
43 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
44 #define DBG(level,x...) do { if(unlikely(dbg_thresd >= level)) printk(KERN_INFO x); } while (0)
45
46
47 static int  rk3066b_lcdc_clk_enable(struct rk3066b_lcdc_device *lcdc_dev)
48 {
49
50         clk_enable(lcdc_dev->hclk);
51         clk_enable(lcdc_dev->dclk);
52         clk_enable(lcdc_dev->aclk);
53         clk_enable(lcdc_dev->pd);
54
55         spin_lock(&lcdc_dev->reg_lock);
56         lcdc_dev->clk_on = 1;
57         spin_unlock(&lcdc_dev->reg_lock);
58         printk("rk3066b lcdc%d clk enable...\n",lcdc_dev->id);
59         
60         return 0;
61 }
62
63 static int rk3066b_lcdc_clk_disable(struct rk3066b_lcdc_device *lcdc_dev)
64 {
65         spin_lock(&lcdc_dev->reg_lock);
66         lcdc_dev->clk_on = 0;
67         spin_unlock(&lcdc_dev->reg_lock);
68         mdelay(25);
69         clk_disable(lcdc_dev->dclk);
70         clk_disable(lcdc_dev->hclk);
71         clk_disable(lcdc_dev->aclk);
72         clk_disable(lcdc_dev->pd);
73         printk("rk3066b lcdc%d clk disable...\n",lcdc_dev->id);
74         
75         return 0;
76 }
77
78 static int rk3066b_lcdc_reg_resume(struct rk3066b_lcdc_device *lcdc_dev)
79 {
80         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0x9C);
81         return 0;       
82 }
83
84 static int init_rk3066b_lcdc(struct rk_lcdc_device_driver *dev_drv)
85 {
86         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
87         int v;
88         
89         if(lcdc_dev->id == 0) //lcdc0
90         {
91                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
92                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0"); 
93                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
94                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
95         }
96         else if(lcdc_dev->id == 1)
97         {
98                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
99                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");  
100                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
101                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
102         }
103         else
104         {
105                 printk(KERN_ERR "invalid lcdc device!\n");
106                 return -EINVAL;
107         }
108         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
109         {
110                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
111         }
112
113         rk3066b_lcdc_clk_enable(lcdc_dev);
114         
115         if(lcdc_dev->id == 0)
116         {
117                 #if defined(CONFIG_RK3066B_LCDC0_IO_18V)
118                 v = 0x40004000;               //bit14: 1,1.8v;0,3.3v
119                 writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
120                 #else
121                 v = 0x40000000;              
122                 writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
123                 #endif
124         }
125
126         if(lcdc_dev->id == 1) //iomux for lcdc1
127         {
128                 #if defined(CONFIG_RK3066B_LCDC1_IO_18V)
129                 v = 0x80008000;               //bit14: 1,1.8v;0,3.3v
130                 writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
131                 #else
132                 v = 0x80000000;
133                 writel_relaxed(v,RK30_GRF_BASE + GRF_IO_CON4);
134                 #endif
135                 
136                 iomux_set(LCDC1_DCLK);
137                 iomux_set(LCDC1_DEN);
138                 iomux_set(LCDC1_HSYNC);
139                 iomux_set(LCDC1_VSYNC);
140                 iomux_set(LCDC1_D0);
141                 iomux_set(LCDC1_D1);
142                 iomux_set(LCDC1_D2);
143                 iomux_set(LCDC1_D3);
144                 iomux_set(LCDC1_D4);
145                 iomux_set(LCDC1_D5);
146                 iomux_set(LCDC1_D6);
147                 iomux_set(LCDC1_D7);
148                 iomux_set(LCDC1_D8);
149                 iomux_set(LCDC1_D9);
150                 iomux_set(LCDC1_D10);
151                 iomux_set(LCDC1_D11);
152                 iomux_set(LCDC1_D12);
153                 iomux_set(LCDC1_D13);
154                 iomux_set(LCDC1_D14);
155                 iomux_set(LCDC1_D15);
156                 iomux_set(LCDC1_D16);
157                 iomux_set(LCDC1_D17);
158                 iomux_set(LCDC1_D18);
159                 iomux_set(LCDC1_D19);
160                 iomux_set(LCDC1_D20);
161                 iomux_set(LCDC1_D21);
162                 iomux_set(LCDC1_D22);
163                 iomux_set(LCDC1_D23);
164                 
165         }
166         LcdMskReg(lcdc_dev,SYS_CFG, m_LCDC_AXICLK_AUTO_ENABLE | m_W0_AXI_OUTSTANDING2 |
167                 m_W1_AXI_OUTSTANDING2,v_LCDC_AXICLK_AUTO_ENABLE(1) | v_W0_AXI_OUTSTANDING2(1) |
168                 v_W1_AXI_OUTSTANDING2(1));//eanble axi-clk auto gating for low power
169          LcdWrReg(lcdc_dev,AXI_MS_ID,v_HWC_CHANNEL_ID(5) | v_WIN2_CHANNEL_ID(4) |
170                 v_WIN1_YRGB_CHANNEL_ID(3) | v_WIN0_CBR_CHANNEL_ID(2) | 
171                 v_WIN0_YRGB_CHANNEL_ID(1));
172         LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK | 
173               m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) | 
174               v_SCANNING_MASK(1));  //mask all interrupt in init
175         LcdMskReg(lcdc_dev,FIFO_WATER_MARK,m_WIN1_FIFO_FULL_LEVEL,v_WIN1_FIFO_FULL_LEVEL(0x1e0));
176         //LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
177
178         rk3066b_lcdc_clk_disable(lcdc_dev);
179         return 0;
180 }
181
182 static int rk3066b_lcdc_deinit(struct rk3066b_lcdc_device *lcdc_dev)
183 {
184         spin_lock(&lcdc_dev->reg_lock);
185         if(likely(lcdc_dev->clk_on))
186         {
187                 lcdc_dev->clk_on = 0;
188                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
189                 LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK | 
190                           m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) | 
191                           v_SCANNING_MASK(1));  //mask all interrupt in init
192                 LcdSetBit(lcdc_dev,SYS_CFG,m_LCDC_STANDBY);
193                 LCDC_REG_CFG_DONE();
194                 spin_unlock(&lcdc_dev->reg_lock);
195         }
196         else   //clk already disabled 
197         {
198                 spin_unlock(&lcdc_dev->reg_lock);
199                 return 0;
200         }
201         mdelay(1);
202         
203         return 0;
204 }
205
206 static int rk3066b_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
207 {
208         int ret = -EINVAL;
209         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
210         rk_screen *screen = dev_drv->cur_screen;
211         u64 ft;
212         int fps;
213         u16 face;
214         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
215         u16 right_margin = screen->right_margin;
216         u16 lower_margin = screen->lower_margin;
217         u16 x_res = screen->x_res, y_res = screen->y_res;
218
219         // set the rgb or mcu
220         spin_lock(&lcdc_dev->reg_lock);
221         if(likely(lcdc_dev->clk_on))
222         {
223                 if(screen->type==SCREEN_MCU)
224                 {
225                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
226                         // set out format and mcu timing
227                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
228                         if(mcu_total>31)    
229                                 mcu_total = 31;
230                         if(mcu_total<3)    
231                                 mcu_total = 3;
232                         mcu_rwstart = (mcu_total+1)/4 - 1;
233                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
234                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
235                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
236
237                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
238                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
239
240                         // set horizontal & vertical out timing
241                 
242                         right_margin = x_res/6; 
243                         screen->pixclock = 150000000; //mcu fix to 150 MHz
244                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
245                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
246                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
247                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
248                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
249         
250                 }
251
252                 switch (screen->face)
253                 {
254                         case OUT_P565:
255                                 face = OUT_P565;
256                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
257                                 break;
258                         case OUT_P666:
259                                 face = OUT_P666;
260                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
261                                 break;
262                         case OUT_D888_P565:
263                                 face = OUT_P888;
264                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
265                                 break;
266                         case OUT_D888_P666:
267                                 face = OUT_P888;
268                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
269                                 break;
270                         case OUT_P888:
271                                 face = OUT_P888;
272                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
273                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
274                                 break;
275                         default:
276                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
277                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
278                                 face = screen->face;
279                                 break;
280                 }
281
282                 //use default overlay,set vsyn hsync den dclk polarity
283                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
284                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) | 
285                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
286                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
287
288                 //set background color to black,set swap according to the screen panel,disable blank mode
289                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE | m_BLACK_MODE | m_BG_COLOR, v_BLANK_MODE(0) | 
290                                         v_BLACK_MODE(0) | v_BG_COLOR(0x000000));
291                 LcdMskReg(lcdc_dev,SWAP_CTRL,m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP | m_DUMMY_SWAP, 
292                                         v_OUTPUT_RB_SWAP(screen->swap_rb) | v_OUTPUT_RG_SWAP(screen->swap_rg) | 
293                                         v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy));
294                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
295                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
296                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
297                      v_HASP(screen->hsync_len + screen->left_margin));
298
299                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
300                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
301                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
302                       v_VASP(screen->vsync_len + screen->upper_margin));
303                 // let above to take effect
304                 //LCDC_REG_CFG_DONE();
305         }
306         spin_unlock(&lcdc_dev->reg_lock);
307
308         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
309         if(ret)
310         {
311                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
312         }
313         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
314         
315         
316         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
317                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
318                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
319         fps = div64_u64(1000000000000llu,ft);
320         screen->ft = 1000/fps;
321         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
322
323         if(screen->init)
324         {
325                 screen->init();
326         }
327         if(screen->sscreen_set)
328         {
329                 screen->sscreen_set(screen,!initscreen);
330         }
331         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
332         return 0;
333 }
334
335 static int mcu_refresh(struct rk3066b_lcdc_device *lcdc_dev)
336 {
337    
338     return 0;
339 }
340
341
342
343 //enable layer,open:1,enable;0 disable
344 static int win0_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
345 {
346         
347         spin_lock(&lcdc_dev->reg_lock);
348         if(likely(lcdc_dev->clk_on))
349         {
350                 if(open)
351                 {
352                         if(!lcdc_dev->atv_layer_cnt)
353                         {
354                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
355                         }
356                         lcdc_dev->atv_layer_cnt++;
357                 }
358                 else
359                 {
360                         lcdc_dev->atv_layer_cnt--;
361                 }
362                 lcdc_dev->driver.layer_par[0]->state = open;
363                 
364                 LcdMskReg(lcdc_dev, SYS_CFG, m_W0_EN, v_W0_EN(open));
365                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
366                 {
367                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
368                 }
369                 //LCDC_REG_CFG_DONE();  
370         }
371         spin_unlock(&lcdc_dev->reg_lock);
372         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
373         return 0;
374 }
375 static int win1_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
376 {
377         spin_lock(&lcdc_dev->reg_lock);
378         if(likely(lcdc_dev->clk_on))
379         {
380                 if(open)
381                 {
382                         if(!lcdc_dev->atv_layer_cnt)
383                         {
384                                 printk("lcdc%d wakeup from stanby\n",lcdc_dev->id);
385                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
386                         }
387                         lcdc_dev->atv_layer_cnt++;
388                 }
389                 else
390                 {
391                         lcdc_dev->atv_layer_cnt--;
392                 }
393                 lcdc_dev->driver.layer_par[1]->state = open;
394                 
395                 LcdMskReg(lcdc_dev, SYS_CFG, m_W1_EN, v_W1_EN(open));
396                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
397                 {
398                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
399                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
400                 }
401                 LCDC_REG_CFG_DONE();
402         }
403         spin_unlock(&lcdc_dev->reg_lock);
404         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
405         return 0;
406 }
407
408
409 static int rk3066b_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
410 {
411         struct rk3066b_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk3066b_lcdc_device ,driver);
412
413         spin_lock(&lcdc_dev->reg_lock);
414         if(likely(lcdc_dev->clk_on))
415         {
416                 switch(blank_mode)
417                 {
418                         case FB_BLANK_UNBLANK:
419                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
420                                 break;
421                         case FB_BLANK_NORMAL:
422                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
423                                 break;
424                         default:
425                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
426                                 break;
427                 }
428                 LCDC_REG_CFG_DONE();
429                 printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
430         }
431         spin_unlock(&lcdc_dev->reg_lock);
432         
433         return 0;
434 }
435
436 static  int win0_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
437 {
438         u32 y_addr;
439         u32 uv_addr;
440         y_addr = par->smem_start + par->y_offset;
441         uv_addr = par->cbr_start + par->c_offset;
442         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
443
444         spin_lock(&lcdc_dev->reg_lock);
445         if(likely(lcdc_dev->clk_on))
446         {
447                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST,y_addr);
448                 LcdWrReg(lcdc_dev, WIN0_CBR_MST,uv_addr);
449                 LCDC_REG_CFG_DONE();
450         }
451         spin_unlock(&lcdc_dev->reg_lock);
452
453         return 0;
454         
455 }
456
457 static  int win1_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
458 {
459         u32 y_addr;
460         u32 uv_addr;
461         y_addr = par->smem_start + par->y_offset;
462         uv_addr = par->cbr_start + par->c_offset;
463         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
464         
465         spin_lock(&lcdc_dev->reg_lock);
466         if(likely(lcdc_dev->clk_on))
467         {
468                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
469                 LCDC_REG_CFG_DONE();
470         }
471         spin_unlock(&lcdc_dev->reg_lock);
472         
473         return 0;
474 }
475
476 static  int win0_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
477         struct layer_par *par )
478 {
479         u32 xact, yact, xvir, yvir, xpos, ypos;
480         u32 ScaleYrgbX = 0x1000;
481         u32 ScaleYrgbY = 0x1000;
482         u32 ScaleCbrX = 0x1000;
483         u32 ScaleCbrY = 0x1000;
484         u8 fmt_cfg =0 ; //data format register config value
485         char fmt[9] = "NULL";
486         xact = par->xact;                           //active (origin) picture window width/height               
487         yact = par->yact;
488         xvir = par->xvir;                          // virtual resolution                
489         yvir = par->yvir;
490         xpos = par->xpos+screen->left_margin + screen->hsync_len;
491         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
492    
493         DBG(1,"%s for lcdc%d>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
494                 __func__,lcdc_dev->id,get_format_string(par->format,fmt),xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
495         
496         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
497         ScaleYrgbY = CalScale(yact, par->ysize);
498         switch (par->format)
499         {
500                 case XBGR888:
501                 case ABGR888:
502                 case ARGB888:
503                         fmt_cfg = 0;
504                         break;
505                 case RGB565:
506                         fmt_cfg = 1;
507                         break;
508                 case YUV422:// yuv422
509                         fmt_cfg = 2;
510                         ScaleCbrX = CalScale((xact/2), par->xsize);
511                         ScaleCbrY = CalScale(yact, par->ysize);
512                         break;
513                 case YUV420: // yuv420
514                         fmt_cfg = 3;
515                         ScaleCbrX = CalScale(xact/2, par->xsize);
516                         ScaleCbrY = CalScale(yact/2, par->ysize);
517                         break;
518                 case YUV444:// yuv444
519                         fmt_cfg = 4;
520                         ScaleCbrX = CalScale(xact, par->xsize);
521                         ScaleCbrY = CalScale(yact, par->ysize);
522                         break;
523                 default:
524                         printk("%s:un supported format\n",__func__);
525                    break;
526         }
527
528         
529         spin_lock(&lcdc_dev->reg_lock);
530         if(likely(lcdc_dev->clk_on))
531         {
532                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
533                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
534                 LcdMskReg(lcdc_dev,SYS_CFG, m_W0_FORMAT, v_W0_FORMAT(fmt_cfg));         //(inf->video_mode==0)
535                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
536                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
537                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
538                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
539                         v_COLORKEY_EN(0) | v_KEYCOLOR(0));
540                 LcdWrReg(lcdc_dev,WIN0_VIR,v_VIRWIDTH(xvir));
541                 //LCDC_REG_CFG_DONE();
542         }
543         spin_unlock(&lcdc_dev->reg_lock);
544
545     return 0;
546
547 }
548
549 static int win1_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
550         struct layer_par *par )
551 {
552         u32 xact, yact, xvir, yvir, xpos, ypos;
553         u8 fmt_cfg;
554         char fmt[9]="NULL";
555         xact = par->xact;                       
556         yact = par->yact;
557         xvir = par->xvir;               
558         yvir = par->yvir;
559         xpos = par->xpos+screen->left_margin + screen->hsync_len;
560         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
561         
562         
563         DBG(1,"%s for lcdc%d>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
564                 __func__,lcdc_dev->id,get_format_string(par->format,fmt),xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
565
566         
567         spin_lock(&lcdc_dev->reg_lock);
568         if(likely(lcdc_dev->clk_on))
569         {
570                 switch (par->format)
571                 {
572                         case XBGR888:
573                         case ABGR888:
574                         case ARGB888:
575                                 fmt_cfg = 0;
576                                 break;
577                         case RGB565:
578                                 fmt_cfg = 1;
579                                 break;
580                         default:
581                                 printk("%s:un supported format\n",__func__);
582                                 break;
583                 }
584
585                 LcdMskReg(lcdc_dev,SYS_CFG, m_W1_FORMAT, v_W1_FORMAT(fmt_cfg));
586                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
587                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
588                 // enable win1 color key and set the color to black(rgb=0)
589                 LcdMskReg(lcdc_dev,WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
590                 LcdWrReg(lcdc_dev,WIN1_VIR,v_VIRWIDTH(xvir));
591                 
592                 //LCDC_REG_CFG_DONE(); 
593         }
594         spin_unlock(&lcdc_dev->reg_lock);
595     return 0;
596 }
597
598 static int rk3066b_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
599 {
600         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
601
602         if((open) && (!lcdc_dev->atv_layer_cnt)) //enable clk,when first layer open
603         {
604                 rk3066b_lcdc_clk_enable(lcdc_dev);
605                 rk3066b_lcdc_reg_resume(lcdc_dev); //resume reg
606                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
607                 rk3066b_load_screen(dev_drv,1);
608         }
609         if(layer_id == 0)
610         {
611                 win0_open(lcdc_dev,open);       
612         }
613         else if(layer_id == 1)
614         {
615                 win1_open(lcdc_dev,open);
616         }
617         
618         if((!open) && (!lcdc_dev->atv_layer_cnt))  //when all layer closed,disable clk
619         {
620                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
621                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
622                 LCDC_REG_CFG_DONE();
623                 rk3066b_lcdc_clk_disable(lcdc_dev);
624         }
625         return 0;
626 }
627
628 static int rk3066b_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
629 {
630         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
631         struct layer_par *par = NULL;
632         rk_screen *screen = dev_drv->cur_screen;
633         if(!screen)
634         {
635                 printk(KERN_ERR "screen is null!\n");
636                 return -ENOENT;
637         }
638         if(layer_id==0)
639         {
640                 par = dev_drv->layer_par[0];
641                 win0_set_par(lcdc_dev,screen,par);
642         }
643         else if(layer_id==1)
644         {
645                 par = dev_drv->layer_par[1];
646                 win1_set_par(lcdc_dev,screen,par);
647         }
648         
649         return 0;
650 }
651
652 int rk3066b_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
653 {
654         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
655         struct layer_par *par = NULL;
656         rk_screen *screen = dev_drv->cur_screen;
657         unsigned long flags;
658         int timeout;
659         if(!screen)
660         {
661                 printk(KERN_ERR "screen is null!\n");
662                 return -ENOENT; 
663         }
664         if(layer_id==0)
665         {
666                 par = dev_drv->layer_par[0];
667                 win0_display(lcdc_dev,par);
668         }
669         else if(layer_id==1)
670         {
671                 par = dev_drv->layer_par[1];
672                 win1_display(lcdc_dev,par);
673         }
674         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
675         {
676                 dev_drv->first_frame = 0;
677                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_STARTCLEAR | m_FRM_STARTMASK ,
678                           v_FRM_STARTCLEAR(1) | v_FRM_STARTMASK(0));
679                 LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
680                  
681         }
682
683 #if 0
684         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
685         {
686                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
687                 init_completion(&dev_drv->frame_done);
688                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
689                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->cur_screen->ft+5));
690                 if(!timeout&&(!dev_drv->frame_done.done))
691                 {
692                         printk(KERN_ERR "wait for new frame start time out!\n");
693                         return -ETIMEDOUT;
694                 }
695         }
696 #endif
697         
698         return 0;
699 }
700
701 int rk3066b_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
702 {
703         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
704         u32 panel_size[2];
705         void __user *argp = (void __user *)arg;
706         int ret = 0;
707         switch(cmd)
708         {
709                 case RK_FBIOGET_PANEL_SIZE:    //get panel size
710                         panel_size[0] = lcdc_dev->screen->x_res;
711                         panel_size[1] = lcdc_dev->screen->y_res;
712                         if(copy_to_user(argp, panel_size, 8)) 
713                                 return -EFAULT;
714                         break;
715                 default:
716                         break;
717         }
718
719         return ret;
720 }
721 static int rk3066b_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
722 {
723         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
724         struct layer_par *par = dev_drv->layer_par[layer_id];
725
726         spin_lock(&lcdc_dev->reg_lock);
727         if(lcdc_dev->clk_on)
728         {
729                 if(layer_id == 0)
730                 {
731                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W0_EN);
732                 }
733                 else if( layer_id == 1)
734                 {
735                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W1_EN);
736                 }
737         }
738         spin_unlock(&lcdc_dev->reg_lock);
739         
740         return par->state;
741         
742 }
743
744 /***********************************
745 overlay manager
746 swap:1 win0 on the top of win1
747         0 win1 on the top of win0
748 set  : 1 set overlay 
749         0 get overlay state
750 ************************************/
751 static int rk3066b_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
752 {
753         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
754         int ovl;
755         spin_lock(&lcdc_dev->reg_lock);
756         if(lcdc_dev->clk_on)
757         {
758                 if(set)  //set overlay
759                 {
760                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
761                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
762                         LCDC_REG_CFG_DONE();
763                         ovl = swap;
764                 }
765                 else  //get overlay
766                 {
767                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
768                 }
769         }
770         else
771         {
772                 ovl = -EPERM;
773         }
774         spin_unlock(&lcdc_dev->reg_lock);
775
776         return ovl;
777 }
778
779 static ssize_t rk3066b_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,char *buf,int layer_id)
780
781 {
782         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
783         char format_w0[9]= "NULL";
784         char format_w1[9]= "NULL";
785         char status_w0[9]= "NULL";
786         char status_w1[9]= "NULL";
787         u32 fmt_id = LcdRdReg(lcdc_dev,SYS_CFG);
788         u32 act_info,dsp_info,dsp_st,factor;
789         u16 xvir_w0,x_act_w0,y_act_w0,x_dsp_w0,y_dsp_w0,x_st_w0,y_st_w0;
790         u16 xvir_w1,x_dsp_w1,y_dsp_w1,x_st_w1,y_st_w1;
791         u16 x_scale,y_scale;
792         int ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
793
794         switch((fmt_id&m_W0_FORMAT)>>3)
795         {
796                 case 0:
797                         strcpy(format_w0,"ARGB888");
798                         break;
799                 case 1:
800                         strcpy(format_w0,"RGB565");
801                         break;
802                 case 2:
803                         strcpy(format_w0,"YCbCr422");
804                         break;
805                 case 3:
806                         strcpy(format_w0,"YCbCr420");
807                         break;
808                 case 5:
809                         strcpy(format_w0,"YCbCr444");
810                         break;
811                 default:
812                         strcpy(format_w0,"invalid\n");
813                         break;
814         }
815
816          switch((fmt_id&m_W1_FORMAT)>>2)
817         {
818                 case 0:
819                         strcpy(format_w1,"ARGB888");
820                         break;
821                 case 1:
822                         strcpy(format_w1,"RGB565");
823                         break;
824                 default:
825                         strcpy(format_w1,"invalid\n");
826                         break;
827         }
828
829         if((fmt_id&m_W0_EN)>>11)
830         {
831                 strcpy(status_w0,"enabled");
832         }
833         else
834         {
835                 strcpy(status_w0,"disabled");
836         }
837
838         if((fmt_id&m_W1_EN)>>10)
839         {
840                 strcpy(status_w1,"enabled");
841         }
842         else
843         {
844                 strcpy(status_w1,"disabled");
845         }
846
847         xvir_w0 = LcdRdReg(lcdc_dev,WIN0_VIR)&0xffff;
848         act_info = LcdRdReg(lcdc_dev,WIN0_ACT_INFO);
849         dsp_info = LcdRdReg(lcdc_dev,WIN0_DSP_INFO);
850         dsp_st = LcdRdReg(lcdc_dev,WIN0_DSP_ST);
851         factor = LcdRdReg(lcdc_dev,WIN0_SCL_FACTOR_YRGB);
852         x_act_w0 =  (act_info&0xffff);
853         y_act_w0 = (act_info>>16);
854         x_dsp_w0 = (dsp_info&0x7ff);
855         y_dsp_w0 = (dsp_info>>16);
856         x_scale = 4096*100/(factor&0xffff);
857         y_scale = 4096*100/(factor>>16);
858         x_st_w0 = dsp_st&0xffff;
859         y_st_w0 = dsp_st>>16;
860
861         
862         xvir_w1 = LcdRdReg(lcdc_dev,WIN1_VIR)&0xffff;
863         dsp_info = LcdRdReg(lcdc_dev,WIN1_DSP_INFO);
864         dsp_st = LcdRdReg(lcdc_dev,WIN1_DSP_ST);
865         x_dsp_w1 = dsp_info&0x7ff;
866         y_dsp_w1 = dsp_info>>16;
867         x_st_w1 = dsp_st&0xffff;
868         y_st_w1 = dsp_st>>16;
869
870         return snprintf(buf,PAGE_SIZE,
871                 "win0:%s\n"
872                 "xvir:%d\n"
873                 "xact:%d\n"
874                 "yact:%d\n"
875                 "xdsp:%d\n"
876                 "ydsp:%d\n"
877                 "x_st:%d\n"
878                 "y_st:%d\n"
879                 "x_scale:%d.%d\n"
880                 "y_scale:%d.%d\n"
881                 "format:%s\n"
882                 "YRGB buffer addr:0x%08x\n"
883                 "CBR buffer addr:0x%08x\n\n"
884                 "win1:%s\n"
885                 "xvir:%d\n"
886                 "xdsp:%d\n"
887                 "ydsp:%d\n"
888                 "x_st:%d\n"
889                 "y_st:%d\n"
890                 "format:%s\n"
891                 "YRGB buffer addr:0x%08x\n"
892                 "overlay:%s\n",
893                 status_w0,
894                 xvir_w0,
895                 x_act_w0,
896                 y_act_w0,
897                 x_dsp_w0,
898                 y_dsp_w0,
899                 x_st_w0,
900                 y_st_w0,
901                 x_scale/100,
902                 x_scale%100,
903                 y_scale/100,
904                 y_scale%100,
905                 format_w0,
906                 LcdRdReg(lcdc_dev,WIN0_YRGB_MST),
907                 LcdRdReg(lcdc_dev,WIN0_CBR_MST),
908                 status_w1,
909                 xvir_w1,
910                 x_dsp_w1,
911                 y_dsp_w1,
912                 x_st_w1,
913                 y_st_w1,
914                 format_w1,
915                 LcdRdReg(lcdc_dev,WIN1_YRGB_MST),
916                 ovl ? "win0 on the top of win1\n":"win1 on the top of win0\n");
917         return 0;
918 }
919
920
921 /*******************************************
922 lcdc fps manager,set or get lcdc fps
923 set:0 get
924      1 set
925 ********************************************/
926 static int rk3066b_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
927 {
928         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
929         rk_screen * screen = dev_drv->cur_screen;
930         u64 ft = 0;
931         u32 dotclk;
932         int ret;
933
934         if(set)
935         {
936                 ft = div_u64(1000000000000llu,fps);
937                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
938                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
939                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
940                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
941                 if(ret)
942                 {
943                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
944                 }
945                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
946                         
947         }
948         
949         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
950         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
951         (dev_drv->pixclock);       // one frame time ,(pico seconds)
952         fps = div64_u64(1000000000000llu,ft);
953         screen->ft = 1000/fps ;  //one frame time in ms
954         return fps;
955 }
956
957 static int rk3066b_fb_layer_remap(struct rk_lcdc_device_driver *dev_drv,
958         enum fb_win_map_order order)
959 {
960         mutex_lock(&dev_drv->fb_win_id_mutex);
961         if(order == FB_DEFAULT_ORDER)
962         {
963                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;
964         }
965         dev_drv->fb2_win_id  = order/100;
966         dev_drv->fb1_win_id = (order/10)%10;
967         dev_drv->fb0_win_id = order%10;
968         mutex_unlock(&dev_drv->fb_win_id_mutex);
969
970         printk("fb0:win%d\nfb1:win%d\nfb2:win%d\n",dev_drv->fb0_win_id,dev_drv->fb1_win_id,
971                 dev_drv->fb2_win_id);
972
973         return 0;
974 }
975
976 static int rk3066b_fb_get_layer(struct rk_lcdc_device_driver *dev_drv,const char *id)
977 {
978         int layer_id = 0;
979         mutex_lock(&dev_drv->fb_win_id_mutex);
980         if(!strcmp(id,"fb0") || !strcmp(id,"fb2"))
981         {
982                 layer_id = dev_drv->fb0_win_id;
983         }
984         else if(!strcmp(id,"fb1") || !strcmp(id,"fb3"))
985         {
986                 layer_id = dev_drv->fb1_win_id;
987         }
988         else
989         {
990                 printk(KERN_ERR "%s>>un supported %s\n",__func__,id);
991                 layer_id = -1;
992         }
993         mutex_unlock(&dev_drv->fb_win_id_mutex);
994         
995         return  layer_id;
996 }
997
998
999 static void rk3066b_lcdc_reg_dump(struct rk3066b_lcdc_device *lcdc_dev)
1000 {
1001         int *cbase =  (int *)lcdc_dev->reg_vir_base;
1002         int i,j;
1003         
1004         for(i=0; i<=(0xa0>>4);i++)
1005         {
1006                 for(j=0;j<4;j++)
1007                         printk("%08x  ",readl(cbase+i*4 +j));
1008                 printk("\n");
1009         }
1010         
1011 }
1012
1013 int rk3066b_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
1014 {
1015         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
1016
1017         if(dev_drv->screen0->standby)
1018                 dev_drv->screen0->standby(1);
1019         if(dev_drv->screen_ctr_info->io_disable)
1020                 dev_drv->screen_ctr_info->io_disable();
1021         
1022         spin_lock(&lcdc_dev->reg_lock);
1023         if(likely(lcdc_dev->clk_on))
1024         {
1025                 lcdc_dev->clk_on = 0;
1026                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
1027                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
1028                 LCDC_REG_CFG_DONE();
1029                 spin_unlock(&lcdc_dev->reg_lock);
1030         }
1031         else  //clk already disabled
1032         {
1033                 spin_unlock(&lcdc_dev->reg_lock);
1034                 return 0;
1035         }
1036         
1037                 
1038         mdelay(30);
1039         clk_disable(lcdc_dev->dclk);
1040         clk_disable(lcdc_dev->hclk);
1041         clk_disable(lcdc_dev->aclk);
1042         clk_disable(lcdc_dev->pd);
1043
1044         return 0;
1045 }
1046
1047
1048 int rk3066b_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
1049 {  
1050         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
1051
1052         if(dev_drv->screen_ctr_info->io_enable)                 //power on
1053                 dev_drv->screen_ctr_info->io_enable();
1054         
1055         if(!lcdc_dev->clk_on)
1056         {
1057                 clk_enable(lcdc_dev->pd);
1058                 clk_enable(lcdc_dev->hclk);
1059                 clk_enable(lcdc_dev->dclk);
1060                 clk_enable(lcdc_dev->aclk);
1061         }
1062         mdelay(5);
1063         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0x24);  //resume reg ,skip INT_STATUS reg
1064         memcpy(((u8*)lcdc_dev->preg) + 0x28,((u8*)&lcdc_dev->regbak) + 0x28, 0x74);
1065
1066         spin_lock(&lcdc_dev->reg_lock);
1067         if(lcdc_dev->atv_layer_cnt)
1068         {
1069                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
1070                 LcdMskReg(lcdc_dev, INT_STATUS, m_SCANNING_CLEAR | m_FRM_STARTCLEAR | m_HOR_STARTCLEAR |
1071                                         m_SCANNING_MASK | m_HOR_STARTMASK | m_FRM_STARTMASK , 
1072                                         v_SCANNING_CLEAR(1) | v_FRM_STARTCLEAR(1) | v_HOR_STARTCLEAR(1) | 
1073                                         v_SCANNING_MASK(1) | v_FRM_STARTMASK(0) | v_HOR_STARTMASK(1));
1074                 LCDC_REG_CFG_DONE();
1075         }
1076         lcdc_dev->clk_on = 1;
1077         spin_unlock(&lcdc_dev->reg_lock);
1078
1079         if(!lcdc_dev->atv_layer_cnt)
1080                 rk3066b_lcdc_clk_disable(lcdc_dev);
1081         
1082         if(dev_drv->screen0->standby)
1083                 dev_drv->screen0->standby(0);         //screen wake up
1084         
1085         return 0;
1086 }
1087 static irqreturn_t rk3066b_lcdc_isr(int irq, void *dev_id)
1088 {
1089         struct rk3066b_lcdc_device *lcdc_dev = (struct rk3066b_lcdc_device *)dev_id;
1090         ktime_t timestamp = ktime_get();
1091         
1092         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
1093         
1094         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
1095
1096 #if 0
1097         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
1098         {
1099                 spin_lock(&(lcdc_dev->driver.cpl_lock));
1100                 complete(&(lcdc_dev->driver.frame_done));
1101                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
1102         }
1103 #endif
1104
1105         lcdc_dev->driver.vsync_info.timestamp = timestamp;
1106         wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
1107         
1108         return IRQ_HANDLED;
1109 }
1110
1111 static struct layer_par lcdc_layer[] = {
1112         [0] = {
1113                 .name           = "win0",
1114                 .id             = 0,
1115                 .support_3d     = true,
1116         },
1117         [1] = {
1118                 .name           = "win1",
1119                 .id             = 1,
1120                 .support_3d     = false,
1121         },
1122 };
1123
1124 static struct rk_lcdc_device_driver lcdc_driver = {
1125         .name                   = "lcdc",
1126         .def_layer_par          = lcdc_layer,
1127         .num_layer              = ARRAY_SIZE(lcdc_layer),
1128         .open                   = rk3066b_lcdc_open,
1129         .init_lcdc              = init_rk3066b_lcdc,
1130         .ioctl                  = rk3066b_lcdc_ioctl,
1131         .suspend                = rk3066b_lcdc_early_suspend,
1132         .resume                 = rk3066b_lcdc_early_resume,
1133         .set_par                = rk3066b_lcdc_set_par,
1134         .blank                  = rk3066b_lcdc_blank,
1135         .pan_display            = rk3066b_lcdc_pan_display,
1136         .load_screen            = rk3066b_load_screen,
1137         .get_layer_state        = rk3066b_lcdc_get_layer_state,
1138         .ovl_mgr                = rk3066b_lcdc_ovl_mgr,
1139         .get_disp_info          = rk3066b_lcdc_get_disp_info,
1140         .fps_mgr                = rk3066b_lcdc_fps_mgr,
1141         .fb_get_layer           = rk3066b_fb_get_layer,
1142         .fb_layer_remap         = rk3066b_fb_layer_remap,
1143 };
1144 #ifdef CONFIG_PM
1145 static int rk3066b_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1146 {
1147         return 0;
1148 }
1149
1150 static int rk3066b_lcdc_resume(struct platform_device *pdev)
1151 {
1152         return 0;
1153 }
1154
1155 #else
1156 #define rk3066b_lcdc_suspend NULL
1157 #define rk3066b_lcdc_resume NULL
1158 #endif
1159
1160 static int __devinit rk3066b_lcdc_probe (struct platform_device *pdev)
1161 {
1162         struct rk3066b_lcdc_device *lcdc_dev=NULL;
1163         rk_screen *screen;
1164         rk_screen *screen1;
1165         struct rk29fb_info *screen_ctr_info;
1166         struct resource *res = NULL;
1167         struct resource *mem;
1168         int ret = 0;
1169         
1170         /*************Malloc rk3066blcdc_inf and set it to pdev for drvdata**********/
1171         lcdc_dev = kzalloc(sizeof(struct rk3066b_lcdc_device), GFP_KERNEL);
1172         if(!lcdc_dev)
1173         {
1174                 dev_err(&pdev->dev, ">>rk3066b lcdc device kmalloc fail!");
1175                 return -ENOMEM;
1176         }
1177         platform_set_drvdata(pdev, lcdc_dev);
1178         lcdc_dev->id = pdev->id;
1179         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
1180         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
1181         if(!screen)
1182         {
1183                 dev_err(&pdev->dev, ">>rk3066b lcdc screen kmalloc fail!");
1184                 ret =  -ENOMEM;
1185                 goto err0;
1186         }
1187         else
1188         {
1189                 lcdc_dev->screen = screen;
1190         }
1191         screen->lcdc_id = lcdc_dev->id;
1192         screen->screen_id = 0;
1193
1194 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& (defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS))
1195         screen1 =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
1196         if(!screen1)
1197         {
1198                 dev_err(&pdev->dev, ">>rk3066b lcdc screen1 kmalloc fail!");
1199                 ret =  -ENOMEM;
1200                 goto err0;
1201         }
1202         screen1->lcdc_id = 1;
1203         screen1->screen_id = 1;
1204         printk("use lcdc%d and rk610 implemention dual display!\n",lcdc_dev->id);
1205         
1206 #endif
1207         /****************get lcdc0 reg  *************************/
1208         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
1209         if (res == NULL)
1210         {
1211                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
1212                 ret = -ENOENT;
1213                 goto err1;
1214         }
1215         lcdc_dev->reg_phy_base = res->start;
1216         lcdc_dev->len = resource_size(res);
1217         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
1218         if (mem == NULL)
1219         {
1220                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
1221                 ret = -ENOENT;
1222                 goto err1;
1223         }
1224         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
1225         if (lcdc_dev->reg_vir_base == NULL)
1226         {
1227                 dev_err(&pdev->dev, "cannot map IO\n");
1228                 ret = -ENXIO;
1229                 goto err2;
1230         }
1231         
1232         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
1233         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
1234         lcdc_dev->driver.dev=&pdev->dev;
1235         lcdc_dev->driver.screen0 = screen;
1236 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& (defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS))
1237         lcdc_dev->driver.screen1 = screen1;
1238 #endif
1239         lcdc_dev->driver.cur_screen = screen;
1240         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
1241         spin_lock_init(&lcdc_dev->reg_lock);
1242         lcdc_dev->irq = platform_get_irq(pdev, 0);
1243         if(lcdc_dev->irq < 0)
1244         {
1245                 dev_err(&pdev->dev, "cannot find IRQ\n");
1246                 goto err3;
1247         }
1248         ret = request_irq(lcdc_dev->irq, rk3066b_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
1249         if (ret)
1250         {
1251                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
1252                ret = -EBUSY;
1253                goto err3;
1254         }
1255
1256         if(screen_ctr_info->set_screen_info)
1257         {
1258                 screen_ctr_info->set_screen_info(screen,screen_ctr_info->lcd_info);
1259                 if(SCREEN_NULL==screen->type)
1260                 {
1261                         printk(KERN_WARNING "no display device on lcdc%d!?\n",lcdc_dev->id);
1262                         ret = -ENODEV;
1263                 }
1264                 if(screen_ctr_info->io_init)
1265                         screen_ctr_info->io_init(NULL);
1266         }
1267         else
1268         {
1269                 printk(KERN_WARNING "no display device on lcdc%d!?\n",lcdc_dev->id);
1270                 ret =  -ENODEV;
1271                 goto err4;
1272         }
1273                 
1274         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
1275         if(ret < 0)
1276         {
1277                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
1278                 goto err4;
1279         }
1280         printk("rk3066b lcdc%d probe ok!\n",lcdc_dev->id);
1281
1282         return 0;
1283
1284 err4:
1285         free_irq(lcdc_dev->irq,lcdc_dev);
1286 err3:   
1287         iounmap(lcdc_dev->reg_vir_base);
1288 err2:
1289         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
1290 err1:
1291         kfree(screen);
1292 err0:
1293         platform_set_drvdata(pdev, NULL);
1294         kfree(lcdc_dev);
1295         return ret;
1296     
1297 }
1298 static int __devexit rk3066b_lcdc_remove(struct platform_device *pdev)
1299 {
1300         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1301         rk_fb_unregister(&(lcdc_dev->driver));
1302         rk3066b_lcdc_deinit(lcdc_dev);
1303         iounmap(lcdc_dev->reg_vir_base);
1304         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1305         kfree(lcdc_dev->screen);
1306         kfree(lcdc_dev);
1307         return 0;
1308 }
1309
1310 static void rk3066b_lcdc_shutdown(struct platform_device *pdev)
1311 {
1312         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1313         if(lcdc_dev->driver.cur_screen->standby) //standby the screen if necessary
1314                 lcdc_dev->driver.cur_screen->standby(1);
1315         if(lcdc_dev->driver.screen_ctr_info->io_disable) //power off the screen if necessary
1316                 lcdc_dev->driver.screen_ctr_info->io_disable();
1317         if(lcdc_dev->driver.cur_screen->sscreen_set) //turn off  lvds if necessary
1318                 lcdc_dev->driver.cur_screen->sscreen_set(lcdc_dev->driver.cur_screen , 0);
1319
1320         rk3066b_lcdc_deinit(lcdc_dev);
1321         rk_fb_unregister(&(lcdc_dev->driver));
1322         
1323         /*iounmap(lcdc_dev->reg_vir_base);
1324         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1325         kfree(lcdc_dev->screen);
1326         kfree(lcdc_dev);*/
1327 }
1328
1329
1330 static struct platform_driver rk3066b_lcdc_driver = {
1331         .probe          = rk3066b_lcdc_probe,
1332         .remove         = __devexit_p(rk3066b_lcdc_remove),
1333         .driver         = {
1334                 .name   = "rk30-lcdc",
1335                 .owner  = THIS_MODULE,
1336         },
1337         .suspend        = rk3066b_lcdc_suspend,
1338         .resume         = rk3066b_lcdc_resume,
1339         .shutdown       = rk3066b_lcdc_shutdown,
1340 };
1341
1342 static int __init rk3066b_lcdc_init(void)
1343 {
1344         return platform_driver_register(&rk3066b_lcdc_driver);
1345 }
1346
1347 static void __exit rk3066b_lcdc_exit(void)
1348 {
1349         platform_driver_unregister(&rk3066b_lcdc_driver);
1350 }
1351
1352
1353
1354 fs_initcall(rk3066b_lcdc_init);
1355 module_exit(rk3066b_lcdc_exit);
1356
1357
1358