drivers/video/rockchip/lcdc/rk3066b_lcdc.c

   1 /*
   2  * drivers/video/rockchip/chips/rk3066b_lcdc.c
   3  *
   4  * Copyright (C) 2012 ROCKCHIP, Inc.
   5  *Author:yzq<yzq@rock-chips.com>
   6  *      yxj<yxj@rock-chips.com>
   7  *This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <linux/earlysuspend.h>
  31 #include <asm/div64.h>
  32 #include <asm/uaccess.h>
  33 #include <mach/iomux.h>
  34
  35 #include "rk3066b_lcdc.h"
  36
  37
  38
  39
  40
  41
  42 static int dbg_thresd = 0;
  43 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
  44 #define DBG(level,x...) do { if(unlikely(dbg_thresd >= level)) printk(KERN_INFO x); } while (0)
  45
  46
  47 static int init_rk3066b_lcdc(struct rk_lcdc_device_driver *dev_drv)
  48 {
  49         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
  50         if(lcdc_dev->id == 0) //lcdc0
  51         {
  52                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
  53                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0");
  54                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
  55                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
  56         }
  57         else if(lcdc_dev->id == 1)
  58         {
  59                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
  60                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");
  61                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
  62                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
  63         }
  64         else
  65         {
  66                 printk(KERN_ERR "invalid lcdc device!\n");
  67                 return -EINVAL;
  68         }
  69         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
  70         {
  71                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
  72         }
  73         clk_enable(lcdc_dev->pd);
  74         clk_enable(lcdc_dev->hclk);  //enable aclk and hclk for register config
  75         clk_enable(lcdc_dev->aclk);
  76         lcdc_dev->clk_on = 1;
  77
  78         if(lcdc_dev->id == 1) //iomux for lcdc1
  79         {
  80                 rk30_mux_api_set(GPIO2D0_LCDC1DCLK_SMCCSN0_NAME,GPIO2D_LCDC1DCLK);
  81                 rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME,GPIO2D_LCDC1DEN);
  82                 rk30_mux_api_set(GPIO2D2_LCDC1HSYNC_SMCOEN_NAME,GPIO2D_LCDC1HSYNC);
  83                 rk30_mux_api_set(GPIO2D3_LCDC1VSYNC_SMCADVN_NAME,GPIO2D_LCDC1VSYNC);
  84                 rk30_mux_api_set(GPIO2A0_LCDC1DATA0_SMCDATA0_TRACEDATA0_NAME,GPIO2A_LCDC1DATA0);
  85                 rk30_mux_api_set(GPIO2A1_LCDC1DATA1_SMCDATA1_TRACEDATA1_NAME,GPIO2A_LCDC1DATA1);
  86                 rk30_mux_api_set(GPIO2A2_LCDC1DATA2_SMCDATA2_TRACEDATA2_NAME,GPIO2A_LCDC1DATA2);
  87                 rk30_mux_api_set(GPIO2A3_LCDC1DATA3_SMCDATA3_TRACEDATA3_NAME,GPIO2A_LCDC1DATA3);
  88                 rk30_mux_api_set(GPIO2A4_LCDC1DATA4_SMCDATA4_TRACEDATA4_NAME,GPIO2A_LCDC1DATA4);
  89                 rk30_mux_api_set(GPIO2A5_LCDC1DATA5_SMCDATA5_TRACEDATA5_NAME,GPIO2A_LCDC1DATA5);
  90                 rk30_mux_api_set(GPIO2A6_LCDC1DATA6_SMCDATA6_TRACEDATA6_NAME,GPIO2A_LCDC1DATA6);
  91                 rk30_mux_api_set(GPIO2A7_LCDC1DATA7_SMCDATA7_TRACEDATA7_NAME,GPIO2A_LCDC1DATA7);
  92                 rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME,GPIO2B_LCDC1DATA8);
  93                 rk30_mux_api_set(GPIO2B1_LCDC1DATA9_SMCDATA9_TRACEDATA9_NAME,GPIO2B_LCDC1DATA9);
  94                 rk30_mux_api_set(GPIO2B2_LCDC1DATA10_SMCDATA10_TRACEDATA10_NAME,GPIO2B_LCDC1DATA10);
  95                 rk30_mux_api_set(GPIO2B3_LCDC1DATA11_SMCDATA11_TRACEDATA11_NAME,GPIO2B_LCDC1DATA11);
  96                 rk30_mux_api_set(GPIO2B4_LCDC1DATA12_SMCDATA12_TRACEDATA12_NAME,GPIO2B_LCDC1DATA12);
  97                 rk30_mux_api_set(GPIO2B5_LCDC1DATA13_SMCDATA13_TRACEDATA13_NAME,GPIO2B_LCDC1DATA13);
  98                 rk30_mux_api_set(GPIO2B6_LCDC1DATA14_SMCDATA14_TRACEDATA14_NAME,GPIO2B_LCDC1DATA14);
  99                 rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCDATA15_TRACEDATA15_NAME,GPIO2B_LCDC1DATA15);
 100                 rk30_mux_api_set(GPIO2C0_LCDC1DATA16_SMCADDR0_TRACECLK_NAME,GPIO2C_LCDC1DATA16);
 101                 rk30_mux_api_set(GPIO2C1_LCDC1DATA17_SMCADDR1_TRACECTL_NAME,GPIO2C_LCDC1DATA17);
 102                 rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCADDR2_NAME,GPIO2C_LCDC1DATA18);
 103                 rk30_mux_api_set(GPIO2C3_LCDC1DATA19_SMCADDR3_NAME,GPIO2C_LCDC1DATA19);
 104                 rk30_mux_api_set(GPIO2C4_LCDC1DATA20_SMCADDR4_NAME,GPIO2C_LCDC1DATA20);
 105                 rk30_mux_api_set(GPIO2C5_LCDC1DATA21_SMCADDR5_NAME,GPIO2C_LCDC1DATA21);
 106                 rk30_mux_api_set(GPIO2C6_LCDC1DATA22_SMCADDR6_NAME,GPIO2C_LCDC1DATA22);
 107                 rk30_mux_api_set(GPIO2C7_LCDC1DATA23_SMCADDR7_NAME,GPIO2C_LCDC1DATA23);
 108
 109         }
 110         LcdMskReg(lcdc_dev,SYS_CFG, m_LCDC_AXICLK_AUTO_ENABLE | m_W0_AXI_OUTSTANDING2 |
 111                 m_W1_AXI_OUTSTANDING2,v_LCDC_AXICLK_AUTO_ENABLE(1) | v_W0_AXI_OUTSTANDING2(1) |
 112                 v_W1_AXI_OUTSTANDING2(1));//eanble axi-clk auto gating for low power
 113          LcdWrReg(lcdc_dev,AXI_MS_ID,v_HWC_CHANNEL_ID(5) | v_WIN2_CHANNEL_ID(4) |
 114                 v_WIN1_YRGB_CHANNEL_ID(3) | v_WIN0_CBR_CHANNEL_ID(2) |
 115                 v_WIN0_YRGB_CHANNEL_ID(1));
 116         LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK |
 117               m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) |
 118               v_SCANNING_MASK(1));  //mask all interrupt in init
 119         LcdMskReg(lcdc_dev,FIFO_WATER_MARK,m_WIN1_FIFO_FULL_LEVEL,v_WIN1_FIFO_FULL_LEVEL(0x1e0));
 120         //LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 121         return 0;
 122 }
 123
 124 static int rk3066b_lcdc_deinit(struct rk3066b_lcdc_device *lcdc_dev)
 125 {
 126         spin_lock(&lcdc_dev->reg_lock);
 127         if(likely(lcdc_dev->clk_on))
 128         {
 129                 lcdc_dev->clk_on = 0;
 130                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 131                 LcdMskReg(lcdc_dev, INT_STATUS,m_HOR_STARTMASK| m_FRM_STARTMASK |
 132                           m_SCANNING_MASK, v_HOR_STARTMASK(1) | v_FRM_STARTMASK(1) |
 133                           v_SCANNING_MASK(1));  //mask all interrupt in init
 134                 LcdSetBit(lcdc_dev,SYS_CFG,m_LCDC_STANDBY);
 135                 LCDC_REG_CFG_DONE();
 136                 spin_unlock(&lcdc_dev->reg_lock);
 137         }
 138         else   //clk already disabled
 139         {
 140                 spin_unlock(&lcdc_dev->reg_lock);
 141                 return 0;
 142         }
 143         mdelay(1);
 144
 145         return 0;
 146 }
 147
 148 static int rk3066b_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
 149 {
 150         int ret = -EINVAL;
 151         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 152         rk_screen *screen = dev_drv->cur_screen;
 153         u64 ft;
 154         int fps;
 155         u16 face;
 156         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
 157         u16 right_margin = screen->right_margin;
 158         u16 lower_margin = screen->lower_margin;
 159         u16 x_res = screen->x_res, y_res = screen->y_res;
 160
 161         // set the rgb or mcu
 162         spin_lock(&lcdc_dev->reg_lock);
 163         if(likely(lcdc_dev->clk_on))
 164         {
 165                 if(screen->type==SCREEN_MCU)
 166                 {
 167                         LcdMskReg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
 168                         // set out format and mcu timing
 169                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
 170                         if(mcu_total>31)
 171                                 mcu_total = 31;
 172                         if(mcu_total<3)
 173                                 mcu_total = 3;
 174                         mcu_rwstart = (mcu_total+1)/4 - 1;
 175                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
 176                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
 177                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
 178
 179                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
 180                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
 181
 182                         // set horizontal & vertical out timing
 183
 184                         right_margin = x_res/6;
 185                         screen->pixclock = 150000000; //mcu fix to 150 MHz
 186                         LcdMskReg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
 187                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
 188                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
 189                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
 190                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
 191
 192                 }
 193
 194                 switch (screen->face)
 195                 {
 196                         case OUT_P565:
 197                                 face = OUT_P565;
 198                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 199                                 break;
 200                         case OUT_P666:
 201                                 face = OUT_P666;
 202                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 203                                 break;
 204                         case OUT_D888_P565:
 205                                 face = OUT_P888;
 206                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
 207                                 break;
 208                         case OUT_D888_P666:
 209                                 face = OUT_P888;
 210                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
 211                                 break;
 212                         case OUT_P888:
 213                                 face = OUT_P888;
 214                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
 215                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 216                                 break;
 217                         default:
 218                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
 219                                 LcdMskReg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
 220                                 face = screen->face;
 221                                 break;
 222                 }
 223
 224                 //use default overlay,set vsyn hsync den dclk polarity
 225                 LcdMskReg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
 226                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) |
 227                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
 228                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
 229
 230                 //set background color to black,set swap according to the screen panel,disable blank mode
 231                 LcdMskReg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP |
 232                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) |
 233                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
 234                         v_BLACK_MODE(0));
 235
 236
 237                 LcdWrReg(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
 238                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
 239                 LcdWrReg(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
 240                      v_HASP(screen->hsync_len + screen->left_margin));
 241
 242                 LcdWrReg(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
 243                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
 244                 LcdWrReg(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
 245                       v_VASP(screen->vsync_len + screen->upper_margin));
 246                 // let above to take effect
 247                 //LCDC_REG_CFG_DONE();
 248         }
 249         spin_unlock(&lcdc_dev->reg_lock);
 250
 251         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
 252         if(ret)
 253         {
 254                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 255         }
 256         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 257         clk_enable(lcdc_dev->dclk);
 258
 259         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 260                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 261                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
 262         fps = div64_u64(1000000000000llu,ft);
 263         screen->ft = 1000/fps;
 264         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
 265
 266         if(screen->init)
 267         {
 268                 screen->init();
 269         }
 270         if(screen->sscreen_set)
 271         {
 272                 screen->sscreen_set(screen,!initscreen);
 273         }
 274         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
 275         return 0;
 276 }
 277
 278 static int mcu_refresh(struct rk3066b_lcdc_device *lcdc_dev)
 279 {
 280
 281     return 0;
 282 }
 283
 284
 285
 286 //enable layer,open:1,enable;0 disable
 287 static int win0_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
 288 {
 289
 290         spin_lock(&lcdc_dev->reg_lock);
 291         if(likely(lcdc_dev->clk_on))
 292         {
 293                 if(open)
 294                 {
 295                         if(!lcdc_dev->atv_layer_cnt)
 296                         {
 297                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 298                         }
 299                         lcdc_dev->atv_layer_cnt++;
 300                 }
 301                 else
 302                 {
 303                         lcdc_dev->atv_layer_cnt--;
 304                 }
 305                 lcdc_dev->driver.layer_par[0]->state = open;
 306
 307                 LcdMskReg(lcdc_dev, SYS_CFG, m_W0_EN, v_W0_EN(open));
 308                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 309                 {
 310                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 311                 }
 312                 //LCDC_REG_CFG_DONE();
 313         }
 314         spin_unlock(&lcdc_dev->reg_lock);
 315         printk(KERN_INFO "lcdc%d win0 %s\n",lcdc_dev->id,open?"open":"closed");
 316         return 0;
 317 }
 318 static int win1_open(struct rk3066b_lcdc_device *lcdc_dev,bool open)
 319 {
 320         spin_lock(&lcdc_dev->reg_lock);
 321         if(likely(lcdc_dev->clk_on))
 322         {
 323                 if(open)
 324                 {
 325                         if(!lcdc_dev->atv_layer_cnt)
 326                         {
 327                                 printk("lcdc%d wakeup from stanby\n",lcdc_dev->id);
 328                                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 329                         }
 330                         lcdc_dev->atv_layer_cnt++;
 331                 }
 332                 else
 333                 {
 334                         lcdc_dev->atv_layer_cnt--;
 335                 }
 336                 lcdc_dev->driver.layer_par[1]->state = open;
 337
 338                 LcdMskReg(lcdc_dev, SYS_CFG, m_W1_EN, v_W1_EN(open));
 339                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
 340                 {
 341                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
 342                         LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 343                 }
 344                 LCDC_REG_CFG_DONE();
 345         }
 346         spin_unlock(&lcdc_dev->reg_lock);
 347         printk(KERN_INFO "lcdc%d win1 %s\n",lcdc_dev->id,open?"open":"closed");
 348         return 0;
 349 }
 350
 351
 352 static int rk3066b_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
 353 {
 354         struct rk3066b_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk3066b_lcdc_device ,driver);
 355
 356         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
 357
 358         spin_lock(&lcdc_dev->reg_lock);
 359         if(likely(lcdc_dev->clk_on))
 360         {
 361                 switch(blank_mode)
 362                 {
 363                         case FB_BLANK_UNBLANK:
 364                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
 365                                 break;
 366                         case FB_BLANK_NORMAL:
 367                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 368                                 break;
 369                         default:
 370                                 LcdMskReg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
 371                                 break;
 372                 }
 373                 LCDC_REG_CFG_DONE();
 374         }
 375         spin_unlock(&lcdc_dev->reg_lock);
 376
 377         return 0;
 378 }
 379
 380 static  int win0_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
 381 {
 382         u32 y_addr;
 383         u32 uv_addr;
 384         y_addr = par->smem_start + par->y_offset;
 385         uv_addr = par->cbr_start + par->c_offset;
 386         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 387
 388         spin_lock(&lcdc_dev->reg_lock);
 389         if(likely(lcdc_dev->clk_on))
 390         {
 391                 LcdWrReg(lcdc_dev, WIN0_YRGB_MST,y_addr);
 392                 LcdWrReg(lcdc_dev, WIN0_CBR_MST,uv_addr);
 393                 LCDC_REG_CFG_DONE();
 394         }
 395         spin_unlock(&lcdc_dev->reg_lock);
 396
 397         return 0;
 398
 399 }
 400
 401 static  int win1_display(struct rk3066b_lcdc_device *lcdc_dev,struct layer_par *par )
 402 {
 403         u32 y_addr;
 404         u32 uv_addr;
 405         y_addr = par->smem_start + par->y_offset;
 406         uv_addr = par->cbr_start + par->c_offset;
 407         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
 408
 409         spin_lock(&lcdc_dev->reg_lock);
 410         if(likely(lcdc_dev->clk_on))
 411         {
 412                 LcdWrReg(lcdc_dev, WIN1_YRGB_MST, y_addr);
 413                 LCDC_REG_CFG_DONE();
 414         }
 415         spin_unlock(&lcdc_dev->reg_lock);
 416
 417         return 0;
 418 }
 419
 420 static  int win0_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
 421         struct layer_par *par )
 422 {
 423         u32 xact, yact, xvir, yvir, xpos, ypos;
 424         u32 ScaleYrgbX = 0x1000;
 425         u32 ScaleYrgbY = 0x1000;
 426         u32 ScaleCbrX = 0x1000;
 427         u32 ScaleCbrY = 0x1000;
 428         u8 fmt_cfg =0 ; //data format register config value
 429
 430         xact = par->xact;                           //active (origin) picture window width/height
 431         yact = par->yact;
 432         xvir = par->xvir;                          // virtual resolution
 433         yvir = par->yvir;
 434         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 435         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 436
 437
 438         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
 439         ScaleYrgbY = CalScale(yact, par->ysize);
 440         switch (par->format)
 441         {
 442                 case ARGB888:
 443                         fmt_cfg = 0;
 444                         break;
 445                 case RGB565:
 446                         fmt_cfg = 1;
 447                         break;
 448                 case YUV422:// yuv422
 449                         fmt_cfg = 2;
 450                         ScaleCbrX = CalScale((xact/2), par->xsize);
 451                         ScaleCbrY = CalScale(yact, par->ysize);
 452                         break;
 453                 case YUV420: // yuv420
 454                         fmt_cfg = 3;
 455                         ScaleCbrX = CalScale(xact/2, par->xsize);
 456                         ScaleCbrY = CalScale(yact/2, par->ysize);
 457                         break;
 458                 case YUV444:// yuv444
 459                         fmt_cfg = 4;
 460                         ScaleCbrX = CalScale(xact, par->xsize);
 461                         ScaleCbrY = CalScale(yact, par->ysize);
 462                         break;
 463                 default:
 464                    break;
 465         }
 466
 467         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 468                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 469
 470         spin_lock(&lcdc_dev->reg_lock);
 471         if(likely(lcdc_dev->clk_on))
 472         {
 473                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
 474                 LcdWrReg(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
 475                 LcdMskReg(lcdc_dev,SYS_CFG, m_W0_FORMAT, v_W0_FORMAT(fmt_cfg));         //(inf->video_mode==0)
 476                 LcdWrReg(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
 477                 LcdWrReg(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
 478                 LcdWrReg(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
 479                 LcdMskReg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
 480                         v_COLORKEY_EN(0) | v_KEYCOLOR(0));
 481                 LcdWrReg(lcdc_dev,WIN0_VIR,v_VIRWIDTH(xvir));
 482                 //LCDC_REG_CFG_DONE();
 483         }
 484         spin_unlock(&lcdc_dev->reg_lock);
 485
 486     return 0;
 487
 488 }
 489
 490 static int win1_set_par(struct rk3066b_lcdc_device *lcdc_dev,rk_screen *screen,
 491         struct layer_par *par )
 492 {
 493         u32 xact, yact, xvir, yvir, xpos, ypos;
 494         u32 ScaleYrgbX = 0x1000;
 495         u32 ScaleYrgbY = 0x1000;
 496         u32 ScaleCbrX = 0x1000;
 497         u32 ScaleCbrY = 0x1000;
 498         u8 fmt_cfg;
 499
 500         xact = par->xact;
 501         yact = par->yact;
 502         xvir = par->xvir;
 503         yvir = par->yvir;
 504         xpos = par->xpos+screen->left_margin + screen->hsync_len;
 505         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
 506
 507         ScaleYrgbX = CalScale(xact, par->xsize);
 508         ScaleYrgbY = CalScale(yact, par->ysize);
 509         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
 510                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
 511
 512
 513         spin_lock(&lcdc_dev->reg_lock);
 514         if(likely(lcdc_dev->clk_on))
 515         {
 516                 switch (par->format)
 517                 {
 518                         case ARGB888:
 519                                 fmt_cfg = 0;
 520                                 break;
 521                         case RGB565:
 522                                 fmt_cfg = 1;
 523                                 break;
 524                         default:
 525                                 break;
 526                 }
 527
 528                 LcdMskReg(lcdc_dev,SYS_CFG, m_W1_FORMAT, v_W1_FORMAT(fmt_cfg));
 529                 LcdWrReg(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
 530                 LcdWrReg(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
 531                 // enable win1 color key and set the color to black(rgb=0)
 532                 LcdMskReg(lcdc_dev,WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(0) | v_KEYCOLOR(0));
 533                 LcdWrReg(lcdc_dev,WIN1_VIR,v_VIRWIDTH(xvir));
 534
 535                 //LCDC_REG_CFG_DONE();
 536         }
 537         spin_unlock(&lcdc_dev->reg_lock);
 538     return 0;
 539 }
 540
 541 static int rk3066b_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
 542 {
 543         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 544         if(layer_id == 0)
 545         {
 546                 win0_open(lcdc_dev,open);
 547         }
 548         else if(layer_id == 1)
 549         {
 550                 win1_open(lcdc_dev,open);
 551         }
 552
 553         return 0;
 554 }
 555
 556 static int rk3066b_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 557 {
 558         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 559         struct layer_par *par = NULL;
 560         rk_screen *screen = dev_drv->cur_screen;
 561         if(!screen)
 562         {
 563                 printk(KERN_ERR "screen is null!\n");
 564                 return -ENOENT;
 565         }
 566         if(layer_id==0)
 567         {
 568                 par = dev_drv->layer_par[0];
 569                 win0_set_par(lcdc_dev,screen,par);
 570         }
 571         else if(layer_id==1)
 572         {
 573                 par = dev_drv->layer_par[1];
 574                 win1_set_par(lcdc_dev,screen,par);
 575         }
 576
 577         return 0;
 578 }
 579
 580 int rk3066b_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
 581 {
 582         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 583         struct layer_par *par = NULL;
 584         rk_screen *screen = dev_drv->cur_screen;
 585         unsigned long flags;
 586         int timeout;
 587         if(!screen)
 588         {
 589                 printk(KERN_ERR "screen is null!\n");
 590                 return -ENOENT;
 591         }
 592         if(layer_id==0)
 593         {
 594                 par = dev_drv->layer_par[0];
 595                 win0_display(lcdc_dev,par);
 596         }
 597         else if(layer_id==1)
 598         {
 599                 par = dev_drv->layer_par[1];
 600                 win1_display(lcdc_dev,par);
 601         }
 602         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
 603         {
 604                 dev_drv->first_frame = 0;
 605                 LcdMskReg(lcdc_dev,INT_STATUS,m_FRM_STARTCLEAR | m_FRM_STARTMASK ,
 606                           v_FRM_STARTCLEAR(1) | v_FRM_STARTMASK(0));
 607                 LCDC_REG_CFG_DONE();  // write any value to  REG_CFG_DONE let config become effective
 608
 609         }
 610
 611         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
 612         {
 613                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
 614                 init_completion(&dev_drv->frame_done);
 615                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
 616                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->cur_screen->ft+5));
 617                 if(!timeout&&(!dev_drv->frame_done.done))
 618                 {
 619                         printk(KERN_ERR "wait for new frame start time out!\n");
 620                         return -ETIMEDOUT;
 621                 }
 622         }
 623
 624         return 0;
 625 }
 626
 627 int rk3066b_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
 628 {
 629         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 630         u32 panel_size[2];
 631         void __user *argp = (void __user *)arg;
 632         int ret = 0;
 633         switch(cmd)
 634         {
 635                 case FBIOGET_PANEL_SIZE:    //get panel size
 636                         panel_size[0] = lcdc_dev->screen->x_res;
 637                         panel_size[1] = lcdc_dev->screen->y_res;
 638                         if(copy_to_user(argp, panel_size, 8))
 639                                 return -EFAULT;
 640                         break;
 641                 default:
 642                         break;
 643         }
 644
 645         return ret;
 646 }
 647 static int rk3066b_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 648 {
 649         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 650         struct layer_par *par = dev_drv->layer_par[layer_id];
 651
 652         spin_lock(&lcdc_dev->reg_lock);
 653         if(lcdc_dev->clk_on)
 654         {
 655                 if(layer_id == 0)
 656                 {
 657                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W0_EN);
 658                 }
 659                 else if( layer_id == 1)
 660                 {
 661                         par->state = LcdReadBit(lcdc_dev,SYS_CFG,m_W1_EN);
 662                 }
 663         }
 664         spin_unlock(&lcdc_dev->reg_lock);
 665
 666         return par->state;
 667
 668 }
 669
 670 /***********************************
 671 overlay manager
 672 swap:1 win0 on the top of win1
 673         0 win1 on the top of win0
 674 set  : 1 set overlay
 675         0 get overlay state
 676 ************************************/
 677 static int rk3066b_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
 678 {
 679         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 680         int ovl;
 681         spin_lock(&lcdc_dev->reg_lock);
 682         if(lcdc_dev->clk_on)
 683         {
 684                 if(set)  //set overlay
 685                 {
 686                         LcdMskReg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
 687                         LcdWrReg(lcdc_dev, REG_CFG_DONE, 0x01);
 688                         LCDC_REG_CFG_DONE();
 689                         ovl = swap;
 690                 }
 691                 else  //get overlay
 692                 {
 693                         ovl = LcdReadBit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
 694                 }
 695         }
 696         else
 697         {
 698                 ovl = -EPERM;
 699         }
 700         spin_unlock(&lcdc_dev->reg_lock);
 701
 702         return ovl;
 703 }
 704 static int rk3066b_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,int layer_id)
 705 {
 706         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 707         return 0;
 708 }
 709
 710
 711 /*******************************************
 712 lcdc fps manager,set or get lcdc fps
 713 set:0 get
 714      1 set
 715 ********************************************/
 716 static int rk3066b_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
 717 {
 718         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 719         rk_screen * screen = dev_drv->cur_screen;
 720         u64 ft = 0;
 721         u32 dotclk;
 722         int ret;
 723
 724         if(set)
 725         {
 726                 ft = div_u64(1000000000000llu,fps);
 727                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 728                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
 729                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
 730                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
 731                 if(ret)
 732                 {
 733                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
 734                 }
 735                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 736
 737         }
 738
 739         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
 740         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
 741         (dev_drv->pixclock);       // one frame time ,(pico seconds)
 742         fps = div64_u64(1000000000000llu,ft);
 743         screen->ft = 1000/fps ;  //one frame time in ms
 744         return fps;
 745 }
 746
 747 static int rk3066b_fb_layer_remap(struct rk_lcdc_device_driver *dev_drv,
 748         enum fb_win_map_order order)
 749 {
 750         mutex_lock(&dev_drv->fb_win_id_mutex);
 751         if(order == FB_DEFAULT_ORDER)
 752         {
 753                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;
 754         }
 755         dev_drv->fb2_win_id  = order/100;
 756         dev_drv->fb1_win_id = (order/10)%10;
 757         dev_drv->fb0_win_id = order%10;
 758         mutex_unlock(&dev_drv->fb_win_id_mutex);
 759
 760         printk("fb0:win%d\nfb1:win%d\nfb2:win%d\n",dev_drv->fb0_win_id,dev_drv->fb1_win_id,
 761                 dev_drv->fb2_win_id);
 762
 763         return 0;
 764 }
 765
 766 static int rk3066b_fb_get_layer(struct rk_lcdc_device_driver *dev_drv,const char *id)
 767 {
 768         int layer_id = 0;
 769         mutex_lock(&dev_drv->fb_win_id_mutex);
 770         if(!strcmp(id,"fb0") || !strcmp(id,"fb2"))
 771         {
 772                 layer_id = dev_drv->fb0_win_id;
 773         }
 774         else if(!strcmp(id,"fb1") || !strcmp(id,"fb3"))
 775         {
 776                 layer_id = dev_drv->fb1_win_id;
 777         }
 778         else
 779         {
 780                 printk(KERN_ERR "%s>>un supported %s\n",__func__,id);
 781                 layer_id = -1;
 782         }
 783         mutex_unlock(&dev_drv->fb_win_id_mutex);
 784
 785         return  layer_id;
 786 }
 787
 788 int rk3066b_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
 789 {
 790         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 791
 792         spin_lock(&lcdc_dev->reg_lock);
 793         if(likely(lcdc_dev->clk_on))
 794         {
 795                 lcdc_dev->clk_on = 0;
 796                 LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 797                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
 798                 LCDC_REG_CFG_DONE();
 799                 spin_unlock(&lcdc_dev->reg_lock);
 800         }
 801         else  //clk already disabled
 802         {
 803                 spin_unlock(&lcdc_dev->reg_lock);
 804                 return 0;
 805         }
 806
 807
 808         mdelay(1);
 809         clk_disable(lcdc_dev->dclk);
 810         clk_disable(lcdc_dev->hclk);
 811         clk_disable(lcdc_dev->aclk);
 812         clk_disable(lcdc_dev->pd);
 813
 814         return 0;
 815 }
 816
 817
 818 int rk3066b_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
 819 {
 820         struct rk3066b_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk3066b_lcdc_device,driver);
 821
 822         if(!lcdc_dev->clk_on)
 823         {
 824                 clk_enable(lcdc_dev->pd);
 825                 clk_enable(lcdc_dev->hclk);
 826                 clk_enable(lcdc_dev->dclk);
 827                 clk_enable(lcdc_dev->aclk);
 828         }
 829         memcpy((u8*)lcdc_dev->preg, (u8*)&lcdc_dev->regbak, 0xc4);  //resume reg
 830
 831         spin_lock(&lcdc_dev->reg_lock);
 832         if(lcdc_dev->atv_layer_cnt)
 833         {
 834                 LcdMskReg(lcdc_dev, SYS_CFG,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
 835                 LCDC_REG_CFG_DONE();
 836         }
 837         lcdc_dev->clk_on = 1;
 838         spin_unlock(&lcdc_dev->reg_lock);
 839
 840         return 0;
 841 }
 842 static irqreturn_t rk3066b_lcdc_isr(int irq, void *dev_id)
 843 {
 844         struct rk3066b_lcdc_device *lcdc_dev = (struct rk3066b_lcdc_device *)dev_id;
 845
 846         LcdMskReg(lcdc_dev, INT_STATUS, m_FRM_STARTCLEAR, v_FRM_STARTCLEAR(1));
 847         LCDC_REG_CFG_DONE();
 848         //LcdMskReg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
 849
 850         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
 851         {
 852                 spin_lock(&(lcdc_dev->driver.cpl_lock));
 853                 complete(&(lcdc_dev->driver.frame_done));
 854                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
 855         }
 856         return IRQ_HANDLED;
 857 }
 858
 859 static struct layer_par lcdc_layer[] = {
 860         [0] = {
 861                 .name           = "win0",
 862                 .id             = 0,
 863                 .support_3d     = true,
 864         },
 865         [1] = {
 866                 .name           = "win1",
 867                 .id             = 1,
 868                 .support_3d     = false,
 869         },
 870 };
 871
 872 static struct rk_lcdc_device_driver lcdc_driver = {
 873         .name                   = "lcdc",
 874         .def_layer_par          = lcdc_layer,
 875         .num_layer              = ARRAY_SIZE(lcdc_layer),
 876         .open                   = rk3066b_lcdc_open,
 877         .init_lcdc              = init_rk3066b_lcdc,
 878         .ioctl                  = rk3066b_lcdc_ioctl,
 879         .suspend                = rk3066b_lcdc_early_suspend,
 880         .resume                 = rk3066b_lcdc_early_resume,
 881         .set_par                = rk3066b_lcdc_set_par,
 882         .blank                  = rk3066b_lcdc_blank,
 883         .pan_display            = rk3066b_lcdc_pan_display,
 884         .load_screen            = rk3066b_load_screen,
 885         .get_layer_state        = rk3066b_lcdc_get_layer_state,
 886         .ovl_mgr                = rk3066b_lcdc_ovl_mgr,
 887         .get_disp_info          = rk3066b_lcdc_get_disp_info,
 888         .fps_mgr                = rk3066b_lcdc_fps_mgr,
 889         .fb_get_layer           = rk3066b_fb_get_layer,
 890         .fb_layer_remap         = rk3066b_fb_layer_remap,
 891 };
 892 #ifdef CONFIG_PM
 893 static int rk3066b_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
 894 {
 895         return 0;
 896 }
 897
 898 static int rk3066b_lcdc_resume(struct platform_device *pdev)
 899 {
 900         return 0;
 901 }
 902
 903 #else
 904 #define rk3066b_lcdc_suspend NULL
 905 #define rk3066b_lcdc_resume NULL
 906 #endif
 907
 908 static int __devinit rk3066b_lcdc_probe (struct platform_device *pdev)
 909 {
 910         struct rk3066b_lcdc_device *lcdc_dev=NULL;
 911         rk_screen *screen;
 912         rk_screen *screen1;
 913         struct rk29fb_info *screen_ctr_info;
 914         struct resource *res = NULL;
 915         struct resource *mem;
 916         int ret = 0;
 917
 918         /*************Malloc rk3066blcdc_inf and set it to pdev for drvdata**********/
 919         lcdc_dev = kzalloc(sizeof(struct rk3066b_lcdc_device), GFP_KERNEL);
 920         if(!lcdc_dev)
 921         {
 922                 dev_err(&pdev->dev, ">>rk3066b lcdc device kmalloc fail!");
 923                 return -ENOMEM;
 924         }
 925         platform_set_drvdata(pdev, lcdc_dev);
 926         lcdc_dev->id = pdev->id;
 927         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
 928         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 929         if(!screen)
 930         {
 931                 dev_err(&pdev->dev, ">>rk3066b lcdc screen kmalloc fail!");
 932                 ret =  -ENOMEM;
 933                 goto err0;
 934         }
 935         else
 936         {
 937                 lcdc_dev->screen = screen;
 938         }
 939         screen->lcdc_id = lcdc_dev->id;
 940         screen->screen_id = 0;
 941
 942 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS)
 943         screen1 =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
 944         if(!screen1)
 945         {
 946                 dev_err(&pdev->dev, ">>rk3066b lcdc screen1 kmalloc fail!");
 947                 ret =  -ENOMEM;
 948                 goto err0;
 949         }
 950         screen1->lcdc_id = 1;
 951         screen1->screen_id = 1;
 952         printk("use lcdc%d and rk610 implemention dual display!\n",lcdc_dev->id);
 953
 954 #endif
 955         /****************get lcdc0 reg  *************************/
 956         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
 957         if (res == NULL)
 958         {
 959                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
 960                 ret = -ENOENT;
 961                 goto err1;
 962         }
 963         lcdc_dev->reg_phy_base = res->start;
 964         lcdc_dev->len = resource_size(res);
 965         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
 966         if (mem == NULL)
 967         {
 968                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
 969                 ret = -ENOENT;
 970                 goto err1;
 971         }
 972         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
 973         if (lcdc_dev->reg_vir_base == NULL)
 974         {
 975                 dev_err(&pdev->dev, "cannot map IO\n");
 976                 ret = -ENXIO;
 977                 goto err2;
 978         }
 979
 980         lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
 981         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->preg);
 982         lcdc_dev->driver.dev=&pdev->dev;
 983         lcdc_dev->driver.screen0 = screen;
 984 #if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS)
 985         lcdc_dev->driver.screen1 = screen1;
 986 #endif
 987         lcdc_dev->driver.cur_screen = screen;
 988         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
 989         spin_lock_init(&lcdc_dev->reg_lock);
 990         lcdc_dev->irq = platform_get_irq(pdev, 0);
 991         if(lcdc_dev->irq < 0)
 992         {
 993                 dev_err(&pdev->dev, "cannot find IRQ\n");
 994                 goto err3;
 995         }
 996         ret = request_irq(lcdc_dev->irq, rk3066b_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
 997         if (ret)
 998         {
 999                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
1000                ret = -EBUSY;
1001                goto err3;
1002         }
1003         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
1004         if(ret < 0)
1005         {
1006                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
1007                 goto err4;
1008         }
1009         printk("rk3066b lcdc%d probe ok!\n",lcdc_dev->id);
1010
1011         return 0;
1012
1013 err4:
1014         free_irq(lcdc_dev->irq,lcdc_dev);
1015 err3:
1016         iounmap(lcdc_dev->reg_vir_base);
1017 err2:
1018         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
1019 err1:
1020         kfree(screen);
1021 err0:
1022         platform_set_drvdata(pdev, NULL);
1023         kfree(lcdc_dev);
1024         return ret;
1025
1026 }
1027 static int __devexit rk3066b_lcdc_remove(struct platform_device *pdev)
1028 {
1029         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1030         rk_fb_unregister(&(lcdc_dev->driver));
1031         rk3066b_lcdc_deinit(lcdc_dev);
1032         iounmap(lcdc_dev->reg_vir_base);
1033         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1034         kfree(lcdc_dev->screen);
1035         kfree(lcdc_dev);
1036         return 0;
1037 }
1038
1039 static void rk3066b_lcdc_shutdown(struct platform_device *pdev)
1040 {
1041         struct rk3066b_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1042         if(lcdc_dev->driver.cur_screen->standby) //standby the screen if necessary
1043                 lcdc_dev->driver.cur_screen->standby(1);
1044         if(lcdc_dev->driver.screen_ctr_info->io_disable) //power off the screen if necessary
1045                 lcdc_dev->driver.screen_ctr_info->io_disable();
1046         if(lcdc_dev->driver.cur_screen->sscreen_set) //turn off  lvds if necessary
1047                 lcdc_dev->driver.cur_screen->sscreen_set(lcdc_dev->driver.cur_screen , 0);
1048         rk_fb_unregister(&(lcdc_dev->driver));
1049         rk3066b_lcdc_deinit(lcdc_dev);
1050         /*iounmap(lcdc_dev->reg_vir_base);
1051         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1052         kfree(lcdc_dev->screen);
1053         kfree(lcdc_dev);*/
1054 }
1055
1056
1057 static struct platform_driver rk3066b_lcdc_driver = {
1058         .probe          = rk3066b_lcdc_probe,
1059         .remove         = __devexit_p(rk3066b_lcdc_remove),
1060         .driver         = {
1061                 .name   = "rk30-lcdc",
1062                 .owner  = THIS_MODULE,
1063         },
1064         .suspend        = rk3066b_lcdc_suspend,
1065         .resume         = rk3066b_lcdc_resume,
1066         .shutdown   = rk3066b_lcdc_shutdown,
1067 };
1068
1069 static int __init rk3066b_lcdc_init(void)
1070 {
1071     return platform_driver_register(&rk3066b_lcdc_driver);
1072 }
1073
1074 static void __exit rk3066b_lcdc_exit(void)
1075 {
1076     platform_driver_unregister(&rk3066b_lcdc_driver);
1077 }
1078
1079
1080
1081 fs_initcall(rk3066b_lcdc_init);
1082 module_exit(rk3066b_lcdc_exit);
1083
1084
1085