f19f98792dff7f704debf5c75bf3ba53ed21ddb0
[firefly-linux-kernel-4.4.55.git] / drivers / video / rockchip / lcdc / rk30_lcdc.c
1 /*
2  * drivers/video/rockchip/chips/rk30_lcdc.c
3  *
4  * Copyright (C) 2012 ROCKCHIP, Inc.
5  *Author:yzq<yzq@rock-chips.com>
6  *      yxj<yxj@rock-chips.com>
7  *This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/slab.h>
24 #include <linux/device.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/platform_device.h>
29 #include <linux/clk.h>
30 #include <linux/earlysuspend.h>
31 #include <asm/div64.h>
32 #include <asm/uaccess.h>
33 #include "rk30_lcdc.h"
34
35
36
37 static int dbg_thresd = 0;
38 module_param(dbg_thresd, int, S_IRUGO|S_IWUSR);
39 #define DBG(level,x...) do { if(unlikely(dbg_thresd >= level)) printk(KERN_INFO x); } while (0)
40
41
42 static int  rk30_lcdc_clk_enable(struct rk30_lcdc_device *lcdc_dev)
43 {
44         
45         clk_enable(lcdc_dev->pd);
46         clk_enable(lcdc_dev->hclk);
47         clk_enable(lcdc_dev->dclk);
48         clk_enable(lcdc_dev->aclk);
49         
50         spin_lock(&lcdc_dev->reg_lock);
51         lcdc_dev->clk_on = 1;
52         spin_unlock(&lcdc_dev->reg_lock);
53         printk("rk30 lcdc%d clk enable...\n",lcdc_dev->id);
54         return 0;
55 }
56
57 static int rk30_lcdc_clk_disable(struct rk30_lcdc_device *lcdc_dev)
58 {
59         spin_lock(&lcdc_dev->reg_lock);
60         lcdc_dev->clk_on = 0;
61         spin_unlock(&lcdc_dev->reg_lock);
62         
63         clk_disable(lcdc_dev->dclk);
64         clk_disable(lcdc_dev->hclk);
65         clk_disable(lcdc_dev->aclk);
66         clk_disable(lcdc_dev->pd);
67         printk("rk30 lcdc%d clk disable...\n",lcdc_dev->id);
68         return 0;
69 }
70 static int rk30_lcdc_init(struct rk_lcdc_device_driver *dev_drv)
71 {
72         int i = 0;
73         int __iomem *c;
74         int v;
75         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
76         if(lcdc_dev->id == 0) //lcdc0
77         {
78                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc0");
79                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc0"); 
80                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc0");
81                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc0");
82         }
83         else if(lcdc_dev->id == 1)
84         {
85                 lcdc_dev->pd = clk_get(NULL,"pd_lcdc1");
86                 lcdc_dev->hclk = clk_get(NULL,"hclk_lcdc1");  
87                 lcdc_dev->aclk = clk_get(NULL,"aclk_lcdc1");
88                 lcdc_dev->dclk = clk_get(NULL,"dclk_lcdc1");
89         }
90         else
91         {
92                 printk(KERN_ERR "invalid lcdc device!\n");
93                 return -EINVAL;
94         }
95         if (IS_ERR(lcdc_dev->pd) || (IS_ERR(lcdc_dev->aclk)) ||(IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk)))
96         {
97                 printk(KERN_ERR "failed to get lcdc%d clk source\n",lcdc_dev->id);
98         }
99         
100         rk30_lcdc_clk_enable(lcdc_dev);
101         
102         lcdc_msk_reg(lcdc_dev,SYS_CTRL0,m_HWC_CHANNEL_ID | m_WIN2_CHANNEL_ID | m_WIN1_CBR_CHANNEL_ID |
103                 m_WIN1_YRGB_CHANNEL_ID | m_WIN0_CBR_CHANNEL1_ID | m_WIN0_YRGB_CHANNEL1_ID | 
104                 m_WIN0_CBR_CHANNEL0_ID | m_WIN0_YRGB_CHANNEL0_ID,v_HWC_CHANNEL_ID(7) | 
105                 v_WIN2_CHANNEL_ID(6) | v_WIN1_CBR_CHANNEL_ID(5) | v_WIN1_YRGB_CHANNEL_ID(4) | 
106                 v_WIN0_CBR_CHANNEL1_ID(3) | v_WIN0_YRGB_CHANNEL1_ID(2) | v_WIN0_CBR_CHANNEL0_ID(1) |
107                 v_WIN0_YRGB_CHANNEL0_ID(0));                    //channel id ,just use default value
108         lcdc_set_bit(lcdc_dev,DSP_CTRL0, m_LCDC_AXICLK_AUTO_ENABLE);//eanble axi-clk auto gating for low power
109         lcdc_msk_reg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR | m_BUS_ERR_INT_CLEAR | m_LINE_FLAG_INT_EN |
110               m_FRM_START_INT_EN | m_HOR_START_INT_EN,v_FRM_START_INT_CLEAR(1) | v_BUS_ERR_INT_CLEAR(0) |
111               v_LINE_FLAG_INT_EN(0) | v_FRM_START_INT_EN(0) | v_HOR_START_INT_EN(0));  //enable frame start interrupt for sync
112               
113         if(dev_drv->cur_screen->dsp_lut)
114         {
115                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
116                 lcdc_cfg_done(lcdc_dev);
117                 msleep(25);
118                 for(i=0;i<256;i++)
119                 {
120                         v = dev_drv->cur_screen->dsp_lut[i];
121                         c = lcdc_dev->dsp_lut_addr_base+i;
122                         writel_relaxed(v,c);
123                         
124                 }
125                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
126         }
127         
128         lcdc_cfg_done(lcdc_dev);  // write any value to  REG_CFG_DONE let config become effective
129
130         rk30_lcdc_clk_disable(lcdc_dev);
131         
132         return 0;
133 }
134
135 static int rk30_lcdc_deinit(struct rk30_lcdc_device *lcdc_dev)
136 {
137         spin_lock(&lcdc_dev->reg_lock);
138         if(likely(lcdc_dev->clk_on))
139         {
140                 lcdc_dev->clk_on = 0;
141                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
142                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_HOR_START_INT_EN | m_FRM_START_INT_EN | 
143                         m_LINE_FLAG_INT_EN | m_BUS_ERR_INT_EN,v_HOR_START_INT_EN(0) | v_FRM_START_INT_EN(0) | 
144                         v_LINE_FLAG_INT_EN(0) | v_BUS_ERR_INT_EN(0));  //disable all lcdc interrupt
145                 lcdc_set_bit(lcdc_dev,SYS_CTRL0,m_LCDC_STANDBY);
146                 lcdc_cfg_done(lcdc_dev);
147                 spin_unlock(&lcdc_dev->reg_lock);
148         }
149         else   //clk already disabled 
150         {
151                 spin_unlock(&lcdc_dev->reg_lock);
152                 return 0;
153         }
154         mdelay(1);
155         
156         return 0;
157 }
158
159 static int rk30_load_screen(struct rk_lcdc_device_driver *dev_drv, bool initscreen)
160 {
161         int ret = -EINVAL;
162         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
163         rk_screen *screen = dev_drv->cur_screen;
164         u64 ft;
165         int fps;
166         u16 face;
167         u16 mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend;
168         u16 right_margin = screen->right_margin;
169         u16 lower_margin = screen->lower_margin;
170         u16 x_res = screen->x_res, y_res = screen->y_res;
171
172         
173         // set the rgb or mcu
174         spin_lock(&lcdc_dev->reg_lock);
175         if(likely(lcdc_dev->clk_on))
176         {
177                 if(screen->type==SCREEN_MCU)
178                 {
179                         lcdc_msk_reg(lcdc_dev, MCU_CTRL, m_MCU_OUTPUT_SELECT,v_MCU_OUTPUT_SELECT(1));
180                         // set out format and mcu timing
181                         mcu_total  = (screen->mcu_wrperiod*150*1000)/1000000;
182                         if(mcu_total>31)    
183                                 mcu_total = 31;
184                         if(mcu_total<3)    
185                                 mcu_total = 3;
186                         mcu_rwstart = (mcu_total+1)/4 - 1;
187                         mcu_rwend = ((mcu_total+1)*3)/4 - 1;
188                         mcu_csstart = (mcu_rwstart>2) ? (mcu_rwstart-3) : (0);
189                         mcu_csend = (mcu_rwend>15) ? (mcu_rwend-1) : (mcu_rwend);
190
191                         //DBG(1,">> mcu_total=%d, mcu_rwstart=%d, mcu_csstart=%d, mcu_rwend=%d, mcu_csend=%d \n",
192                         //      mcu_total, mcu_rwstart, mcu_csstart, mcu_rwend, mcu_csend);
193
194                         // set horizontal & vertical out timing
195                 
196                         right_margin = x_res/6; 
197                         screen->pixclock = 150000000; //mcu fix to 150 MHz
198                         lcdc_msk_reg(lcdc_dev, MCU_CTRL,m_MCU_CS_ST | m_MCU_CS_END| m_MCU_RW_ST | m_MCU_RW_END |
199                                 m_MCU_WRITE_PERIOD | m_MCU_HOLDMODE_SELECT | m_MCU_HOLDMODE_FRAME_ST,
200                                 v_MCU_CS_ST(mcu_csstart) | v_MCU_CS_END(mcu_csend) | v_MCU_RW_ST(mcu_rwstart) |
201                                 v_MCU_RW_END(mcu_rwend) |  v_MCU_WRITE_PERIOD(mcu_total) |
202                                 v_MCU_HOLDMODE_SELECT((SCREEN_MCU==screen->type)?(1):(0)) | v_MCU_HOLDMODE_FRAME_ST(0));
203         
204                 }
205
206                 switch (screen->face)
207                 {
208                         case OUT_P565:
209                                 face = OUT_P565;
210                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
211                                 break;
212                         case OUT_P666:
213                                 face = OUT_P666;
214                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
215                                 break;
216                         case OUT_D888_P565:
217                                 face = OUT_P888;
218                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(0));
219                                 break;
220                         case OUT_D888_P666:
221                                 face = OUT_P888;
222                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(1) | v_DITHER_DOWN_MODE(1));
223                                 break;
224                         case OUT_P888:
225                                 face = OUT_P888;
226                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(1));
227                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
228                                 break;
229                         default:
230                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_UP_EN, v_DITHER_UP_EN(0));
231                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_DITHER_DOWN_EN | m_DITHER_DOWN_MODE, v_DITHER_DOWN_EN(0) | v_DITHER_DOWN_MODE(0));
232                                 face = screen->face;
233                                 break;
234                 }
235
236                 //use default overlay,set vsyn hsync den dclk polarity
237                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,m_DISPLAY_FORMAT | m_HSYNC_POLARITY | m_VSYNC_POLARITY |
238                         m_DEN_POLARITY |m_DCLK_POLARITY,v_DISPLAY_FORMAT(face) | 
239                         v_HSYNC_POLARITY(screen->pin_hsync) | v_VSYNC_POLARITY(screen->pin_vsync) |
240                         v_DEN_POLARITY(screen->pin_den) | v_DCLK_POLARITY(screen->pin_dclk));
241
242                 //set background color to black,set swap according to the screen panel,disable blank mode
243                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BG_COLOR | m_OUTPUT_RB_SWAP | m_OUTPUT_RG_SWAP | m_DELTA_SWAP | 
244                         m_DUMMY_SWAP | m_BLANK_MODE,v_BG_COLOR(0x000000) | v_OUTPUT_RB_SWAP(screen->swap_rb) | 
245                         v_OUTPUT_RG_SWAP(screen->swap_rg) | v_DELTA_SWAP(screen->swap_delta) | v_DUMMY_SWAP(screen->swap_dumy) |
246                         v_BLACK_MODE(0));
247
248                 
249                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END,v_HSYNC(screen->hsync_len) |
250                      v_HORPRD(screen->hsync_len + screen->left_margin + x_res + right_margin));
251                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, v_HAEP(screen->hsync_len + screen->left_margin + x_res) |
252                      v_HASP(screen->hsync_len + screen->left_margin));
253
254                 lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, v_VSYNC(screen->vsync_len) |
255                       v_VERPRD(screen->vsync_len + screen->upper_margin + y_res + lower_margin));
256                 lcdc_writel(lcdc_dev, DSP_VACT_ST_END,  v_VAEP(screen->vsync_len + screen->upper_margin+y_res)|
257                       v_VASP(screen->vsync_len + screen->upper_margin));
258                 // let above to take effect
259                 lcdc_cfg_done(lcdc_dev);
260         }
261         spin_unlock(&lcdc_dev->reg_lock);
262
263         ret = clk_set_rate(lcdc_dev->dclk, screen->pixclock);
264         if(ret)
265         {
266                 printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
267         }
268         lcdc_dev->driver.pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
269         
270         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
271                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
272                 (dev_drv->pixclock);       // one frame time ,(pico seconds)
273         fps = div64_u64(1000000000000llu,ft);
274         screen->ft = 1000/fps;
275         printk("%s: dclk:%lu>>fps:%d ",lcdc_dev->driver.name,clk_get_rate(lcdc_dev->dclk),fps);
276
277         if(screen->init)
278         {
279                 screen->init();
280         }
281         
282         printk("%s for lcdc%d ok!\n",__func__,lcdc_dev->id);
283         return 0;
284 }
285
286 static int mcu_refresh(struct rk30_lcdc_device *lcdc_dev)
287 {
288    
289     return 0;
290 }
291
292
293
294 //enable layer,open:1,enable;0 disable
295 static int win0_open(struct rk30_lcdc_device *lcdc_dev,bool open)
296 {
297         
298         spin_lock(&lcdc_dev->reg_lock);
299         if(likely(lcdc_dev->clk_on))
300         {
301                 if(open)
302                 {
303                         if(!lcdc_dev->atv_layer_cnt)
304                         {
305                                 printk(KERN_INFO "lcdc%d wakeup from standby!\n",lcdc_dev->id);
306                                 lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
307                         }
308                         
309                         lcdc_dev->atv_layer_cnt++;
310                 }
311                 else if((lcdc_dev->atv_layer_cnt > 0) && (!open))
312                 {
313                         lcdc_dev->atv_layer_cnt--;
314                 }
315                 lcdc_dev->driver.layer_par[0]->state = open;
316                 
317                 lcdc_msk_reg(lcdc_dev, SYS_CTRL1, m_W0_EN, v_W0_EN(open));
318                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
319                 {
320                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!\n",lcdc_dev->id);
321                         lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
322                 }
323                 lcdc_cfg_done(lcdc_dev);        
324         }
325         spin_unlock(&lcdc_dev->reg_lock);
326         
327         
328         return 0;
329 }
330 static int win1_open(struct rk30_lcdc_device *lcdc_dev,bool open)
331 {
332         unsigned char i = 0;
333         spin_lock(&lcdc_dev->reg_lock);
334         if(likely(lcdc_dev->clk_on))
335         {
336                 if(open)
337                 {
338                         if(!lcdc_dev->atv_layer_cnt)
339                         {
340                                 printk(KERN_INFO "lcdc%d wakeup from standby!\n",lcdc_dev->id);
341                                 lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
342                         }
343                         lcdc_dev->atv_layer_cnt++;
344                 }
345                 else if((lcdc_dev->atv_layer_cnt > 0) && (!open))
346                 {
347                         lcdc_dev->atv_layer_cnt--;
348                 }
349                 lcdc_dev->driver.layer_par[1]->state = open;
350                 
351                 lcdc_msk_reg(lcdc_dev, SYS_CTRL1, m_W1_EN, v_W1_EN(open));
352                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
353                 {
354                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!\n",lcdc_dev->id);
355                         lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
356                 }
357                 lcdc_cfg_done(lcdc_dev);
358         }
359         spin_unlock(&lcdc_dev->reg_lock);
360         
361         return 0;
362 }
363
364 static int win2_open(struct rk30_lcdc_device *lcdc_dev,bool open)
365 {
366         spin_lock(&lcdc_dev->reg_lock);
367         if(likely(lcdc_dev->clk_on))
368         {
369                 if(open)
370                 {
371                         if(!lcdc_dev->atv_layer_cnt)
372                         {
373                                 printk(KERN_INFO "lcdc%d wakeup from standby!",lcdc_dev->id);
374                                 lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
375                         }
376                         lcdc_dev->atv_layer_cnt++;
377                 }
378                 else if((lcdc_dev->atv_layer_cnt > 0) && (!open))
379                 {
380                         lcdc_dev->atv_layer_cnt--;
381                 }
382                 lcdc_dev->driver.layer_par[1]->state = open;
383                 
384                 lcdc_msk_reg(lcdc_dev, SYS_CTRL1, m_W2_EN, v_W2_EN(open));
385
386                 if(!lcdc_dev->atv_layer_cnt)  //if no layer used,disable lcdc
387                 {
388                         printk(KERN_INFO "no layer of lcdc%d is used,go to standby!",lcdc_dev->id);
389                         lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
390                 }
391                 
392                 lcdc_writel(lcdc_dev, REG_CFG_DONE, 0x01);
393                 lcdc_dev->driver.layer_par[1]->state = open;
394         }
395         spin_unlock(&lcdc_dev->reg_lock);
396         
397         return 0;
398 }
399
400 static int rk30_lcdc_blank(struct rk_lcdc_device_driver*lcdc_drv,int layer_id,int blank_mode)
401 {
402         struct rk30_lcdc_device * lcdc_dev = container_of(lcdc_drv,struct rk30_lcdc_device ,driver);
403
404         printk(KERN_INFO "%s>>>>>%d\n",__func__, blank_mode);
405
406         spin_lock(&lcdc_dev->reg_lock);
407         if(likely(lcdc_dev->clk_on))
408         {
409                 switch(blank_mode)
410                 {
411                         case FB_BLANK_UNBLANK:
412                                 lcdc_msk_reg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(0));
413                                 break;
414                         case FB_BLANK_NORMAL:
415                                 lcdc_msk_reg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
416                                 break;
417                         default:
418                                 lcdc_msk_reg(lcdc_dev,DSP_CTRL1,m_BLANK_MODE ,v_BLANK_MODE(1));
419                                 break;
420                 }
421                 lcdc_cfg_done(lcdc_dev);
422         }
423         spin_unlock(&lcdc_dev->reg_lock);
424         
425         return 0;
426 }
427
428 static  int win0_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
429 {
430         u32 y_addr;
431         u32 uv_addr;
432         y_addr = par->smem_start + par->y_offset;
433         uv_addr = par->cbr_start + par->c_offset;
434         DBG(2,KERN_INFO "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
435
436         spin_lock(&lcdc_dev->reg_lock);
437         if(likely(lcdc_dev->clk_on))
438         {
439                 lcdc_writel(lcdc_dev, WIN0_YRGB_MST0, y_addr);
440                 lcdc_writel(lcdc_dev, WIN0_CBR_MST0, uv_addr);
441                 lcdc_cfg_done(lcdc_dev);
442         }
443         spin_unlock(&lcdc_dev->reg_lock);
444
445         return 0;
446         
447 }
448
449 static  int win1_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
450 {
451         u32 y_addr;
452         u32 uv_addr;
453         y_addr = par->smem_start + par->y_offset;
454         uv_addr = par->cbr_start + par->c_offset;
455         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
456         
457         spin_lock(&lcdc_dev->reg_lock);
458         if(likely(lcdc_dev->clk_on))
459         {
460                 lcdc_writel(lcdc_dev, WIN1_YRGB_MST, y_addr);
461                 lcdc_writel(lcdc_dev, WIN1_CBR_MST, uv_addr);
462                 lcdc_cfg_done(lcdc_dev);
463         }
464         spin_unlock(&lcdc_dev->reg_lock);
465         
466         return 0;
467 }
468
469 static  int win2_display(struct rk30_lcdc_device *lcdc_dev,struct layer_par *par )
470 {
471         u32 y_addr;
472         u32 uv_addr;
473         y_addr = par->smem_start + par->y_offset;
474         uv_addr = par->cbr_start + par->c_offset;
475         DBG(2,KERN_INFO "lcdc%d>>%s>>y_addr:0x%x>>uv_addr:0x%x\n",lcdc_dev->id,__func__,y_addr,uv_addr);
476         
477         spin_lock(&lcdc_dev->reg_lock);
478         if(likely(lcdc_dev->clk_on))
479         {
480                 lcdc_writel(lcdc_dev, WIN2_MST, y_addr);
481                 lcdc_writel(lcdc_dev, REG_CFG_DONE, 0x01); 
482         }
483         spin_unlock(&lcdc_dev->reg_lock);
484         
485         return 0;
486 }
487
488 static  int win0_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
489         struct layer_par *par )
490 {
491         u32 xact, yact, xvir, yvir, xpos, ypos;
492         u32 ScaleYrgbX = 0x1000;
493         u32 ScaleYrgbY = 0x1000;
494         u32 ScaleCbrX = 0x1000;
495         u32 ScaleCbrY = 0x1000;
496
497         xact = par->xact;                           //active (origin) picture window width/height               
498         yact = par->yact;
499         xvir = par->xvir;                          // virtual resolution                
500         yvir = par->yvir;
501         xpos = par->xpos+screen->left_margin + screen->hsync_len;
502         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
503    
504         
505         ScaleYrgbX = CalScale(xact, par->xsize); //both RGB and yuv need this two factor
506         ScaleYrgbY = CalScale(yact, par->ysize);
507         switch (par->format)
508         {
509                 case YUV422:// yuv422
510                         ScaleCbrX = CalScale((xact/2), par->xsize);
511                         ScaleCbrY = CalScale(yact, par->ysize);
512                         break;
513                 case YUV420: // yuv420
514                         ScaleCbrX = CalScale(xact/2, par->xsize);
515                         ScaleCbrY = CalScale(yact/2, par->ysize);
516                         break;
517                 case YUV444:// yuv444
518                         ScaleCbrX = CalScale(xact, par->xsize);
519                         ScaleCbrY = CalScale(yact, par->ysize);
520                         break;
521                 default:
522                    break;
523         }
524
525         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
526                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
527         
528         spin_lock(&lcdc_dev->reg_lock);
529         if(likely(lcdc_dev->clk_on))
530         {
531                 lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
532                 lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,v_X_SCL_FACTOR(ScaleCbrX)| v_Y_SCL_FACTOR(ScaleCbrY));
533                 lcdc_msk_reg(lcdc_dev, SYS_CTRL1, m_W0_FORMAT, v_W0_FORMAT(par->format));               //(inf->video_mode==0)
534                 lcdc_writel(lcdc_dev, WIN0_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
535                 lcdc_writel(lcdc_dev, WIN0_DSP_ST, v_DSP_STX(xpos) | v_DSP_STY(ypos));
536                 lcdc_writel(lcdc_dev, WIN0_DSP_INFO, v_DSP_WIDTH(par->xsize)| v_DSP_HEIGHT(par->ysize));
537                 lcdc_msk_reg(lcdc_dev, WIN0_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,
538                         v_COLORKEY_EN(1) | v_KEYCOLOR(0));
539                 switch(par->format) 
540                 {
541                         case ARGB888:
542                                 lcdc_writel(lcdc_dev, WIN0_VIR,v_ARGB888_VIRWIDTH(xvir));
543                                 //lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
544                                 break;
545                         case RGB888:  //rgb888
546                                 lcdc_writel(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
547                                 //lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W0_RGB_RB_SWAP,v_W0_RGB_RB_SWAP(1));
548                                 break;
549                         case RGB565:  //rgb565
550                                 lcdc_writel(lcdc_dev, WIN0_VIR,v_RGB565_VIRWIDTH(xvir));
551                                 break;
552                         case YUV422:
553                         case YUV420:   
554                                 lcdc_writel(lcdc_dev, WIN0_VIR,v_YUV_VIRWIDTH(xvir));
555                                 break;
556                         default:
557                                 lcdc_writel(lcdc_dev, WIN0_VIR,v_RGB888_VIRWIDTH(xvir));
558                                 break;
559                 }
560
561                 lcdc_cfg_done(lcdc_dev);
562         }
563         spin_unlock(&lcdc_dev->reg_lock);
564
565     return 0;
566
567 }
568
569 static int win1_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
570         struct layer_par *par )
571 {
572         u32 xact, yact, xvir, yvir, xpos, ypos;
573         u32 ScaleYrgbX = 0x1000;
574         u32 ScaleYrgbY = 0x1000;
575         u32 ScaleCbrX = 0x1000;
576         u32 ScaleCbrY = 0x1000;
577         
578         xact = par->xact;                       
579         yact = par->yact;
580         xvir = par->xvir;               
581         yvir = par->yvir;
582         xpos = par->xpos+screen->left_margin + screen->hsync_len;
583         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
584         
585         ScaleYrgbX = CalScale(xact, par->xsize);
586         ScaleYrgbY = CalScale(yact, par->ysize);
587         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
588                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
589
590         
591         spin_lock(&lcdc_dev->reg_lock);
592         if(likely(lcdc_dev->clk_on))
593         {
594                 switch (par->format)
595                 {
596                         case YUV422:// yuv422
597                                 ScaleCbrX = CalScale((xact/2), par->xsize);
598                                 ScaleCbrY = CalScale(yact, par->ysize);
599                                 break;
600                         case YUV420: // yuv420
601                                 ScaleCbrX = CalScale(xact/2, par->xsize);
602                                 ScaleCbrY = CalScale(yact/2, par->ysize);
603                                 break;
604                         case YUV444:// yuv444
605                                 ScaleCbrX = CalScale(xact, par->xsize);
606                                 ScaleCbrY = CalScale(yact, par->ysize);
607                                 break;
608                         default:
609                                 break;
610                 }
611
612                 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB, v_X_SCL_FACTOR(ScaleYrgbX) | v_Y_SCL_FACTOR(ScaleYrgbY));
613                 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_CBR,  v_X_SCL_FACTOR(ScaleCbrX) | v_Y_SCL_FACTOR(ScaleCbrY));
614                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1, m_W1_FORMAT, v_W1_FORMAT(par->format));
615                 lcdc_writel(lcdc_dev, WIN1_ACT_INFO,v_ACT_WIDTH(xact) | v_ACT_HEIGHT(yact));
616                 lcdc_writel(lcdc_dev, WIN1_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
617                 lcdc_writel(lcdc_dev, WIN1_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
618                 // enable win1 color key and set the color to black(rgb=0)
619                 lcdc_msk_reg(lcdc_dev, WIN1_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
620                 switch(par->format)
621                 {
622                         case ARGB888:
623                                 lcdc_writel(lcdc_dev, WIN1_VIR,v_ARGB888_VIRWIDTH(xvir));
624                                 //lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
625                                 break;
626                         case RGB888:  //rgb888
627                                 lcdc_writel(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
628                                 // lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
629                                 break;
630                         case RGB565:  //rgb565
631                                 lcdc_writel(lcdc_dev, WIN1_VIR,v_RGB565_VIRWIDTH(xvir));
632                                 break;
633                         case YUV422:
634                         case YUV420:   
635                                 lcdc_writel(lcdc_dev, WIN1_VIR,v_YUV_VIRWIDTH(xvir));
636                                 break;
637                         default:
638                                 lcdc_writel(lcdc_dev, WIN1_VIR,v_RGB888_VIRWIDTH(xvir));
639                                 break;
640                 }
641                 
642                 lcdc_cfg_done(lcdc_dev); 
643         }
644         spin_unlock(&lcdc_dev->reg_lock);
645     return 0;
646 }
647
648 static int win2_set_par(struct rk30_lcdc_device *lcdc_dev,rk_screen *screen,
649         struct layer_par *par )
650 {
651         u32 xact, yact, xvir, yvir, xpos, ypos;
652         u32 ScaleYrgbX = 0x1000;
653         u32 ScaleYrgbY = 0x1000;
654         u32 ScaleCbrX = 0x1000;
655         u32 ScaleCbrY = 0x1000;
656         
657         xact = par->xact;                       
658         yact = par->yact;
659         xvir = par->xvir;               
660         yvir = par->yvir;
661         xpos = par->xpos+screen->left_margin + screen->hsync_len;
662         ypos = par->ypos+screen->upper_margin + screen->vsync_len;
663         
664         ScaleYrgbX = CalScale(xact, par->xsize);
665         ScaleYrgbY = CalScale(yact, par->ysize);
666         DBG(1,"%s for lcdc%d>>format:%d>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d>>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n",
667                 __func__,lcdc_dev->id,par->format,xact,yact,par->xsize,par->ysize,xvir,yvir,xpos,ypos);
668
669         
670         spin_lock(&lcdc_dev->reg_lock);
671         if(likely(lcdc_dev->clk_on))
672         {
673
674                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1, m_W2_FORMAT, v_W2_FORMAT(par->format));
675                 lcdc_writel(lcdc_dev, WIN2_DSP_ST,v_DSP_STX(xpos) | v_DSP_STY(ypos));
676                 lcdc_writel(lcdc_dev, WIN2_DSP_INFO,v_DSP_WIDTH(par->xsize) | v_DSP_HEIGHT(par->ysize));
677                 // enable win1 color key and set the color to black(rgb=0)
678                 lcdc_msk_reg(lcdc_dev, WIN2_COLOR_KEY_CTRL, m_COLORKEY_EN | m_KEYCOLOR,v_COLORKEY_EN(1) | v_KEYCOLOR(0));
679                 switch(par->format)
680                 {
681                         case ARGB888:
682                                 lcdc_writel(lcdc_dev, WIN2_VIR,v_ARGB888_VIRWIDTH(xvir));
683                                 //lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
684                                 break;
685                         case RGB888:  //rgb888
686                                 lcdc_writel(lcdc_dev, WIN2_VIR,v_RGB888_VIRWIDTH(xvir));
687                                 // lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_W1_RGB_RB_SWAP,v_W1_RGB_RB_SWAP(1));
688                                 break;
689                         case RGB565:  //rgb565
690                                 lcdc_writel(lcdc_dev, WIN2_VIR,v_RGB565_VIRWIDTH(xvir));
691                                 break;
692                         case YUV422:
693                         case YUV420:   
694                                 lcdc_writel(lcdc_dev, WIN2_VIR,v_YUV_VIRWIDTH(xvir));
695                                 break;
696                         default:
697                                 lcdc_writel(lcdc_dev, WIN2_VIR,v_RGB888_VIRWIDTH(xvir));
698                                 break;
699                 }
700                 
701                 lcdc_writel(lcdc_dev, REG_CFG_DONE, 0x01); 
702         }
703         spin_unlock(&lcdc_dev->reg_lock);
704     return 0;
705 }
706
707 static int rk30_lcdc_open(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open)
708 {
709         int i=0;
710         int __iomem *c;
711         int v;
712         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
713         
714         //printk("%s>>open:%d>>cnt:%d\n",__func__,open,lcdc_dev->atv_layer_cnt);
715         if((open) && (!lcdc_dev->atv_layer_cnt)) //enable clk,when first layer open
716         {
717                 rk30_lcdc_clk_enable(lcdc_dev);
718                 memcpy((u8*)lcdc_dev->regs, (u8*)lcdc_dev->regsbak, 0xc4);  //resume reg
719                 spin_lock(&lcdc_dev->reg_lock);
720                 if(dev_drv->cur_screen->dsp_lut)                        //resume dsp lut
721                 {
722                         lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
723                         lcdc_cfg_done(lcdc_dev);
724                         mdelay(25);
725                         for(i=0;i<256;i++)
726                         {
727                                 v = dev_drv->cur_screen->dsp_lut[i];
728                                 c = lcdc_dev->dsp_lut_addr_base+i;
729                                 writel_relaxed(v,c);
730                                 
731                         }
732                         lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
733                 }
734                 spin_unlock(&lcdc_dev->reg_lock);
735         }
736         
737         if(layer_id == 0)
738         {
739                 win0_open(lcdc_dev,open);       
740         }
741         else if(layer_id == 1)
742         {
743                 win1_open(lcdc_dev,open);
744         }
745         else if(layer_id == 2)
746         {
747                 win2_open(lcdc_dev,open);
748         }
749
750         if((!open) && (!lcdc_dev->atv_layer_cnt))  //when all layer closed,disable clk
751         {
752                 rk30_lcdc_clk_disable(lcdc_dev);
753         }
754
755         printk(KERN_INFO "lcdc%d win%d %s,atv layer:%d\n",
756                 lcdc_dev->id,layer_id,open?"open":"closed",
757                 lcdc_dev->atv_layer_cnt);
758         return 0;
759 }
760
761 static int rk30_lcdc_set_par(struct rk_lcdc_device_driver *dev_drv,int layer_id)
762 {
763         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
764         struct layer_par *par = NULL;
765         rk_screen *screen = dev_drv->cur_screen;
766         
767         if(!screen)
768         {
769                 printk(KERN_ERR "screen is null!\n");
770                 return -ENOENT;
771         }
772         if(layer_id==0)
773         {
774                 par = dev_drv->layer_par[0];
775                 win0_set_par(lcdc_dev,screen,par);
776         }
777         else if(layer_id==1)
778         {
779                 par = dev_drv->layer_par[1];
780                 win1_set_par(lcdc_dev,screen,par);
781         }
782         else if(layer_id == 2)
783         {
784                 par = dev_drv->layer_par[2];
785                 win2_set_par(lcdc_dev,screen,par);
786         }
787         
788         return 0;
789 }
790
791 int rk30_lcdc_pan_display(struct rk_lcdc_device_driver * dev_drv,int layer_id)
792 {
793         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
794         struct layer_par *par = NULL;
795         rk_screen *screen = dev_drv->cur_screen;
796         unsigned long flags;
797         int timeout;
798         
799         if(!screen)
800         {
801                 printk(KERN_ERR "screen is null!\n");
802                 return -ENOENT; 
803         }
804         if(layer_id==0)
805         {
806                 par = dev_drv->layer_par[0];
807                 win0_display(lcdc_dev,par);
808         }
809         else if(layer_id==1)
810         {
811                 par = dev_drv->layer_par[1];
812                 win1_display(lcdc_dev,par);
813         }
814         else if(layer_id == 2)
815         {
816                 par = dev_drv->layer_par[2];
817                 win2_display(lcdc_dev,par);
818         }
819         if((dev_drv->first_frame))  //this is the first frame of the system ,enable frame start interrupt
820         {
821                 dev_drv->first_frame = 0;
822                 lcdc_msk_reg(lcdc_dev,INT_STATUS,m_FRM_START_INT_CLEAR |m_FRM_START_INT_EN ,
823                           v_FRM_START_INT_CLEAR(1) | v_FRM_START_INT_EN(1));
824                 lcdc_cfg_done(lcdc_dev);  // write any value to  REG_CFG_DONE let config become effective
825                  
826         }
827
828         if(dev_drv->num_buf < 3) //3buffer ,no need to  wait for sysn
829         {
830                 spin_lock_irqsave(&dev_drv->cpl_lock,flags);
831                 init_completion(&dev_drv->frame_done);
832                 spin_unlock_irqrestore(&dev_drv->cpl_lock,flags);
833                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,msecs_to_jiffies(dev_drv->cur_screen->ft+5));
834                 if(!timeout&&(!dev_drv->frame_done.done))
835                 {
836                         printk(KERN_ERR "wait for new frame start time out!\n");
837                         return -ETIMEDOUT;
838                 }
839         }
840         
841         return 0;
842 }
843
844 int rk30_lcdc_ioctl(struct rk_lcdc_device_driver * dev_drv,unsigned int cmd, unsigned long arg,int layer_id)
845 {
846         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
847         u32 panel_size[2];
848         void __user *argp = (void __user *)arg;
849         int ret = 0;
850         switch(cmd)
851         {
852                 case FBIOGET_PANEL_SIZE:    //get panel size
853                         panel_size[0] = dev_drv->screen0->x_res;
854                         panel_size[1] = dev_drv->screen0->y_res;
855                         if(copy_to_user(argp, panel_size, 8)) 
856                                 return -EFAULT;
857                         break;
858                 default:
859                         break;
860         }
861
862         return ret;
863 }
864 static int rk30_lcdc_get_layer_state(struct rk_lcdc_device_driver *dev_drv,int layer_id)
865 {
866         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
867         struct layer_par *par = dev_drv->layer_par[layer_id];
868
869         spin_lock(&lcdc_dev->reg_lock);
870         if(lcdc_dev->clk_on)
871         {
872                 if(layer_id == 0)
873                 {
874                         par->state = lcdc_read_bit(lcdc_dev,SYS_CTRL1,m_W0_EN);
875                 }
876                 else if( layer_id == 1)
877                 {
878                         par->state = lcdc_read_bit(lcdc_dev,SYS_CTRL1,m_W1_EN);
879                 }
880         }
881         spin_unlock(&lcdc_dev->reg_lock);
882         
883         return par->state;
884         
885 }
886
887 /***********************************
888 overlay manager
889 swap:1 win0 on the top of win1
890         0 win1 on the top of win0
891 set  : 1 set overlay 
892         0 get overlay state
893 ************************************/
894 static int rk30_lcdc_ovl_mgr(struct rk_lcdc_device_driver *dev_drv,int swap,bool set)
895 {
896         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
897         int ovl;
898         spin_lock(&lcdc_dev->reg_lock);
899         if(lcdc_dev->clk_on)
900         {
901                 if(set)  //set overlay
902                 {
903                         lcdc_msk_reg(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP,v_W0W1_POSITION_SWAP(swap));
904                         lcdc_writel(lcdc_dev, REG_CFG_DONE, 0x01);
905                         lcdc_cfg_done(lcdc_dev);
906                         ovl = swap;
907                 }
908                 else  //get overlay
909                 {
910                         ovl = lcdc_read_bit(lcdc_dev,DSP_CTRL0,m_W0W1_POSITION_SWAP);
911                 }
912         }
913         else
914         {
915                 ovl = -EPERM;
916         }
917         spin_unlock(&lcdc_dev->reg_lock);
918
919         return ovl;
920 }
921
922 static ssize_t dump_win0_disp_info(struct rk30_lcdc_device *lcdc_dev,char *buf)
923 {
924         char format[9] = "NULL";
925         u32 fmt_id = lcdc_readl(lcdc_dev,SYS_CTRL1);
926         u32 xvir,act_info,dsp_info,dsp_st,factor;
927         u16 x_act,y_act,x_dsp,y_dsp,x_factor,y_factor;
928         u16 x_scale,y_scale;
929         switch((fmt_id&m_W0_FORMAT)>>4)
930         {
931                 case 0:
932                         strcpy(format,"ARGB888");
933                         break;
934                 case 1:
935                         strcpy(format,"RGB888");
936                         break;
937                 case 2:
938                         strcpy(format,"RGB565");
939                         break;
940                 case 4:
941                         strcpy(format,"YCbCr420");
942                         break;
943                 case 5:
944                         strcpy(format,"YCbCr422");
945                         break;
946                 case 6:
947                         strcpy(format,"YCbCr444");
948                         break;
949                 default:
950                         strcpy(format,"inval\n");
951                         break;
952         }
953
954         xvir = lcdc_readl(lcdc_dev,WIN0_VIR)&0xffff;
955         act_info = lcdc_readl(lcdc_dev,WIN0_ACT_INFO);
956         dsp_info = lcdc_readl(lcdc_dev,WIN0_DSP_INFO);
957         dsp_st = lcdc_readl(lcdc_dev,WIN0_DSP_ST);
958         factor = lcdc_readl(lcdc_dev,WIN0_SCL_FACTOR_YRGB);
959         x_act =  (act_info&0xffff) + 1;
960         y_act = (act_info>>16) + 1;
961         x_dsp = (dsp_info&0xffff) + 1;
962         y_dsp = (dsp_info>>16) + 1;
963          x_factor = factor&0xffff;
964         y_factor = factor>>16;
965         x_scale = 4096*100/x_factor;
966         y_scale = 4096*100/y_factor;
967         return snprintf(buf,PAGE_SIZE,
968                 "xvir:%d\n"
969                 "xact:%d\n"
970                 "yact:%d\n"
971                 "xdsp:%d\n"
972                 "ydsp:%d\n"
973                 "x_st:%d\n"
974                 "y_st:%d\n"
975                 "x_scale:%d.%d\n"
976                 "y_scale:%d.%d\n"
977                 "format:%s\n",
978                 xvir,
979                 x_act,
980                 y_act,
981                 x_dsp,
982                 y_dsp,
983                 dsp_st&0xffff,
984                 dsp_st>>16,
985                 x_scale/100,
986                 x_scale%100,
987                 y_scale/100,
988                 y_scale%100,
989                 format);
990
991 }
992 static ssize_t dump_win1_disp_info(struct rk30_lcdc_device *lcdc_dev,char *buf)
993 {
994         char format[9] = "NULL";
995         u32 fmt_id = lcdc_readl(lcdc_dev,SYS_CTRL1);
996         u32 xvir,act_info,dsp_info,dsp_st,factor;
997         u16 x_act,y_act,x_dsp,y_dsp,x_factor,y_factor;
998         u16 x_scale,y_scale;
999         switch((fmt_id&m_W1_FORMAT)>>7)
1000         {
1001                 case 0:
1002                         strcpy(format,"ARGB888");
1003                         break;
1004                 case 1:
1005                         strcpy(format,"RGB888");
1006                         break;
1007                 case 2:
1008                         strcpy(format,"RGB565");
1009                         break;
1010                 case 4:
1011                         strcpy(format,"YCbCr420");
1012                         break;
1013                 case 5:
1014                         strcpy(format,"YCbCr422");
1015                         break;
1016                 case 6:
1017                         strcpy(format,"YCbCr444");
1018                         break;
1019                 default:
1020                         strcpy(format,"inval\n");
1021                         break;
1022         }
1023
1024         xvir = lcdc_readl(lcdc_dev,WIN1_VIR)&0xffff;
1025         act_info = lcdc_readl(lcdc_dev,WIN1_ACT_INFO);
1026         dsp_info = lcdc_readl(lcdc_dev,WIN1_DSP_INFO);
1027         dsp_st = lcdc_readl(lcdc_dev,WIN1_DSP_ST);
1028         factor = lcdc_readl(lcdc_dev,WIN1_SCL_FACTOR_YRGB);
1029         x_act = (act_info&0xffff) + 1;
1030         y_act = (act_info>>16) + 1;
1031         x_dsp = (dsp_info&0xffff) + 1;
1032         y_dsp = (dsp_info>>16) + 1;
1033         x_factor = factor&0xffff;
1034         y_factor = factor>>16;
1035         x_scale = 4096*100/x_factor;
1036         y_scale = 4096*100/y_factor;
1037          return snprintf(buf,PAGE_SIZE,
1038                 "xvir:%d\n"
1039                 "xact:%d\n"
1040                 "yact:%d\n"
1041                 "xdsp:%d\n"
1042                 "ydsp:%d\n"
1043                 "x_st:%d\n"
1044                 "y_st:%d\n"
1045                 "x_scale:%d.%d\n"
1046                 "y_scale:%d.%d\n"
1047                 "format:%s\n",
1048                 xvir,
1049                 x_act,
1050                 y_act,
1051                 x_dsp,
1052                 y_dsp,
1053                 dsp_st&0xffff,
1054                 dsp_st>>16,
1055                 x_scale/100,
1056                 x_scale%100,
1057                 y_scale/100,
1058                 y_scale%100,
1059                 format);
1060
1061 }
1062
1063 static ssize_t dump_win2_disp_info(struct rk30_lcdc_device *lcdc_dev,char *buf)
1064 {
1065         char format[9] = "NULL";
1066         u32 fmt_id = lcdc_readl(lcdc_dev,SYS_CTRL1);
1067         u32 xvir,dsp_info,dsp_st;
1068         u16 x_dsp,y_dsp;
1069    
1070         switch((fmt_id&m_W2_FORMAT)>>10)
1071         {
1072                 case 0:
1073                         strcpy(format,"ARGB888");
1074                         break;
1075                 case 1:
1076                         strcpy(format,"RGB888");
1077                         break;
1078                 case 2:
1079                         strcpy(format,"RGB565");
1080                         break;
1081                 case 4:
1082                         strcpy(format,"8bpp");
1083                         break;
1084                         case 5:
1085                         strcpy(format,"4bpp");
1086                         break;
1087                 case 6:
1088                         strcpy(format,"2bpp");
1089                         break;
1090                 case 7:
1091                         strcpy(format,"1bpp");
1092                         break;
1093                 default:
1094                         strcpy(format,"inval\n");
1095                         break;
1096         }
1097
1098         xvir = lcdc_readl(lcdc_dev,WIN2_VIR)&0xffff;
1099         dsp_info = lcdc_readl(lcdc_dev,WIN2_DSP_INFO);
1100         dsp_st = lcdc_readl(lcdc_dev,WIN2_DSP_ST);
1101
1102         x_dsp = dsp_info&0xffff;
1103         y_dsp = dsp_info>>16;
1104
1105         return snprintf(buf,PAGE_SIZE,
1106                 "xvir:%d\n"
1107                 "xdsp:%d\n"
1108                 "ydsp:%d\n"
1109                 "x_st:%d\n"
1110                 "y_st:%d\n"
1111                 "format:%s\n",
1112                 xvir,
1113                 x_dsp,
1114                 y_dsp,
1115                 dsp_st&0xffff,
1116                 dsp_st>>16,
1117                 format);
1118 }
1119
1120 static ssize_t  rk30_lcdc_get_disp_info(struct rk_lcdc_device_driver *dev_drv,char *buf,int layer_id)
1121 {
1122         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
1123         if(layer_id == 0)
1124         {
1125                 return dump_win0_disp_info(lcdc_dev,buf);
1126         }
1127         else if(layer_id == 1)
1128         {
1129                 return dump_win1_disp_info(lcdc_dev,buf);
1130         }
1131         else if(layer_id == 2)
1132         {
1133                 return dump_win2_disp_info(lcdc_dev,buf);
1134         }
1135
1136         return 0;
1137 }
1138
1139
1140
1141 /*******************************************
1142 lcdc fps manager,set or get lcdc fps
1143 set:0 get
1144      1 set
1145 ********************************************/
1146 static int rk30_lcdc_fps_mgr(struct rk_lcdc_device_driver *dev_drv,int fps,bool set)
1147 {
1148         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
1149         rk_screen * screen = dev_drv->cur_screen;
1150         u64 ft = 0;
1151         u32 dotclk;
1152         int ret;
1153
1154         if(set)
1155         {
1156                 ft = div_u64(1000000000000llu,fps);
1157                 dev_drv->pixclock = div_u64(ft,(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
1158                                 (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len));
1159                 dotclk = div_u64(1000000000000llu,dev_drv->pixclock);
1160                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1161                 if(ret)
1162                 {
1163                         printk(KERN_ERR ">>>>>> set lcdc%d dclk failed\n",lcdc_dev->id);
1164                 }
1165                 dev_drv->pixclock = lcdc_dev->pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1166                         
1167         }
1168         
1169         ft = (u64)(screen->upper_margin + screen->lower_margin + screen->y_res +screen->vsync_len)*
1170         (screen->left_margin + screen->right_margin + screen->x_res + screen->hsync_len)*
1171         (dev_drv->pixclock);       // one frame time ,(pico seconds)
1172         fps = div64_u64(1000000000000llu,ft);
1173         screen->ft = 1000/fps ;  //one frame time in ms
1174         return fps;
1175 }
1176
1177 static int rk30_fb_layer_remap(struct rk_lcdc_device_driver *dev_drv,
1178         enum fb_win_map_order order)
1179 {
1180        mutex_lock(&dev_drv->fb_win_id_mutex);
1181        if(order == FB_DEFAULT_ORDER )
1182         {
1183                 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
1184         }
1185        dev_drv->fb2_win_id  = order/100;
1186        dev_drv->fb1_win_id = (order/10)%10;
1187        dev_drv->fb0_win_id = order%10;
1188        mutex_unlock(&dev_drv->fb_win_id_mutex);
1189
1190        printk("fb0:win%d\nfb1:win%d\nfb2:win%d\n",dev_drv->fb0_win_id,dev_drv->fb1_win_id,
1191                dev_drv->fb2_win_id);
1192
1193        return 0;
1194 }
1195
1196 static int rk30_fb_get_layer(struct rk_lcdc_device_driver *dev_drv,const char *id)
1197 {
1198        int layer_id = 0;
1199        mutex_lock(&dev_drv->fb_win_id_mutex);
1200        if(!strcmp(id,"fb0")||!strcmp(id,"fb3"))
1201        {
1202                layer_id = dev_drv->fb0_win_id;
1203        }
1204        else if(!strcmp(id,"fb1")||!strcmp(id,"fb4"))
1205        {
1206                layer_id = dev_drv->fb1_win_id;
1207        }
1208        else if(!strcmp(id,"fb2")||!strcmp(id,"fb5"))
1209        {
1210                layer_id = dev_drv->fb2_win_id;
1211        }
1212        mutex_unlock(&dev_drv->fb_win_id_mutex);
1213
1214        return  layer_id;
1215 }
1216
1217 static int rk30_read_dsp_lut(struct rk_lcdc_device_driver *dev_drv,int *lut)
1218 {
1219
1220         return 0;
1221 }
1222
1223 static int rk30_set_dsp_lut(struct rk_lcdc_device_driver *dev_drv,int *lut)
1224 {
1225         int i=0;
1226         int __iomem *c;
1227         int v;
1228         int ret = 0;
1229
1230         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
1231         lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
1232         lcdc_cfg_done(lcdc_dev);
1233         msleep(25);
1234         if(dev_drv->cur_screen->dsp_lut)
1235         {
1236                 for(i=0;i<256;i++)
1237                 {
1238                         v = dev_drv->cur_screen->dsp_lut[i] = lut[i];
1239                         c = lcdc_dev->dsp_lut_addr_base+i;
1240                         writel_relaxed(v,c);
1241                         
1242                 }
1243         }
1244         else
1245         {
1246                 printk(KERN_WARNING "no buffer to backup lut data!\n");
1247                 ret =  -1;
1248         }
1249         lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
1250         lcdc_cfg_done(lcdc_dev);
1251
1252         return ret;
1253 }
1254 int rk30_lcdc_early_suspend(struct rk_lcdc_device_driver *dev_drv)
1255 {
1256         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
1257
1258
1259         if(dev_drv->screen0->standby)
1260                 dev_drv->screen0->standby(1);
1261         if(dev_drv->screen_ctr_info->io_disable)
1262                 dev_drv->screen_ctr_info->io_disable();
1263         
1264         spin_lock(&lcdc_dev->reg_lock);
1265         if(likely(lcdc_dev->clk_on))
1266         {
1267                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
1268                 lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(1));
1269                 lcdc_cfg_done(lcdc_dev);
1270                 spin_unlock(&lcdc_dev->reg_lock);
1271         }
1272         else  //clk already disabled
1273         {
1274                 spin_unlock(&lcdc_dev->reg_lock);
1275                 return 0;
1276         }
1277         
1278                 
1279         rk30_lcdc_clk_disable(lcdc_dev);
1280
1281         return 0;
1282 }
1283
1284
1285 int rk30_lcdc_early_resume(struct rk_lcdc_device_driver *dev_drv)
1286 {  
1287         struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
1288         int i=0;
1289         int __iomem *c;
1290         int v;
1291
1292         if(dev_drv->screen_ctr_info->io_enable)                 //power on
1293                 dev_drv->screen_ctr_info->io_enable();
1294                 
1295         if(!lcdc_dev->clk_on)
1296         {
1297                 rk30_lcdc_clk_enable(lcdc_dev);
1298         }
1299         memcpy((u8*)lcdc_dev->regs, (u8*)lcdc_dev->regsbak, 0xc4);  //resume reg
1300
1301         spin_lock(&lcdc_dev->reg_lock);
1302         if(dev_drv->cur_screen->dsp_lut)                        //resume dsp lut
1303         {
1304                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
1305                 lcdc_cfg_done(lcdc_dev);
1306                 mdelay(25);
1307                 for(i=0;i<256;i++)
1308                 {
1309                         v = dev_drv->cur_screen->dsp_lut[i];
1310                         c = lcdc_dev->dsp_lut_addr_base+i;
1311                         writel_relaxed(v,c);
1312                         
1313                 }
1314                 lcdc_msk_reg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(1));
1315         }
1316         if(lcdc_dev->atv_layer_cnt)
1317         {
1318                 lcdc_msk_reg(lcdc_dev, SYS_CTRL0,m_LCDC_STANDBY,v_LCDC_STANDBY(0));
1319                 lcdc_cfg_done(lcdc_dev);
1320         }
1321         spin_unlock(&lcdc_dev->reg_lock);
1322
1323         if(!lcdc_dev->atv_layer_cnt)
1324                 rk30_lcdc_clk_disable(lcdc_dev);
1325         
1326         if(dev_drv->screen0->standby)
1327                 dev_drv->screen0->standby(0);         //screen wake up
1328                 
1329         return 0;
1330 }
1331 static irqreturn_t rk30_lcdc_isr(int irq, void *dev_id)
1332 {
1333         struct rk30_lcdc_device *lcdc_dev = (struct rk30_lcdc_device *)dev_id;
1334         
1335         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FRM_START_INT_CLEAR, v_FRM_START_INT_CLEAR(1));
1336         lcdc_cfg_done(lcdc_dev);
1337         //lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LINE_FLAG_INT_CLEAR, v_LINE_FLAG_INT_CLEAR(1));
1338  
1339         if(lcdc_dev->driver.num_buf < 3)  //three buffer ,no need to wait for sync
1340         {
1341                 spin_lock(&(lcdc_dev->driver.cpl_lock));
1342                 complete(&(lcdc_dev->driver.frame_done));
1343                 spin_unlock(&(lcdc_dev->driver.cpl_lock));
1344         }
1345         return IRQ_HANDLED;
1346 }
1347
1348 static struct layer_par lcdc_layer[] = {
1349         [0] = {
1350                 .name           = "win0",
1351                 .id             = 0,
1352                 .support_3d     = true,
1353         },
1354         [1] = {
1355                 .name           = "win1",
1356                 .id             = 1,
1357                 .support_3d     = false,
1358         },
1359         [2] = {
1360                 .name           = "win2",
1361                 .id             = 2,
1362                 .support_3d     = false,
1363         },
1364 };
1365
1366 static struct rk_lcdc_device_driver lcdc_driver = {
1367         .name                   = "lcdc",
1368         .def_layer_par          = lcdc_layer,
1369         .num_layer              = ARRAY_SIZE(lcdc_layer),
1370         .open                   = rk30_lcdc_open,
1371         .init_lcdc              = rk30_lcdc_init,
1372         .ioctl                  = rk30_lcdc_ioctl,
1373         .suspend                = rk30_lcdc_early_suspend,
1374         .resume                 = rk30_lcdc_early_resume,
1375         .set_par                = rk30_lcdc_set_par,
1376         .blank                  = rk30_lcdc_blank,
1377         .pan_display            = rk30_lcdc_pan_display,
1378         .load_screen            = rk30_load_screen,
1379         .get_layer_state        = rk30_lcdc_get_layer_state,
1380         .ovl_mgr                = rk30_lcdc_ovl_mgr,
1381         .get_disp_info          = rk30_lcdc_get_disp_info,
1382         .fps_mgr                = rk30_lcdc_fps_mgr,
1383         .fb_get_layer           = rk30_fb_get_layer,
1384         .fb_layer_remap         = rk30_fb_layer_remap,
1385         .set_dsp_lut            = rk30_set_dsp_lut,
1386         .read_dsp_lut           = rk30_read_dsp_lut,
1387 };
1388 #ifdef CONFIG_PM
1389 static int rk30_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1390 {
1391         return 0;
1392 }
1393
1394 static int rk30_lcdc_resume(struct platform_device *pdev)
1395 {
1396         return 0;
1397 }
1398
1399 #else
1400 #define rk30_lcdc_suspend NULL
1401 #define rk30_lcdc_resume NULL
1402 #endif
1403
1404 static int __devinit rk30_lcdc_probe (struct platform_device *pdev)
1405 {
1406         struct rk30_lcdc_device *lcdc_dev=NULL;
1407         rk_screen *screen;
1408         struct rk29fb_info *screen_ctr_info;
1409         struct resource *res = NULL;
1410         struct resource *mem;
1411         int ret = 0;
1412         
1413         /*************Malloc rk30lcdc_inf and set it to pdev for drvdata**********/
1414         lcdc_dev = kzalloc(sizeof(struct rk30_lcdc_device), GFP_KERNEL);
1415         if(!lcdc_dev)
1416         {
1417                 dev_err(&pdev->dev, ">>rk30 lcdc device kmalloc fail!");
1418                 return -ENOMEM;
1419         }
1420         platform_set_drvdata(pdev, lcdc_dev);
1421         lcdc_dev->id = pdev->id;
1422         screen_ctr_info = (struct rk29fb_info * )pdev->dev.platform_data;
1423         screen =  kzalloc(sizeof(rk_screen), GFP_KERNEL);
1424         if(!screen)
1425         {
1426                 dev_err(&pdev->dev, ">>rk30 lcdc screen kmalloc fail!");
1427                 ret =  -ENOMEM;
1428                 goto err0;
1429         }
1430         /****************get lcdc0 reg  *************************/
1431         res = platform_get_resource(pdev, IORESOURCE_MEM,0);
1432         if (res == NULL)
1433         {
1434                 dev_err(&pdev->dev, "failed to get io resource for lcdc%d \n",lcdc_dev->id);
1435                 ret = -ENOENT;
1436                 goto err1;
1437         }
1438         lcdc_dev->reg_phy_base = res->start;
1439         lcdc_dev->len = resource_size(res);
1440         mem = request_mem_region(lcdc_dev->reg_phy_base, resource_size(res), pdev->name);
1441         if (mem == NULL)
1442         {
1443                 dev_err(&pdev->dev, "failed to request mem region for lcdc%d\n",lcdc_dev->id);
1444                 ret = -ENOENT;
1445                 goto err1;
1446         }
1447         lcdc_dev->reg_vir_base = ioremap(lcdc_dev->reg_phy_base,  resource_size(res));
1448         if (lcdc_dev->reg_vir_base == NULL)
1449         {
1450                 dev_err(&pdev->dev, "cannot map IO\n");
1451                 ret = -ENXIO;
1452                 goto err2;
1453         }
1454         
1455         //lcdc_dev->preg = (LCDC_REG*)lcdc_dev->reg_vir_base;
1456         lcdc_dev->regs = lcdc_dev->reg_vir_base;
1457         lcdc_dev->regsbak = kzalloc(lcdc_dev->len,GFP_KERNEL);
1458         if(!lcdc_dev->regsbak)
1459         {
1460                 dev_err(&pdev->dev, "failed to map memory for reg backup!\n");
1461         }
1462         //lcdc_dev->dsp_lut_addr_base = &lcdc_dev->preg->DSP_LUT_ADDR;
1463         lcdc_dev->dsp_lut_addr_base = (lcdc_dev->regs + DSP_LUT_ADDR);
1464         printk("lcdc%d:reg_phy_base = 0x%08x,reg_vir_base:0x%p\n",pdev->id,lcdc_dev->reg_phy_base, lcdc_dev->regs);
1465         lcdc_dev->driver.dev=&pdev->dev;
1466         lcdc_dev->driver.screen0 = screen;
1467         lcdc_dev->driver.cur_screen = screen;
1468         lcdc_dev->driver.screen_ctr_info = screen_ctr_info;
1469         spin_lock_init(&lcdc_dev->reg_lock);
1470         lcdc_dev->irq = platform_get_irq(pdev, 0);
1471         if(lcdc_dev->irq < 0)
1472         {
1473                 dev_err(&pdev->dev, "cannot find IRQ\n");
1474                 goto err3;
1475         }
1476         ret = request_irq(lcdc_dev->irq, rk30_lcdc_isr, IRQF_DISABLED,dev_name(&pdev->dev),lcdc_dev);
1477         if (ret)
1478         {
1479                dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n", lcdc_dev->irq, ret);
1480                ret = -EBUSY;
1481                goto err3;
1482         }
1483         
1484         if(screen_ctr_info->set_screen_info)
1485         {
1486                 screen_ctr_info->set_screen_info(screen,screen_ctr_info->lcd_info);
1487                 if(SCREEN_NULL==screen->type)
1488                 {
1489                         printk(KERN_WARNING "no display device on lcdc%d!?\n",lcdc_dev->id);
1490                         ret = -ENODEV;
1491                 }
1492                 if(screen_ctr_info->io_init)
1493                         screen_ctr_info->io_init(NULL);
1494         }
1495         else
1496         {
1497                 printk(KERN_WARNING "no display device on lcdc%d!?\n",lcdc_dev->id);
1498                 ret =  -ENODEV;
1499                 goto err4;
1500         }
1501                 
1502         ret = rk_fb_register(&(lcdc_dev->driver),&lcdc_driver,lcdc_dev->id);
1503         if(ret < 0)
1504         {
1505                 printk(KERN_ERR "register fb for lcdc%d failed!\n",lcdc_dev->id);
1506                 goto err4;
1507         }
1508         printk("rk30 lcdc%d probe ok!\n",lcdc_dev->id);
1509
1510         return 0;
1511
1512 err4:
1513         free_irq(lcdc_dev->irq,lcdc_dev);
1514 err3:   
1515         iounmap(lcdc_dev->reg_vir_base);
1516 err2:
1517         release_mem_region(lcdc_dev->reg_phy_base,resource_size(res));
1518 err1:
1519         kfree(screen);
1520 err0:
1521         platform_set_drvdata(pdev, NULL);
1522         kfree(lcdc_dev);
1523         return ret;
1524     
1525 }
1526 static int __devexit rk30_lcdc_remove(struct platform_device *pdev)
1527 {
1528         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1529         rk_fb_unregister(&(lcdc_dev->driver));
1530         rk30_lcdc_deinit(lcdc_dev);
1531         iounmap(lcdc_dev->reg_vir_base);
1532         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1533         kfree(lcdc_dev->screen);
1534         kfree(lcdc_dev);
1535         return 0;
1536 }
1537
1538 static void rk30_lcdc_shutdown(struct platform_device *pdev)
1539 {
1540         struct rk30_lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1541         if(lcdc_dev->driver.cur_screen->standby) //standby the screen if necessary
1542                 lcdc_dev->driver.cur_screen->standby(1);
1543         if(lcdc_dev->driver.screen_ctr_info->io_disable) //power off the screen if necessary
1544                 lcdc_dev->driver.screen_ctr_info->io_disable();
1545         if(lcdc_dev->driver.cur_screen->sscreen_set) //turn off  lvds if necessary
1546                 lcdc_dev->driver.cur_screen->sscreen_set(lcdc_dev->driver.cur_screen , 0);
1547         rk_fb_unregister(&(lcdc_dev->driver));
1548         rk30_lcdc_deinit(lcdc_dev);
1549         /*iounmap(lcdc_dev->reg_vir_base);
1550         release_mem_region(lcdc_dev->reg_phy_base,lcdc_dev->len);
1551         kfree(lcdc_dev->screen);
1552         kfree(lcdc_dev);*/
1553 }
1554
1555
1556 static struct platform_driver rk30lcdc_driver = {
1557         .probe          = rk30_lcdc_probe,
1558         .remove         = __devexit_p(rk30_lcdc_remove),
1559         .driver         = {
1560                 .name   = "rk30-lcdc",
1561                 .owner  = THIS_MODULE,
1562         },
1563         .suspend        = rk30_lcdc_suspend,
1564         .resume         = rk30_lcdc_resume,
1565         .shutdown   = rk30_lcdc_shutdown,
1566 };
1567
1568 static int __init rk30_lcdc_module_init(void)
1569 {
1570         return platform_driver_register(&rk30lcdc_driver);
1571 }
1572
1573 static void __exit rk30_lcdc_module_exit(void)
1574 {
1575         platform_driver_unregister(&rk30lcdc_driver);
1576 }
1577
1578
1579
1580 fs_initcall(rk30_lcdc_module_init);
1581 module_exit(rk30_lcdc_module_exit);
1582
1583
1584