drivers/video/rockchip/lcdc/rk312x_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk312x_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:      zhuangwenlong<zwl@rock-chips.com>
   6  *              zhengyang<zhengyang@rock-chips.com>
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <asm/div64.h>
  31 #include <asm/uaccess.h>
  32 #include <linux/rockchip/cpu.h>
  33 #include <linux/rockchip/iomap.h>
  34 #include <linux/rockchip/grf.h>
  35 #include <linux/rockchip/common.h>
  36 #include <dt-bindings/clock/rk_system_status.h>
  37 #if defined(CONFIG_ION_ROCKCHIP)
  38 #include <linux/rockchip/iovmm.h>
  39 #include <linux/rockchip/sysmmu.h>
  40 #endif
  41 #include "rk312x_lcdc.h"
  42
  43 static int dbg_thresd;
  44 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  45
  46 #define DBG(level, x...) do {                   \
  47         if (unlikely(dbg_thresd >= level))      \
  48                 printk(KERN_INFO x); } while (0)
  49
  50 static struct rk_lcdc_win lcdc_win[] = {
  51         [0] = {
  52                .name = "win0",
  53                .id = 0,
  54                .support_3d = false,
  55                },
  56         [1] = {
  57                .name = "win1",
  58                .id = 1,
  59                .support_3d = false,
  60                },
  61         [2] = {
  62                .name = "hwc",
  63                .id = 2,
  64                .support_3d = false,
  65                },
  66 };
  67
  68 static irqreturn_t rk312x_lcdc_isr(int irq, void *dev_id)
  69 {
  70         struct lcdc_device *lcdc_dev = (struct lcdc_device *)dev_id;
  71         ktime_t timestamp = ktime_get();
  72         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  73
  74         if (int_reg & m_FS_INT_STA) {
  75                 timestamp = ktime_get();
  76                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  77                              v_FS_INT_CLEAR(1));
  78                 //if (lcdc_dev->driver.wait_fs) {
  79                 if (0) {
  80                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  81                         complete(&(lcdc_dev->driver.frame_done));
  82                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  83                 }
  84                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  85                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  86
  87         } else if (int_reg & m_LF_INT_STA) {
  88                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  89                              v_LF_INT_CLEAR(1));
  90         }
  91         return IRQ_HANDLED;
  92 }
  93
  94 static int rk312x_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
  95 {
  96 #ifdef CONFIG_RK_FPGA
  97         lcdc_dev->clk_on = 1;
  98         return 0;
  99 #endif
 100         if (!lcdc_dev->clk_on) {
 101                 clk_prepare_enable(lcdc_dev->hclk);
 102                 clk_prepare_enable(lcdc_dev->dclk);
 103                 clk_prepare_enable(lcdc_dev->aclk);
 104 //              clk_prepare_enable(lcdc_dev->pd);
 105                 spin_lock(&lcdc_dev->reg_lock);
 106                 lcdc_dev->clk_on = 1;
 107                 spin_unlock(&lcdc_dev->reg_lock);
 108         }
 109
 110         return 0;
 111 }
 112
 113 static int rk312x_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 114 {
 115 #ifdef CONFIG_RK_FPGA
 116         lcdc_dev->clk_on = 0;
 117         return 0;
 118 #endif
 119         if (lcdc_dev->clk_on) {
 120                 spin_lock(&lcdc_dev->reg_lock);
 121                 lcdc_dev->clk_on = 0;
 122                 spin_unlock(&lcdc_dev->reg_lock);
 123                 mdelay(25);
 124                 clk_disable_unprepare(lcdc_dev->dclk);
 125                 clk_disable_unprepare(lcdc_dev->hclk);
 126                 clk_disable_unprepare(lcdc_dev->aclk);
 127 //              clk_disable_unprepare(lcdc_dev->pd);
 128         }
 129
 130         return 0;
 131 }
 132
 133 static int rk312x_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 134 {
 135         u32 mask, val;
 136         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 137                                                     struct lcdc_device, driver);
 138         struct rk_screen *screen = dev_drv->cur_screen;
 139
 140         spin_lock(&lcdc_dev->reg_lock);
 141         if (likely(lcdc_dev->clk_on)) {
 142                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 143                         m_LF_INT_CLEAR | m_LF_INT_EN | m_LF_INT_NUM |
 144                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 145                 val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1) |
 146                         v_LF_INT_CLEAR(1) | v_LF_INT_EN(1) |
 147                         v_BUS_ERR_INT_CLEAR(1) | v_BUS_ERR_INT_EN(0) |
 148                         v_LF_INT_NUM(screen->mode.vsync_len +
 149                                      screen->mode.upper_margin +
 150                                      screen->mode.yres);
 151                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 152                 spin_unlock(&lcdc_dev->reg_lock);
 153         } else {
 154                 spin_unlock(&lcdc_dev->reg_lock);
 155         }
 156         return 0;
 157 }
 158
 159 static int rk312x_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 160 {
 161         u32 mask, val;
 162
 163         spin_lock(&lcdc_dev->reg_lock);
 164         if (likely(lcdc_dev->clk_on)) {
 165                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 166                         m_LF_INT_CLEAR | m_LF_INT_EN |
 167                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 168                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 169                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 170                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 171                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 172                 spin_unlock(&lcdc_dev->reg_lock);
 173         } else {
 174                 spin_unlock(&lcdc_dev->reg_lock);
 175         }
 176         mdelay(1);
 177         return 0;
 178 }
 179
 180 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device *lcdc_dev)
 181 {
 182         int reg = 0;
 183         u32 value = 0;
 184
 185         spin_lock(&lcdc_dev->reg_lock);
 186         for (reg = 0; reg < 0xdc; reg += 4) {
 187                 value = lcdc_readl(lcdc_dev, reg);
 188         }
 189         spin_unlock(&lcdc_dev->reg_lock);
 190 }
 191
 192 static int rk312x_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 193 {
 194         int win0_top = 0;
 195         u32 mask, val;
 196         enum data_format win0_format = lcdc_dev->driver.win[0]->format;
 197         enum data_format win1_format = lcdc_dev->driver.win[1]->format;
 198
 199         int win0_alpha_en = ((win0_format == ARGB888)
 200                              || (win0_format == ABGR888)) ? 1 : 0;
 201         int win1_alpha_en = ((win1_format == ARGB888)
 202                              || (win1_format == ABGR888)) ? 1 : 0;
 203         u32 *_pv = (u32 *) lcdc_dev->regsbak;
 204
 205         _pv += (DSP_CTRL0 >> 2);
 206         win0_top = ((*_pv) & (m_WIN0_TOP)) >> 8;
 207         if (win0_top && (lcdc_dev->atv_layer_cnt >= 2) && (win0_alpha_en)) {
 208                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 209                 val = v_WIN0_ALPHA_EN(1) | v_WIN1_ALPHA_EN(0);
 210                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 211
 212                 mask = m_WIN0_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 213                 val = v_WIN0_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 214                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 215         } else if ((!win0_top) && (lcdc_dev->atv_layer_cnt >= 2)
 216                    && (win1_alpha_en)) {
 217                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 218                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(1);
 219                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 220
 221                 mask = m_WIN1_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 222                 val = v_WIN1_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 223                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 224         } else {
 225                 mask = m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 226                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(0);
 227                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 228         }
 229
 230         return 0;
 231 }
 232
 233 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
 234                                    struct rk_lcdc_win *win)
 235 {
 236         u32 mask, val;
 237
 238         if (win->state == 1) {
 239                 if (win->id == 0) {
 240                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 241                         val = v_WIN0_EN(win->state) |
 242                                 v_WIN0_FORMAT(win->fmt_cfg) |
 243                                 v_WIN0_RB_SWAP(win->swap_rb);
 244                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 245
 246                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 247                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 248                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 249                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 250                                     v_X_SCL_FACTOR(win->scale_cbcr_x) |
 251                                     v_Y_SCL_FACTOR(win->scale_cbcr_y));
 252
 253                         lcdc_msk_reg(lcdc_dev, WIN0_VIR,
 254                                      m_YRGB_VIR | m_CBBR_VIR,
 255                                      v_YRGB_VIR(win->area[0].y_vir_stride) |
 256                                      v_YRGB_VIR(win->area[0].uv_vir_stride));
 257                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO,
 258                                     v_ACT_WIDTH(win->area[0].xact) |
 259                                     v_ACT_HEIGHT(win->area[0].yact));
 260                         lcdc_writel(lcdc_dev, WIN0_DSP_ST,
 261                                     v_DSP_STX(win->area[0].dsp_stx) |
 262                                     v_DSP_STY(win->area[0].dsp_sty));
 263                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO,
 264                                     v_DSP_WIDTH(win->area[0].xsize) |
 265                                     v_DSP_HEIGHT(win->area[0].ysize));
 266
 267                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST,
 268                                     win->area[0].y_addr);
 269                         lcdc_writel(lcdc_dev, WIN0_CBR_MST,
 270                                     win->area[0].uv_addr);
 271                 } else if (win->id == 1) {
 272                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 273                         val = v_WIN1_EN(win->state) |
 274                                 v_WIN1_FORMAT(win->fmt_cfg) |
 275                                 v_WIN1_RB_SWAP(win->swap_rb);
 276                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 277
 278                         /* rk312x unsupport win1 scale */
 279                         if (lcdc_dev->soc_type == VOP_RK3036)
 280                                 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 281                                         v_X_SCL_FACTOR(win->scale_yrgb_x) |
 282                                         v_Y_SCL_FACTOR(win->scale_yrgb_y));
 283
 284                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR,
 285                                      v_YRGB_VIR(win->area[0].y_vir_stride));
 286                         lcdc_writel(lcdc_dev, WIN1_ACT_INFO,
 287                                     v_ACT_WIDTH(win->area[0].xact) |
 288                                     v_ACT_HEIGHT(win->area[0].yact));
 289                         lcdc_writel(lcdc_dev, WIN1_DSP_INFO,
 290                                     v_DSP_WIDTH(win->area[0].xsize) |
 291                                     v_DSP_HEIGHT(win->area[0].ysize));
 292                         lcdc_writel(lcdc_dev, WIN1_DSP_ST,
 293                                     v_DSP_STX(win->area[0].dsp_stx) |
 294                                     v_DSP_STY(win->area[0].dsp_sty));
 295
 296                         lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 297
 298                 } else if (win->id == 2) {
 299                 }
 300         } else {
 301                 win->area[0].y_addr = 0;
 302                 win->area[0].uv_addr = 0;
 303                 if (win->id == 0)
 304                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN0_EN,
 305                                      v_WIN0_EN(0));
 306                 else if (win->id == 1)
 307                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN1_EN,
 308                                      v_WIN1_EN(0));
 309                 else if (win->id == 2)
 310                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 311         }
 312 }
 313
 314 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev, unsigned int win_id,
 315                               bool open)
 316 {
 317         spin_lock(&lcdc_dev->reg_lock);
 318         if (likely(lcdc_dev->clk_on)
 319             && lcdc_dev->driver.win[win_id]->state != open) {
 320                 if (open) {
 321                         if (!lcdc_dev->atv_layer_cnt) {
 322                                 dev_info(lcdc_dev->dev,
 323                                          "wakeup from standby!\n");
 324                                 lcdc_dev->standby = 0;
 325                         }
 326                         lcdc_dev->atv_layer_cnt++;
 327                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 328                         lcdc_dev->atv_layer_cnt--;
 329                 }
 330                 lcdc_dev->driver.win[win_id]->state = open;
 331                 if (!open) {
 332                         lcdc_layer_update_regs(lcdc_dev,
 333                                                lcdc_dev->driver.win[win_id]);
 334                         lcdc_cfg_done(lcdc_dev);
 335                 }
 336                 /*if no layer used,disable lcdc */
 337                 if (!lcdc_dev->atv_layer_cnt) {
 338                         dev_info(lcdc_dev->dev,
 339                                  "no layer is used,go to standby!\n");
 340                         lcdc_dev->standby = 1;
 341                 }
 342         }
 343         spin_unlock(&lcdc_dev->reg_lock);
 344 }
 345
 346 static int rk312x_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 347 {
 348         struct lcdc_device *lcdc_dev =
 349             container_of(dev_drv, struct lcdc_device, driver);
 350         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 351         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 352         int timeout;
 353         unsigned long flags;
 354         spin_lock(&lcdc_dev->reg_lock);
 355         if (likely(lcdc_dev->clk_on)) {
 356                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 357                              v_LCDC_STANDBY(lcdc_dev->standby));
 358                 lcdc_layer_update_regs(lcdc_dev, win0);
 359                 lcdc_layer_update_regs(lcdc_dev, win1);
 360                 rk312x_lcdc_alpha_cfg(lcdc_dev);
 361                 lcdc_cfg_done(lcdc_dev);
 362
 363         }
 364         spin_unlock(&lcdc_dev->reg_lock);
 365         //if (dev_drv->wait_fs) {
 366         if (0) {
 367                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 368                 init_completion(&dev_drv->frame_done);
 369                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 370                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 371                                                       msecs_to_jiffies
 372                                                       (dev_drv->cur_screen->ft +
 373                                                        5));
 374                 if (!timeout && (!dev_drv->frame_done.done)) {
 375                         dev_warn(lcdc_dev->dev,
 376                                  "wait for new frame start time out!\n");
 377                         return -ETIMEDOUT;
 378                 }
 379         }
 380         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 381         return 0;
 382
 383 }
 384
 385 static void rk312x_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 386 {
 387         memcpy((u8 *) lcdc_dev->regs, (u8 *) lcdc_dev->regsbak, 0xdc);
 388 }
 389
 390 static void rk312x_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 391 {
 392         u32 mask, val;
 393         struct lcdc_device *lcdc_dev =
 394             container_of(dev_drv, struct lcdc_device, driver);
 395
 396         spin_lock(&lcdc_dev->reg_lock);
 397         if (likely(lcdc_dev->clk_on)) {
 398                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
 399                         m_AXI_OUTSTANDING_MAX_NUM;
 400                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) |
 401                         v_AXI_MAX_OUTSTANDING_EN(1);
 402                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 403         }
 404         spin_unlock(&lcdc_dev->reg_lock);
 405 }
 406
 407 static int rk312x_lcdc_set_lut(struct rk_lcdc_driver *dev_drv)
 408 {
 409         int i = 0;
 410         int __iomem *c;
 411         int v;
 412         struct lcdc_device *lcdc_dev =
 413                 container_of(dev_drv, struct lcdc_device, driver);
 414
 415         spin_lock(&lcdc_dev->reg_lock);
 416         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(0));
 417         lcdc_cfg_done(lcdc_dev);
 418         mdelay(25);
 419         for (i = 0; i < 256; i++) {
 420                 v = dev_drv->cur_screen->dsp_lut[i];
 421                 c = lcdc_dev->dsp_lut_addr_base + i;
 422                 writel_relaxed(v, c);
 423
 424         }
 425         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(1));
 426         lcdc_cfg_done(lcdc_dev);
 427         spin_unlock(&lcdc_dev->reg_lock);
 428         return 0;
 429
 430 }
 431
 432 static int rk312x_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 433 {
 434 #ifdef CONFIG_RK_FPGA
 435         return 0;
 436 #endif
 437         int ret, fps;
 438         struct lcdc_device *lcdc_dev =
 439             container_of(dev_drv, struct lcdc_device, driver);
 440         struct rk_screen *screen = dev_drv->cur_screen;
 441
 442         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 443         if (ret)
 444                 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
 445         lcdc_dev->pixclock =
 446             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 447         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 448
 449         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 450         screen->ft = 1000 / fps;
 451         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 452                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 453         return 0;
 454
 455 }
 456
 457 /********do basic init*********/
 458 static int rk312x_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 459 {
 460         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 461                                                     struct lcdc_device, driver);
 462         if (lcdc_dev->pre_init)
 463                 return 0;
 464
 465         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 466         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 467         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 468 //      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
 469
 470         if ( /*IS_ERR(lcdc_dev->pd) || */ (IS_ERR(lcdc_dev->aclk)) ||
 471             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 472                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 473                         lcdc_dev->id);
 474         }
 475
 476         rk_disp_pwr_enable(dev_drv);
 477         rk312x_lcdc_clk_enable(lcdc_dev);
 478
 479         /* backup reg config at uboot */
 480         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 481         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN, v_AUTO_GATING_EN(0));
 482         lcdc_cfg_done(lcdc_dev);
 483         if (dev_drv->iommu_enabled)     /* disable win0 to workaround iommu pagefault */
 484                 lcdc_layer_enable(lcdc_dev, 0, 0);
 485         lcdc_dev->pre_init = true;
 486
 487         return 0;
 488 }
 489
 490 static void rk312x_lcdc_deinit(struct lcdc_device *lcdc_dev)
 491 {
 492         u32 mask, val;
 493
 494         spin_lock(&lcdc_dev->reg_lock);
 495         if (likely(lcdc_dev->clk_on)) {
 496                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 497                         m_LF_INT_CLEAR | m_LF_INT_EN |
 498                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 499                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 500                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 501                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 502                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 503                 lcdc_set_bit(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY);
 504                 lcdc_cfg_done(lcdc_dev);
 505                 spin_unlock(&lcdc_dev->reg_lock);
 506         } else {
 507                 spin_unlock(&lcdc_dev->reg_lock);
 508         }
 509         mdelay(1);
 510
 511 }
 512
 513 static int rk31xx_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 514 {
 515         u16 face = 0;
 516         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 517                                                     struct lcdc_device, driver);
 518         struct rk_screen *screen = dev_drv->cur_screen;
 519         u16 right_margin = screen->mode.right_margin;
 520         u16 left_margin = screen->mode.left_margin;
 521         u16 lower_margin = screen->mode.lower_margin;
 522         u16 upper_margin = screen->mode.upper_margin;
 523         u16 x_res = screen->mode.xres;
 524         u16 y_res = screen->mode.yres;
 525         u32 mask, val;
 526
 527         spin_lock(&lcdc_dev->reg_lock);
 528         if (likely(lcdc_dev->clk_on)) {
 529                 switch (screen->type) {
 530                 case SCREEN_RGB:
 531                         if (lcdc_dev->soc_type == VOP_RK312X) {
 532                                 mask = m_RGB_DCLK_EN | m_RGB_DCLK_INVERT;
 533                                 val = v_RGB_DCLK_EN(1) | v_RGB_DCLK_INVERT(0);
 534                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 535                         }
 536                         break;
 537                 case SCREEN_LVDS:
 538                         if (lcdc_dev->soc_type == VOP_RK312X) {
 539                                 mask = m_LVDS_DCLK_EN | m_LVDS_DCLK_INVERT;
 540                                 val = v_LVDS_DCLK_EN(1) | v_LVDS_DCLK_INVERT(0);
 541                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 542                         }
 543                         break;
 544                 case SCREEN_MIPI:
 545                         if (lcdc_dev->soc_type == VOP_RK312X) {
 546                                 mask = m_MIPI_DCLK_EN | m_MIPI_DCLK_INVERT;
 547                                 val = v_MIPI_DCLK_EN(1) | v_MIPI_DCLK_INVERT(0);
 548                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 549                         }
 550                         break;
 551                 case SCREEN_HDMI:
 552                         mask = m_HDMI_DCLK_EN;
 553                         val = v_HDMI_DCLK_EN(1);
 554                         if (screen->pixelrepeat) {
 555                                 mask |= m_CORE_CLK_DIV_EN;
 556                                 val |= v_CORE_CLK_DIV_EN(1);
 557                         }
 558                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 559                         break;
 560                 case SCREEN_TVOUT:
 561                         mask = m_TVE_DAC_DCLK_EN;
 562                         val = v_TVE_DAC_DCLK_EN(1);
 563                         if (screen->pixelrepeat) {
 564                                 mask |= m_CORE_CLK_DIV_EN;
 565                                 val |= v_CORE_CLK_DIV_EN(1);
 566                         }
 567                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 568                         if (x_res == 720 && y_res == 576)
 569                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 570                                              v_TVE_MODE(TV_PAL));
 571                         else if (x_res == 720 && y_res == 480)
 572                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 573                                              v_TVE_MODE(TV_NTSC));
 574                         else {
 575                                 dev_err(lcdc_dev->dev,
 576                                         "unsupported video timing!\n");
 577                                 return -1;
 578                         }
 579                         break;
 580                 default:
 581                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 582                         break;
 583                 }
 584
 585                 if (lcdc_dev->soc_type == VOP_RK312X) {
 586                         switch (screen->face) {
 587                         case OUT_P565:
 588                                 face = OUT_P565;
 589                                 mask = m_DITHER_DOWN_EN |
 590                                         m_DITHER_DOWN_MODE |
 591                                         m_DITHER_DOWN_SEL;
 592                                 val = v_DITHER_DOWN_EN(1) |
 593                                         v_DITHER_DOWN_MODE(0) |
 594                                         v_DITHER_DOWN_SEL(1);
 595                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 596                                 break;
 597                         case OUT_P666:
 598                                 face = OUT_P666;
 599                                 mask = m_DITHER_DOWN_EN |
 600                                         m_DITHER_DOWN_MODE |
 601                                         m_DITHER_DOWN_SEL;
 602                                 val = v_DITHER_DOWN_EN(1) |
 603                                         v_DITHER_DOWN_MODE(1) |
 604                                         v_DITHER_DOWN_SEL(1);
 605                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 606                                 break;
 607                         case OUT_D888_P565:
 608                                 face = OUT_P888;
 609                                 mask = m_DITHER_DOWN_EN |
 610                                         m_DITHER_DOWN_MODE |
 611                                         m_DITHER_DOWN_SEL;
 612                                 val = v_DITHER_DOWN_EN(1) |
 613                                         v_DITHER_DOWN_MODE(0) |
 614                                         v_DITHER_DOWN_SEL(1);
 615                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 616                                 break;
 617                         case OUT_D888_P666:
 618                                 face = OUT_P888;
 619                                 mask = m_DITHER_DOWN_EN |
 620                                         m_DITHER_DOWN_MODE |
 621                                         m_DITHER_DOWN_SEL;
 622                                 val = v_DITHER_DOWN_EN(1) |
 623                                         v_DITHER_DOWN_MODE(1) |
 624                                         v_DITHER_DOWN_SEL(1);
 625                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 626                                 break;
 627                         case OUT_P888:
 628                                 face = OUT_P888;
 629                                 mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN;
 630                                 val = v_DITHER_DOWN_EN(0) | v_DITHER_UP_EN(0);
 631                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 632                                 break;
 633                         default:
 634                                 dev_err(lcdc_dev->dev, "un supported interface!\n");
 635                                 break;
 636                         }
 637                 }
 638
 639                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 640                     m_DEN_POL | m_DCLK_POL;
 641                 val = v_DSP_OUT_FORMAT(face) | v_HSYNC_POL(screen->pin_hsync) |
 642                     v_VSYNC_POL(screen->pin_vsync) |
 643                     v_DEN_POL(screen->pin_den) |
 644                     v_DCLK_POL(screen->pin_dclk);
 645                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 646
 647                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 648                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 649                     m_DSP_DUMMY_SWAP | m_BLANK_EN | m_BLACK_EN;
 650
 651                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 652                     v_DSP_RB_SWAP(screen->swap_rb) |
 653                     v_DSP_RG_SWAP(screen->swap_rg) |
 654                     v_DSP_DELTA_SWAP(screen->swap_delta) |
 655                     v_DSP_DUMMY_SWAP(screen->swap_dumy) |
 656                     v_BLANK_EN(0) | v_BLACK_EN(0);
 657                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 658
 659                 /* config timing */
 660                 val = v_HSYNC(screen->mode.hsync_len) |
 661                     v_HORPRD(screen->mode.hsync_len + left_margin + x_res +
 662                              right_margin);
 663                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 664                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 665                     v_HASP(screen->mode.hsync_len + left_margin);
 666                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 667
 668                 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 669                         /* First Field Timing */
 670                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
 671                                     v_VSYNC(screen->mode.vsync_len) |
 672                                     v_VERPRD(2 * (screen->mode.vsync_len + upper_margin + lower_margin) +
 673                                              y_res + 1));
 674                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END,
 675                                     v_VAEP(screen->mode.vsync_len +
 676                                            upper_margin + y_res / 2) |
 677                                     v_VASP(screen->mode.vsync_len +
 678                                            upper_margin));
 679                         /* Second Field Timing */
 680                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1,
 681                                     v_VSYNC_ST_F1(screen->mode.vsync_len +
 682                                                   upper_margin + y_res / 2 +
 683                                                   lower_margin) |
 684                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len +
 685                                                    upper_margin + y_res / 2 +
 686                                                    lower_margin));
 687                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END_F1,
 688                                     v_VAEP(2 * (screen->mode.vsync_len + upper_margin) +
 689                                            y_res + lower_margin + 1) |
 690                                     v_VASP(2 * (screen->mode.vsync_len + upper_margin) +
 691                                            y_res / 2 + lower_margin + 1));
 692
 693                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 694                                      m_INTERLACE_DSP_EN |
 695                                      m_WIN0_YRGB_DEFLICK_EN |
 696                                      m_WIN0_CBR_DEFLICK_EN |
 697                                      m_INTERLACE_FIELD_POL,
 698                                      v_INTERLACE_DSP_EN(1) |
 699                                      v_WIN0_YRGB_DEFLICK_EN(1) |
 700                                      v_WIN0_CBR_DEFLICK_EN(1) |
 701                                      v_INTERLACE_FIELD_POL(0));
 702                 } else {
 703                         val = v_VSYNC(screen->mode.vsync_len) |
 704                             v_VERPRD(screen->mode.vsync_len + upper_margin +
 705                                      y_res + lower_margin);
 706                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 707
 708                         val = v_VAEP(screen->mode.vsync_len + upper_margin + y_res) |
 709                             v_VASP(screen->mode.vsync_len + upper_margin);
 710                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 711
 712                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 713                                      m_INTERLACE_DSP_EN |
 714                                      m_WIN0_YRGB_DEFLICK_EN |
 715                                      m_WIN0_CBR_DEFLICK_EN |
 716                                      m_INTERLACE_FIELD_POL,
 717                                      v_INTERLACE_DSP_EN(0) |
 718                                      v_WIN0_YRGB_DEFLICK_EN(0) |
 719                                      v_WIN0_CBR_DEFLICK_EN(0) |
 720                                      v_INTERLACE_FIELD_POL(0));
 721                 }
 722
 723         }
 724         spin_unlock(&lcdc_dev->reg_lock);
 725
 726         rk312x_lcdc_set_dclk(dev_drv);
 727         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 728                 dev_drv->trsm_ops->enable();
 729         if (screen->init)
 730                 screen->init();
 731
 732         return 0;
 733 }
 734
 735 static int rk312x_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
 736                             bool open)
 737 {
 738         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 739                                                     struct lcdc_device, driver);
 740
 741         /* enable clk,when first layer open */
 742         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
 743                 rockchip_set_system_status(SYS_STATUS_LCDC0);
 744                 rk312x_lcdc_pre_init(dev_drv);
 745 #if defined(CONFIG_ROCKCHIP_IOMMU)
 746                 if (dev_drv->iommu_enabled) {
 747                         if (!dev_drv->mmu_dev) {
 748                                 dev_drv->mmu_dev =
 749                                     rockchip_get_sysmmu_device_by_compatible
 750                                     (dev_drv->mmu_dts_name);
 751                                 if (dev_drv->mmu_dev)
 752                                         platform_set_sysmmu(dev_drv->mmu_dev,
 753                                                             dev_drv->dev);
 754                                 else {
 755                                         dev_err(dev_drv->dev,
 756                                                 "failed to get rockchip iommu device\n");
 757                                         return -1;
 758                                 }
 759                         }
 760                         iovmm_activate(dev_drv->dev);
 761                 }
 762 #endif
 763                 rk312x_lcdc_reg_restore(lcdc_dev);
 764                 if (dev_drv->iommu_enabled)
 765                         rk312x_lcdc_mmu_en(dev_drv);
 766                 if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
 767                         rk312x_lcdc_set_dclk(dev_drv);
 768                         rk312x_lcdc_enable_irq(dev_drv);
 769                 } else {
 770                         rk31xx_load_screen(dev_drv, 1);
 771                 }
 772
 773                 /* set screen lut */
 774                 if (dev_drv->cur_screen->dsp_lut)
 775                         rk312x_lcdc_set_lut(dev_drv);
 776         }
 777
 778         if (win_id < ARRAY_SIZE(lcdc_win))
 779                 lcdc_layer_enable(lcdc_dev, win_id, open);
 780         else
 781                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
 782
 783         /* when all layer closed,disable clk */
 784         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
 785                 rk312x_lcdc_disable_irq(lcdc_dev);
 786                 rk312x_lcdc_reg_update(dev_drv);
 787 #if defined(CONFIG_ROCKCHIP_IOMMU)
 788                 if (dev_drv->iommu_enabled) {
 789                         if (dev_drv->mmu_dev)
 790                                 iovmm_deactivate(dev_drv->dev);
 791                 }
 792 #endif
 793                 rk312x_lcdc_clk_disable(lcdc_dev);
 794                 rockchip_clear_system_status(SYS_STATUS_LCDC0);
 795         }
 796
 797         return 0;
 798 }
 799
 800 static int rk312x_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
 801 {
 802         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 803                                                     struct lcdc_device, driver);
 804         struct rk_screen *screen = dev_drv->cur_screen;
 805         struct rk_lcdc_win *win = NULL;
 806         char fmt[9] = "NULL";
 807
 808         if (!screen) {
 809                 dev_err(dev_drv->dev, "screen is null!\n");
 810                 return -ENOENT;
 811         }
 812
 813         if (win_id == 0) {
 814                 win = dev_drv->win[0];
 815         } else if (win_id == 1) {
 816                 win = dev_drv->win[1];
 817         } else {
 818                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
 819                 return -EINVAL;
 820         }
 821
 822         spin_lock(&lcdc_dev->reg_lock);
 823         win->area[0].dsp_stx = win->area[0].xpos + screen->mode.left_margin +
 824                                 screen->mode.hsync_len;
 825         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 826                 win->area[0].ysize /= 2;
 827                 win->area[0].dsp_sty = win->area[0].ypos / 2 +
 828                                         screen->mode.upper_margin +
 829                                         screen->mode.vsync_len;
 830         } else {
 831                 win->area[0].dsp_sty = win->area[0].ypos +
 832                                         screen->mode.upper_margin +
 833                                         screen->mode.vsync_len;
 834         }
 835         win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
 836         win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
 837         switch (win->format) {
 838         case ARGB888:
 839                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 840                 win->swap_rb = 0;
 841                 break;
 842         case XBGR888:
 843                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 844                 win->swap_rb = 1;
 845                 break;
 846         case ABGR888:
 847                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 848                 win->swap_rb = 1;
 849                 break;
 850         case RGB888:
 851                 win->fmt_cfg = VOP_FORMAT_RGB888;
 852                 win->swap_rb = 0;
 853                 break;
 854         case RGB565:
 855                 win->fmt_cfg = VOP_FORMAT_RGB565;
 856                 win->swap_rb = 0;
 857                 break;
 858         case YUV444:
 859                 if (win_id == 0) {
 860                         win->fmt_cfg = VOP_FORMAT_YCBCR444;
 861                         win->scale_cbcr_x =
 862                             CalScale(win->area[0].xact, win->area[0].xsize);
 863                         win->scale_cbcr_y =
 864                             CalScale(win->area[0].yact, win->area[0].ysize);
 865                         win->swap_rb = 0;
 866                 } else {
 867                         dev_err(lcdc_dev->driver.dev,
 868                                 "%s:un supported format!\n", __func__);
 869                 }
 870                 break;
 871         case YUV422:
 872                 if (win_id == 0) {
 873                         win->fmt_cfg = VOP_FORMAT_YCBCR422;
 874                         win->scale_cbcr_x = CalScale((win->area[0].xact / 2),
 875                                                      win->area[0].xsize);
 876                         win->scale_cbcr_y =
 877                             CalScale(win->area[0].yact, win->area[0].ysize);
 878                         win->swap_rb = 0;
 879                 } else {
 880                         dev_err(lcdc_dev->driver.dev,
 881                                 "%s:un supported format!\n", __func__);
 882                 }
 883                 break;
 884         case YUV420:
 885                 if (win_id == 0) {
 886                         win->fmt_cfg = VOP_FORMAT_YCBCR420;
 887                         win->scale_cbcr_x =
 888                             CalScale(win->area[0].xact / 2, win->area[0].xsize);
 889                         win->scale_cbcr_y =
 890                             CalScale(win->area[0].yact / 2, win->area[0].ysize);
 891                         win->swap_rb = 0;
 892                 } else {
 893                         dev_err(lcdc_dev->driver.dev,
 894                                 "%s:un supported format!\n", __func__);
 895                 }
 896                 break;
 897         default:
 898                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 899                         __func__);
 900                 break;
 901         }
 902         spin_unlock(&lcdc_dev->reg_lock);
 903
 904         DBG(1,
 905             "lcdc%d>>%s\n>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
 906             ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id, __func__,
 907             get_format_string(win->format, fmt), win->area[0].xact,
 908             win->area[0].yact, win->area[0].xsize, win->area[0].ysize,
 909             win->area[0].xvir, win->area[0].yvir, win->area[0].xpos,
 910             win->area[0].ypos);
 911         return 0;
 912 }
 913
 914 static int rk312x_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
 915 {
 916         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 917                                                     struct lcdc_device, driver);
 918         struct rk_lcdc_win *win = NULL;
 919         struct rk_screen *screen = dev_drv->cur_screen;
 920
 921         if (!screen) {
 922                 dev_err(dev_drv->dev, "screen is null!\n");
 923                 return -ENOENT;
 924         }
 925
 926         if (win_id == 0) {
 927                 win = dev_drv->win[0];
 928         } else if (win_id == 1) {
 929                 win = dev_drv->win[1];
 930         } else {
 931                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
 932                 return -EINVAL;
 933         }
 934
 935         spin_lock(&lcdc_dev->reg_lock);
 936         if (likely(lcdc_dev->clk_on)) {
 937                 win->area[0].y_addr =
 938                     win->area[0].smem_start + win->area[0].y_offset;
 939                 win->area[0].uv_addr =
 940                     win->area[0].cbr_start + win->area[0].c_offset;
 941                 if (win->area[0].y_addr)
 942                         lcdc_layer_update_regs(lcdc_dev, win);
 943                 /* lcdc_cfg_done(lcdc_dev); */
 944         }
 945         spin_unlock(&lcdc_dev->reg_lock);
 946
 947         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
 948             lcdc_dev->id, __func__, win->area[0].y_addr, win->area[0].uv_addr,
 949             win->area[0].y_offset);
 950         /* this is the first frame of the system,enable frame start interrupt */
 951         if ((dev_drv->first_frame)) {
 952                 dev_drv->first_frame = 0;
 953                 rk312x_lcdc_enable_irq(dev_drv);
 954
 955         }
 956
 957         return 0;
 958 }
 959
 960 static int rk312x_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
 961                              unsigned long arg, int win_id)
 962 {
 963         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 964                                                     struct lcdc_device, driver);
 965         u32 panel_size[2];
 966         void __user *argp = (void __user *)arg;
 967         struct color_key_cfg clr_key_cfg;
 968
 969         switch (cmd) {
 970         case RK_FBIOGET_PANEL_SIZE:
 971                 panel_size[0] = lcdc_dev->screen->mode.xres;
 972                 panel_size[1] = lcdc_dev->screen->mode.yres;
 973                 if (copy_to_user(argp, panel_size, 8))
 974                         return -EFAULT;
 975                 break;
 976         case RK_FBIOPUT_COLOR_KEY_CFG:
 977                 if (copy_from_user(&clr_key_cfg, argp,
 978                                    sizeof(struct color_key_cfg)))
 979                         return -EFAULT;
 980                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
 981                             clr_key_cfg.win0_color_key_cfg);
 982                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
 983                             clr_key_cfg.win1_color_key_cfg);
 984                 break;
 985
 986         default:
 987                 break;
 988         }
 989         return 0;
 990 }
 991
 992 static int rk312x_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
 993                                   const char *id)
 994 {
 995         int win_id = 0;
 996         mutex_lock(&dev_drv->fb_win_id_mutex);
 997         if (!strcmp(id, "fb0"))
 998                 win_id = dev_drv->fb0_win_id;
 999         else if (!strcmp(id, "fb1"))
1000                 win_id = dev_drv->fb1_win_id;
1001         else if (!strcmp(id, "fb2"))
1002                 win_id = dev_drv->fb2_win_id;
1003         mutex_unlock(&dev_drv->fb_win_id_mutex);
1004
1005         return win_id;
1006 }
1007
1008 static int rk312x_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
1009 {
1010         return 0;
1011 }
1012
1013 static int rk312x_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
1014                                bool set)
1015 {
1016         struct lcdc_device *lcdc_dev =
1017             container_of(dev_drv, struct lcdc_device, driver);
1018         int ovl;
1019         spin_lock(&lcdc_dev->reg_lock);
1020         if (lcdc_dev->clk_on) {
1021                 if (set) {
1022                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
1023                                      v_WIN0_TOP(swap));
1024                         ovl = swap;
1025                 } else {
1026                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1027                 }
1028         } else {
1029                 ovl = -EPERM;
1030         }
1031         spin_unlock(&lcdc_dev->reg_lock);
1032
1033         return ovl;
1034 }
1035
1036 static int rk312x_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
1037 {
1038
1039         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1040                                                     struct lcdc_device, driver);
1041         if (dev_drv->suspend_flag)
1042                 return 0;
1043         dev_drv->suspend_flag = 1;
1044         flush_kthread_worker(&dev_drv->update_regs_worker);
1045
1046         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
1047                 dev_drv->trsm_ops->disable();
1048         spin_lock(&lcdc_dev->reg_lock);
1049         if (likely(lcdc_dev->clk_on)) {
1050                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(1));
1051                 lcdc_msk_reg(lcdc_dev, INT_STATUS,
1052                              m_FS_INT_CLEAR | m_LF_INT_CLEAR,
1053                              v_FS_INT_CLEAR(1) | v_LF_INT_CLEAR(1));
1054                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1055                              v_DSP_OUT_ZERO(1));
1056                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1057                              v_LCDC_STANDBY(1));
1058                 lcdc_cfg_done(lcdc_dev);
1059 #if defined(CONFIG_ROCKCHIP_IOMMU)
1060                 if (dev_drv->iommu_enabled) {
1061                         if (dev_drv->mmu_dev)
1062                                 iovmm_deactivate(dev_drv->dev);
1063                 }
1064 #endif
1065                 spin_unlock(&lcdc_dev->reg_lock);
1066         } else {
1067                 spin_unlock(&lcdc_dev->reg_lock);
1068                 return 0;
1069         }
1070         rk312x_lcdc_clk_disable(lcdc_dev);
1071         rk_disp_pwr_disable(dev_drv);
1072         return 0;
1073 }
1074
1075 static int rk312x_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
1076 {
1077         struct lcdc_device *lcdc_dev =
1078             container_of(dev_drv, struct lcdc_device, driver);
1079
1080         if (!dev_drv->suspend_flag)
1081                 return 0;
1082         rk_disp_pwr_enable(dev_drv);
1083         dev_drv->suspend_flag = 0;
1084
1085         if (lcdc_dev->atv_layer_cnt) {
1086                 rk312x_lcdc_clk_enable(lcdc_dev);
1087                 rk312x_lcdc_reg_restore(lcdc_dev);
1088                 /* set screen lut */
1089                 if (dev_drv->cur_screen->dsp_lut)
1090                         rk312x_lcdc_set_lut(dev_drv);
1091
1092                 spin_lock(&lcdc_dev->reg_lock);
1093
1094                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1095                              v_DSP_OUT_ZERO(0));
1096                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1097                              v_LCDC_STANDBY(0));
1098                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(0));
1099                 lcdc_cfg_done(lcdc_dev);
1100
1101                 spin_unlock(&lcdc_dev->reg_lock);
1102         }
1103
1104         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1105                 dev_drv->trsm_ops->enable();
1106         return 0;
1107 }
1108
1109 static int rk312x_lcdc_blank(struct rk_lcdc_driver *dev_drv,
1110                              int win_id, int blank_mode)
1111 {
1112         switch (blank_mode) {
1113         case FB_BLANK_UNBLANK:
1114                 rk312x_lcdc_early_resume(dev_drv);
1115                 break;
1116         case FB_BLANK_NORMAL:
1117                 rk312x_lcdc_early_suspend(dev_drv);
1118                 break;
1119         default:
1120                 rk312x_lcdc_early_suspend(dev_drv);
1121                 break;
1122         }
1123
1124         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
1125
1126         return 0;
1127 }
1128
1129 static int rk312x_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
1130 {
1131         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1132                                                     struct lcdc_device, driver);
1133         spin_lock(&lcdc_dev->reg_lock);
1134         if (lcdc_dev->clk_on)
1135                 lcdc_cfg_done(lcdc_dev);
1136         spin_unlock(&lcdc_dev->reg_lock);
1137         return 0;
1138 }
1139
1140 /*
1141         a:[-30~0]:
1142             sin_hue = sin(a)*256 +0x100;
1143             cos_hue = cos(a)*256;
1144         a:[0~30]
1145             sin_hue = sin(a)*256;
1146             cos_hue = cos(a)*256;
1147 */
1148 static int rk312x_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1149                                     bcsh_hue_mode mode)
1150 {
1151
1152         struct lcdc_device *lcdc_dev =
1153             container_of(dev_drv, struct lcdc_device, driver);
1154         u32 val;
1155
1156         spin_lock(&lcdc_dev->reg_lock);
1157         if (lcdc_dev->clk_on) {
1158                 val = lcdc_readl(lcdc_dev, BCSH_H);
1159                 switch (mode) {
1160                 case H_SIN:
1161                         val &= m_BCSH_SIN_HUE;
1162                         break;
1163                 case H_COS:
1164                         val &= m_BCSH_COS_HUE;
1165                         val >>= 16;
1166                         break;
1167                 default:
1168                         break;
1169                 }
1170         }
1171         spin_unlock(&lcdc_dev->reg_lock);
1172
1173         return val;
1174 }
1175
1176 static int rk312x_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv, int sin_hue,
1177                                     int cos_hue)
1178 {
1179
1180         struct lcdc_device *lcdc_dev =
1181             container_of(dev_drv, struct lcdc_device, driver);
1182         u32 mask, val;
1183
1184         spin_lock(&lcdc_dev->reg_lock);
1185         if (lcdc_dev->clk_on) {
1186                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
1187                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
1188                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
1189                 lcdc_cfg_done(lcdc_dev);
1190         }
1191         spin_unlock(&lcdc_dev->reg_lock);
1192
1193         return 0;
1194 }
1195
1196 static int rk312x_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1197                                     bcsh_bcs_mode mode, int value)
1198 {
1199         struct lcdc_device *lcdc_dev =
1200             container_of(dev_drv, struct lcdc_device, driver);
1201         u32 mask, val;
1202
1203         spin_lock(&lcdc_dev->reg_lock);
1204         if (lcdc_dev->clk_on) {
1205                 switch (mode) {
1206                 case BRIGHTNESS:
1207                         /* from 0 to 255,typical is 128 */
1208                         if (value < 0x80)
1209                                 value += 0x80;
1210                         else if (value >= 0x80)
1211                                 value = value - 0x80;
1212                         mask = m_BCSH_BRIGHTNESS;
1213                         val = v_BCSH_BRIGHTNESS(value);
1214                         break;
1215                 case CONTRAST:
1216                         /* from 0 to 510,typical is 256 */
1217                         mask = m_BCSH_CONTRAST;
1218                         val = v_BCSH_CONTRAST(value);
1219                         break;
1220                 case SAT_CON:
1221                         /* from 0 to 1015,typical is 256 */
1222                         mask = m_BCSH_SAT_CON;
1223                         val = v_BCSH_SAT_CON(value);
1224                         break;
1225                 default:
1226                         break;
1227                 }
1228                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
1229                 lcdc_cfg_done(lcdc_dev);
1230         }
1231         spin_unlock(&lcdc_dev->reg_lock);
1232         return val;
1233 }
1234
1235 static int rk312x_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1236                                     bcsh_bcs_mode mode)
1237 {
1238         struct lcdc_device *lcdc_dev =
1239             container_of(dev_drv, struct lcdc_device, driver);
1240         u32 val;
1241
1242         spin_lock(&lcdc_dev->reg_lock);
1243         if (lcdc_dev->clk_on) {
1244                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1245                 switch (mode) {
1246                 case BRIGHTNESS:
1247                         val &= m_BCSH_BRIGHTNESS;
1248                         if (val > 0x80)
1249                                 val -= 0x80;
1250                         else
1251                                 val += 0x80;
1252                         break;
1253                 case CONTRAST:
1254                         val &= m_BCSH_CONTRAST;
1255                         val >>= 8;
1256                         break;
1257                 case SAT_CON:
1258                         val &= m_BCSH_SAT_CON;
1259                         val >>= 20;
1260                         break;
1261                 default:
1262                         break;
1263                 }
1264         }
1265         spin_unlock(&lcdc_dev->reg_lock);
1266         return val;
1267 }
1268
1269 static int rk312x_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1270 {
1271         struct lcdc_device *lcdc_dev =
1272             container_of(dev_drv, struct lcdc_device, driver);
1273         u32 mask, val;
1274
1275         spin_lock(&lcdc_dev->reg_lock);
1276         if (lcdc_dev->clk_on) {
1277                 if (open) {
1278                         lcdc_writel(lcdc_dev, BCSH_CTRL, 0x1);
1279                         lcdc_writel(lcdc_dev, BCSH_BCS, 0xd0010000);
1280                         lcdc_writel(lcdc_dev, BCSH_H, 0x01000000);
1281                 } else {
1282                         mask = m_BCSH_EN;
1283                         val = v_BCSH_EN(0);
1284                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1285                 }
1286                 lcdc_cfg_done(lcdc_dev);
1287         }
1288         spin_unlock(&lcdc_dev->reg_lock);
1289         return 0;
1290 }
1291
1292 static int rk31xx_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1293                                enum fb_win_map_order order)
1294 {
1295         mutex_lock(&dev_drv->fb_win_id_mutex);
1296         if (order == FB_DEFAULT_ORDER)
1297                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;     /* FB0_WIN1_FB1_WIN0_FB2_WIN2; for box */
1298         dev_drv->fb2_win_id = order / 100;
1299         dev_drv->fb1_win_id = (order / 10) % 10;
1300         dev_drv->fb0_win_id = order % 10;
1301         mutex_unlock(&dev_drv->fb_win_id_mutex);
1302
1303         return 0;
1304 }
1305
1306 static int rk312x_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1307                                bool set)
1308 {
1309         struct lcdc_device *lcdc_dev =
1310             container_of(dev_drv, struct lcdc_device, driver);
1311         struct rk_screen *screen = dev_drv->cur_screen;
1312         u64 ft = 0;
1313         u32 dotclk;
1314         int ret;
1315         u32 pixclock;
1316         u32 x_total, y_total;
1317         if (set) {
1318                 ft = div_u64(1000000000000llu, fps);
1319                 x_total =
1320                     screen->mode.upper_margin + screen->mode.lower_margin +
1321                     screen->mode.yres + screen->mode.vsync_len;
1322                 y_total =
1323                     screen->mode.left_margin + screen->mode.right_margin +
1324                     screen->mode.xres + screen->mode.hsync_len;
1325                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1326                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1327                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1328         }
1329
1330         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1331         dev_drv->pixclock = lcdc_dev->pixclock = pixclock;
1332         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1333         screen->ft = 1000 / fps;        /*one frame time in ms */
1334
1335         if (set)
1336                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1337                          clk_get_rate(lcdc_dev->dclk), fps);
1338
1339         return fps;
1340 }
1341
1342 static int rk312x_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1343 {
1344         struct lcdc_device *lcdc_dev =
1345             container_of(dev_drv, struct lcdc_device, driver);
1346         u32 int_reg;
1347         int ret;
1348
1349         if (lcdc_dev->clk_on && (!dev_drv->suspend_flag)) {
1350                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1351                 if (int_reg & m_LF_INT_STA) {
1352                         dev_drv->frame_time.last_framedone_t =
1353                                         dev_drv->frame_time.framedone_t;
1354                         dev_drv->frame_time.framedone_t = cpu_clock(0);
1355                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1356                                      v_LF_INT_CLEAR(1));
1357                         ret = RK_LF_STATUS_FC;
1358                 } else
1359                         ret = RK_LF_STATUS_FR;
1360         } else {
1361                 ret = RK_LF_STATUS_NC;
1362         }
1363
1364         return ret;
1365 }
1366
1367 static int rk312x_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
1368                                     unsigned int *dsp_addr)
1369 {
1370         struct lcdc_device *lcdc_dev =
1371             container_of(dev_drv, struct lcdc_device, driver);
1372
1373         if (lcdc_dev->clk_on) {
1374                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1375                 if (lcdc_dev->soc_type == VOP_RK3036)
1376                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1377                 else if (lcdc_dev->soc_type == VOP_RK312X)
1378                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1379         }
1380         return 0;
1381 }
1382
1383 static ssize_t rk312x_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1384                                          char *buf, int win_id)
1385 {
1386         struct lcdc_device *lcdc_dev = container_of(dev_drv, struct lcdc_device,
1387                                                     driver);
1388         char format_w0[9] = "NULL";
1389         char format_w1[9] = "NULL";
1390         char status_w0[9] = "NULL";
1391         char status_w1[9] = "NULL";
1392         u32 fmt_id, act_info, dsp_info, dsp_st, factor;
1393         u16 xvir_w0, x_act_w0, y_act_w0, x_dsp_w0, y_dsp_w0, x_st_w0, y_st_w0;
1394         u16 xvir_w1, x_act_w1, y_act_w1, x_dsp_w1, y_dsp_w1, x_st_w1, y_st_w1;
1395         u16 x_factor, y_factor, x_scale, y_scale;
1396         u16 ovl;
1397         u32 win1_dsp_yaddr = 0;
1398
1399         spin_lock(&lcdc_dev->reg_lock);
1400         if (lcdc_dev->clk_on) {
1401                 /* data format */
1402                 fmt_id = lcdc_readl(lcdc_dev, SYS_CTRL);
1403                 get_format_string((fmt_id & m_WIN0_FORMAT) >> 3, format_w0);
1404                 get_format_string((fmt_id & m_WIN1_FORMAT) >> 6, format_w1);
1405
1406                 /* win status */
1407                 if (fmt_id & m_WIN0_EN)
1408                         strcpy(status_w0, "enabled");
1409                 else
1410                         strcpy(status_w0, "disabled");
1411
1412                 if ((fmt_id & m_WIN1_EN) >> 1)
1413                         strcpy(status_w1, "enabled");
1414                 else
1415                         strcpy(status_w1, "disabled");
1416
1417                 /* ovl */
1418                 ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1419
1420                 /* xvir */
1421                 xvir_w0 = lcdc_readl(lcdc_dev, WIN0_VIR) & m_YRGB_VIR;
1422                 xvir_w1 = lcdc_readl(lcdc_dev, WIN1_VIR) & m_YRGB_VIR;
1423
1424                 /* xact/yact */
1425                 act_info = lcdc_readl(lcdc_dev, WIN0_ACT_INFO);
1426                 x_act_w0 = (act_info & m_ACT_WIDTH) + 1;
1427                 y_act_w0 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1428
1429                 act_info = lcdc_readl(lcdc_dev, WIN1_ACT_INFO);
1430                 x_act_w1 = (act_info & m_ACT_WIDTH) + 1;
1431                 y_act_w1 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1432
1433                 /* xsize/ysize */
1434                 dsp_info = lcdc_readl(lcdc_dev, WIN0_DSP_INFO);
1435                 x_dsp_w0 = (dsp_info & m_DSP_WIDTH) + 1;
1436                 y_dsp_w0 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1437
1438                 dsp_info = lcdc_readl(lcdc_dev, WIN1_DSP_INFO);
1439                 x_dsp_w1 = (dsp_info & m_DSP_WIDTH) + 1;
1440                 y_dsp_w1 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1441
1442                 /* xpos/ypos */
1443                 dsp_st = lcdc_readl(lcdc_dev, WIN0_DSP_ST);
1444                 x_st_w0 = dsp_st & m_DSP_STX;
1445                 y_st_w0 = (dsp_st & m_DSP_STY) >> 16;
1446
1447                 if (lcdc_dev->soc_type == VOP_RK3036)
1448                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST);
1449                 else if (lcdc_dev->soc_type == VOP_RK312X)
1450                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST_RK312X);
1451
1452                 x_st_w1 = dsp_st & m_DSP_STX;
1453                 y_st_w1 = (dsp_st & m_DSP_STY) >> 16;
1454
1455                 /* scale factor */
1456                 factor = lcdc_readl(lcdc_dev, WIN0_SCL_FACTOR_YRGB);
1457                 x_factor = factor & m_X_SCL_FACTOR;
1458                 y_factor = (factor & m_Y_SCL_FACTOR) >> 16;
1459                 x_scale = 4096 * 100 / x_factor;
1460                 y_scale = 4096 * 100 / y_factor;
1461
1462                 /* dsp addr */
1463                 if (lcdc_dev->soc_type == VOP_RK3036)
1464                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST);
1465                 else if (lcdc_dev->soc_type == VOP_RK312X)
1466                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1467         } else {
1468                 spin_unlock(&lcdc_dev->reg_lock);
1469                 return -EPERM;
1470         }
1471         spin_unlock(&lcdc_dev->reg_lock);
1472         return snprintf(buf, PAGE_SIZE,
1473                         "win0:%s\n"
1474                         "xvir:%d\n"
1475                         "xact:%d\n"
1476                         "yact:%d\n"
1477                         "xdsp:%d\n"
1478                         "ydsp:%d\n"
1479                         "x_st:%d\n"
1480                         "y_st:%d\n"
1481                         "x_scale:%d.%d\n"
1482                         "y_scale:%d.%d\n"
1483                         "format:%s\n"
1484                         "YRGB buffer addr:0x%08x\n"
1485                         "CBR buffer addr:0x%08x\n\n"
1486                         "win1:%s\n"
1487                         "xvir:%d\n"
1488                         "xact:%d\n"
1489                         "yact:%d\n"
1490                         "xdsp:%d\n"
1491                         "ydsp:%d\n"
1492                         "x_st:%d\n"
1493                         "y_st:%d\n"
1494                         "format:%s\n"
1495                         "YRGB buffer addr:0x%08x\n"
1496                         "overlay:%s\n",
1497                         status_w0,
1498                         xvir_w0,
1499                         x_act_w0,
1500                         y_act_w0,
1501                         x_dsp_w0,
1502                         y_dsp_w0,
1503                         x_st_w0,
1504                         y_st_w0,
1505                         x_scale / 100,
1506                         x_scale % 100,
1507                         y_scale / 100,
1508                         y_scale % 100,
1509                         format_w0,
1510                         lcdc_readl(lcdc_dev, WIN0_YRGB_MST),
1511                         lcdc_readl(lcdc_dev, WIN0_CBR_MST),
1512                         status_w1,
1513                         xvir_w1,
1514                         x_act_w1,
1515                         y_act_w1,
1516                         x_dsp_w1,
1517                         y_dsp_w1,
1518                         x_st_w1,
1519                         y_st_w1,
1520                         format_w1,
1521                         win1_dsp_yaddr,
1522                         ovl ? "win0 on the top of win1\n" :
1523                         "win1 on the top of win0\n");
1524 }
1525
1526 static int rk312x_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1527 {
1528         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1529                                                     struct lcdc_device,
1530                                                     driver);
1531         int *cbase = (int *)lcdc_dev->regs;
1532         int *regsbak = (int *)lcdc_dev->regsbak;
1533         int i, j;
1534
1535         printk("back up reg:\n");
1536         for (i = 0; i <= (0xDC >> 4); i++) {
1537                 for (j = 0; j < 4; j++)
1538                         printk("%08x  ", *(regsbak + i * 4 + j));
1539                 printk("\n");
1540         }
1541
1542         printk("lcdc reg:\n");
1543         for (i = 0; i <= (0xDC >> 4); i++) {
1544                 for (j = 0; j < 4; j++)
1545                         printk("%08x  ", readl_relaxed(cbase + i * 4 + j));
1546                 printk("\n");
1547         }
1548         return 0;
1549 }
1550
1551 static int rk312x_lcdc_dpi_open(struct rk_lcdc_driver *dev_drv, bool open)
1552 {
1553         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1554                                                     struct lcdc_device, driver);
1555         if (lcdc_dev->soc_type == VOP_RK312X) {
1556                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN,
1557                              v_DIRECT_PATH_EN(open));
1558                 lcdc_cfg_done(lcdc_dev);
1559         }
1560         return 0;
1561 }
1562
1563 static int rk312x_lcdc_dpi_win_sel(struct rk_lcdc_driver *dev_drv, int win_id)
1564 {
1565         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1566                                                     struct lcdc_device, driver);
1567
1568         if (lcdc_dev->soc_type == VOP_RK312X) {
1569                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_LAYER,
1570                              v_DIRECT_PATH_LAYER(win_id));
1571                 lcdc_cfg_done(lcdc_dev);
1572         }
1573         return 0;
1574
1575 }
1576
1577 static int rk312x_lcdc_dpi_status(struct rk_lcdc_driver *dev_drv)
1578 {
1579         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1580                                                     struct lcdc_device, driver);
1581         int ovl = 0;
1582
1583         if (lcdc_dev->soc_type == VOP_RK312X)
1584                 ovl = lcdc_read_bit(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN);
1585
1586         return ovl;
1587 }
1588
1589 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1590         .open = rk312x_lcdc_open,
1591         .load_screen = rk31xx_load_screen,
1592         .set_par = rk312x_lcdc_set_par,
1593         .pan_display = rk312x_lcdc_pan_display,
1594         .blank = rk312x_lcdc_blank,
1595         .ioctl = rk312x_lcdc_ioctl,
1596         .get_win_state = rk312x_lcdc_get_win_state,
1597         .ovl_mgr = rk312x_lcdc_ovl_mgr,
1598         .get_disp_info = rk312x_lcdc_get_disp_info,
1599         .fps_mgr = rk312x_lcdc_fps_mgr,
1600         .fb_get_win_id = rk312x_lcdc_get_win_id,
1601         .fb_win_remap = rk31xx_fb_win_remap,
1602         .poll_vblank = rk312x_lcdc_poll_vblank,
1603         .get_dsp_addr = rk312x_lcdc_get_dsp_addr,
1604         .cfg_done = rk312x_lcdc_cfg_done,
1605         .dump_reg = rk312x_lcdc_reg_dump,
1606         .dpi_open = rk312x_lcdc_dpi_open,
1607         .dpi_win_sel = rk312x_lcdc_dpi_win_sel,
1608         .dpi_status = rk312x_lcdc_dpi_status,
1609         .set_dsp_bcsh_hue = rk312x_lcdc_set_bcsh_hue,
1610         .set_dsp_bcsh_bcs = rk312x_lcdc_set_bcsh_bcs,
1611         .get_dsp_bcsh_hue = rk312x_lcdc_get_bcsh_hue,
1612         .get_dsp_bcsh_bcs = rk312x_lcdc_get_bcsh_bcs,
1613         .open_bcsh = rk312x_lcdc_open_bcsh,
1614 };
1615
1616 static const struct rk_lcdc_drvdata rk3036_lcdc_drvdata = {
1617         .soc_type = VOP_RK3036,
1618 };
1619
1620 static const struct rk_lcdc_drvdata rk312x_lcdc_drvdata = {
1621         .soc_type = VOP_RK312X,
1622 };
1623
1624 #if defined(CONFIG_OF)
1625 static const struct of_device_id rk312x_lcdc_dt_ids[] = {
1626         {
1627                 .compatible = "rockchip,rk3036-lcdc",
1628                 .data = (void *)&rk3036_lcdc_drvdata,
1629         },
1630         {
1631                 .compatible = "rockchip,rk312x-lcdc",
1632                 .data = (void *)&rk312x_lcdc_drvdata,
1633         },
1634 };
1635 #endif
1636
1637 static int rk312x_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1638 {
1639         struct device_node *np = lcdc_dev->dev->of_node;
1640         const struct of_device_id *match;
1641         const struct rk_lcdc_drvdata *lcdc_drvdata;
1642
1643 #if defined(CONFIG_ROCKCHIP_IOMMU)
1644         int val;
1645         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1646                 lcdc_dev->driver.iommu_enabled = 0;
1647         else
1648                 lcdc_dev->driver.iommu_enabled = val;
1649 #else
1650         lcdc_dev->driver.iommu_enabled = 0;
1651 #endif
1652         match = of_match_node(rk312x_lcdc_dt_ids, np);
1653         if (match) {
1654                 lcdc_drvdata = (const struct rk_lcdc_drvdata *)match->data;
1655                 lcdc_dev->soc_type = lcdc_drvdata->soc_type;
1656         } else {
1657                 return PTR_ERR(match);
1658         }
1659
1660         return 0;
1661 }
1662
1663 static int rk312x_lcdc_probe(struct platform_device *pdev)
1664 {
1665         struct lcdc_device *lcdc_dev = NULL;
1666         struct rk_lcdc_driver *dev_drv;
1667         struct device *dev = &pdev->dev;
1668         struct resource *res;
1669         int ret;
1670
1671         lcdc_dev = devm_kzalloc(dev, sizeof(struct lcdc_device), GFP_KERNEL);
1672         if (!lcdc_dev) {
1673                 dev_err(&pdev->dev, "rk312x lcdc device kzalloc fail!\n");
1674                 return -ENOMEM;
1675         }
1676         platform_set_drvdata(pdev, lcdc_dev);
1677         lcdc_dev->dev = dev;
1678         if (rk312x_lcdc_parse_dt(lcdc_dev)) {
1679                 dev_err(lcdc_dev->dev, "rk312x lcdc parse dt failed!\n");
1680                 goto err_parse_dt;
1681         }
1682
1683         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1684         lcdc_dev->reg_phy_base = res->start;
1685         lcdc_dev->len = resource_size(res);
1686         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1687         if (IS_ERR(lcdc_dev->regs)) {
1688                 ret = PTR_ERR(lcdc_dev->regs);
1689                 goto err_remap_reg;
1690         }
1691
1692         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1693         if (IS_ERR(lcdc_dev->regsbak)) {
1694                 dev_err(&pdev->dev, "rk312x lcdc device kmalloc fail!\n");
1695                 ret = PTR_ERR(lcdc_dev->regsbak);
1696                 goto err_remap_reg;
1697         }
1698
1699         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1700         dev_drv = &lcdc_dev->driver;
1701         dev_drv->dev = dev;
1702         dev_drv->prop = PRMRY;
1703         dev_drv->id = lcdc_dev->id;
1704         dev_drv->ops = &lcdc_drv_ops;
1705         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1706         spin_lock_init(&lcdc_dev->reg_lock);
1707
1708         lcdc_dev->irq = platform_get_irq(pdev, 0);
1709         if (lcdc_dev->irq < 0) {
1710                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1711                         lcdc_dev->id);
1712                 ret = -ENXIO;
1713                 goto err_request_irq;
1714         }
1715
1716         ret = devm_request_irq(dev, lcdc_dev->irq, rk312x_lcdc_isr,
1717                                IRQF_DISABLED, dev_name(dev), lcdc_dev);
1718         if (ret) {
1719                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1720                         lcdc_dev->irq, ret);
1721                 goto err_request_irq;
1722         }
1723
1724         if (dev_drv->iommu_enabled)
1725                 strcpy(dev_drv->mmu_dts_name, "iommu,vop_mmu");
1726
1727         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1728         if (ret < 0) {
1729                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1730                 goto err_register_fb;
1731         }
1732         lcdc_dev->screen = dev_drv->screen0;
1733
1734         dev_info(dev, "lcdc%d probe ok, iommu %s\n",
1735                  lcdc_dev->id, dev_drv->iommu_enabled ? "enabled" : "disabled");
1736         return 0;
1737
1738 err_register_fb:
1739 err_request_irq:
1740         devm_kfree(lcdc_dev->dev, lcdc_dev->regsbak);
1741 err_remap_reg:
1742 err_parse_dt:
1743         devm_kfree(&pdev->dev, lcdc_dev);
1744         return ret;
1745 }
1746
1747 #if defined(CONFIG_PM)
1748 static int rk312x_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1749 {
1750         return 0;
1751 }
1752
1753 static int rk312x_lcdc_resume(struct platform_device *pdev)
1754 {
1755         return 0;
1756 }
1757 #else
1758 #define rk312x_lcdc_suspend NULL
1759 #define rk312x_lcdc_resume  NULL
1760 #endif
1761
1762 static int rk312x_lcdc_remove(struct platform_device *pdev)
1763 {
1764         return 0;
1765 }
1766
1767 static void rk312x_lcdc_shutdown(struct platform_device *pdev)
1768 {
1769         struct lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1770
1771         rk312x_lcdc_deinit(lcdc_dev);
1772         rk312x_lcdc_clk_disable(lcdc_dev);
1773         rk_disp_pwr_disable(&lcdc_dev->driver);
1774 }
1775
1776 static struct platform_driver rk312x_lcdc_driver = {
1777         .probe = rk312x_lcdc_probe,
1778         .remove = rk312x_lcdc_remove,
1779         .driver = {
1780                    .name = "rk312x-lcdc",
1781                    .owner = THIS_MODULE,
1782                    .of_match_table = of_match_ptr(rk312x_lcdc_dt_ids),
1783                    },
1784         .suspend = rk312x_lcdc_suspend,
1785         .resume = rk312x_lcdc_resume,
1786         .shutdown = rk312x_lcdc_shutdown,
1787 };
1788
1789 static int __init rk312x_lcdc_module_init(void)
1790 {
1791         return platform_driver_register(&rk312x_lcdc_driver);
1792 }
1793
1794 static void __exit rk312x_lcdc_module_exit(void)
1795 {
1796         platform_driver_unregister(&rk312x_lcdc_driver);
1797 }
1798
1799 fs_initcall(rk312x_lcdc_module_init);
1800 module_exit(rk312x_lcdc_module_exit);