drivers/video/rockchip/lcdc/rk312x_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk312x_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:      zhuangwenlong<zwl@rock-chips.com>
   6  *              zhengyang<zhengyang@rock-chips.com>
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <asm/div64.h>
  31 #include <asm/uaccess.h>
  32 #include <linux/rockchip/cpu.h>
  33 #include <linux/rockchip/iomap.h>
  34 #include <linux/rockchip/grf.h>
  35 #include <linux/rockchip/common.h>
  36 #include <dt-bindings/clock/rk_system_status.h>
  37 #if defined(CONFIG_ION_ROCKCHIP)
  38 #include <linux/rockchip/iovmm.h>
  39 #include <linux/rockchip/sysmmu.h>
  40 #endif
  41 #include "rk312x_lcdc.h"
  42
  43 static int dbg_thresd;
  44 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  45
  46 #define DBG(level, x...) do {                   \
  47         if (unlikely(dbg_thresd >= level))      \
  48                 printk(KERN_INFO x); } while (0)
  49
  50 static struct rk_lcdc_win lcdc_win[] = {
  51         [0] = {
  52                .name = "win0",
  53                .id = 0,
  54                .support_3d = false,
  55                },
  56         [1] = {
  57                .name = "win1",
  58                .id = 1,
  59                .support_3d = false,
  60                },
  61         [2] = {
  62                .name = "hwc",
  63                .id = 2,
  64                .support_3d = false,
  65                },
  66 };
  67
  68 static irqreturn_t rk312x_lcdc_isr(int irq, void *dev_id)
  69 {
  70         struct lcdc_device *lcdc_dev = (struct lcdc_device *)dev_id;
  71         ktime_t timestamp = ktime_get();
  72         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  73
  74         if (int_reg & m_FS_INT_STA) {
  75                 timestamp = ktime_get();
  76                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  77                              v_FS_INT_CLEAR(1));
  78                 //if (lcdc_dev->driver.wait_fs) {
  79                 if (0) {
  80                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  81                         complete(&(lcdc_dev->driver.frame_done));
  82                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  83                 }
  84                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  85                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  86
  87         } else if (int_reg & m_LF_INT_STA) {
  88                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  89                              v_LF_INT_CLEAR(1));
  90         }
  91         return IRQ_HANDLED;
  92 }
  93
  94 static int rk312x_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
  95 {
  96 #ifdef CONFIG_RK_FPGA
  97         lcdc_dev->clk_on = 1;
  98         return 0;
  99 #endif
 100         if (!lcdc_dev->clk_on) {
 101                 clk_prepare_enable(lcdc_dev->hclk);
 102                 clk_prepare_enable(lcdc_dev->dclk);
 103                 clk_prepare_enable(lcdc_dev->aclk);
 104 //              clk_prepare_enable(lcdc_dev->pd);
 105                 spin_lock(&lcdc_dev->reg_lock);
 106                 lcdc_dev->clk_on = 1;
 107                 spin_unlock(&lcdc_dev->reg_lock);
 108         }
 109
 110         return 0;
 111 }
 112
 113 static int rk312x_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 114 {
 115 #ifdef CONFIG_RK_FPGA
 116         lcdc_dev->clk_on = 0;
 117         return 0;
 118 #endif
 119         if (lcdc_dev->clk_on) {
 120                 spin_lock(&lcdc_dev->reg_lock);
 121                 lcdc_dev->clk_on = 0;
 122                 spin_unlock(&lcdc_dev->reg_lock);
 123                 mdelay(25);
 124                 clk_disable_unprepare(lcdc_dev->dclk);
 125                 clk_disable_unprepare(lcdc_dev->hclk);
 126                 clk_disable_unprepare(lcdc_dev->aclk);
 127 //              clk_disable_unprepare(lcdc_dev->pd);
 128         }
 129
 130         return 0;
 131 }
 132
 133 static int rk312x_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 134 {
 135         u32 mask, val;
 136         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 137                                                     struct lcdc_device, driver);
 138         struct rk_screen *screen = dev_drv->cur_screen;
 139
 140         spin_lock(&lcdc_dev->reg_lock);
 141         if (likely(lcdc_dev->clk_on)) {
 142                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 143                         m_LF_INT_CLEAR | m_LF_INT_EN | m_LF_INT_NUM |
 144                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 145                 val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1) |
 146                         v_LF_INT_CLEAR(1) | v_LF_INT_EN(1) |
 147                         v_BUS_ERR_INT_CLEAR(1) | v_BUS_ERR_INT_EN(0) |
 148                         v_LF_INT_NUM(screen->mode.vsync_len +
 149                                      screen->mode.upper_margin +
 150                                      screen->mode.yres);
 151                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 152                 spin_unlock(&lcdc_dev->reg_lock);
 153         } else {
 154                 spin_unlock(&lcdc_dev->reg_lock);
 155         }
 156         return 0;
 157 }
 158
 159 static int rk312x_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 160 {
 161         u32 mask, val;
 162
 163         spin_lock(&lcdc_dev->reg_lock);
 164         if (likely(lcdc_dev->clk_on)) {
 165                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 166                         m_LF_INT_CLEAR | m_LF_INT_EN |
 167                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 168                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 169                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 170                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 171                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 172                 spin_unlock(&lcdc_dev->reg_lock);
 173         } else {
 174                 spin_unlock(&lcdc_dev->reg_lock);
 175         }
 176         mdelay(1);
 177         return 0;
 178 }
 179
 180 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device *lcdc_dev)
 181 {
 182         int reg = 0;
 183         u32 value = 0;
 184
 185         spin_lock(&lcdc_dev->reg_lock);
 186         for (reg = 0; reg < 0xdc; reg += 4) {
 187                 value = lcdc_readl(lcdc_dev, reg);
 188         }
 189         spin_unlock(&lcdc_dev->reg_lock);
 190 }
 191
 192 static int rk312x_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 193 {
 194         int win0_top = 0;
 195         u32 mask, val;
 196         enum data_format win0_format = lcdc_dev->driver.win[0]->format;
 197         enum data_format win1_format = lcdc_dev->driver.win[1]->format;
 198
 199         int win0_alpha_en = ((win0_format == ARGB888)
 200                              || (win0_format == ABGR888)) ? 1 : 0;
 201         int win1_alpha_en = ((win1_format == ARGB888)
 202                              || (win1_format == ABGR888)) ? 1 : 0;
 203         u32 *_pv = (u32 *) lcdc_dev->regsbak;
 204
 205         _pv += (DSP_CTRL0 >> 2);
 206         win0_top = ((*_pv) & (m_WIN0_TOP)) >> 8;
 207         if (win0_top && (lcdc_dev->atv_layer_cnt >= 2) && (win0_alpha_en)) {
 208                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 209                 val = v_WIN0_ALPHA_EN(1) | v_WIN1_ALPHA_EN(0);
 210                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 211
 212                 mask = m_WIN0_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 213                 val = v_WIN0_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 214                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 215         } else if ((!win0_top) && (lcdc_dev->atv_layer_cnt >= 2)
 216                    && (win1_alpha_en)) {
 217                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 218                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(1);
 219                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 220
 221                 mask = m_WIN1_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 222                 val = v_WIN1_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 223                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 224         } else {
 225                 mask = m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 226                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(0);
 227                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 228         }
 229
 230         return 0;
 231 }
 232
 233 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
 234                                    struct rk_lcdc_win *win)
 235 {
 236         u32 mask, val;
 237
 238         if (win->state == 1) {
 239                 if (win->id == 0) {
 240                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 241                         val = v_WIN0_EN(win->state) |
 242                                 v_WIN0_FORMAT(win->fmt_cfg) |
 243                                 v_WIN0_RB_SWAP(win->swap_rb);
 244                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 245
 246                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 247                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 248                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 249                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 250                                     v_X_SCL_FACTOR(win->scale_cbcr_x) |
 251                                     v_Y_SCL_FACTOR(win->scale_cbcr_y));
 252
 253                         lcdc_msk_reg(lcdc_dev, WIN0_VIR,
 254                                      m_YRGB_VIR | m_CBBR_VIR,
 255                                      v_YRGB_VIR(win->area[0].y_vir_stride) |
 256                                      v_YRGB_VIR(win->area[0].uv_vir_stride));
 257                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO,
 258                                     v_ACT_WIDTH(win->area[0].xact) |
 259                                     v_ACT_HEIGHT(win->area[0].yact));
 260                         lcdc_writel(lcdc_dev, WIN0_DSP_ST,
 261                                     v_DSP_STX(win->area[0].dsp_stx) |
 262                                     v_DSP_STY(win->area[0].dsp_sty));
 263                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO,
 264                                     v_DSP_WIDTH(win->area[0].xsize) |
 265                                     v_DSP_HEIGHT(win->area[0].ysize));
 266
 267                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST,
 268                                     win->area[0].y_addr);
 269                         lcdc_writel(lcdc_dev, WIN0_CBR_MST,
 270                                     win->area[0].uv_addr);
 271                 } else if (win->id == 1) {
 272                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 273                         val = v_WIN1_EN(win->state) |
 274                                 v_WIN1_FORMAT(win->fmt_cfg) |
 275                                 v_WIN1_RB_SWAP(win->swap_rb);
 276                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 277
 278                         /* rk312x unsupport win1 scale */
 279                         if (lcdc_dev->soc_type == VOP_RK3036)
 280                                 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 281                                         v_X_SCL_FACTOR(win->scale_yrgb_x) |
 282                                         v_Y_SCL_FACTOR(win->scale_yrgb_y));
 283
 284                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR,
 285                                      v_YRGB_VIR(win->area[0].y_vir_stride));
 286                         lcdc_writel(lcdc_dev, WIN1_ACT_INFO,
 287                                     v_ACT_WIDTH(win->area[0].xact) |
 288                                     v_ACT_HEIGHT(win->area[0].yact));
 289                         lcdc_writel(lcdc_dev, WIN1_DSP_INFO,
 290                                     v_DSP_WIDTH(win->area[0].xsize) |
 291                                     v_DSP_HEIGHT(win->area[0].ysize));
 292                         lcdc_writel(lcdc_dev, WIN1_DSP_ST,
 293                                     v_DSP_STX(win->area[0].dsp_stx) |
 294                                     v_DSP_STY(win->area[0].dsp_sty));
 295
 296                         lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 297
 298                 } else if (win->id == 2) {
 299                 }
 300         } else {
 301                 win->area[0].y_addr = 0;
 302                 win->area[0].uv_addr = 0;
 303                 if (win->id == 0)
 304                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN0_EN,
 305                                      v_WIN0_EN(0));
 306                 else if (win->id == 1)
 307                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN1_EN,
 308                                      v_WIN1_EN(0));
 309                 else if (win->id == 2)
 310                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 311         }
 312 }
 313
 314 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev, unsigned int win_id,
 315                               bool open)
 316 {
 317         spin_lock(&lcdc_dev->reg_lock);
 318         if (likely(lcdc_dev->clk_on)
 319             && lcdc_dev->driver.win[win_id]->state != open) {
 320                 if (open) {
 321                         if (!lcdc_dev->atv_layer_cnt) {
 322                                 dev_info(lcdc_dev->dev,
 323                                          "wakeup from standby!\n");
 324                                 lcdc_dev->standby = 0;
 325                         }
 326                         lcdc_dev->atv_layer_cnt++;
 327                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 328                         lcdc_dev->atv_layer_cnt--;
 329                 }
 330                 lcdc_dev->driver.win[win_id]->state = open;
 331                 if (!open) {
 332                         lcdc_layer_update_regs(lcdc_dev,
 333                                                lcdc_dev->driver.win[win_id]);
 334                         lcdc_cfg_done(lcdc_dev);
 335                 }
 336                 /*if no layer used,disable lcdc */
 337                 if (!lcdc_dev->atv_layer_cnt) {
 338                         dev_info(lcdc_dev->dev,
 339                                  "no layer is used,go to standby!\n");
 340                         lcdc_dev->standby = 1;
 341                 }
 342         }
 343         spin_unlock(&lcdc_dev->reg_lock);
 344 }
 345
 346 static int rk312x_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 347 {
 348         struct lcdc_device *lcdc_dev =
 349             container_of(dev_drv, struct lcdc_device, driver);
 350         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 351         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 352         int timeout;
 353         unsigned long flags;
 354         spin_lock(&lcdc_dev->reg_lock);
 355         if (likely(lcdc_dev->clk_on)) {
 356                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 357                              v_LCDC_STANDBY(lcdc_dev->standby));
 358                 lcdc_layer_update_regs(lcdc_dev, win0);
 359                 lcdc_layer_update_regs(lcdc_dev, win1);
 360                 rk312x_lcdc_alpha_cfg(lcdc_dev);
 361                 lcdc_cfg_done(lcdc_dev);
 362
 363         }
 364         spin_unlock(&lcdc_dev->reg_lock);
 365         //if (dev_drv->wait_fs) {
 366         if (0) {
 367                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 368                 init_completion(&dev_drv->frame_done);
 369                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 370                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 371                                                       msecs_to_jiffies
 372                                                       (dev_drv->cur_screen->ft +
 373                                                        5));
 374                 if (!timeout && (!dev_drv->frame_done.done)) {
 375                         dev_warn(lcdc_dev->dev,
 376                                  "wait for new frame start time out!\n");
 377                         return -ETIMEDOUT;
 378                 }
 379         }
 380         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 381         return 0;
 382
 383 }
 384
 385 static void rk312x_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 386 {
 387         memcpy((u8 *) lcdc_dev->regs, (u8 *) lcdc_dev->regsbak, 0xdc);
 388 }
 389
 390 static void rk312x_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 391 {
 392         u32 mask, val;
 393         struct lcdc_device *lcdc_dev =
 394             container_of(dev_drv, struct lcdc_device, driver);
 395
 396         spin_lock(&lcdc_dev->reg_lock);
 397         if (likely(lcdc_dev->clk_on)) {
 398                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
 399                         m_AXI_OUTSTANDING_MAX_NUM;
 400                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) |
 401                         v_AXI_MAX_OUTSTANDING_EN(1);
 402                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 403         }
 404         spin_unlock(&lcdc_dev->reg_lock);
 405 }
 406
 407 static int rk312x_lcdc_set_lut(struct rk_lcdc_driver *dev_drv)
 408 {
 409         int i = 0;
 410         int __iomem *c;
 411         int v;
 412         struct lcdc_device *lcdc_dev =
 413                 container_of(dev_drv, struct lcdc_device, driver);
 414
 415         spin_lock(&lcdc_dev->reg_lock);
 416         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(0));
 417         lcdc_cfg_done(lcdc_dev);
 418         mdelay(25);
 419         for (i = 0; i < 256; i++) {
 420                 v = dev_drv->cur_screen->dsp_lut[i];
 421                 c = lcdc_dev->dsp_lut_addr_base + i;
 422                 writel_relaxed(v, c);
 423
 424         }
 425         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(1));
 426         lcdc_cfg_done(lcdc_dev);
 427         spin_unlock(&lcdc_dev->reg_lock);
 428         return 0;
 429
 430 }
 431
 432 static int rk312x_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 433 {
 434 #ifdef CONFIG_RK_FPGA
 435         return 0;
 436 #endif
 437         int ret, fps;
 438         struct lcdc_device *lcdc_dev =
 439             container_of(dev_drv, struct lcdc_device, driver);
 440         struct rk_screen *screen = dev_drv->cur_screen;
 441
 442         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 443         if (ret)
 444                 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
 445         lcdc_dev->pixclock =
 446             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 447         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 448
 449         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 450         screen->ft = 1000 / fps;
 451         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 452                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 453         return 0;
 454
 455 }
 456
 457 /********do basic init*********/
 458 static int rk312x_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 459 {
 460         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 461                                                     struct lcdc_device, driver);
 462         if (lcdc_dev->pre_init)
 463                 return 0;
 464
 465         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 466         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 467         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 468 //      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
 469
 470         if ( /*IS_ERR(lcdc_dev->pd) || */ (IS_ERR(lcdc_dev->aclk)) ||
 471             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 472                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 473                         lcdc_dev->id);
 474         }
 475
 476         rk_disp_pwr_enable(dev_drv);
 477         rk312x_lcdc_clk_enable(lcdc_dev);
 478
 479         /* backup reg config at uboot */
 480         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 481         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN, v_AUTO_GATING_EN(0));
 482         lcdc_cfg_done(lcdc_dev);
 483         if (dev_drv->iommu_enabled)     /* disable win0 to workaround iommu pagefault */
 484                 lcdc_layer_enable(lcdc_dev, 0, 0);
 485         lcdc_dev->pre_init = true;
 486
 487         return 0;
 488 }
 489
 490 static void rk312x_lcdc_deinit(struct lcdc_device *lcdc_dev)
 491 {
 492         u32 mask, val;
 493
 494         spin_lock(&lcdc_dev->reg_lock);
 495         if (likely(lcdc_dev->clk_on)) {
 496                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 497                         m_LF_INT_CLEAR | m_LF_INT_EN |
 498                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 499                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 500                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 501                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 502                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 503                 lcdc_set_bit(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY);
 504                 lcdc_cfg_done(lcdc_dev);
 505                 spin_unlock(&lcdc_dev->reg_lock);
 506         } else {
 507                 spin_unlock(&lcdc_dev->reg_lock);
 508         }
 509         mdelay(1);
 510
 511 }
 512
 513 static u32 calc_sclk(struct rk_screen *src_screen, struct rk_screen *dst_screen)
 514 {
 515         u32 dsp_vtotal;
 516         u64 dsp_htotal;
 517         u32 dsp_in_vtotal;
 518         u64 dsp_in_htotal;
 519         u32 sclk;
 520
 521         if (!src_screen || !dst_screen)
 522                 return 0;
 523
 524         dsp_vtotal = dst_screen->mode.yres;
 525         dsp_htotal = dst_screen->mode.left_margin + dst_screen->mode.hsync_len +
 526                      dst_screen->mode.xres + dst_screen->mode.right_margin;
 527         dsp_in_vtotal = src_screen->mode.yres;
 528         dsp_in_htotal = src_screen->mode.left_margin +
 529                         src_screen->mode.hsync_len +
 530                         src_screen->mode.xres + src_screen->mode.right_margin;
 531         sclk = (dsp_vtotal * dsp_htotal * src_screen->mode.pixclock) /
 532                (dsp_in_vtotal * dsp_in_htotal);
 533
 534         return sclk;
 535 }
 536
 537 static int calc_dsp_frm_vst_hst(struct rk_screen *src, struct rk_screen *dst)
 538 {
 539         u32 BP_in, BP_out;
 540         u32 v_scale_ratio;
 541 #if defined(FLOAT_CALC) /* use float */
 542         double T_frm_st;
 543         double T_BP_in, T_BP_out, T_Delta, Tin;
 544 #else
 545         long long  T_frm_st;
 546         __u64 T_BP_in, T_BP_out, T_Delta, Tin;
 547         __u64 rate = (1 << 16);
 548 #endif
 549         u32 dsp_htotal, src_htotal, src_vtotal;
 550
 551         dsp_htotal = dst->mode.left_margin + dst->mode.hsync_len +
 552                      dst->mode.xres + dst->mode.right_margin;
 553         src_htotal = src->mode.left_margin + src->mode.hsync_len +
 554                      src->mode.xres + src->mode.right_margin;
 555         src_vtotal = src->mode.upper_margin + src->mode.vsync_len +
 556                      src->mode.yres + src->mode.lower_margin;
 557         BP_in  = (src->mode.upper_margin + src->mode.vsync_len) * src_htotal;
 558         BP_out = (dst->mode.upper_margin + dst->mode.vsync_len) * dsp_htotal;
 559
 560         v_scale_ratio = dst->mode.yres / src->mode.yres;
 561
 562 #if defined(FLOAT_CALC)
 563         T_BP_in = 1.0 * BP_in / src->mode.pixclock;
 564         T_BP_out = 1.0 * BP_out / dst->mode.pixclock;
 565         if (v_scale_ratio < 2)
 566                 T_Delta = 4.0 * src_htotal / src->mode.pixclock;
 567         else
 568                 T_Delta = 12.0 * src_htotal / src->mode.pixclock;
 569
 570         Tin = 1.0 * src_vtotal * src_htotal / src->mode.pixclock;
 571 #else
 572         T_BP_in = rate * BP_in / src->mode.pixclock;
 573         T_BP_out = rate * BP_out / dst->mode.pixclock;
 574         if (v_scale_ratio < 2)
 575                 T_Delta = rate * 4 * src_htotal / src->mode.pixclock;
 576         else
 577                 T_Delta = rate * 12 * src_htotal / src->mode.pixclock;
 578
 579         Tin = rate * src_vtotal * src_htotal / src->mode.pixclock;
 580 #endif
 581
 582         T_frm_st = (T_BP_in + T_Delta - T_BP_out);
 583         if (T_frm_st < 0)
 584                 T_frm_st  += Tin;
 585
 586 #if defined(FLOAT_CALC)
 587         dst->scl_vst = (u16)(T_frm_st * src->mode.pixclock / src_htotal);
 588         dst->scl_hst = (u16)((T_frm_st * src->mode.pixclock) % src_htotal);
 589 #else
 590         dst->scl_vst = (u16)((T_frm_st * src->mode.pixclock) / (src_htotal * rate));
 591         dst->scl_hst = (u16)((T_frm_st * src->mode.pixclock / rate) % src_htotal);
 592 #endif
 593         return 0;
 594 }
 595
 596 static int rk312x_lcdc_set_scaler(struct rk_lcdc_driver *dev_drv,
 597                                   struct rk_screen *dst_screen, bool enable)
 598 {
 599         u32 dsp_htotal, dsp_hs_end, dsp_hact_st, dsp_hact_end;
 600         u32 dsp_vtotal, dsp_vs_end, dsp_vact_st, dsp_vact_end;
 601         u32 dsp_hbor_end, dsp_hbor_st, dsp_vbor_end, dsp_vbor_st;
 602         u32 scl_v_factor, scl_h_factor;
 603         u32 dst_frame_hst, dst_frame_vst;
 604         u32 src_w, src_h, dst_w, dst_h;
 605         u16 bor_right = 0;
 606         u16 bor_left = 0;
 607         u16 bor_up = 0;
 608         u16 bor_down = 0;
 609         struct rk_screen *src;
 610         struct rk_screen *dst;
 611         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 612                                                     struct lcdc_device, driver);
 613
 614         if (unlikely(!lcdc_dev->clk_on))
 615                 return 0;
 616
 617         if(!enable) {
 618                 dev_info(lcdc_dev->dev, "%s: disable\n", __func__);
 619                 return 0;
 620         }
 621
 622         /* rk312x used one lcdc to apply dual disp
 623          * hdmi screen is used for scaler src
 624          * prmry screen is used for scaler dst
 625          */
 626         dst = dst_screen;
 627         if (!dst) {
 628                 dev_err(lcdc_dev->dev, "%s: dst screen is null!\n", __func__);
 629                 return -EINVAL;
 630         }
 631
 632         src = dst_screen->ext_screen;
 633
 634         lcdc_dev->s_pixclock = calc_sclk(src, dst);
 635         clk_set_rate(lcdc_dev->sclk, lcdc_dev->s_pixclock);
 636
 637         /* config scale timing */
 638         calc_dsp_frm_vst_hst(src, dst);
 639         dst_frame_vst = dst->scl_vst;
 640         dst_frame_hst = dst->scl_hst;
 641
 642         dsp_htotal    = dst->mode.hsync_len + dst->mode.left_margin +
 643                         dst->mode.xres + dst->mode.right_margin;
 644         dsp_hs_end    = dst->mode.hsync_len;
 645
 646         dsp_vtotal    = dst->mode.vsync_len + dst->mode.upper_margin +
 647                         dst->mode.yres + dst->mode.lower_margin;
 648         dsp_vs_end    = dst->mode.vsync_len;
 649
 650         dsp_hbor_end  = dst->mode.hsync_len + dst->mode.left_margin +
 651                         dst->mode.xres;
 652         dsp_hbor_st   = dst->mode.hsync_len + dst->mode.left_margin;
 653         dsp_vbor_end  = dst->mode.vsync_len + dst->mode.upper_margin +
 654                         dst->mode.yres;
 655         dsp_vbor_st   = dst->mode.vsync_len + dst->mode.upper_margin;
 656
 657         dsp_hact_st   = dsp_hbor_st  + bor_left;
 658         dsp_hact_end  = dsp_hbor_end - bor_right;
 659         dsp_vact_st   = dsp_vbor_st  + bor_up;
 660         dsp_vact_end  = dsp_vbor_end - bor_down;
 661
 662         src_w = src->mode.xres;
 663         src_h = src->mode.yres;
 664         dst_w = dsp_hact_end - dsp_hact_st;
 665         dst_h = dsp_vact_end - dsp_vact_st;
 666
 667         /* calc scale factor */
 668         scl_h_factor = ((src_w - 1) << 12) / (dst_w - 1);
 669         scl_v_factor = ((src_h - 1) << 12) / (dst_h - 1);
 670
 671         spin_lock(&lcdc_dev->reg_lock);
 672         lcdc_writel(lcdc_dev, SCALER_FACTOR,
 673                     v_SCALER_H_FACTOR(scl_h_factor) |
 674                     v_SCALER_V_FACTOR(scl_v_factor));
 675
 676         lcdc_writel(lcdc_dev, SCALER_FRAME_ST,
 677                     v_SCALER_FRAME_HST(dst_frame_hst) |
 678                     v_SCALER_FRAME_VST(dst_frame_hst));
 679         lcdc_writel(lcdc_dev, SCALER_DSP_HOR_TIMING,
 680                     v_SCALER_HS_END(dsp_hs_end) |
 681                     v_SCALER_HTOTAL(dsp_htotal));
 682         lcdc_writel(lcdc_dev, SCALER_DSP_HACT_ST_END,
 683                     v_SCALER_HAEP(dsp_hact_end) |
 684                     v_SCALER_HASP(dsp_hact_st));
 685         lcdc_writel(lcdc_dev, SCALER_DSP_VER_TIMING,
 686                     v_SCALER_VS_END(dsp_vs_end) |
 687                     v_SCALER_VTOTAL(dsp_vtotal));
 688         lcdc_writel(lcdc_dev, SCALER_DSP_VACT_ST_END,
 689                     v_SCALER_VAEP(dsp_vact_end) |
 690                     v_SCALER_VASP(dsp_vact_st));
 691         lcdc_writel(lcdc_dev, SCALER_DSP_HBOR_TIMING,
 692                     v_SCALER_HBOR_END(dsp_hbor_end) |
 693                     v_SCALER_HBOR_ST(dsp_hbor_st));
 694         lcdc_writel(lcdc_dev, SCALER_DSP_VBOR_TIMING,
 695                     v_SCALER_VBOR_END(dsp_vbor_end) |
 696                     v_SCALER_VBOR_ST(dsp_vbor_st));
 697         lcdc_writel(lcdc_dev, SCALER_CTRL,
 698                     m_SCALER_EN | m_SCALER_OUT_ZERO | m_SCALER_OUT_EN,
 699                     v_SCALER_EN(1) | v_SCALER_OUT_ZERO(0) | v_SCALER_OUT_EN(1));
 700         spin_unlock(&lcdc_dev->reg_lock);
 701
 702         return 0;
 703 }
 704
 705 static int rk312x_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 706 {
 707         u16 face = 0;
 708         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 709                                                     struct lcdc_device, driver);
 710         struct rk_screen *screen = dev_drv->cur_screen;
 711         u16 right_margin = screen->mode.right_margin;
 712         u16 left_margin = screen->mode.left_margin;
 713         u16 lower_margin = screen->mode.lower_margin;
 714         u16 upper_margin = screen->mode.upper_margin;
 715         u16 x_res = screen->mode.xres;
 716         u16 y_res = screen->mode.yres;
 717         u32 mask, val;
 718
 719         spin_lock(&lcdc_dev->reg_lock);
 720         if (likely(lcdc_dev->clk_on)) {
 721                 switch (screen->type) {
 722                 case SCREEN_RGB:
 723                         if (lcdc_dev->soc_type == VOP_RK312X) {
 724                                 mask = m_RGB_DCLK_EN | m_RGB_DCLK_INVERT;
 725                                 val = v_RGB_DCLK_EN(1) | v_RGB_DCLK_INVERT(0);
 726                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 727                         }
 728                         break;
 729                 case SCREEN_LVDS:
 730                         if (lcdc_dev->soc_type == VOP_RK312X) {
 731                                 mask = m_LVDS_DCLK_EN | m_LVDS_DCLK_INVERT;
 732                                 val = v_LVDS_DCLK_EN(1) | v_LVDS_DCLK_INVERT(0);
 733                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 734                         }
 735                         break;
 736                 case SCREEN_MIPI:
 737                         if (lcdc_dev->soc_type == VOP_RK312X) {
 738                                 mask = m_MIPI_DCLK_EN | m_MIPI_DCLK_INVERT;
 739                                 val = v_MIPI_DCLK_EN(1) | v_MIPI_DCLK_INVERT(0);
 740                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 741                         }
 742                         break;
 743                 case SCREEN_HDMI:
 744                         mask = m_HDMI_DCLK_EN;
 745                         val = v_HDMI_DCLK_EN(1);
 746                         if (screen->pixelrepeat) {
 747                                 mask |= m_CORE_CLK_DIV_EN;
 748                                 val |= v_CORE_CLK_DIV_EN(1);
 749                         }
 750                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 751                         break;
 752                 case SCREEN_TVOUT:
 753                         mask = m_TVE_DAC_DCLK_EN;
 754                         val = v_TVE_DAC_DCLK_EN(1);
 755                         if (screen->pixelrepeat) {
 756                                 mask |= m_CORE_CLK_DIV_EN;
 757                                 val |= v_CORE_CLK_DIV_EN(1);
 758                         }
 759                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 760                         if (x_res == 720 && y_res == 576)
 761                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 762                                              v_TVE_MODE(TV_PAL));
 763                         else if (x_res == 720 && y_res == 480)
 764                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 765                                              v_TVE_MODE(TV_NTSC));
 766                         else {
 767                                 dev_err(lcdc_dev->dev,
 768                                         "unsupported video timing!\n");
 769                                 return -1;
 770                         }
 771                         break;
 772                 default:
 773                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 774                         break;
 775                 }
 776
 777                 if (lcdc_dev->soc_type == VOP_RK312X) {
 778                         switch (screen->face) {
 779                         case OUT_P565:
 780                                 face = OUT_P565;
 781                                 mask = m_DITHER_DOWN_EN |
 782                                         m_DITHER_DOWN_MODE |
 783                                         m_DITHER_DOWN_SEL;
 784                                 val = v_DITHER_DOWN_EN(1) |
 785                                         v_DITHER_DOWN_MODE(0) |
 786                                         v_DITHER_DOWN_SEL(1);
 787                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 788                                 break;
 789                         case OUT_P666:
 790                                 face = OUT_P666;
 791                                 mask = m_DITHER_DOWN_EN |
 792                                         m_DITHER_DOWN_MODE |
 793                                         m_DITHER_DOWN_SEL;
 794                                 val = v_DITHER_DOWN_EN(1) |
 795                                         v_DITHER_DOWN_MODE(1) |
 796                                         v_DITHER_DOWN_SEL(1);
 797                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 798                                 break;
 799                         case OUT_D888_P565:
 800                                 face = OUT_P888;
 801                                 mask = m_DITHER_DOWN_EN |
 802                                         m_DITHER_DOWN_MODE |
 803                                         m_DITHER_DOWN_SEL;
 804                                 val = v_DITHER_DOWN_EN(1) |
 805                                         v_DITHER_DOWN_MODE(0) |
 806                                         v_DITHER_DOWN_SEL(1);
 807                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 808                                 break;
 809                         case OUT_D888_P666:
 810                                 face = OUT_P888;
 811                                 mask = m_DITHER_DOWN_EN |
 812                                         m_DITHER_DOWN_MODE |
 813                                         m_DITHER_DOWN_SEL;
 814                                 val = v_DITHER_DOWN_EN(1) |
 815                                         v_DITHER_DOWN_MODE(1) |
 816                                         v_DITHER_DOWN_SEL(1);
 817                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 818                                 break;
 819                         case OUT_P888:
 820                                 face = OUT_P888;
 821                                 mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN;
 822                                 val = v_DITHER_DOWN_EN(0) | v_DITHER_UP_EN(0);
 823                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 824                                 break;
 825                         default:
 826                                 dev_err(lcdc_dev->dev, "un supported interface!\n");
 827                                 break;
 828                         }
 829                 }
 830
 831                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 832                     m_DEN_POL | m_DCLK_POL;
 833                 val = v_DSP_OUT_FORMAT(face) | v_HSYNC_POL(screen->pin_hsync) |
 834                     v_VSYNC_POL(screen->pin_vsync) |
 835                     v_DEN_POL(screen->pin_den) |
 836                     v_DCLK_POL(screen->pin_dclk);
 837                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 838
 839                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 840                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 841                     m_DSP_DUMMY_SWAP | m_BLANK_EN | m_BLACK_EN;
 842
 843                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 844                     v_DSP_RB_SWAP(screen->swap_rb) |
 845                     v_DSP_RG_SWAP(screen->swap_rg) |
 846                     v_DSP_DELTA_SWAP(screen->swap_delta) |
 847                     v_DSP_DUMMY_SWAP(screen->swap_dumy) |
 848                     v_BLANK_EN(0) | v_BLACK_EN(0);
 849                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 850
 851                 /* config timing */
 852                 val = v_HSYNC(screen->mode.hsync_len) |
 853                     v_HORPRD(screen->mode.hsync_len + left_margin + x_res +
 854                              right_margin);
 855                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 856                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 857                     v_HASP(screen->mode.hsync_len + left_margin);
 858                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 859
 860                 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 861                         /* First Field Timing */
 862                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
 863                                     v_VSYNC(screen->mode.vsync_len) |
 864                                     v_VERPRD(2 * (screen->mode.vsync_len + upper_margin + lower_margin) +
 865                                              y_res + 1));
 866                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END,
 867                                     v_VAEP(screen->mode.vsync_len +
 868                                            upper_margin + y_res / 2) |
 869                                     v_VASP(screen->mode.vsync_len +
 870                                            upper_margin));
 871                         /* Second Field Timing */
 872                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1,
 873                                     v_VSYNC_ST_F1(screen->mode.vsync_len +
 874                                                   upper_margin + y_res / 2 +
 875                                                   lower_margin) |
 876                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len +
 877                                                    upper_margin + y_res / 2 +
 878                                                    lower_margin));
 879                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END_F1,
 880                                     v_VAEP(2 * (screen->mode.vsync_len + upper_margin) +
 881                                            y_res + lower_margin + 1) |
 882                                     v_VASP(2 * (screen->mode.vsync_len + upper_margin) +
 883                                            y_res / 2 + lower_margin + 1));
 884
 885                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 886                                      m_INTERLACE_DSP_EN |
 887                                      m_WIN0_YRGB_DEFLICK_EN |
 888                                      m_WIN0_CBR_DEFLICK_EN |
 889                                      m_INTERLACE_FIELD_POL,
 890                                      v_INTERLACE_DSP_EN(1) |
 891                                      v_WIN0_YRGB_DEFLICK_EN(1) |
 892                                      v_WIN0_CBR_DEFLICK_EN(1) |
 893                                      v_INTERLACE_FIELD_POL(0));
 894                 } else {
 895                         val = v_VSYNC(screen->mode.vsync_len) |
 896                             v_VERPRD(screen->mode.vsync_len + upper_margin +
 897                                      y_res + lower_margin);
 898                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 899
 900                         val = v_VAEP(screen->mode.vsync_len + upper_margin + y_res) |
 901                             v_VASP(screen->mode.vsync_len + upper_margin);
 902                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 903
 904                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 905                                      m_INTERLACE_DSP_EN |
 906                                      m_WIN0_YRGB_DEFLICK_EN |
 907                                      m_WIN0_CBR_DEFLICK_EN |
 908                                      m_INTERLACE_FIELD_POL,
 909                                      v_INTERLACE_DSP_EN(0) |
 910                                      v_WIN0_YRGB_DEFLICK_EN(0) |
 911                                      v_WIN0_CBR_DEFLICK_EN(0) |
 912                                      v_INTERLACE_FIELD_POL(0));
 913                 }
 914
 915         }
 916         spin_unlock(&lcdc_dev->reg_lock);
 917
 918         rk312x_lcdc_set_dclk(dev_drv);
 919         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 920                 dev_drv->trsm_ops->enable();
 921         if (screen->init)
 922                 screen->init();
 923
 924         return 0;
 925 }
 926
 927 static int rk312x_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
 928                             bool open)
 929 {
 930         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 931                                                     struct lcdc_device, driver);
 932
 933         /* enable clk,when first layer open */
 934         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
 935                 rockchip_set_system_status(SYS_STATUS_LCDC0);
 936                 rk312x_lcdc_pre_init(dev_drv);
 937 #if defined(CONFIG_ROCKCHIP_IOMMU)
 938                 if (dev_drv->iommu_enabled) {
 939                         if (!dev_drv->mmu_dev) {
 940                                 dev_drv->mmu_dev =
 941                                     rockchip_get_sysmmu_device_by_compatible
 942                                     (dev_drv->mmu_dts_name);
 943                                 if (dev_drv->mmu_dev)
 944                                         platform_set_sysmmu(dev_drv->mmu_dev,
 945                                                             dev_drv->dev);
 946                                 else {
 947                                         dev_err(dev_drv->dev,
 948                                                 "failed to get rockchip iommu device\n");
 949                                         return -1;
 950                                 }
 951                         }
 952                         iovmm_activate(dev_drv->dev);
 953                 }
 954 #endif
 955                 rk312x_lcdc_reg_restore(lcdc_dev);
 956                 if (dev_drv->iommu_enabled)
 957                         rk312x_lcdc_mmu_en(dev_drv);
 958                 if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
 959                         rk312x_lcdc_set_dclk(dev_drv);
 960                         rk312x_lcdc_enable_irq(dev_drv);
 961                 } else {
 962                         rk31xx_load_screen(dev_drv, 1);
 963                 }
 964
 965                 /* set screen lut */
 966                 if (dev_drv->cur_screen->dsp_lut)
 967                         rk312x_lcdc_set_lut(dev_drv);
 968         }
 969
 970         if (win_id < ARRAY_SIZE(lcdc_win))
 971                 lcdc_layer_enable(lcdc_dev, win_id, open);
 972         else
 973                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
 974
 975         /* when all layer closed,disable clk */
 976         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
 977                 rk312x_lcdc_disable_irq(lcdc_dev);
 978                 rk312x_lcdc_reg_update(dev_drv);
 979 #if defined(CONFIG_ROCKCHIP_IOMMU)
 980                 if (dev_drv->iommu_enabled) {
 981                         if (dev_drv->mmu_dev)
 982                                 iovmm_deactivate(dev_drv->dev);
 983                 }
 984 #endif
 985                 rk312x_lcdc_clk_disable(lcdc_dev);
 986                 rockchip_clear_system_status(SYS_STATUS_LCDC0);
 987         }
 988
 989         return 0;
 990 }
 991
 992 static int rk312x_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
 993 {
 994         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 995                                                     struct lcdc_device, driver);
 996         struct rk_screen *screen = dev_drv->cur_screen;
 997         struct rk_lcdc_win *win = NULL;
 998         char fmt[9] = "NULL";
 999
1000         if (!screen) {
1001                 dev_err(dev_drv->dev, "screen is null!\n");
1002                 return -ENOENT;
1003         }
1004
1005         if (win_id == 0) {
1006                 win = dev_drv->win[0];
1007         } else if (win_id == 1) {
1008                 win = dev_drv->win[1];
1009         } else {
1010                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
1011                 return -EINVAL;
1012         }
1013
1014         spin_lock(&lcdc_dev->reg_lock);
1015         win->area[0].dsp_stx = win->area[0].xpos + screen->mode.left_margin +
1016                                 screen->mode.hsync_len;
1017         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
1018                 win->area[0].ysize /= 2;
1019                 win->area[0].dsp_sty = win->area[0].ypos / 2 +
1020                                         screen->mode.upper_margin +
1021                                         screen->mode.vsync_len;
1022         } else {
1023                 win->area[0].dsp_sty = win->area[0].ypos +
1024                                         screen->mode.upper_margin +
1025                                         screen->mode.vsync_len;
1026         }
1027         win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
1028         win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
1029         switch (win->format) {
1030         case ARGB888:
1031                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1032                 win->swap_rb = 0;
1033                 break;
1034         case XBGR888:
1035                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1036                 win->swap_rb = 1;
1037                 break;
1038         case ABGR888:
1039                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1040                 win->swap_rb = 1;
1041                 break;
1042         case RGB888:
1043                 win->fmt_cfg = VOP_FORMAT_RGB888;
1044                 win->swap_rb = 0;
1045                 break;
1046         case RGB565:
1047                 win->fmt_cfg = VOP_FORMAT_RGB565;
1048                 win->swap_rb = 0;
1049                 break;
1050         case YUV444:
1051                 if (win_id == 0) {
1052                         win->fmt_cfg = VOP_FORMAT_YCBCR444;
1053                         win->scale_cbcr_x =
1054                             CalScale(win->area[0].xact, win->area[0].xsize);
1055                         win->scale_cbcr_y =
1056                             CalScale(win->area[0].yact, win->area[0].ysize);
1057                         win->swap_rb = 0;
1058                 } else {
1059                         dev_err(lcdc_dev->driver.dev,
1060                                 "%s:un supported format!\n", __func__);
1061                 }
1062                 break;
1063         case YUV422:
1064                 if (win_id == 0) {
1065                         win->fmt_cfg = VOP_FORMAT_YCBCR422;
1066                         win->scale_cbcr_x = CalScale((win->area[0].xact / 2),
1067                                                      win->area[0].xsize);
1068                         win->scale_cbcr_y =
1069                             CalScale(win->area[0].yact, win->area[0].ysize);
1070                         win->swap_rb = 0;
1071                 } else {
1072                         dev_err(lcdc_dev->driver.dev,
1073                                 "%s:un supported format!\n", __func__);
1074                 }
1075                 break;
1076         case YUV420:
1077                 if (win_id == 0) {
1078                         win->fmt_cfg = VOP_FORMAT_YCBCR420;
1079                         win->scale_cbcr_x =
1080                             CalScale(win->area[0].xact / 2, win->area[0].xsize);
1081                         win->scale_cbcr_y =
1082                             CalScale(win->area[0].yact / 2, win->area[0].ysize);
1083                         win->swap_rb = 0;
1084                 } else {
1085                         dev_err(lcdc_dev->driver.dev,
1086                                 "%s:un supported format!\n", __func__);
1087                 }
1088                 break;
1089         default:
1090                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
1091                         __func__);
1092                 break;
1093         }
1094         spin_unlock(&lcdc_dev->reg_lock);
1095
1096         DBG(1,
1097             "lcdc%d>>%s\n>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
1098             ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id, __func__,
1099             get_format_string(win->format, fmt), win->area[0].xact,
1100             win->area[0].yact, win->area[0].xsize, win->area[0].ysize,
1101             win->area[0].xvir, win->area[0].yvir, win->area[0].xpos,
1102             win->area[0].ypos);
1103         return 0;
1104 }
1105
1106 static int rk312x_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
1107 {
1108         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1109                                                     struct lcdc_device, driver);
1110         struct rk_lcdc_win *win = NULL;
1111         struct rk_screen *screen = dev_drv->cur_screen;
1112
1113         if (!screen) {
1114                 dev_err(dev_drv->dev, "screen is null!\n");
1115                 return -ENOENT;
1116         }
1117
1118         if (win_id == 0) {
1119                 win = dev_drv->win[0];
1120         } else if (win_id == 1) {
1121                 win = dev_drv->win[1];
1122         } else {
1123                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
1124                 return -EINVAL;
1125         }
1126
1127         spin_lock(&lcdc_dev->reg_lock);
1128         if (likely(lcdc_dev->clk_on)) {
1129                 win->area[0].y_addr =
1130                     win->area[0].smem_start + win->area[0].y_offset;
1131                 win->area[0].uv_addr =
1132                     win->area[0].cbr_start + win->area[0].c_offset;
1133                 if (win->area[0].y_addr)
1134                         lcdc_layer_update_regs(lcdc_dev, win);
1135                 /* lcdc_cfg_done(lcdc_dev); */
1136         }
1137         spin_unlock(&lcdc_dev->reg_lock);
1138
1139         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
1140             lcdc_dev->id, __func__, win->area[0].y_addr, win->area[0].uv_addr,
1141             win->area[0].y_offset);
1142         /* this is the first frame of the system,enable frame start interrupt */
1143         if ((dev_drv->first_frame)) {
1144                 dev_drv->first_frame = 0;
1145                 rk312x_lcdc_enable_irq(dev_drv);
1146
1147         }
1148
1149         return 0;
1150 }
1151
1152 static int rk312x_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
1153                              unsigned long arg, int win_id)
1154 {
1155         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1156                                                     struct lcdc_device, driver);
1157         u32 panel_size[2];
1158         void __user *argp = (void __user *)arg;
1159         struct color_key_cfg clr_key_cfg;
1160
1161         switch (cmd) {
1162         case RK_FBIOGET_PANEL_SIZE:
1163                 panel_size[0] = lcdc_dev->screen->mode.xres;
1164                 panel_size[1] = lcdc_dev->screen->mode.yres;
1165                 if (copy_to_user(argp, panel_size, 8))
1166                         return -EFAULT;
1167                 break;
1168         case RK_FBIOPUT_COLOR_KEY_CFG:
1169                 if (copy_from_user(&clr_key_cfg, argp,
1170                                    sizeof(struct color_key_cfg)))
1171                         return -EFAULT;
1172                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
1173                             clr_key_cfg.win0_color_key_cfg);
1174                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
1175                             clr_key_cfg.win1_color_key_cfg);
1176                 break;
1177
1178         default:
1179                 break;
1180         }
1181         return 0;
1182 }
1183
1184 static int rk312x_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
1185                                   const char *id)
1186 {
1187         int win_id = 0;
1188         mutex_lock(&dev_drv->fb_win_id_mutex);
1189         if (!strcmp(id, "fb0"))
1190                 win_id = dev_drv->fb0_win_id;
1191         else if (!strcmp(id, "fb1"))
1192                 win_id = dev_drv->fb1_win_id;
1193         else if (!strcmp(id, "fb2"))
1194                 win_id = dev_drv->fb2_win_id;
1195         mutex_unlock(&dev_drv->fb_win_id_mutex);
1196
1197         return win_id;
1198 }
1199
1200 static int rk312x_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
1201 {
1202         return 0;
1203 }
1204
1205 static int rk312x_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
1206                                bool set)
1207 {
1208         struct lcdc_device *lcdc_dev =
1209             container_of(dev_drv, struct lcdc_device, driver);
1210         int ovl;
1211         spin_lock(&lcdc_dev->reg_lock);
1212         if (lcdc_dev->clk_on) {
1213                 if (set) {
1214                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
1215                                      v_WIN0_TOP(swap));
1216                         ovl = swap;
1217                 } else {
1218                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1219                 }
1220         } else {
1221                 ovl = -EPERM;
1222         }
1223         spin_unlock(&lcdc_dev->reg_lock);
1224
1225         return ovl;
1226 }
1227
1228 static int rk312x_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
1229 {
1230
1231         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1232                                                     struct lcdc_device, driver);
1233         if (dev_drv->suspend_flag)
1234                 return 0;
1235         dev_drv->suspend_flag = 1;
1236         flush_kthread_worker(&dev_drv->update_regs_worker);
1237
1238         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
1239                 dev_drv->trsm_ops->disable();
1240         spin_lock(&lcdc_dev->reg_lock);
1241         if (likely(lcdc_dev->clk_on)) {
1242                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(1));
1243                 lcdc_msk_reg(lcdc_dev, INT_STATUS,
1244                              m_FS_INT_CLEAR | m_LF_INT_CLEAR,
1245                              v_FS_INT_CLEAR(1) | v_LF_INT_CLEAR(1));
1246                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1247                              v_DSP_OUT_ZERO(1));
1248                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1249                              v_LCDC_STANDBY(1));
1250                 lcdc_cfg_done(lcdc_dev);
1251 #if defined(CONFIG_ROCKCHIP_IOMMU)
1252                 if (dev_drv->iommu_enabled) {
1253                         if (dev_drv->mmu_dev)
1254                                 iovmm_deactivate(dev_drv->dev);
1255                 }
1256 #endif
1257                 spin_unlock(&lcdc_dev->reg_lock);
1258         } else {
1259                 spin_unlock(&lcdc_dev->reg_lock);
1260                 return 0;
1261         }
1262         rk312x_lcdc_clk_disable(lcdc_dev);
1263         rk_disp_pwr_disable(dev_drv);
1264         return 0;
1265 }
1266
1267 static int rk312x_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
1268 {
1269         struct lcdc_device *lcdc_dev =
1270             container_of(dev_drv, struct lcdc_device, driver);
1271
1272         if (!dev_drv->suspend_flag)
1273                 return 0;
1274         rk_disp_pwr_enable(dev_drv);
1275         dev_drv->suspend_flag = 0;
1276
1277         if (lcdc_dev->atv_layer_cnt) {
1278                 rk312x_lcdc_clk_enable(lcdc_dev);
1279                 rk312x_lcdc_reg_restore(lcdc_dev);
1280                 /* set screen lut */
1281                 if (dev_drv->cur_screen->dsp_lut)
1282                         rk312x_lcdc_set_lut(dev_drv);
1283
1284                 spin_lock(&lcdc_dev->reg_lock);
1285
1286                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1287                              v_DSP_OUT_ZERO(0));
1288                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1289                              v_LCDC_STANDBY(0));
1290                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(0));
1291                 lcdc_cfg_done(lcdc_dev);
1292
1293                 spin_unlock(&lcdc_dev->reg_lock);
1294         }
1295
1296         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1297                 dev_drv->trsm_ops->enable();
1298         return 0;
1299 }
1300
1301 static int rk312x_lcdc_blank(struct rk_lcdc_driver *dev_drv,
1302                              int win_id, int blank_mode)
1303 {
1304         switch (blank_mode) {
1305         case FB_BLANK_UNBLANK:
1306                 rk312x_lcdc_early_resume(dev_drv);
1307                 break;
1308         case FB_BLANK_NORMAL:
1309                 rk312x_lcdc_early_suspend(dev_drv);
1310                 break;
1311         default:
1312                 rk312x_lcdc_early_suspend(dev_drv);
1313                 break;
1314         }
1315
1316         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
1317
1318         return 0;
1319 }
1320
1321 static int rk312x_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
1322 {
1323         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1324                                                     struct lcdc_device, driver);
1325         spin_lock(&lcdc_dev->reg_lock);
1326         if (lcdc_dev->clk_on)
1327                 lcdc_cfg_done(lcdc_dev);
1328         spin_unlock(&lcdc_dev->reg_lock);
1329         return 0;
1330 }
1331
1332 /*
1333         a:[-30~0]:
1334             sin_hue = sin(a)*256 +0x100;
1335             cos_hue = cos(a)*256;
1336         a:[0~30]
1337             sin_hue = sin(a)*256;
1338             cos_hue = cos(a)*256;
1339 */
1340 static int rk312x_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1341                                     bcsh_hue_mode mode)
1342 {
1343
1344         struct lcdc_device *lcdc_dev =
1345             container_of(dev_drv, struct lcdc_device, driver);
1346         u32 val;
1347
1348         spin_lock(&lcdc_dev->reg_lock);
1349         if (lcdc_dev->clk_on) {
1350                 val = lcdc_readl(lcdc_dev, BCSH_H);
1351                 switch (mode) {
1352                 case H_SIN:
1353                         val &= m_BCSH_SIN_HUE;
1354                         break;
1355                 case H_COS:
1356                         val &= m_BCSH_COS_HUE;
1357                         val >>= 16;
1358                         break;
1359                 default:
1360                         break;
1361                 }
1362         }
1363         spin_unlock(&lcdc_dev->reg_lock);
1364
1365         return val;
1366 }
1367
1368 static int rk312x_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv, int sin_hue,
1369                                     int cos_hue)
1370 {
1371
1372         struct lcdc_device *lcdc_dev =
1373             container_of(dev_drv, struct lcdc_device, driver);
1374         u32 mask, val;
1375
1376         spin_lock(&lcdc_dev->reg_lock);
1377         if (lcdc_dev->clk_on) {
1378                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
1379                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
1380                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
1381                 lcdc_cfg_done(lcdc_dev);
1382         }
1383         spin_unlock(&lcdc_dev->reg_lock);
1384
1385         return 0;
1386 }
1387
1388 static int rk312x_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1389                                     bcsh_bcs_mode mode, int value)
1390 {
1391         struct lcdc_device *lcdc_dev =
1392             container_of(dev_drv, struct lcdc_device, driver);
1393         u32 mask, val;
1394
1395         spin_lock(&lcdc_dev->reg_lock);
1396         if (lcdc_dev->clk_on) {
1397                 switch (mode) {
1398                 case BRIGHTNESS:
1399                         /* from 0 to 255,typical is 128 */
1400                         if (value < 0x80)
1401                                 value += 0x80;
1402                         else if (value >= 0x80)
1403                                 value = value - 0x80;
1404                         mask = m_BCSH_BRIGHTNESS;
1405                         val = v_BCSH_BRIGHTNESS(value);
1406                         break;
1407                 case CONTRAST:
1408                         /* from 0 to 510,typical is 256 */
1409                         mask = m_BCSH_CONTRAST;
1410                         val = v_BCSH_CONTRAST(value);
1411                         break;
1412                 case SAT_CON:
1413                         /* from 0 to 1015,typical is 256 */
1414                         mask = m_BCSH_SAT_CON;
1415                         val = v_BCSH_SAT_CON(value);
1416                         break;
1417                 default:
1418                         break;
1419                 }
1420                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
1421                 lcdc_cfg_done(lcdc_dev);
1422         }
1423         spin_unlock(&lcdc_dev->reg_lock);
1424         return val;
1425 }
1426
1427 static int rk312x_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1428                                     bcsh_bcs_mode mode)
1429 {
1430         struct lcdc_device *lcdc_dev =
1431             container_of(dev_drv, struct lcdc_device, driver);
1432         u32 val;
1433
1434         spin_lock(&lcdc_dev->reg_lock);
1435         if (lcdc_dev->clk_on) {
1436                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1437                 switch (mode) {
1438                 case BRIGHTNESS:
1439                         val &= m_BCSH_BRIGHTNESS;
1440                         if (val > 0x80)
1441                                 val -= 0x80;
1442                         else
1443                                 val += 0x80;
1444                         break;
1445                 case CONTRAST:
1446                         val &= m_BCSH_CONTRAST;
1447                         val >>= 8;
1448                         break;
1449                 case SAT_CON:
1450                         val &= m_BCSH_SAT_CON;
1451                         val >>= 20;
1452                         break;
1453                 default:
1454                         break;
1455                 }
1456         }
1457         spin_unlock(&lcdc_dev->reg_lock);
1458         return val;
1459 }
1460
1461 static int rk312x_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1462 {
1463         struct lcdc_device *lcdc_dev =
1464             container_of(dev_drv, struct lcdc_device, driver);
1465         u32 mask, val;
1466
1467         spin_lock(&lcdc_dev->reg_lock);
1468         if (lcdc_dev->clk_on) {
1469                 if (open) {
1470                         lcdc_writel(lcdc_dev, BCSH_CTRL, 0x1);
1471                         lcdc_writel(lcdc_dev, BCSH_BCS, 0xd0010000);
1472                         lcdc_writel(lcdc_dev, BCSH_H, 0x01000000);
1473                 } else {
1474                         mask = m_BCSH_EN;
1475                         val = v_BCSH_EN(0);
1476                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1477                 }
1478                 lcdc_cfg_done(lcdc_dev);
1479         }
1480         spin_unlock(&lcdc_dev->reg_lock);
1481         return 0;
1482 }
1483
1484 static int rk312x_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1485                                enum fb_win_map_order order)
1486 {
1487         mutex_lock(&dev_drv->fb_win_id_mutex);
1488         if (order == FB_DEFAULT_ORDER)
1489                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;     /* FB0_WIN1_FB1_WIN0_FB2_WIN2; for box */
1490         dev_drv->fb2_win_id = order / 100;
1491         dev_drv->fb1_win_id = (order / 10) % 10;
1492         dev_drv->fb0_win_id = order % 10;
1493         mutex_unlock(&dev_drv->fb_win_id_mutex);
1494
1495         return 0;
1496 }
1497
1498 static int rk312x_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1499                                bool set)
1500 {
1501         struct lcdc_device *lcdc_dev =
1502             container_of(dev_drv, struct lcdc_device, driver);
1503         struct rk_screen *screen = dev_drv->cur_screen;
1504         u64 ft = 0;
1505         u32 dotclk;
1506         int ret;
1507         u32 pixclock;
1508         u32 x_total, y_total;
1509         if (set) {
1510                 ft = div_u64(1000000000000llu, fps);
1511                 x_total =
1512                     screen->mode.upper_margin + screen->mode.lower_margin +
1513                     screen->mode.yres + screen->mode.vsync_len;
1514                 y_total =
1515                     screen->mode.left_margin + screen->mode.right_margin +
1516                     screen->mode.xres + screen->mode.hsync_len;
1517                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1518                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1519                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1520         }
1521
1522         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1523         dev_drv->pixclock = lcdc_dev->pixclock = pixclock;
1524         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1525         screen->ft = 1000 / fps;        /*one frame time in ms */
1526
1527         if (set)
1528                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1529                          clk_get_rate(lcdc_dev->dclk), fps);
1530
1531         return fps;
1532 }
1533
1534 static int rk312x_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1535 {
1536         struct lcdc_device *lcdc_dev =
1537             container_of(dev_drv, struct lcdc_device, driver);
1538         u32 int_reg;
1539         int ret;
1540
1541         if (lcdc_dev->clk_on && (!dev_drv->suspend_flag)) {
1542                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1543                 if (int_reg & m_LF_INT_STA) {
1544                         dev_drv->frame_time.last_framedone_t =
1545                                         dev_drv->frame_time.framedone_t;
1546                         dev_drv->frame_time.framedone_t = cpu_clock(0);
1547                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1548                                      v_LF_INT_CLEAR(1));
1549                         ret = RK_LF_STATUS_FC;
1550                 } else
1551                         ret = RK_LF_STATUS_FR;
1552         } else {
1553                 ret = RK_LF_STATUS_NC;
1554         }
1555
1556         return ret;
1557 }
1558
1559 static int rk312x_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
1560                                     unsigned int *dsp_addr)
1561 {
1562         struct lcdc_device *lcdc_dev =
1563             container_of(dev_drv, struct lcdc_device, driver);
1564
1565         if (lcdc_dev->clk_on) {
1566                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1567                 if (lcdc_dev->soc_type == VOP_RK3036)
1568                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1569                 else if (lcdc_dev->soc_type == VOP_RK312X)
1570                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1571         }
1572         return 0;
1573 }
1574
1575 static ssize_t rk312x_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1576                                          char *buf, int win_id)
1577 {
1578         struct lcdc_device *lcdc_dev = container_of(dev_drv, struct lcdc_device,
1579                                                     driver);
1580         char format_w0[9] = "NULL";
1581         char format_w1[9] = "NULL";
1582         char status_w0[9] = "NULL";
1583         char status_w1[9] = "NULL";
1584         u32 fmt_id, act_info, dsp_info, dsp_st, factor;
1585         u16 xvir_w0, x_act_w0, y_act_w0, x_dsp_w0, y_dsp_w0, x_st_w0, y_st_w0;
1586         u16 xvir_w1, x_act_w1, y_act_w1, x_dsp_w1, y_dsp_w1, x_st_w1, y_st_w1;
1587         u16 x_factor, y_factor, x_scale, y_scale;
1588         u16 ovl;
1589         u32 win1_dsp_yaddr = 0;
1590
1591         spin_lock(&lcdc_dev->reg_lock);
1592         if (lcdc_dev->clk_on) {
1593                 /* data format */
1594                 fmt_id = lcdc_readl(lcdc_dev, SYS_CTRL);
1595                 get_format_string((fmt_id & m_WIN0_FORMAT) >> 3, format_w0);
1596                 get_format_string((fmt_id & m_WIN1_FORMAT) >> 6, format_w1);
1597
1598                 /* win status */
1599                 if (fmt_id & m_WIN0_EN)
1600                         strcpy(status_w0, "enabled");
1601                 else
1602                         strcpy(status_w0, "disabled");
1603
1604                 if ((fmt_id & m_WIN1_EN) >> 1)
1605                         strcpy(status_w1, "enabled");
1606                 else
1607                         strcpy(status_w1, "disabled");
1608
1609                 /* ovl */
1610                 ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1611
1612                 /* xvir */
1613                 xvir_w0 = lcdc_readl(lcdc_dev, WIN0_VIR) & m_YRGB_VIR;
1614                 xvir_w1 = lcdc_readl(lcdc_dev, WIN1_VIR) & m_YRGB_VIR;
1615
1616                 /* xact/yact */
1617                 act_info = lcdc_readl(lcdc_dev, WIN0_ACT_INFO);
1618                 x_act_w0 = (act_info & m_ACT_WIDTH) + 1;
1619                 y_act_w0 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1620
1621                 act_info = lcdc_readl(lcdc_dev, WIN1_ACT_INFO);
1622                 x_act_w1 = (act_info & m_ACT_WIDTH) + 1;
1623                 y_act_w1 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1624
1625                 /* xsize/ysize */
1626                 dsp_info = lcdc_readl(lcdc_dev, WIN0_DSP_INFO);
1627                 x_dsp_w0 = (dsp_info & m_DSP_WIDTH) + 1;
1628                 y_dsp_w0 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1629
1630                 dsp_info = lcdc_readl(lcdc_dev, WIN1_DSP_INFO);
1631                 x_dsp_w1 = (dsp_info & m_DSP_WIDTH) + 1;
1632                 y_dsp_w1 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1633
1634                 /* xpos/ypos */
1635                 dsp_st = lcdc_readl(lcdc_dev, WIN0_DSP_ST);
1636                 x_st_w0 = dsp_st & m_DSP_STX;
1637                 y_st_w0 = (dsp_st & m_DSP_STY) >> 16;
1638
1639                 if (lcdc_dev->soc_type == VOP_RK3036)
1640                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST);
1641                 else if (lcdc_dev->soc_type == VOP_RK312X)
1642                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST_RK312X);
1643
1644                 x_st_w1 = dsp_st & m_DSP_STX;
1645                 y_st_w1 = (dsp_st & m_DSP_STY) >> 16;
1646
1647                 /* scale factor */
1648                 factor = lcdc_readl(lcdc_dev, WIN0_SCL_FACTOR_YRGB);
1649                 x_factor = factor & m_X_SCL_FACTOR;
1650                 y_factor = (factor & m_Y_SCL_FACTOR) >> 16;
1651                 x_scale = 4096 * 100 / x_factor;
1652                 y_scale = 4096 * 100 / y_factor;
1653
1654                 /* dsp addr */
1655                 if (lcdc_dev->soc_type == VOP_RK3036)
1656                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST);
1657                 else if (lcdc_dev->soc_type == VOP_RK312X)
1658                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1659         } else {
1660                 spin_unlock(&lcdc_dev->reg_lock);
1661                 return -EPERM;
1662         }
1663         spin_unlock(&lcdc_dev->reg_lock);
1664         return snprintf(buf, PAGE_SIZE,
1665                         "win0:%s\n"
1666                         "xvir:%d\n"
1667                         "xact:%d\n"
1668                         "yact:%d\n"
1669                         "xdsp:%d\n"
1670                         "ydsp:%d\n"
1671                         "x_st:%d\n"
1672                         "y_st:%d\n"
1673                         "x_scale:%d.%d\n"
1674                         "y_scale:%d.%d\n"
1675                         "format:%s\n"
1676                         "YRGB buffer addr:0x%08x\n"
1677                         "CBR buffer addr:0x%08x\n\n"
1678                         "win1:%s\n"
1679                         "xvir:%d\n"
1680                         "xact:%d\n"
1681                         "yact:%d\n"
1682                         "xdsp:%d\n"
1683                         "ydsp:%d\n"
1684                         "x_st:%d\n"
1685                         "y_st:%d\n"
1686                         "format:%s\n"
1687                         "YRGB buffer addr:0x%08x\n"
1688                         "overlay:%s\n",
1689                         status_w0,
1690                         xvir_w0,
1691                         x_act_w0,
1692                         y_act_w0,
1693                         x_dsp_w0,
1694                         y_dsp_w0,
1695                         x_st_w0,
1696                         y_st_w0,
1697                         x_scale / 100,
1698                         x_scale % 100,
1699                         y_scale / 100,
1700                         y_scale % 100,
1701                         format_w0,
1702                         lcdc_readl(lcdc_dev, WIN0_YRGB_MST),
1703                         lcdc_readl(lcdc_dev, WIN0_CBR_MST),
1704                         status_w1,
1705                         xvir_w1,
1706                         x_act_w1,
1707                         y_act_w1,
1708                         x_dsp_w1,
1709                         y_dsp_w1,
1710                         x_st_w1,
1711                         y_st_w1,
1712                         format_w1,
1713                         win1_dsp_yaddr,
1714                         ovl ? "win0 on the top of win1\n" :
1715                         "win1 on the top of win0\n");
1716 }
1717
1718 static int rk312x_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1719 {
1720         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1721                                                     struct lcdc_device,
1722                                                     driver);
1723         int *cbase = (int *)lcdc_dev->regs;
1724         int *regsbak = (int *)lcdc_dev->regsbak;
1725         int i, j;
1726
1727         printk("back up reg:\n");
1728         for (i = 0; i <= (0xDC >> 4); i++) {
1729                 for (j = 0; j < 4; j++)
1730                         printk("%08x  ", *(regsbak + i * 4 + j));
1731                 printk("\n");
1732         }
1733
1734         printk("lcdc reg:\n");
1735         for (i = 0; i <= (0xDC >> 4); i++) {
1736                 for (j = 0; j < 4; j++)
1737                         printk("%08x  ", readl_relaxed(cbase + i * 4 + j));
1738                 printk("\n");
1739         }
1740         return 0;
1741 }
1742
1743 static int rk312x_lcdc_dpi_open(struct rk_lcdc_driver *dev_drv, bool open)
1744 {
1745         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1746                                                     struct lcdc_device, driver);
1747         if (lcdc_dev->soc_type == VOP_RK312X) {
1748                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN,
1749                              v_DIRECT_PATH_EN(open));
1750                 lcdc_cfg_done(lcdc_dev);
1751         }
1752         return 0;
1753 }
1754
1755 static int rk312x_lcdc_dpi_win_sel(struct rk_lcdc_driver *dev_drv, int win_id)
1756 {
1757         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1758                                                     struct lcdc_device, driver);
1759
1760         if (lcdc_dev->soc_type == VOP_RK312X) {
1761                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_LAYER,
1762                              v_DIRECT_PATH_LAYER(win_id));
1763                 lcdc_cfg_done(lcdc_dev);
1764         }
1765         return 0;
1766
1767 }
1768
1769 static int rk312x_lcdc_dpi_status(struct rk_lcdc_driver *dev_drv)
1770 {
1771         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1772                                                     struct lcdc_device, driver);
1773         int ovl = 0;
1774
1775         if (lcdc_dev->soc_type == VOP_RK312X)
1776                 ovl = lcdc_read_bit(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN);
1777
1778         return ovl;
1779 }
1780
1781 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1782         .open = rk312x_lcdc_open,
1783         .load_screen = rk312x_load_screen,
1784         .set_par = rk312x_lcdc_set_par,
1785         .pan_display = rk312x_lcdc_pan_display,
1786         .blank = rk312x_lcdc_blank,
1787         .ioctl = rk312x_lcdc_ioctl,
1788         .get_win_state = rk312x_lcdc_get_win_state,
1789         .ovl_mgr = rk312x_lcdc_ovl_mgr,
1790         .get_disp_info = rk312x_lcdc_get_disp_info,
1791         .fps_mgr = rk312x_lcdc_fps_mgr,
1792         .fb_get_win_id = rk312x_lcdc_get_win_id,
1793         .fb_win_remap = rk312x_fb_win_remap,
1794         .poll_vblank = rk312x_lcdc_poll_vblank,
1795         .get_dsp_addr = rk312x_lcdc_get_dsp_addr,
1796         .cfg_done = rk312x_lcdc_cfg_done,
1797         .dump_reg = rk312x_lcdc_reg_dump,
1798         .dpi_open = rk312x_lcdc_dpi_open,
1799         .dpi_win_sel = rk312x_lcdc_dpi_win_sel,
1800         .dpi_status = rk312x_lcdc_dpi_status,
1801         .set_dsp_bcsh_hue = rk312x_lcdc_set_bcsh_hue,
1802         .set_dsp_bcsh_bcs = rk312x_lcdc_set_bcsh_bcs,
1803         .get_dsp_bcsh_hue = rk312x_lcdc_get_bcsh_hue,
1804         .get_dsp_bcsh_bcs = rk312x_lcdc_get_bcsh_bcs,
1805         .open_bcsh = rk312x_lcdc_open_bcsh,
1806         .set_screen_scaler = rk312x_lcdc_set_scaler;
1807 };
1808
1809 static const struct rk_lcdc_drvdata rk3036_lcdc_drvdata = {
1810         .soc_type = VOP_RK3036,
1811 };
1812
1813 static const struct rk_lcdc_drvdata rk312x_lcdc_drvdata = {
1814         .soc_type = VOP_RK312X,
1815 };
1816
1817 #if defined(CONFIG_OF)
1818 static const struct of_device_id rk312x_lcdc_dt_ids[] = {
1819         {
1820                 .compatible = "rockchip,rk3036-lcdc",
1821                 .data = (void *)&rk3036_lcdc_drvdata,
1822         },
1823         {
1824                 .compatible = "rockchip,rk312x-lcdc",
1825                 .data = (void *)&rk312x_lcdc_drvdata,
1826         },
1827 };
1828 #endif
1829
1830 static int rk312x_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1831 {
1832         struct device_node *np = lcdc_dev->dev->of_node;
1833         const struct of_device_id *match;
1834         const struct rk_lcdc_drvdata *lcdc_drvdata;
1835
1836 #if defined(CONFIG_ROCKCHIP_IOMMU)
1837         int val;
1838         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1839                 lcdc_dev->driver.iommu_enabled = 0;
1840         else
1841                 lcdc_dev->driver.iommu_enabled = val;
1842 #else
1843         lcdc_dev->driver.iommu_enabled = 0;
1844 #endif
1845         match = of_match_node(rk312x_lcdc_dt_ids, np);
1846         if (match) {
1847                 lcdc_drvdata = (const struct rk_lcdc_drvdata *)match->data;
1848                 lcdc_dev->soc_type = lcdc_drvdata->soc_type;
1849         } else {
1850                 return PTR_ERR(match);
1851         }
1852
1853         return 0;
1854 }
1855
1856 static int rk312x_lcdc_probe(struct platform_device *pdev)
1857 {
1858         struct lcdc_device *lcdc_dev = NULL;
1859         struct rk_lcdc_driver *dev_drv;
1860         struct device *dev = &pdev->dev;
1861         struct resource *res;
1862         int ret;
1863
1864         lcdc_dev = devm_kzalloc(dev, sizeof(struct lcdc_device), GFP_KERNEL);
1865         if (!lcdc_dev) {
1866                 dev_err(&pdev->dev, "rk312x lcdc device kzalloc fail!\n");
1867                 return -ENOMEM;
1868         }
1869         platform_set_drvdata(pdev, lcdc_dev);
1870         lcdc_dev->dev = dev;
1871         if (rk312x_lcdc_parse_dt(lcdc_dev)) {
1872                 dev_err(lcdc_dev->dev, "rk312x lcdc parse dt failed!\n");
1873                 goto err_parse_dt;
1874         }
1875
1876         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1877         lcdc_dev->reg_phy_base = res->start;
1878         lcdc_dev->len = resource_size(res);
1879         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1880         if (IS_ERR(lcdc_dev->regs)) {
1881                 ret = PTR_ERR(lcdc_dev->regs);
1882                 goto err_remap_reg;
1883         }
1884
1885         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1886         if (IS_ERR(lcdc_dev->regsbak)) {
1887                 dev_err(&pdev->dev, "rk312x lcdc device kmalloc fail!\n");
1888                 ret = PTR_ERR(lcdc_dev->regsbak);
1889                 goto err_remap_reg;
1890         }
1891
1892         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1893         dev_drv = &lcdc_dev->driver;
1894         dev_drv->dev = dev;
1895         dev_drv->prop = PRMRY;
1896         dev_drv->id = lcdc_dev->id;
1897         dev_drv->ops = &lcdc_drv_ops;
1898         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1899         spin_lock_init(&lcdc_dev->reg_lock);
1900
1901         lcdc_dev->irq = platform_get_irq(pdev, 0);
1902         if (lcdc_dev->irq < 0) {
1903                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1904                         lcdc_dev->id);
1905                 ret = -ENXIO;
1906                 goto err_request_irq;
1907         }
1908
1909         ret = devm_request_irq(dev, lcdc_dev->irq, rk312x_lcdc_isr,
1910                                IRQF_DISABLED, dev_name(dev), lcdc_dev);
1911         if (ret) {
1912                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1913                         lcdc_dev->irq, ret);
1914                 goto err_request_irq;
1915         }
1916
1917         if (dev_drv->iommu_enabled)
1918                 strcpy(dev_drv->mmu_dts_name, "iommu,vop_mmu");
1919
1920         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1921         if (ret < 0) {
1922                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1923                 goto err_register_fb;
1924         }
1925         lcdc_dev->screen = dev_drv->screen0;
1926
1927         dev_info(dev, "lcdc%d probe ok, iommu %s\n",
1928                  lcdc_dev->id, dev_drv->iommu_enabled ? "enabled" : "disabled");
1929         return 0;
1930
1931 err_register_fb:
1932 err_request_irq:
1933         devm_kfree(lcdc_dev->dev, lcdc_dev->regsbak);
1934 err_remap_reg:
1935 err_parse_dt:
1936         devm_kfree(&pdev->dev, lcdc_dev);
1937         return ret;
1938 }
1939
1940 #if defined(CONFIG_PM)
1941 static int rk312x_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
1942 {
1943         return 0;
1944 }
1945
1946 static int rk312x_lcdc_resume(struct platform_device *pdev)
1947 {
1948         return 0;
1949 }
1950 #else
1951 #define rk312x_lcdc_suspend NULL
1952 #define rk312x_lcdc_resume  NULL
1953 #endif
1954
1955 static int rk312x_lcdc_remove(struct platform_device *pdev)
1956 {
1957         return 0;
1958 }
1959
1960 static void rk312x_lcdc_shutdown(struct platform_device *pdev)
1961 {
1962         struct lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
1963
1964         rk312x_lcdc_deinit(lcdc_dev);
1965         rk312x_lcdc_clk_disable(lcdc_dev);
1966         rk_disp_pwr_disable(&lcdc_dev->driver);
1967 }
1968
1969 static struct platform_driver rk312x_lcdc_driver = {
1970         .probe = rk312x_lcdc_probe,
1971         .remove = rk312x_lcdc_remove,
1972         .driver = {
1973                    .name = "rk312x-lcdc",
1974                    .owner = THIS_MODULE,
1975                    .of_match_table = of_match_ptr(rk312x_lcdc_dt_ids),
1976                    },
1977         .suspend = rk312x_lcdc_suspend,
1978         .resume = rk312x_lcdc_resume,
1979         .shutdown = rk312x_lcdc_shutdown,
1980 };
1981
1982 static int __init rk312x_lcdc_module_init(void)
1983 {
1984         return platform_driver_register(&rk312x_lcdc_driver);
1985 }
1986
1987 static void __exit rk312x_lcdc_module_exit(void)
1988 {
1989         platform_driver_unregister(&rk312x_lcdc_driver);
1990 }
1991
1992 fs_initcall(rk312x_lcdc_module_init);
1993 module_exit(rk312x_lcdc_module_exit);