drivers/video/rockchip/lcdc/rk312x_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk312x_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:      zhuangwenlong<zwl@rock-chips.com>
   6  *              zhengyang<zhengyang@rock-chips.com>
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/slab.h>
  24 #include <linux/device.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/clk.h>
  30 #include <asm/div64.h>
  31 #include <asm/uaccess.h>
  32 #include <linux/rockchip/cpu.h>
  33 #include <linux/rockchip/iomap.h>
  34 #include <linux/rockchip/grf.h>
  35 #include <linux/rockchip/common.h>
  36 #include <dt-bindings/clock/rk_system_status.h>
  37 #include <linux/rockchip-iovmm.h>
  38 #include "rk312x_lcdc.h"
  39
  40 static int dbg_thresd;
  41 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  42
  43 #define DBG(level, x...) do {                   \
  44         if (unlikely(dbg_thresd >= level))      \
  45                 printk(KERN_INFO x); } while (0)
  46
  47 static struct rk_lcdc_win lcdc_win[] = {
  48         [0] = {
  49                .name = "win0",
  50                .id = 0,
  51                .support_3d = false,
  52                },
  53         [1] = {
  54                .name = "win1",
  55                .id = 1,
  56                .support_3d = false,
  57                },
  58         [2] = {
  59                .name = "hwc",
  60                .id = 2,
  61                .support_3d = false,
  62                },
  63 };
  64
  65 static irqreturn_t rk312x_lcdc_isr(int irq, void *dev_id)
  66 {
  67         struct lcdc_device *lcdc_dev = (struct lcdc_device *)dev_id;
  68         ktime_t timestamp = ktime_get();
  69         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  70
  71         if (int_reg & m_FS_INT_STA) {
  72                 timestamp = ktime_get();
  73                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  74                              v_FS_INT_CLEAR(1));
  75                 //if (lcdc_dev->driver.wait_fs) {
  76                 if (0) {
  77                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  78                         complete(&(lcdc_dev->driver.frame_done));
  79                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  80                 }
  81                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  82                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  83
  84         } else if (int_reg & m_LF_INT_STA) {
  85                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  86                              v_LF_INT_CLEAR(1));
  87         }
  88         return IRQ_HANDLED;
  89 }
  90
  91 static int rk312x_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
  92 {
  93 #ifdef CONFIG_RK_FPGA
  94         lcdc_dev->clk_on = 1;
  95         return 0;
  96 #endif
  97         if (!lcdc_dev->clk_on) {
  98                 clk_prepare_enable(lcdc_dev->hclk);
  99                 clk_prepare_enable(lcdc_dev->dclk);
 100                 clk_prepare_enable(lcdc_dev->aclk);
 101 //              clk_prepare_enable(lcdc_dev->pd);
 102                 spin_lock(&lcdc_dev->reg_lock);
 103                 lcdc_dev->clk_on = 1;
 104                 spin_unlock(&lcdc_dev->reg_lock);
 105         }
 106
 107         return 0;
 108 }
 109
 110 static int rk312x_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 111 {
 112 #ifdef CONFIG_RK_FPGA
 113         lcdc_dev->clk_on = 0;
 114         return 0;
 115 #endif
 116         if (lcdc_dev->clk_on) {
 117                 spin_lock(&lcdc_dev->reg_lock);
 118                 lcdc_dev->clk_on = 0;
 119                 spin_unlock(&lcdc_dev->reg_lock);
 120                 mdelay(25);
 121                 clk_disable_unprepare(lcdc_dev->dclk);
 122                 clk_disable_unprepare(lcdc_dev->hclk);
 123                 clk_disable_unprepare(lcdc_dev->aclk);
 124 //              clk_disable_unprepare(lcdc_dev->pd);
 125         }
 126
 127         return 0;
 128 }
 129
 130 static int rk312x_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 131 {
 132         u32 mask, val;
 133         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 134                                                     struct lcdc_device, driver);
 135         struct rk_screen *screen = dev_drv->cur_screen;
 136
 137         spin_lock(&lcdc_dev->reg_lock);
 138         if (likely(lcdc_dev->clk_on)) {
 139                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 140                         m_LF_INT_CLEAR | m_LF_INT_EN | m_LF_INT_NUM |
 141                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 142                 val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1) |
 143                         v_LF_INT_CLEAR(1) | v_LF_INT_EN(1) |
 144                         v_BUS_ERR_INT_CLEAR(1) | v_BUS_ERR_INT_EN(0) |
 145                         v_LF_INT_NUM(screen->mode.vsync_len +
 146                                      screen->mode.upper_margin +
 147                                      screen->mode.yres);
 148                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 149                 spin_unlock(&lcdc_dev->reg_lock);
 150         } else {
 151                 spin_unlock(&lcdc_dev->reg_lock);
 152         }
 153         return 0;
 154 }
 155
 156 static int rk312x_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 157 {
 158         u32 mask, val;
 159
 160         spin_lock(&lcdc_dev->reg_lock);
 161         if (likely(lcdc_dev->clk_on)) {
 162                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 163                         m_LF_INT_CLEAR | m_LF_INT_EN |
 164                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 165                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 166                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 167                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 168                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 169                 spin_unlock(&lcdc_dev->reg_lock);
 170         } else {
 171                 spin_unlock(&lcdc_dev->reg_lock);
 172         }
 173         mdelay(1);
 174         return 0;
 175 }
 176
 177 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device *lcdc_dev)
 178 {
 179         int reg = 0;
 180         u32 value = 0;
 181
 182         spin_lock(&lcdc_dev->reg_lock);
 183         for (reg = 0; reg < 0xdc; reg += 4) {
 184                 value = lcdc_readl(lcdc_dev, reg);
 185         }
 186         spin_unlock(&lcdc_dev->reg_lock);
 187 }
 188
 189 static int rk312x_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 190 {
 191         int win0_top = 0;
 192         u32 mask, val;
 193         enum data_format win0_format = lcdc_dev->driver.win[0]->format;
 194         enum data_format win1_format = lcdc_dev->driver.win[1]->format;
 195
 196         int win0_alpha_en = ((win0_format == ARGB888)
 197                              || (win0_format == ABGR888)) ? 1 : 0;
 198         int win1_alpha_en = ((win1_format == ARGB888)
 199                              || (win1_format == ABGR888)) ? 1 : 0;
 200         u32 *_pv = (u32 *) lcdc_dev->regsbak;
 201
 202         _pv += (DSP_CTRL0 >> 2);
 203         win0_top = ((*_pv) & (m_WIN0_TOP)) >> 8;
 204         if (win0_top && (lcdc_dev->atv_layer_cnt >= 2) && (win0_alpha_en)) {
 205                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 206                 val = v_WIN0_ALPHA_EN(1) | v_WIN1_ALPHA_EN(0);
 207                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 208
 209                 mask = m_WIN0_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 210                 val = v_WIN0_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 211                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 212         } else if ((!win0_top) && (lcdc_dev->atv_layer_cnt >= 2)
 213                    && (win1_alpha_en)) {
 214                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 215                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(1);
 216                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 217
 218                 mask = m_WIN1_ALPHA_MODE | m_ALPHA_MODE_SEL0 | m_ALPHA_MODE_SEL1;
 219                 val = v_WIN1_ALPHA_MODE(1) | v_ALPHA_MODE_SEL0(1) | v_ALPHA_MODE_SEL1(0);
 220                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 221         } else {
 222                 mask = m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 223                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(0);
 224                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 225         }
 226
 227         return 0;
 228 }
 229
 230 static void lcdc_layer_csc_mode(struct lcdc_device *lcdc_dev,
 231                                       struct rk_lcdc_win *win)
 232 {
 233         struct rk_screen *screen = lcdc_dev->driver.cur_screen;
 234
 235         if (lcdc_dev->overlay_mode == VOP_YUV_DOMAIN) {
 236                 switch (win->fmt_cfg) {
 237                 case VOP_FORMAT_ARGB888:
 238                 case VOP_FORMAT_RGB888:
 239                 case VOP_FORMAT_RGB565:
 240                         if ((screen->mode.xres < 1280 ) &&
 241                             (screen->mode.yres < 720)) {
 242                                 win->csc_mode = VOP_R2Y_CSC_BT601;
 243                         } else {
 244                                 win->csc_mode = VOP_R2Y_CSC_BT709;
 245                         }
 246                         break;
 247                 default:
 248                         break;
 249                 }
 250                 if (win->id  == 0) {
 251                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_CSC_MODE,
 252                                      v_WIN0_CSC_MODE(win->csc_mode));
 253                 } else if (win->id  == 1) {
 254                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN1_CSC_MODE,
 255                                      v_WIN1_CSC_MODE(win->csc_mode));
 256                 }
 257         } else if (lcdc_dev->overlay_mode == VOP_RGB_DOMAIN) {
 258                 switch (win->fmt_cfg) {
 259                 case VOP_FORMAT_YCBCR420:
 260                         if (win->id  == 0) {
 261                                 win->csc_mode = VOP_Y2R_CSC_MPEG;
 262                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_CSC_MODE,
 263                                              v_WIN0_CSC_MODE(win->csc_mode));
 264                         }
 265                         break;
 266                 default:
 267                         break;
 268                 }
 269         }
 270
 271 }
 272
 273
 274 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
 275                                    struct rk_lcdc_win *win)
 276 {
 277         u32 mask, val;
 278
 279         if (win->state == 1) {
 280                 if (lcdc_dev->soc_type == VOP_RK312X)
 281                         lcdc_layer_csc_mode(lcdc_dev,win);
 282
 283                 if (win->id == 0) {
 284                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 285                         val = v_WIN0_EN(win->state) |
 286                                 v_WIN0_FORMAT(win->fmt_cfg) |
 287                                 v_WIN0_RB_SWAP(win->swap_rb);
 288                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 289
 290                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 291                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 292                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 293                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 294                                     v_X_SCL_FACTOR(win->scale_cbcr_x) |
 295                                     v_Y_SCL_FACTOR(win->scale_cbcr_y));
 296
 297                         lcdc_msk_reg(lcdc_dev, WIN0_VIR,
 298                                      m_YRGB_VIR | m_CBBR_VIR,
 299                                      v_YRGB_VIR(win->area[0].y_vir_stride) |
 300                                      v_CBCR_VIR(win->area[0].uv_vir_stride));
 301                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO,
 302                                     v_ACT_WIDTH(win->area[0].xact) |
 303                                     v_ACT_HEIGHT(win->area[0].yact));
 304                         lcdc_writel(lcdc_dev, WIN0_DSP_ST,
 305                                     v_DSP_STX(win->area[0].dsp_stx) |
 306                                     v_DSP_STY(win->area[0].dsp_sty));
 307                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO,
 308                                     v_DSP_WIDTH(win->area[0].xsize) |
 309                                     v_DSP_HEIGHT(win->area[0].ysize));
 310
 311                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST,
 312                                     win->area[0].y_addr);
 313                         lcdc_writel(lcdc_dev, WIN0_CBR_MST,
 314                                     win->area[0].uv_addr);
 315                 } else if (win->id == 1) {
 316                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 317                         val = v_WIN1_EN(win->state) |
 318                                 v_WIN1_FORMAT(win->fmt_cfg) |
 319                                 v_WIN1_RB_SWAP(win->swap_rb);
 320                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 321
 322                         /* rk312x unsupport win1 scale */
 323                         if (lcdc_dev->soc_type == VOP_RK3036) {
 324                                 lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 325                                         v_X_SCL_FACTOR(win->scale_yrgb_x) |
 326                                         v_Y_SCL_FACTOR(win->scale_yrgb_y));
 327                                 lcdc_writel(lcdc_dev, WIN1_ACT_INFO,
 328                                             v_ACT_WIDTH(win->area[0].xact) |
 329                                             v_ACT_HEIGHT(win->area[0].yact));
 330                                 lcdc_writel(lcdc_dev, WIN1_DSP_INFO,
 331                                             v_DSP_WIDTH(win->area[0].xsize) |
 332                                             v_DSP_HEIGHT(win->area[0].ysize));
 333                                 lcdc_writel(lcdc_dev, WIN1_DSP_ST,
 334                                             v_DSP_STX(win->area[0].dsp_stx) |
 335                                             v_DSP_STY(win->area[0].dsp_sty));
 336                                 lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 337                         } else {
 338                                 lcdc_writel(lcdc_dev, WIN1_DSP_INFO_RK312X,
 339                                             v_DSP_WIDTH(win->area[0].xsize) |
 340                                             v_DSP_HEIGHT(win->area[0].ysize));
 341                                 lcdc_writel(lcdc_dev, WIN1_DSP_ST_RK312X,
 342                                             v_DSP_STX(win->area[0].dsp_stx) |
 343                                             v_DSP_STY(win->area[0].dsp_sty));
 344
 345                                 lcdc_writel(lcdc_dev, WIN1_MST_RK312X, win->area[0].y_addr);
 346                         }
 347
 348                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR,
 349                                      v_YRGB_VIR(win->area[0].y_vir_stride));
 350
 351
 352                 } else if (win->id == 2) {
 353                 }
 354         } else {
 355                 win->area[0].y_addr = 0;
 356                 win->area[0].uv_addr = 0;
 357                 if (win->id == 0)
 358                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN0_EN,
 359                                      v_WIN0_EN(0));
 360                 else if (win->id == 1)
 361                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_WIN1_EN,
 362                                      v_WIN1_EN(0));
 363                 else if (win->id == 2)
 364                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 365         }
 366         rk312x_lcdc_alpha_cfg(lcdc_dev);
 367 }
 368
 369 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev, unsigned int win_id,
 370                               bool open)
 371 {
 372         spin_lock(&lcdc_dev->reg_lock);
 373         if (likely(lcdc_dev->clk_on)
 374             && lcdc_dev->driver.win[win_id]->state != open) {
 375                 if (open) {
 376                         if (!lcdc_dev->atv_layer_cnt) {
 377                                 dev_info(lcdc_dev->dev,
 378                                          "wakeup from standby!\n");
 379                                 lcdc_dev->standby = 0;
 380                         }
 381                         lcdc_dev->atv_layer_cnt++;
 382                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 383                         lcdc_dev->atv_layer_cnt--;
 384                 }
 385                 lcdc_dev->driver.win[win_id]->state = open;
 386                 if (!open) {
 387                         lcdc_layer_update_regs(lcdc_dev,
 388                                                lcdc_dev->driver.win[win_id]);
 389                         lcdc_cfg_done(lcdc_dev);
 390                 }
 391                 /*if no layer used,disable lcdc */
 392                 if (!lcdc_dev->atv_layer_cnt) {
 393                         dev_info(lcdc_dev->dev,
 394                                  "no layer is used,go to standby!\n");
 395                         lcdc_dev->standby = 1;
 396                 }
 397         }
 398         spin_unlock(&lcdc_dev->reg_lock);
 399 }
 400
 401 static int rk312x_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 402 {
 403         struct lcdc_device *lcdc_dev =
 404             container_of(dev_drv, struct lcdc_device, driver);
 405         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 406         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 407         int timeout;
 408         unsigned long flags;
 409         spin_lock(&lcdc_dev->reg_lock);
 410         if (likely(lcdc_dev->clk_on)) {
 411                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 412                              v_LCDC_STANDBY(lcdc_dev->standby));
 413                 lcdc_layer_update_regs(lcdc_dev, win0);
 414                 lcdc_layer_update_regs(lcdc_dev, win1);
 415                 rk312x_lcdc_alpha_cfg(lcdc_dev);
 416                 lcdc_cfg_done(lcdc_dev);
 417
 418         }
 419         spin_unlock(&lcdc_dev->reg_lock);
 420         //if (dev_drv->wait_fs) {
 421         if (0) {
 422                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 423                 init_completion(&dev_drv->frame_done);
 424                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 425                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 426                                                       msecs_to_jiffies
 427                                                       (dev_drv->cur_screen->ft +
 428                                                        5));
 429                 if (!timeout && (!dev_drv->frame_done.done)) {
 430                         dev_warn(lcdc_dev->dev,
 431                                  "wait for new frame start time out!\n");
 432                         return -ETIMEDOUT;
 433                 }
 434         }
 435         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 436         return 0;
 437
 438 }
 439
 440 static void rk312x_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 441 {
 442         memcpy((u8 *) lcdc_dev->regs, (u8 *) lcdc_dev->regsbak, 0xdc);
 443 }
 444
 445 static void rk312x_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 446 {
 447         u32 mask, val;
 448         struct lcdc_device *lcdc_dev =
 449             container_of(dev_drv, struct lcdc_device, driver);
 450
 451         spin_lock(&lcdc_dev->reg_lock);
 452         if (likely(lcdc_dev->clk_on)) {
 453                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
 454                         m_AXI_OUTSTANDING_MAX_NUM;
 455                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) |
 456                         v_AXI_MAX_OUTSTANDING_EN(1);
 457                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 458         }
 459         spin_unlock(&lcdc_dev->reg_lock);
 460 }
 461
 462 static int rk312x_lcdc_set_lut(struct rk_lcdc_driver *dev_drv)
 463 {
 464         int i = 0;
 465         int __iomem *c;
 466         int v;
 467         struct lcdc_device *lcdc_dev =
 468                 container_of(dev_drv, struct lcdc_device, driver);
 469
 470         spin_lock(&lcdc_dev->reg_lock);
 471         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(0));
 472         lcdc_cfg_done(lcdc_dev);
 473         mdelay(25);
 474         for (i = 0; i < 256; i++) {
 475                 v = dev_drv->cur_screen->dsp_lut[i];
 476                 c = lcdc_dev->dsp_lut_addr_base + i;
 477                 writel_relaxed(v, c);
 478
 479         }
 480         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DSP_LUT_EN, v_DSP_LUT_EN(1));
 481         lcdc_cfg_done(lcdc_dev);
 482         spin_unlock(&lcdc_dev->reg_lock);
 483         return 0;
 484
 485 }
 486
 487 static int rk312x_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 488 {
 489 #ifdef CONFIG_RK_FPGA
 490         return 0;
 491 #endif
 492         int ret, fps;
 493         struct lcdc_device *lcdc_dev =
 494             container_of(dev_drv, struct lcdc_device, driver);
 495         struct rk_screen *screen = dev_drv->cur_screen;
 496
 497         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 498         if (ret)
 499                 dev_err(dev_drv->dev, "set lcdc%d dclk failed\n", lcdc_dev->id);
 500         lcdc_dev->pixclock =
 501             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 502         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 503
 504         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 505         screen->ft = 1000 / fps;
 506         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 507                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 508         return 0;
 509
 510 }
 511
 512 /********do basic init*********/
 513 static int rk312x_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 514 {
 515         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 516                                                     struct lcdc_device, driver);
 517         if (lcdc_dev->pre_init)
 518                 return 0;
 519
 520         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 521         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 522         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 523         lcdc_dev->sclk = devm_clk_get(lcdc_dev->dev, "sclk_lcdc");
 524 //      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
 525
 526         if ( /*IS_ERR(lcdc_dev->pd) || */ (IS_ERR(lcdc_dev->aclk)) ||
 527             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 528                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 529                         lcdc_dev->id);
 530         }
 531
 532         rk_disp_pwr_enable(dev_drv);
 533         rk312x_lcdc_clk_enable(lcdc_dev);
 534
 535         /* backup reg config at uboot */
 536         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 537
 538         /* config for the FRC mode of dither down */
 539         lcdc_writel(lcdc_dev, FRC_LOWER01_0, 0x12844821);
 540         lcdc_writel(lcdc_dev, FRC_LOWER01_1, 0x21488412);
 541         lcdc_writel(lcdc_dev, FRC_LOWER10_0, 0x55aaaa55);
 542         lcdc_writel(lcdc_dev, FRC_LOWER10_1, 0x55aaaa55);
 543         lcdc_writel(lcdc_dev, FRC_LOWER11_0, 0xdeb77deb);
 544         lcdc_writel(lcdc_dev, FRC_LOWER11_1, 0xed7bb7de);
 545
 546         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN, v_AUTO_GATING_EN(0));
 547         lcdc_cfg_done(lcdc_dev);
 548         if (dev_drv->iommu_enabled)     /* disable win0 to workaround iommu pagefault */
 549                 lcdc_layer_enable(lcdc_dev, 0, 0);
 550         lcdc_dev->pre_init = true;
 551
 552         return 0;
 553 }
 554
 555 static void rk312x_lcdc_deinit(struct lcdc_device *lcdc_dev)
 556 {
 557         u32 mask, val;
 558
 559         spin_lock(&lcdc_dev->reg_lock);
 560         if (likely(lcdc_dev->clk_on)) {
 561                 mask = m_FS_INT_CLEAR | m_FS_INT_EN |
 562                         m_LF_INT_CLEAR | m_LF_INT_EN |
 563                         m_BUS_ERR_INT_CLEAR | m_BUS_ERR_INT_EN;
 564                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0) |
 565                         v_LF_INT_CLEAR(0) | v_LF_INT_EN(0) |
 566                         v_BUS_ERR_INT_CLEAR(0) | v_BUS_ERR_INT_EN(0);
 567                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 568                 lcdc_set_bit(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY);
 569                 lcdc_cfg_done(lcdc_dev);
 570                 spin_unlock(&lcdc_dev->reg_lock);
 571         } else {
 572                 spin_unlock(&lcdc_dev->reg_lock);
 573         }
 574         mdelay(1);
 575
 576 }
 577
 578 static u32 calc_sclk(struct rk_screen *src_screen, struct rk_screen *dst_screen)
 579 {
 580         u32 dsp_vtotal;
 581         u64 dsp_htotal;
 582         u32 dsp_in_vtotal;
 583         u64 dsp_in_htotal;
 584         u32 sclk;
 585
 586         if (!src_screen || !dst_screen)
 587                 return 0;
 588
 589         dsp_vtotal = dst_screen->mode.yres;
 590         dsp_htotal = dst_screen->mode.left_margin + dst_screen->mode.hsync_len +
 591                      dst_screen->mode.xres + dst_screen->mode.right_margin;
 592         dsp_in_vtotal = src_screen->mode.yres;
 593         dsp_in_htotal = src_screen->mode.left_margin +
 594                         src_screen->mode.hsync_len +
 595                         src_screen->mode.xres + src_screen->mode.right_margin;
 596         sclk = dsp_vtotal * dsp_htotal * src_screen->mode.pixclock;
 597         do_div(sclk, dsp_in_vtotal * dsp_in_htotal);
 598
 599         return sclk;
 600 }
 601
 602 static int calc_dsp_frm_vst_hst(struct rk_screen *src, struct rk_screen *dst)
 603 {
 604         u32 BP_in, BP_out;
 605         u32 v_scale_ratio;
 606 #if defined(FLOAT_CALC) /* use float */
 607         double T_frm_st;
 608         double T_BP_in, T_BP_out, T_Delta, Tin;
 609 #else
 610         long long  T_frm_st;
 611         u64 T_BP_in, T_BP_out, T_Delta, Tin;
 612         u64 rate = (1 << 16);
 613         u64 temp;
 614 #endif
 615         u32 dsp_htotal, src_htotal, src_vtotal;
 616
 617         if (unlikely(!src) || unlikely(!dst))
 618                 return -1;
 619
 620         dsp_htotal = dst->mode.left_margin + dst->mode.hsync_len +
 621                      dst->mode.xres + dst->mode.right_margin;
 622         src_htotal = src->mode.left_margin + src->mode.hsync_len +
 623                      src->mode.xres + src->mode.right_margin;
 624         src_vtotal = src->mode.upper_margin + src->mode.vsync_len +
 625                      src->mode.yres + src->mode.lower_margin;
 626         BP_in  = (src->mode.upper_margin + src->mode.vsync_len) * src_htotal;
 627         BP_out = (dst->mode.upper_margin + dst->mode.vsync_len) * dsp_htotal;
 628
 629         v_scale_ratio = dst->mode.yres / src->mode.yres;
 630
 631 #if defined(FLOAT_CALC)
 632         T_BP_in = 1.0 * BP_in / src->mode.pixclock;
 633         T_BP_out = 1.0 * BP_out / dst->mode.pixclock;
 634         if (v_scale_ratio < 2)
 635                 T_Delta = 4.0 * src_htotal / src->mode.pixclock;
 636         else
 637                 T_Delta = 12.0 * src_htotal / src->mode.pixclock;
 638
 639         Tin = 1.0 * src_vtotal * src_htotal / src->mode.pixclock;
 640 #else
 641         T_BP_in = rate * BP_in;
 642         do_div(T_BP_in, src->mode.pixclock);
 643         T_BP_out = rate * BP_out;
 644         do_div(T_BP_out, dst->mode.pixclock);
 645         if (v_scale_ratio < 2)
 646                 T_Delta = rate * 4 * src_htotal;
 647         else
 648                 T_Delta = rate * 12 * src_htotal;
 649
 650         do_div(T_Delta, src->mode.pixclock);
 651         Tin = rate * src_vtotal * src_htotal;
 652         do_div(Tin, src->mode.pixclock);
 653 #endif
 654
 655         T_frm_st = (T_BP_in + T_Delta - T_BP_out);
 656         if (T_frm_st < 0)
 657                 T_frm_st  += Tin;
 658
 659 #if defined(FLOAT_CALC)
 660         dst->scl_vst = (u16)(T_frm_st * src->mode.pixclock / src_htotal);
 661         dst->scl_hst = (u32)(T_frm_st * src->mode.pixclock) % src_htotal;
 662 #else
 663         temp = T_frm_st * src->mode.pixclock;
 664         dst->scl_hst = do_div(temp, src_htotal * rate);
 665         dst->scl_vst = temp;
 666 #endif
 667
 668         return 0;
 669 }
 670
 671 static int rk312x_lcdc_set_scaler(struct rk_lcdc_driver *dev_drv,
 672                                   struct rk_screen *dst_screen, bool enable)
 673 {
 674         u32 dsp_htotal, dsp_hs_end, dsp_hact_st, dsp_hact_end;
 675         u32 dsp_vtotal, dsp_vs_end, dsp_vact_st, dsp_vact_end;
 676         u32 dsp_hbor_end, dsp_hbor_st, dsp_vbor_end, dsp_vbor_st;
 677         u32 scl_v_factor, scl_h_factor;
 678         u32 dst_frame_hst, dst_frame_vst;
 679         u32 src_w, src_h, dst_w, dst_h;
 680         u16 bor_right = 0;
 681         u16 bor_left = 0;
 682         u16 bor_up = 0;
 683         u16 bor_down = 0;
 684         struct rk_screen *src;
 685         struct rk_screen *dst;
 686         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 687                                                     struct lcdc_device, driver);
 688
 689         if (unlikely(!lcdc_dev->clk_on))
 690                 return 0;
 691
 692         if(!enable) {
 693                 clk_disable_unprepare(lcdc_dev->sclk);
 694                 dev_info(lcdc_dev->dev, "%s: disable\n", __func__);
 695                 return 0;
 696         }
 697
 698         /* rk312x used one lcdc to apply dual disp
 699          * hdmi screen is used for scaler src
 700          * prmry screen is used for scaler dst
 701          */
 702         dst = dst_screen;
 703         if (!dst) {
 704                 dev_err(lcdc_dev->dev, "%s: dst screen is null!\n", __func__);
 705                 return -EINVAL;
 706         }
 707
 708         src = dst_screen->ext_screen;
 709
 710         clk_prepare_enable(lcdc_dev->sclk);
 711         lcdc_dev->s_pixclock = calc_sclk(src, dst);
 712         clk_set_rate(lcdc_dev->sclk, lcdc_dev->s_pixclock);
 713
 714         /* config scale timing */
 715         calc_dsp_frm_vst_hst(src, dst);
 716         dst_frame_vst = dst->scl_vst;
 717         dst_frame_hst = dst->scl_hst;
 718
 719         dsp_htotal    = dst->mode.hsync_len + dst->mode.left_margin +
 720                         dst->mode.xres + dst->mode.right_margin;
 721         dsp_hs_end    = dst->mode.hsync_len;
 722
 723         dsp_vtotal    = dst->mode.vsync_len + dst->mode.upper_margin +
 724                         dst->mode.yres + dst->mode.lower_margin;
 725         dsp_vs_end    = dst->mode.vsync_len;
 726
 727         dsp_hbor_end  = dst->mode.hsync_len + dst->mode.left_margin +
 728                         dst->mode.xres;
 729         dsp_hbor_st   = dst->mode.hsync_len + dst->mode.left_margin;
 730         dsp_vbor_end  = dst->mode.vsync_len + dst->mode.upper_margin +
 731                         dst->mode.yres;
 732         dsp_vbor_st   = dst->mode.vsync_len + dst->mode.upper_margin;
 733
 734         dsp_hact_st   = dsp_hbor_st  + bor_left;
 735         dsp_hact_end  = dsp_hbor_end - bor_right;
 736         dsp_vact_st   = dsp_vbor_st  + bor_up;
 737         dsp_vact_end  = dsp_vbor_end - bor_down;
 738
 739         src_w = src->mode.xres;
 740         src_h = src->mode.yres;
 741         dst_w = dsp_hact_end - dsp_hact_st;
 742         dst_h = dsp_vact_end - dsp_vact_st;
 743
 744         /* calc scale factor */
 745         scl_h_factor = ((src_w - 1) << 12) / (dst_w - 1);
 746         scl_v_factor = ((src_h - 1) << 12) / (dst_h - 1);
 747
 748         spin_lock(&lcdc_dev->reg_lock);
 749         lcdc_writel(lcdc_dev, SCALER_FACTOR,
 750                     v_SCALER_H_FACTOR(scl_h_factor) |
 751                     v_SCALER_V_FACTOR(scl_v_factor));
 752
 753         lcdc_writel(lcdc_dev, SCALER_FRAME_ST,
 754                     v_SCALER_FRAME_HST(dst_frame_hst) |
 755                     v_SCALER_FRAME_VST(dst_frame_hst));
 756         lcdc_writel(lcdc_dev, SCALER_DSP_HOR_TIMING,
 757                     v_SCALER_HS_END(dsp_hs_end) |
 758                     v_SCALER_HTOTAL(dsp_htotal));
 759         lcdc_writel(lcdc_dev, SCALER_DSP_HACT_ST_END,
 760                     v_SCALER_HAEP(dsp_hact_end) |
 761                     v_SCALER_HASP(dsp_hact_st));
 762         lcdc_writel(lcdc_dev, SCALER_DSP_VER_TIMING,
 763                     v_SCALER_VS_END(dsp_vs_end) |
 764                     v_SCALER_VTOTAL(dsp_vtotal));
 765         lcdc_writel(lcdc_dev, SCALER_DSP_VACT_ST_END,
 766                     v_SCALER_VAEP(dsp_vact_end) |
 767                     v_SCALER_VASP(dsp_vact_st));
 768         lcdc_writel(lcdc_dev, SCALER_DSP_HBOR_TIMING,
 769                     v_SCALER_HBOR_END(dsp_hbor_end) |
 770                     v_SCALER_HBOR_ST(dsp_hbor_st));
 771         lcdc_writel(lcdc_dev, SCALER_DSP_VBOR_TIMING,
 772                     v_SCALER_VBOR_END(dsp_vbor_end) |
 773                     v_SCALER_VBOR_ST(dsp_vbor_st));
 774         lcdc_msk_reg(lcdc_dev, SCALER_CTRL,
 775                     m_SCALER_EN | m_SCALER_OUT_ZERO | m_SCALER_OUT_EN,
 776                     v_SCALER_EN(1) | v_SCALER_OUT_ZERO(0) | v_SCALER_OUT_EN(1));
 777         spin_unlock(&lcdc_dev->reg_lock);
 778
 779         return 0;
 780 }
 781
 782 static int rk312x_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 783 {
 784         u16 face = 0;
 785         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 786                                                     struct lcdc_device, driver);
 787         struct rk_screen *screen = dev_drv->cur_screen;
 788         u16 right_margin = screen->mode.right_margin;
 789         u16 left_margin = screen->mode.left_margin;
 790         u16 lower_margin = screen->mode.lower_margin;
 791         u16 upper_margin = screen->mode.upper_margin;
 792         u16 x_res = screen->mode.xres;
 793         u16 y_res = screen->mode.yres;
 794         u32 mask, val;
 795
 796         spin_lock(&lcdc_dev->reg_lock);
 797         if (likely(lcdc_dev->clk_on)) {
 798                 switch (screen->type) {
 799                 case SCREEN_RGB:
 800                         if (lcdc_dev->soc_type == VOP_RK312X) {
 801                                 mask = m_RGB_DCLK_EN | m_RGB_DCLK_INVERT;
 802                                 val = v_RGB_DCLK_EN(1) | v_RGB_DCLK_INVERT(0);
 803                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 804                                 lcdc_dev->overlay_mode = VOP_RGB_DOMAIN;
 805                         }
 806                         break;
 807                 case SCREEN_LVDS:
 808                         if (lcdc_dev->soc_type == VOP_RK312X) {
 809                                 mask = m_LVDS_DCLK_EN | m_LVDS_DCLK_INVERT;
 810                                 val = v_LVDS_DCLK_EN(1) | v_LVDS_DCLK_INVERT(1);
 811                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 812                                 lcdc_dev->overlay_mode = VOP_RGB_DOMAIN;
 813                         }
 814                         break;
 815                 case SCREEN_MIPI:
 816                         if (lcdc_dev->soc_type == VOP_RK312X) {
 817                                 mask = m_MIPI_DCLK_EN | m_MIPI_DCLK_INVERT;
 818                                 val = v_MIPI_DCLK_EN(1) | v_MIPI_DCLK_INVERT(0);
 819                                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 820                                 lcdc_dev->overlay_mode = VOP_RGB_DOMAIN;
 821                         }
 822                         break;
 823                 case SCREEN_HDMI:
 824                         mask = m_HDMI_DCLK_EN;
 825                         val = v_HDMI_DCLK_EN(1);
 826                         if (screen->pixelrepeat) {
 827                                 mask |= m_CORE_CLK_DIV_EN;
 828                                 val |= v_CORE_CLK_DIV_EN(1);
 829                         }
 830                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 831                         if (lcdc_dev->soc_type == VOP_RK312X) {
 832                                 lcdc_dev->overlay_mode = VOP_YUV_DOMAIN;
 833                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 834                                              m_SW_UV_OFFSET_EN,
 835                                              v_SW_UV_OFFSET_EN(0));
 836                         }
 837                         break;
 838                 case SCREEN_TVOUT:
 839                         mask = m_TVE_DAC_DCLK_EN;
 840                         val = v_TVE_DAC_DCLK_EN(1);
 841                         if (screen->pixelrepeat) {
 842                                 mask |= m_CORE_CLK_DIV_EN;
 843                                 val |= v_CORE_CLK_DIV_EN(1);
 844                         }
 845                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 846                         if (x_res == 720 && y_res == 576)
 847                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 848                                              v_TVE_MODE(TV_PAL));
 849                         else if (x_res == 720 && y_res == 480)
 850                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_TVE_MODE,
 851                                              v_TVE_MODE(TV_NTSC));
 852                         else {
 853                                 dev_err(lcdc_dev->dev,
 854                                         "unsupported video timing!\n");
 855                                 return -1;
 856                         }
 857                         if (lcdc_dev->soc_type == VOP_RK312X) {
 858                                 lcdc_dev->overlay_mode = VOP_YUV_DOMAIN;
 859                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 860                                              m_SW_UV_OFFSET_EN,
 861                                              v_SW_UV_OFFSET_EN(1));
 862                         }
 863                         break;
 864                 default:
 865                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 866                         break;
 867                 }
 868                 if (lcdc_dev->soc_type == VOP_RK312X) {
 869                         switch (screen->face) {
 870                         case OUT_P565:
 871                                 face = OUT_P565;
 872                                 mask = m_DITHER_DOWN_EN |
 873                                         m_DITHER_DOWN_MODE |
 874                                         m_DITHER_DOWN_SEL;
 875                                 val = v_DITHER_DOWN_EN(1) |
 876                                         v_DITHER_DOWN_MODE(0) |
 877                                         v_DITHER_DOWN_SEL(1);
 878                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 879                                 break;
 880                         case OUT_P666:
 881                                 face = OUT_P666;
 882                                 mask = m_DITHER_DOWN_EN |
 883                                         m_DITHER_DOWN_MODE |
 884                                         m_DITHER_DOWN_SEL;
 885                                 val = v_DITHER_DOWN_EN(1) |
 886                                         v_DITHER_DOWN_MODE(1) |
 887                                         v_DITHER_DOWN_SEL(1);
 888                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 889                                 break;
 890                         case OUT_D888_P565:
 891                                 face = OUT_P888;
 892                                 mask = m_DITHER_DOWN_EN |
 893                                         m_DITHER_DOWN_MODE |
 894                                         m_DITHER_DOWN_SEL;
 895                                 val = v_DITHER_DOWN_EN(1) |
 896                                         v_DITHER_DOWN_MODE(0) |
 897                                         v_DITHER_DOWN_SEL(1);
 898                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 899                                 break;
 900                         case OUT_D888_P666:
 901                                 face = OUT_P888;
 902                                 mask = m_DITHER_DOWN_EN |
 903                                         m_DITHER_DOWN_MODE |
 904                                         m_DITHER_DOWN_SEL;
 905                                 val = v_DITHER_DOWN_EN(1) |
 906                                         v_DITHER_DOWN_MODE(1) |
 907                                         v_DITHER_DOWN_SEL(1);
 908                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 909                                 break;
 910                         case OUT_P888:
 911                                 face = OUT_P888;
 912                                 mask = m_DITHER_DOWN_EN | m_DITHER_UP_EN;
 913                                 val = v_DITHER_DOWN_EN(0) | v_DITHER_UP_EN(0);
 914                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 915                                 break;
 916                         default:
 917                                 dev_err(lcdc_dev->dev, "un supported interface!\n");
 918                                 break;
 919                         }
 920                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_SW_OVERLAY_MODE,
 921                                      v_SW_OVERLAY_MODE(lcdc_dev->overlay_mode));
 922                 }
 923
 924                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 925                     m_DEN_POL | m_DCLK_POL;
 926                 val = v_DSP_OUT_FORMAT(face) | v_HSYNC_POL(screen->pin_hsync) |
 927                     v_VSYNC_POL(screen->pin_vsync) |
 928                     v_DEN_POL(screen->pin_den) |
 929                     v_DCLK_POL(screen->pin_dclk);
 930                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 931
 932                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 933                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 934                     m_DSP_DUMMY_SWAP | m_BLANK_EN | m_BLACK_EN;
 935
 936                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 937                     v_DSP_RB_SWAP(screen->swap_rb) |
 938                     v_DSP_RG_SWAP(screen->swap_rg) |
 939                     v_DSP_DELTA_SWAP(screen->swap_delta) |
 940                     v_DSP_DUMMY_SWAP(screen->swap_dumy) |
 941                     v_BLANK_EN(0) | v_BLACK_EN(0);
 942                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 943
 944                 /* config timing */
 945                 val = v_HSYNC(screen->mode.hsync_len) |
 946                     v_HORPRD(screen->mode.hsync_len + left_margin + x_res +
 947                              right_margin);
 948                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 949                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 950                     v_HASP(screen->mode.hsync_len + left_margin);
 951                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 952
 953                 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 954                         /* First Field Timing */
 955                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
 956                                     v_VSYNC(screen->mode.vsync_len) |
 957                                     v_VERPRD(2 * (screen->mode.vsync_len + upper_margin + lower_margin) +
 958                                              y_res + 1));
 959                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END,
 960                                     v_VAEP(screen->mode.vsync_len +
 961                                            upper_margin + y_res / 2) |
 962                                     v_VASP(screen->mode.vsync_len +
 963                                            upper_margin));
 964                         /* Second Field Timing */
 965                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1,
 966                                     v_VSYNC_ST_F1(screen->mode.vsync_len +
 967                                                   upper_margin + y_res / 2 +
 968                                                   lower_margin) |
 969                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len +
 970                                                    upper_margin + y_res / 2 +
 971                                                    lower_margin));
 972                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END_F1,
 973                                     v_VAEP(2 * (screen->mode.vsync_len + upper_margin) +
 974                                            y_res + lower_margin + 1) |
 975                                     v_VASP(2 * (screen->mode.vsync_len + upper_margin) +
 976                                            y_res / 2 + lower_margin + 1));
 977
 978                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 979                                      m_INTERLACE_DSP_EN |
 980                                      m_WIN0_YRGB_DEFLICK_EN |
 981                                      m_WIN0_CBR_DEFLICK_EN |
 982                                      m_INTERLACE_FIELD_POL,
 983                                      v_INTERLACE_DSP_EN(1) |
 984                                      v_WIN0_YRGB_DEFLICK_EN(1) |
 985                                      v_WIN0_CBR_DEFLICK_EN(1) |
 986                                      v_INTERLACE_FIELD_POL(0));
 987                 } else {
 988                         val = v_VSYNC(screen->mode.vsync_len) |
 989                             v_VERPRD(screen->mode.vsync_len + upper_margin +
 990                                      y_res + lower_margin);
 991                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 992
 993                         val = v_VAEP(screen->mode.vsync_len + upper_margin + y_res) |
 994                             v_VASP(screen->mode.vsync_len + upper_margin);
 995                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 996
 997                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 998                                      m_INTERLACE_DSP_EN |
 999                                      m_WIN0_YRGB_DEFLICK_EN |
1000                                      m_WIN0_CBR_DEFLICK_EN |
1001                                      m_INTERLACE_FIELD_POL,
1002                                      v_INTERLACE_DSP_EN(0) |
1003                                      v_WIN0_YRGB_DEFLICK_EN(0) |
1004                                      v_WIN0_CBR_DEFLICK_EN(0) |
1005                                      v_INTERLACE_FIELD_POL(0));
1006                 }
1007
1008         }
1009         spin_unlock(&lcdc_dev->reg_lock);
1010
1011         rk312x_lcdc_set_dclk(dev_drv);
1012         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1013                 dev_drv->trsm_ops->enable();
1014         if (screen->init)
1015                 screen->init();
1016
1017         return 0;
1018 }
1019
1020 static int rk312x_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
1021                             bool open)
1022 {
1023         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1024                                                     struct lcdc_device, driver);
1025
1026         /* enable clk,when first layer open */
1027         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
1028                 rockchip_set_system_status(SYS_STATUS_LCDC0);
1029                 rk312x_lcdc_pre_init(dev_drv);
1030 #if defined(CONFIG_ROCKCHIP_IOMMU)
1031                 if (dev_drv->iommu_enabled) {
1032                         if (!dev_drv->mmu_dev) {
1033                                 dev_drv->mmu_dev =
1034                                         rk_fb_get_sysmmu_device_by_compatible(dev_drv->mmu_dts_name);
1035                                 if (dev_drv->mmu_dev) {
1036                                         rk_fb_platform_set_sysmmu(dev_drv->mmu_dev,
1037                                                                   dev_drv->dev);
1038                                         rockchip_iovmm_activate(dev_drv->dev);
1039                                 } else {
1040                                         dev_err(dev_drv->dev,
1041                                                 "failed to get rockchip iommu device\n");
1042                                         return -1;
1043                                 }
1044                         }
1045                 }
1046 #endif
1047                 rk312x_lcdc_reg_restore(lcdc_dev);
1048                 if (dev_drv->iommu_enabled)
1049                         rk312x_lcdc_mmu_en(dev_drv);
1050                 if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
1051                         rk312x_lcdc_set_dclk(dev_drv);
1052                         rk312x_lcdc_enable_irq(dev_drv);
1053                 } else {
1054                         rk312x_load_screen(dev_drv, 1);
1055                 }
1056
1057                 /* set screen lut */
1058                 if (dev_drv->cur_screen->dsp_lut)
1059                         rk312x_lcdc_set_lut(dev_drv);
1060         }
1061
1062         if (win_id < ARRAY_SIZE(lcdc_win))
1063                 lcdc_layer_enable(lcdc_dev, win_id, open);
1064         else
1065                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
1066
1067         /* when all layer closed,disable clk */
1068         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
1069                 rk312x_lcdc_disable_irq(lcdc_dev);
1070                 rk312x_lcdc_reg_update(dev_drv);
1071 #if defined(CONFIG_ROCKCHIP_IOMMU)
1072                 if (dev_drv->iommu_enabled) {
1073                         if (dev_drv->mmu_dev)
1074                                 rockchip_iovmm_deactivate(dev_drv->dev);
1075                 }
1076 #endif
1077                 rk312x_lcdc_clk_disable(lcdc_dev);
1078                 rockchip_clear_system_status(SYS_STATUS_LCDC0);
1079         }
1080
1081         return 0;
1082 }
1083
1084 static int rk312x_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
1085 {
1086         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1087                                                     struct lcdc_device, driver);
1088         struct rk_screen *screen = dev_drv->cur_screen;
1089         struct rk_lcdc_win *win = NULL;
1090         char fmt[9] = "NULL";
1091
1092         if (!screen) {
1093                 dev_err(dev_drv->dev, "screen is null!\n");
1094                 return -ENOENT;
1095         }
1096
1097         if (win_id == 0) {
1098                 win = dev_drv->win[0];
1099         } else if (win_id == 1) {
1100                 win = dev_drv->win[1];
1101         } else {
1102                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
1103                 return -EINVAL;
1104         }
1105
1106         spin_lock(&lcdc_dev->reg_lock);
1107         win->area[0].dsp_stx = win->area[0].xpos + screen->mode.left_margin +
1108                                 screen->mode.hsync_len;
1109         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
1110                 win->area[0].ysize /= 2;
1111                 win->area[0].dsp_sty = win->area[0].ypos / 2 +
1112                                         screen->mode.upper_margin +
1113                                         screen->mode.vsync_len;
1114         } else {
1115                 win->area[0].dsp_sty = win->area[0].ypos +
1116                                         screen->mode.upper_margin +
1117                                         screen->mode.vsync_len;
1118         }
1119         win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
1120         win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
1121         switch (win->format) {
1122         case ARGB888:
1123                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1124                 win->swap_rb = 0;
1125                 break;
1126         case XBGR888:
1127                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1128                 win->swap_rb = 1;
1129                 break;
1130         case ABGR888:
1131                 win->fmt_cfg = VOP_FORMAT_ARGB888;
1132                 win->swap_rb = 1;
1133                 break;
1134         case RGB888:
1135                 win->fmt_cfg = VOP_FORMAT_RGB888;
1136                 win->swap_rb = 0;
1137                 break;
1138         case RGB565:
1139                 win->fmt_cfg = VOP_FORMAT_RGB565;
1140                 win->swap_rb = 0;
1141                 break;
1142         case YUV444:
1143                 if (win_id == 0) {
1144                         win->fmt_cfg = VOP_FORMAT_YCBCR444;
1145                         win->scale_cbcr_x =
1146                             CalScale(win->area[0].xact, win->area[0].xsize);
1147                         win->scale_cbcr_y =
1148                             CalScale(win->area[0].yact, win->area[0].ysize);
1149                         win->swap_rb = 0;
1150                 } else {
1151                         dev_err(lcdc_dev->driver.dev,
1152                                 "%s:un supported format!\n", __func__);
1153                 }
1154                 break;
1155         case YUV422:
1156                 if (win_id == 0) {
1157                         win->fmt_cfg = VOP_FORMAT_YCBCR422;
1158                         win->scale_cbcr_x = CalScale((win->area[0].xact / 2),
1159                                                      win->area[0].xsize);
1160                         win->scale_cbcr_y =
1161                             CalScale(win->area[0].yact, win->area[0].ysize);
1162                         win->swap_rb = 0;
1163                 } else {
1164                         dev_err(lcdc_dev->driver.dev,
1165                                 "%s:un supported format!\n", __func__);
1166                 }
1167                 break;
1168         case YUV420:
1169                 if (win_id == 0) {
1170                         win->fmt_cfg = VOP_FORMAT_YCBCR420;
1171                         win->scale_cbcr_x =
1172                             CalScale(win->area[0].xact / 2, win->area[0].xsize);
1173                         win->scale_cbcr_y =
1174                             CalScale(win->area[0].yact / 2, win->area[0].ysize);
1175                         win->swap_rb = 0;
1176                 } else {
1177                         dev_err(lcdc_dev->driver.dev,
1178                                 "%s:un supported format!\n", __func__);
1179                 }
1180                 break;
1181         default:
1182                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
1183                         __func__);
1184                 break;
1185         }
1186         spin_unlock(&lcdc_dev->reg_lock);
1187
1188         DBG(1,
1189             "lcdc%d>>%s\n>>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
1190             ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id, __func__,
1191             get_format_string(win->format, fmt), win->area[0].xact,
1192             win->area[0].yact, win->area[0].xsize, win->area[0].ysize,
1193             win->area[0].xvir, win->area[0].yvir, win->area[0].xpos,
1194             win->area[0].ypos);
1195         return 0;
1196 }
1197
1198 static int rk312x_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
1199 {
1200         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1201                                                     struct lcdc_device, driver);
1202         struct rk_lcdc_win *win = NULL;
1203         struct rk_screen *screen = dev_drv->cur_screen;
1204
1205         if (!screen) {
1206                 dev_err(dev_drv->dev, "screen is null!\n");
1207                 return -ENOENT;
1208         }
1209
1210         if (win_id == 0) {
1211                 win = dev_drv->win[0];
1212         } else if (win_id == 1) {
1213                 win = dev_drv->win[1];
1214         } else {
1215                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
1216                 return -EINVAL;
1217         }
1218
1219         spin_lock(&lcdc_dev->reg_lock);
1220         if (likely(lcdc_dev->clk_on)) {
1221                 win->area[0].y_addr =
1222                     win->area[0].smem_start + win->area[0].y_offset;
1223                 win->area[0].uv_addr =
1224                     win->area[0].cbr_start + win->area[0].c_offset;
1225                 if (win->area[0].y_addr)
1226                         lcdc_layer_update_regs(lcdc_dev, win);
1227                 /* lcdc_cfg_done(lcdc_dev); */
1228         }
1229         spin_unlock(&lcdc_dev->reg_lock);
1230
1231         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
1232             lcdc_dev->id, __func__, win->area[0].y_addr, win->area[0].uv_addr,
1233             win->area[0].y_offset);
1234         /* this is the first frame of the system,enable frame start interrupt */
1235         if ((dev_drv->first_frame)) {
1236                 dev_drv->first_frame = 0;
1237                 rk312x_lcdc_enable_irq(dev_drv);
1238
1239         }
1240
1241         return 0;
1242 }
1243
1244 static int rk312x_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
1245                              unsigned long arg, int win_id)
1246 {
1247         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1248                                                     struct lcdc_device, driver);
1249         u32 panel_size[2];
1250         void __user *argp = (void __user *)arg;
1251         struct color_key_cfg clr_key_cfg;
1252
1253         switch (cmd) {
1254         case RK_FBIOGET_PANEL_SIZE:
1255                 panel_size[0] = lcdc_dev->screen->mode.xres;
1256                 panel_size[1] = lcdc_dev->screen->mode.yres;
1257                 if (copy_to_user(argp, panel_size, 8))
1258                         return -EFAULT;
1259                 break;
1260         case RK_FBIOPUT_COLOR_KEY_CFG:
1261                 if (copy_from_user(&clr_key_cfg, argp,
1262                                    sizeof(struct color_key_cfg)))
1263                         return -EFAULT;
1264                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
1265                             clr_key_cfg.win0_color_key_cfg);
1266                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
1267                             clr_key_cfg.win1_color_key_cfg);
1268                 break;
1269
1270         default:
1271                 break;
1272         }
1273         return 0;
1274 }
1275
1276 static int rk312x_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
1277                                   const char *id)
1278 {
1279         int win_id = 0;
1280         mutex_lock(&dev_drv->fb_win_id_mutex);
1281         if (!strcmp(id, "fb0"))
1282                 win_id = dev_drv->fb0_win_id;
1283         else if (!strcmp(id, "fb1"))
1284                 win_id = dev_drv->fb1_win_id;
1285         else if (!strcmp(id, "fb2"))
1286                 win_id = dev_drv->fb2_win_id;
1287         mutex_unlock(&dev_drv->fb_win_id_mutex);
1288
1289         return win_id;
1290 }
1291
1292 static int rk312x_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
1293 {
1294         return 0;
1295 }
1296
1297 static int rk312x_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
1298                                bool set)
1299 {
1300         struct lcdc_device *lcdc_dev =
1301             container_of(dev_drv, struct lcdc_device, driver);
1302         int ovl;
1303         spin_lock(&lcdc_dev->reg_lock);
1304         if (lcdc_dev->clk_on) {
1305                 if (set) {
1306                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
1307                                      v_WIN0_TOP(swap));
1308                         ovl = swap;
1309                 } else {
1310                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1311                 }
1312         } else {
1313                 ovl = -EPERM;
1314         }
1315         spin_unlock(&lcdc_dev->reg_lock);
1316
1317         return ovl;
1318 }
1319
1320 static int rk312x_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
1321 {
1322
1323         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1324                                                     struct lcdc_device, driver);
1325         if (dev_drv->suspend_flag)
1326                 return 0;
1327         dev_drv->suspend_flag = 1;
1328         flush_kthread_worker(&dev_drv->update_regs_worker);
1329
1330         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
1331                 dev_drv->trsm_ops->disable();
1332         spin_lock(&lcdc_dev->reg_lock);
1333         if (likely(lcdc_dev->clk_on)) {
1334                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(1));
1335                 lcdc_msk_reg(lcdc_dev, INT_STATUS,
1336                              m_FS_INT_CLEAR | m_LF_INT_CLEAR,
1337                              v_FS_INT_CLEAR(1) | v_LF_INT_CLEAR(1));
1338                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1339                              v_DSP_OUT_ZERO(1));
1340                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1341                              v_LCDC_STANDBY(1));
1342                 lcdc_cfg_done(lcdc_dev);
1343
1344                 if (dev_drv->iommu_enabled) {
1345                         if (dev_drv->mmu_dev)
1346                                 rockchip_iovmm_deactivate(dev_drv->dev);
1347                 }
1348
1349                 spin_unlock(&lcdc_dev->reg_lock);
1350         } else {
1351                 spin_unlock(&lcdc_dev->reg_lock);
1352                 return 0;
1353         }
1354         rk312x_lcdc_clk_disable(lcdc_dev);
1355         rk_disp_pwr_disable(dev_drv);
1356         return 0;
1357 }
1358
1359 static int rk312x_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
1360 {
1361         struct lcdc_device *lcdc_dev =
1362             container_of(dev_drv, struct lcdc_device, driver);
1363
1364         if (!dev_drv->suspend_flag)
1365                 return 0;
1366         rk_disp_pwr_enable(dev_drv);
1367         dev_drv->suspend_flag = 0;
1368
1369         if (lcdc_dev->atv_layer_cnt) {
1370                 rk312x_lcdc_clk_enable(lcdc_dev);
1371                 rk312x_lcdc_reg_restore(lcdc_dev);
1372                 /* set screen lut */
1373                 if (dev_drv->cur_screen->dsp_lut)
1374                         rk312x_lcdc_set_lut(dev_drv);
1375
1376                 spin_lock(&lcdc_dev->reg_lock);
1377
1378                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
1379                              v_DSP_OUT_ZERO(0));
1380                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1381                              v_LCDC_STANDBY(0));
1382                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN, v_BLANK_EN(0));
1383                 lcdc_cfg_done(lcdc_dev);
1384
1385                 if (dev_drv->iommu_enabled) {
1386                         if (dev_drv->mmu_dev)
1387                                 rockchip_iovmm_activate(dev_drv->dev);
1388                 }
1389
1390                 spin_unlock(&lcdc_dev->reg_lock);
1391         }
1392
1393         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1394                 dev_drv->trsm_ops->enable();
1395         return 0;
1396 }
1397
1398 static int rk312x_lcdc_blank(struct rk_lcdc_driver *dev_drv,
1399                              int win_id, int blank_mode)
1400 {
1401         switch (blank_mode) {
1402         case FB_BLANK_UNBLANK:
1403                 rk312x_lcdc_early_resume(dev_drv);
1404                 break;
1405         case FB_BLANK_NORMAL:
1406                 rk312x_lcdc_early_suspend(dev_drv);
1407                 break;
1408         default:
1409                 rk312x_lcdc_early_suspend(dev_drv);
1410                 break;
1411         }
1412
1413         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
1414
1415         return 0;
1416 }
1417
1418 static int rk312x_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
1419 {
1420         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1421                                                     struct lcdc_device, driver);
1422         spin_lock(&lcdc_dev->reg_lock);
1423         if (lcdc_dev->clk_on)
1424                 lcdc_cfg_done(lcdc_dev);
1425         spin_unlock(&lcdc_dev->reg_lock);
1426         return 0;
1427 }
1428
1429 /*
1430         a:[-30~0]:
1431             sin_hue = sin(a)*256 +0x100;
1432             cos_hue = cos(a)*256;
1433         a:[0~30]
1434             sin_hue = sin(a)*256;
1435             cos_hue = cos(a)*256;
1436 */
1437 static int rk312x_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1438                                     bcsh_hue_mode mode)
1439 {
1440
1441         struct lcdc_device *lcdc_dev =
1442             container_of(dev_drv, struct lcdc_device, driver);
1443         u32 val;
1444
1445         spin_lock(&lcdc_dev->reg_lock);
1446         if (lcdc_dev->clk_on) {
1447                 val = lcdc_readl(lcdc_dev, BCSH_H);
1448                 switch (mode) {
1449                 case H_SIN:
1450                         val &= m_BCSH_SIN_HUE;
1451                         break;
1452                 case H_COS:
1453                         val &= m_BCSH_COS_HUE;
1454                         val >>= 16;
1455                         break;
1456                 default:
1457                         break;
1458                 }
1459         }
1460         spin_unlock(&lcdc_dev->reg_lock);
1461
1462         return val;
1463 }
1464
1465 static int rk312x_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv, int sin_hue,
1466                                     int cos_hue)
1467 {
1468
1469         struct lcdc_device *lcdc_dev =
1470             container_of(dev_drv, struct lcdc_device, driver);
1471         u32 mask, val;
1472
1473         spin_lock(&lcdc_dev->reg_lock);
1474         if (lcdc_dev->clk_on) {
1475                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
1476                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
1477                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
1478                 lcdc_cfg_done(lcdc_dev);
1479         }
1480         spin_unlock(&lcdc_dev->reg_lock);
1481
1482         return 0;
1483 }
1484
1485 static int rk312x_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1486                                     bcsh_bcs_mode mode, int value)
1487 {
1488         struct lcdc_device *lcdc_dev =
1489             container_of(dev_drv, struct lcdc_device, driver);
1490         u32 mask, val;
1491
1492         spin_lock(&lcdc_dev->reg_lock);
1493         if (lcdc_dev->clk_on) {
1494                 switch (mode) {
1495                 case BRIGHTNESS:
1496                         /* from 0 to 255,typical is 128 */
1497                         if (value < 0x80)
1498                                 value += 0x80;
1499                         else if (value >= 0x80)
1500                                 value = value - 0x80;
1501                         mask = m_BCSH_BRIGHTNESS;
1502                         val = v_BCSH_BRIGHTNESS(value);
1503                         break;
1504                 case CONTRAST:
1505                         /* from 0 to 510,typical is 256 */
1506                         mask = m_BCSH_CONTRAST;
1507                         val = v_BCSH_CONTRAST(value);
1508                         break;
1509                 case SAT_CON:
1510                         /* from 0 to 1015,typical is 256 */
1511                         mask = m_BCSH_SAT_CON;
1512                         val = v_BCSH_SAT_CON(value);
1513                         break;
1514                 default:
1515                         break;
1516                 }
1517                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
1518                 lcdc_cfg_done(lcdc_dev);
1519         }
1520         spin_unlock(&lcdc_dev->reg_lock);
1521         return val;
1522 }
1523
1524 static int rk312x_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1525                                     bcsh_bcs_mode mode)
1526 {
1527         struct lcdc_device *lcdc_dev =
1528             container_of(dev_drv, struct lcdc_device, driver);
1529         u32 val;
1530
1531         spin_lock(&lcdc_dev->reg_lock);
1532         if (lcdc_dev->clk_on) {
1533                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1534                 switch (mode) {
1535                 case BRIGHTNESS:
1536                         val &= m_BCSH_BRIGHTNESS;
1537                         if (val > 0x80)
1538                                 val -= 0x80;
1539                         else
1540                                 val += 0x80;
1541                         break;
1542                 case CONTRAST:
1543                         val &= m_BCSH_CONTRAST;
1544                         val >>= 8;
1545                         break;
1546                 case SAT_CON:
1547                         val &= m_BCSH_SAT_CON;
1548                         val >>= 20;
1549                         break;
1550                 default:
1551                         break;
1552                 }
1553         }
1554         spin_unlock(&lcdc_dev->reg_lock);
1555         return val;
1556 }
1557
1558 static int rk312x_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1559 {
1560         struct lcdc_device *lcdc_dev =
1561             container_of(dev_drv, struct lcdc_device, driver);
1562         u32 mask, val;
1563
1564         spin_lock(&lcdc_dev->reg_lock);
1565         if (lcdc_dev->clk_on) {
1566                 if (open) {
1567                         lcdc_writel(lcdc_dev, BCSH_CTRL,
1568                                     v_BCSH_EN(1) | v_BCSH_OUT_MODE(3));
1569                         lcdc_writel(lcdc_dev, BCSH_BCS,
1570                                     v_BCSH_BRIGHTNESS(0x00) |
1571                                     v_BCSH_CONTRAST(0x80) |
1572                                     v_BCSH_SAT_CON(0x80));
1573                         lcdc_writel(lcdc_dev, BCSH_H, v_BCSH_COS_HUE(0x80));
1574                 } else {
1575                         mask = m_BCSH_EN;
1576                         val = v_BCSH_EN(0);
1577                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1578                 }
1579                 lcdc_cfg_done(lcdc_dev);
1580         }
1581
1582         if (lcdc_dev->overlay_mode == VOP_YUV_DOMAIN) {
1583                 lcdc_msk_reg(lcdc_dev, BCSH_CTRL, m_BCSH_R2Y_CSC_MODE,
1584                              v_BCSH_R2Y_CSC_MODE(VOP_Y2R_CSC_BYPASS));
1585         } else {
1586                 lcdc_msk_reg(lcdc_dev, BCSH_CTRL, m_BCSH_R2Y_CSC_MODE,
1587                              v_BCSH_R2Y_CSC_MODE(VOP_Y2R_CSC_MPEG));
1588         }
1589
1590         spin_unlock(&lcdc_dev->reg_lock);
1591         return 0;
1592 }
1593
1594 static int rk312x_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1595                                enum fb_win_map_order order)
1596 {
1597         mutex_lock(&dev_drv->fb_win_id_mutex);
1598         if (order == FB_DEFAULT_ORDER)
1599                 order = FB0_WIN0_FB1_WIN1_FB2_WIN2;     /* FB0_WIN1_FB1_WIN0_FB2_WIN2; for box */
1600         dev_drv->fb2_win_id = order / 100;
1601         dev_drv->fb1_win_id = (order / 10) % 10;
1602         dev_drv->fb0_win_id = order % 10;
1603         mutex_unlock(&dev_drv->fb_win_id_mutex);
1604
1605         return 0;
1606 }
1607
1608 static int rk312x_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1609                                bool set)
1610 {
1611         struct lcdc_device *lcdc_dev =
1612             container_of(dev_drv, struct lcdc_device, driver);
1613         struct rk_screen *screen = dev_drv->cur_screen;
1614         u64 ft = 0;
1615         u32 dotclk;
1616         int ret;
1617         u32 pixclock;
1618         u32 x_total, y_total;
1619         if (set) {
1620                 ft = div_u64(1000000000000llu, fps);
1621                 x_total =
1622                     screen->mode.upper_margin + screen->mode.lower_margin +
1623                     screen->mode.yres + screen->mode.vsync_len;
1624                 y_total =
1625                     screen->mode.left_margin + screen->mode.right_margin +
1626                     screen->mode.xres + screen->mode.hsync_len;
1627                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1628                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1629                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1630         }
1631
1632         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1633         dev_drv->pixclock = lcdc_dev->pixclock = pixclock;
1634         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1635         screen->ft = 1000 / fps;        /*one frame time in ms */
1636
1637         if (set)
1638                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1639                          clk_get_rate(lcdc_dev->dclk), fps);
1640
1641         return fps;
1642 }
1643
1644 static int rk312x_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1645 {
1646         struct lcdc_device *lcdc_dev =
1647             container_of(dev_drv, struct lcdc_device, driver);
1648         u32 int_reg;
1649         int ret;
1650
1651         if (lcdc_dev->clk_on && (!dev_drv->suspend_flag)) {
1652                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1653                 if (int_reg & m_LF_INT_STA) {
1654                         dev_drv->frame_time.last_framedone_t =
1655                                         dev_drv->frame_time.framedone_t;
1656                         dev_drv->frame_time.framedone_t = cpu_clock(0);
1657                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1658                                      v_LF_INT_CLEAR(1));
1659                         ret = RK_LF_STATUS_FC;
1660                 } else
1661                         ret = RK_LF_STATUS_FR;
1662         } else {
1663                 ret = RK_LF_STATUS_NC;
1664         }
1665
1666         return ret;
1667 }
1668
1669 static int rk312x_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
1670                                     unsigned int *dsp_addr)
1671 {
1672         struct lcdc_device *lcdc_dev =
1673             container_of(dev_drv, struct lcdc_device, driver);
1674
1675         if (lcdc_dev->clk_on) {
1676                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1677                 if (lcdc_dev->soc_type == VOP_RK3036)
1678                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1679                 else if (lcdc_dev->soc_type == VOP_RK312X)
1680                         dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1681         }
1682         return 0;
1683 }
1684
1685 static ssize_t rk312x_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1686                                          char *buf, int win_id)
1687 {
1688         struct lcdc_device *lcdc_dev = container_of(dev_drv, struct lcdc_device,
1689                                                     driver);
1690         char format_w0[9] = "NULL";
1691         char format_w1[9] = "NULL";
1692         char status_w0[9] = "NULL";
1693         char status_w1[9] = "NULL";
1694         u32 fmt_id, act_info, dsp_info, dsp_st, factor;
1695         u16 xvir_w0, x_act_w0, y_act_w0, x_dsp_w0, y_dsp_w0, x_st_w0, y_st_w0;
1696         u16 xvir_w1, x_act_w1, y_act_w1, x_dsp_w1, y_dsp_w1, x_st_w1, y_st_w1;
1697         u16 x_factor, y_factor, x_scale, y_scale;
1698         u16 ovl;
1699         u32 win1_dsp_yaddr = 0;
1700
1701         spin_lock(&lcdc_dev->reg_lock);
1702         if (lcdc_dev->clk_on) {
1703                 /* data format */
1704                 fmt_id = lcdc_readl(lcdc_dev, SYS_CTRL);
1705                 get_format_string((fmt_id & m_WIN0_FORMAT) >> 3, format_w0);
1706                 get_format_string((fmt_id & m_WIN1_FORMAT) >> 6, format_w1);
1707
1708                 /* win status */
1709                 if (fmt_id & m_WIN0_EN)
1710                         strcpy(status_w0, "enabled");
1711                 else
1712                         strcpy(status_w0, "disabled");
1713
1714                 if ((fmt_id & m_WIN1_EN) >> 1)
1715                         strcpy(status_w1, "enabled");
1716                 else
1717                         strcpy(status_w1, "disabled");
1718
1719                 /* ovl */
1720                 ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
1721
1722                 /* xvir */
1723                 xvir_w0 = lcdc_readl(lcdc_dev, WIN0_VIR) & m_YRGB_VIR;
1724                 xvir_w1 = lcdc_readl(lcdc_dev, WIN1_VIR) & m_YRGB_VIR;
1725
1726                 /* xact/yact */
1727                 act_info = lcdc_readl(lcdc_dev, WIN0_ACT_INFO);
1728                 x_act_w0 = (act_info & m_ACT_WIDTH) + 1;
1729                 y_act_w0 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1730
1731                 act_info = lcdc_readl(lcdc_dev, WIN1_ACT_INFO);
1732                 x_act_w1 = (act_info & m_ACT_WIDTH) + 1;
1733                 y_act_w1 = ((act_info & m_ACT_HEIGHT) >> 16) + 1;
1734
1735                 /* xsize/ysize */
1736                 dsp_info = lcdc_readl(lcdc_dev, WIN0_DSP_INFO);
1737                 x_dsp_w0 = (dsp_info & m_DSP_WIDTH) + 1;
1738                 y_dsp_w0 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1739
1740                 dsp_info = lcdc_readl(lcdc_dev, WIN1_DSP_INFO);
1741                 x_dsp_w1 = (dsp_info & m_DSP_WIDTH) + 1;
1742                 y_dsp_w1 = ((dsp_info & m_DSP_HEIGHT) >> 16) + 1;
1743
1744                 /* xpos/ypos */
1745                 dsp_st = lcdc_readl(lcdc_dev, WIN0_DSP_ST);
1746                 x_st_w0 = dsp_st & m_DSP_STX;
1747                 y_st_w0 = (dsp_st & m_DSP_STY) >> 16;
1748
1749                 if (lcdc_dev->soc_type == VOP_RK3036)
1750                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST);
1751                 else if (lcdc_dev->soc_type == VOP_RK312X)
1752                         dsp_st = lcdc_readl(lcdc_dev, WIN1_DSP_ST_RK312X);
1753
1754                 x_st_w1 = dsp_st & m_DSP_STX;
1755                 y_st_w1 = (dsp_st & m_DSP_STY) >> 16;
1756
1757                 /* scale factor */
1758                 factor = lcdc_readl(lcdc_dev, WIN0_SCL_FACTOR_YRGB);
1759                 x_factor = factor & m_X_SCL_FACTOR;
1760                 y_factor = (factor & m_Y_SCL_FACTOR) >> 16;
1761                 x_scale = 4096 * 100 / x_factor;
1762                 y_scale = 4096 * 100 / y_factor;
1763
1764                 /* dsp addr */
1765                 if (lcdc_dev->soc_type == VOP_RK3036)
1766                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST);
1767                 else if (lcdc_dev->soc_type == VOP_RK312X)
1768                         win1_dsp_yaddr = lcdc_readl(lcdc_dev, WIN1_MST_RK312X);
1769         } else {
1770                 spin_unlock(&lcdc_dev->reg_lock);
1771                 return -EPERM;
1772         }
1773         spin_unlock(&lcdc_dev->reg_lock);
1774         return snprintf(buf, PAGE_SIZE,
1775                         "win0:%s\n"
1776                         "xvir:%d\n"
1777                         "xact:%d\n"
1778                         "yact:%d\n"
1779                         "xdsp:%d\n"
1780                         "ydsp:%d\n"
1781                         "x_st:%d\n"
1782                         "y_st:%d\n"
1783                         "x_scale:%d.%d\n"
1784                         "y_scale:%d.%d\n"
1785                         "format:%s\n"
1786                         "YRGB buffer addr:0x%08x\n"
1787                         "CBR buffer addr:0x%08x\n\n"
1788                         "win1:%s\n"
1789                         "xvir:%d\n"
1790                         "xact:%d\n"
1791                         "yact:%d\n"
1792                         "xdsp:%d\n"
1793                         "ydsp:%d\n"
1794                         "x_st:%d\n"
1795                         "y_st:%d\n"
1796                         "format:%s\n"
1797                         "YRGB buffer addr:0x%08x\n"
1798                         "overlay:%s\n",
1799                         status_w0,
1800                         xvir_w0,
1801                         x_act_w0,
1802                         y_act_w0,
1803                         x_dsp_w0,
1804                         y_dsp_w0,
1805                         x_st_w0,
1806                         y_st_w0,
1807                         x_scale / 100,
1808                         x_scale % 100,
1809                         y_scale / 100,
1810                         y_scale % 100,
1811                         format_w0,
1812                         lcdc_readl(lcdc_dev, WIN0_YRGB_MST),
1813                         lcdc_readl(lcdc_dev, WIN0_CBR_MST),
1814                         status_w1,
1815                         xvir_w1,
1816                         x_act_w1,
1817                         y_act_w1,
1818                         x_dsp_w1,
1819                         y_dsp_w1,
1820                         x_st_w1,
1821                         y_st_w1,
1822                         format_w1,
1823                         win1_dsp_yaddr,
1824                         ovl ? "win0 on the top of win1\n" :
1825                         "win1 on the top of win0\n");
1826 }
1827
1828 static int rk312x_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1829 {
1830         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1831                                                     struct lcdc_device,
1832                                                     driver);
1833         int *cbase = (int *)lcdc_dev->regs;
1834         int *regsbak = (int *)lcdc_dev->regsbak;
1835         int i, j;
1836
1837         printk("back up reg:\n");
1838         for (i = 0; i <= (0xDC >> 4); i++) {
1839                 for (j = 0; j < 4; j++)
1840                         printk("%08x  ", *(regsbak + i * 4 + j));
1841                 printk("\n");
1842         }
1843
1844         printk("lcdc reg:\n");
1845         for (i = 0; i <= (0xDC >> 4); i++) {
1846                 for (j = 0; j < 4; j++)
1847                         printk("%08x  ", readl_relaxed(cbase + i * 4 + j));
1848                 printk("\n");
1849         }
1850         return 0;
1851 }
1852
1853 static int rk312x_lcdc_dpi_open(struct rk_lcdc_driver *dev_drv, bool open)
1854 {
1855         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1856                                                     struct lcdc_device, driver);
1857         if (lcdc_dev->soc_type == VOP_RK312X) {
1858                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN,
1859                              v_DIRECT_PATH_EN(open));
1860                 lcdc_cfg_done(lcdc_dev);
1861         }
1862         return 0;
1863 }
1864
1865 static int rk312x_lcdc_dpi_win_sel(struct rk_lcdc_driver *dev_drv, int win_id)
1866 {
1867         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1868                                                     struct lcdc_device, driver);
1869
1870         if (lcdc_dev->soc_type == VOP_RK312X) {
1871                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_LAYER,
1872                              v_DIRECT_PATH_LAYER(win_id));
1873                 lcdc_cfg_done(lcdc_dev);
1874         }
1875         return 0;
1876
1877 }
1878
1879 static int rk312x_lcdc_dpi_status(struct rk_lcdc_driver *dev_drv)
1880 {
1881         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1882                                                     struct lcdc_device, driver);
1883         int ovl = 0;
1884
1885         if (lcdc_dev->soc_type == VOP_RK312X)
1886                 ovl = lcdc_read_bit(lcdc_dev, SYS_CTRL, m_DIRECT_PATH_EN);
1887
1888         return ovl;
1889 }
1890
1891 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1892         .open = rk312x_lcdc_open,
1893         .load_screen = rk312x_load_screen,
1894         .set_par = rk312x_lcdc_set_par,
1895         .pan_display = rk312x_lcdc_pan_display,
1896         .blank = rk312x_lcdc_blank,
1897         .ioctl = rk312x_lcdc_ioctl,
1898         .get_win_state = rk312x_lcdc_get_win_state,
1899         .ovl_mgr = rk312x_lcdc_ovl_mgr,
1900         .get_disp_info = rk312x_lcdc_get_disp_info,
1901         .fps_mgr = rk312x_lcdc_fps_mgr,
1902         .fb_get_win_id = rk312x_lcdc_get_win_id,
1903         .fb_win_remap = rk312x_fb_win_remap,
1904         .poll_vblank = rk312x_lcdc_poll_vblank,
1905         .get_dsp_addr = rk312x_lcdc_get_dsp_addr,
1906         .cfg_done = rk312x_lcdc_cfg_done,
1907         .dump_reg = rk312x_lcdc_reg_dump,
1908         .dpi_open = rk312x_lcdc_dpi_open,
1909         .dpi_win_sel = rk312x_lcdc_dpi_win_sel,
1910         .dpi_status = rk312x_lcdc_dpi_status,
1911         .set_dsp_bcsh_hue = rk312x_lcdc_set_bcsh_hue,
1912         .set_dsp_bcsh_bcs = rk312x_lcdc_set_bcsh_bcs,
1913         .get_dsp_bcsh_hue = rk312x_lcdc_get_bcsh_hue,
1914         .get_dsp_bcsh_bcs = rk312x_lcdc_get_bcsh_bcs,
1915         .open_bcsh = rk312x_lcdc_open_bcsh,
1916         .set_screen_scaler = rk312x_lcdc_set_scaler,
1917 };
1918 #if 0
1919 static const struct rk_lcdc_drvdata rk3036_lcdc_drvdata = {
1920         .soc_type = VOP_RK3036,
1921 };
1922 #endif
1923 static const struct rk_lcdc_drvdata rk312x_lcdc_drvdata = {
1924         .soc_type = VOP_RK312X,
1925 };
1926
1927 #if defined(CONFIG_OF)
1928 static const struct of_device_id rk312x_lcdc_dt_ids[] = {
1929 #if 0
1930         {
1931                 .compatible = "rockchip,rk3036-lcdc",
1932                 .data = (void *)&rk3036_lcdc_drvdata,
1933         },
1934 #endif
1935         {
1936                 .compatible = "rockchip,rk312x-lcdc",
1937                 .data = (void *)&rk312x_lcdc_drvdata,
1938         },
1939 };
1940 #endif
1941
1942 static int rk312x_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1943 {
1944         struct device_node *np = lcdc_dev->dev->of_node;
1945         const struct of_device_id *match;
1946         const struct rk_lcdc_drvdata *lcdc_drvdata;
1947
1948 #if defined(CONFIG_ROCKCHIP_IOMMU)
1949         int val;
1950         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1951                 lcdc_dev->driver.iommu_enabled = 0;
1952         else
1953                 lcdc_dev->driver.iommu_enabled = val;
1954 #else
1955         lcdc_dev->driver.iommu_enabled = 0;
1956 #endif
1957         match = of_match_node(rk312x_lcdc_dt_ids, np);
1958         if (match) {
1959                 lcdc_drvdata = (const struct rk_lcdc_drvdata *)match->data;
1960                 lcdc_dev->soc_type = lcdc_drvdata->soc_type;
1961         } else {
1962                 return PTR_ERR(match);
1963         }
1964
1965         return 0;
1966 }
1967
1968 static int rk312x_lcdc_probe(struct platform_device *pdev)
1969 {
1970         struct lcdc_device *lcdc_dev = NULL;
1971         struct rk_lcdc_driver *dev_drv;
1972         struct device *dev = &pdev->dev;
1973         struct resource *res;
1974         int ret;
1975
1976         lcdc_dev = devm_kzalloc(dev, sizeof(struct lcdc_device), GFP_KERNEL);
1977         if (!lcdc_dev) {
1978                 dev_err(&pdev->dev, "rk312x lcdc device kzalloc fail!\n");
1979                 return -ENOMEM;
1980         }
1981         platform_set_drvdata(pdev, lcdc_dev);
1982         lcdc_dev->dev = dev;
1983         if (rk312x_lcdc_parse_dt(lcdc_dev)) {
1984                 dev_err(lcdc_dev->dev, "rk312x lcdc parse dt failed!\n");
1985                 goto err_parse_dt;
1986         }
1987
1988         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1989         lcdc_dev->reg_phy_base = res->start;
1990         lcdc_dev->len = resource_size(res);
1991         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1992         if (IS_ERR(lcdc_dev->regs)) {
1993                 ret = PTR_ERR(lcdc_dev->regs);
1994                 goto err_remap_reg;
1995         }
1996
1997         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1998         if (IS_ERR(lcdc_dev->regsbak)) {
1999                 dev_err(&pdev->dev, "rk312x lcdc device kmalloc fail!\n");
2000                 ret = PTR_ERR(lcdc_dev->regsbak);
2001                 goto err_remap_reg;
2002         }
2003
2004         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
2005         dev_drv = &lcdc_dev->driver;
2006         dev_drv->dev = dev;
2007         dev_drv->prop = PRMRY;
2008         dev_drv->id = lcdc_dev->id;
2009         dev_drv->ops = &lcdc_drv_ops;
2010         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
2011         spin_lock_init(&lcdc_dev->reg_lock);
2012
2013         lcdc_dev->irq = platform_get_irq(pdev, 0);
2014         if (lcdc_dev->irq < 0) {
2015                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
2016                         lcdc_dev->id);
2017                 ret = -ENXIO;
2018                 goto err_request_irq;
2019         }
2020
2021         ret = devm_request_irq(dev, lcdc_dev->irq, rk312x_lcdc_isr,
2022                                IRQF_DISABLED, dev_name(dev), lcdc_dev);
2023         if (ret) {
2024                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
2025                         lcdc_dev->irq, ret);
2026                 goto err_request_irq;
2027         }
2028
2029         if (dev_drv->iommu_enabled)
2030                 strcpy(dev_drv->mmu_dts_name, VOP_IOMMU_COMPATIBLE_NAME);
2031
2032         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
2033         if (ret < 0) {
2034                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
2035                 goto err_register_fb;
2036         }
2037         lcdc_dev->screen = dev_drv->screen0;
2038
2039         dev_info(dev, "lcdc%d probe ok, iommu %s\n",
2040                  lcdc_dev->id, dev_drv->iommu_enabled ? "enabled" : "disabled");
2041         return 0;
2042
2043 err_register_fb:
2044 err_request_irq:
2045         devm_kfree(lcdc_dev->dev, lcdc_dev->regsbak);
2046 err_remap_reg:
2047 err_parse_dt:
2048         devm_kfree(&pdev->dev, lcdc_dev);
2049         return ret;
2050 }
2051
2052 #if defined(CONFIG_PM)
2053 static int rk312x_lcdc_suspend(struct platform_device *pdev, pm_message_t state)
2054 {
2055         return 0;
2056 }
2057
2058 static int rk312x_lcdc_resume(struct platform_device *pdev)
2059 {
2060         return 0;
2061 }
2062 #else
2063 #define rk312x_lcdc_suspend NULL
2064 #define rk312x_lcdc_resume  NULL
2065 #endif
2066
2067 static int rk312x_lcdc_remove(struct platform_device *pdev)
2068 {
2069         return 0;
2070 }
2071
2072 static void rk312x_lcdc_shutdown(struct platform_device *pdev)
2073 {
2074         struct lcdc_device *lcdc_dev = platform_get_drvdata(pdev);
2075
2076         rk312x_lcdc_deinit(lcdc_dev);
2077         rk312x_lcdc_clk_disable(lcdc_dev);
2078         rk_disp_pwr_disable(&lcdc_dev->driver);
2079 }
2080
2081 static struct platform_driver rk312x_lcdc_driver = {
2082         .probe = rk312x_lcdc_probe,
2083         .remove = rk312x_lcdc_remove,
2084         .driver = {
2085                    .name = "rk312x-lcdc",
2086                    .owner = THIS_MODULE,
2087                    .of_match_table = of_match_ptr(rk312x_lcdc_dt_ids),
2088                    },
2089         .suspend = rk312x_lcdc_suspend,
2090         .resume = rk312x_lcdc_resume,
2091         .shutdown = rk312x_lcdc_shutdown,
2092 };
2093
2094 static int __init rk312x_lcdc_module_init(void)
2095 {
2096         return platform_driver_register(&rk312x_lcdc_driver);
2097 }
2098
2099 static void __exit rk312x_lcdc_module_exit(void)
2100 {
2101         platform_driver_unregister(&rk312x_lcdc_driver);
2102 }
2103
2104 fs_initcall(rk312x_lcdc_module_init);
2105 module_exit(rk312x_lcdc_module_exit);