4 #include<linux/rk_fb.h>
9 /*******************register definition**********************/
11 #define REG_CFG_DONE (0x0000)
12 #define VERSION_INFO (0x0004)
13 #define m_RTL_VERSION (0xffff<<0)
14 #define m_FPGA_VERSION (0xffff<<16)
15 #define VOP_FULL_RK3288_V1_0 0x03007236
16 #define VOP_FULL_RK3288_V1_1 0x0a050a01
17 #define SYS_CTRL (0x0008)
18 #define v_DIRECT_PATH_EN(x) (((x)&1)<<0)
19 #define v_DIRECT_PATCH_SEL(x) (((x)&3)<<1)
20 #define v_DOUB_CHANNEL_EN(x) (((x)&1)<<3)
21 #define v_DOUB_CH_OVERLAP_NUM(x) (((x)&0xf)<<4)
22 #define v_EDPI_HALT_EN(x) (((x)&1)<<8)
23 #define v_EDPI_WMS_MODE(x) (((x)&1)<<9)
24 #define v_EDPI_WMS_FS(x) (((x)&1)<<10)
25 #define v_RGB_OUT_EN(x) (((x)&1)<<12)
26 #define v_HDMI_OUT_EN(x) (((x)&1)<<13)
27 #define v_EDP_OUT_EN(x) (((x)&1)<<14)
28 #define v_MIPI_OUT_EN(x) (((x)&1)<<15)
29 #define v_DMA_BURST_LENGTH(x) (((x)&3)<<18)
30 #define v_MMU_EN(x) (((x)&1)<<20)
31 #define v_DMA_STOP(x) (((x)&1)<<21)
32 #define v_STANDBY_EN(x) (((x)&1)<<22)
33 #define v_AUTO_GATING_EN(x) (((x)&1)<<23)
35 #define m_DIRECT_PATH_EN (1<<0)
36 #define m_DIRECT_PATCH_SEL (3<<1)
37 #define m_DOUB_CHANNEL_EN (1<<3)
38 #define m_DOUB_CH_OVERLAP_NUM (0xf<<4)
39 #define m_EDPI_HALT_EN (1<<8)
40 #define m_EDPI_WMS_MODE (1<<9)
41 #define m_EDPI_WMS_FS (1<<10)
42 #define m_RGB_OUT_EN (1<<12)
43 #define m_HDMI_OUT_EN (1<<13)
44 #define m_EDP_OUT_EN (1<<14)
45 #define m_MIPI_OUT_EN (1<<15)
46 #define m_DMA_BURST_LENGTH (3<<18)
47 #define m_MMU_EN (1<<20)
48 #define m_DMA_STOP (1<<21)
49 #define m_STANDBY_EN (1<<22)
50 #define m_AUTO_GATING_EN (1<<23)
51 #define SYS_CTRL1 (0x000c)
52 #define v_NOC_HURRY_EN(x) (((x)&0x1 )<<0 )
53 #define v_NOC_HURRY_VALUE(x) (((x)&0x3 )<<1 )
54 #define v_NOC_HURRY_THRESHOLD(x) (((x)&0x3f)<<3 )
55 #define v_NOC_QOS_EN(x) (((x)&0x1 )<<9 )
56 #define v_NOC_WIN_QOS(x) (((x)&0x3 )<<10)
57 #define v_AXI_MAX_OUTSTANDING_EN(x) (((x)&0x1 )<<12)
58 #define v_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<13)
60 #define m_NOC_HURRY_EN (0x1 <<0 )
61 #define m_NOC_HURRY_VALUE (0x3 <<1 )
62 #define m_NOC_HURRY_THRESHOLD (0x3f<<3 )
63 #define m_NOC_QOS_EN (0x1 <<9 )
64 #define m_NOC_WIN_QOS (0x3 <<10)
65 #define m_AXI_MAX_OUTSTANDING_EN (0x1 <<12)
66 #define m_AXI_OUTSTANDING_MAX_NUM (0x1f<<13)
68 #define DSP_CTRL0 (0x0010)
69 #define v_DSP_OUT_MODE(x) (((x)&0x0f)<<0)
70 #define v_DSP_HSYNC_POL(x) (((x)&1)<<4)
71 #define v_DSP_VSYNC_POL(x) (((x)&1)<<5)
72 #define v_DSP_DEN_POL(x) (((x)&1)<<6)
73 #define v_DSP_DCLK_POL(x) (((x)&1)<<7)
74 #define v_DSP_DCLK_DDR(x) (((x)&1)<<8)
75 #define v_DSP_DDR_PHASE(x) (((x)&1)<<9)
76 #define v_DSP_INTERLACE(x) (((x)&1)<<10)
77 #define v_DSP_FIELD_POL(x) (((x)&1)<<11)
78 #define v_DSP_BG_SWAP(x) (((x)&1)<<12)
79 #define v_DSP_RB_SWAP(x) (((x)&1)<<13)
80 #define v_DSP_RG_SWAP(x) (((x)&1)<<14)
81 #define v_DSP_DELTA_SWAP(x) (((x)&1)<<15)
82 #define v_DSP_DUMMY_SWAP(x) (((x)&1)<<16)
83 #define v_DSP_OUT_ZERO(x) (((x)&1)<<17)
84 #define v_DSP_BLANK_EN(x) (((x)&1)<<18)
85 #define v_DSP_BLACK_EN(x) (((x)&1)<<19)
86 #define v_DSP_CCIR656_AVG(x) (((x)&1)<<20)
87 #define v_DSP_YUV_CLIP(x) (((x)&1)<<21)
88 #define v_DSP_X_MIR_EN(x) (((x)&1)<<22)
89 #define v_DSP_Y_MIR_EN(x) (((x)&1)<<23)
90 #define m_DSP_OUT_MODE (0x0f<<0)
91 #define m_DSP_HSYNC_POL (1<<4)
92 #define m_DSP_VSYNC_POL (1<<5)
93 #define m_DSP_DEN_POL (1<<6)
94 #define m_DSP_DCLK_POL (1<<7)
95 #define m_DSP_DCLK_DDR (1<<8)
96 #define m_DSP_DDR_PHASE (1<<9)
97 #define m_DSP_INTERLACE (1<<10)
98 #define m_DSP_FIELD_POL (1<<11)
99 #define m_DSP_BG_SWAP (1<<12)
100 #define m_DSP_RB_SWAP (1<<13)
101 #define m_DSP_RG_SWAP (1<<14)
102 #define m_DSP_DELTA_SWAP (1<<15)
103 #define m_DSP_DUMMY_SWAP (1<<16)
104 #define m_DSP_OUT_ZERO (1<<17)
105 #define m_DSP_BLANK_EN (1<<18)
106 #define m_DSP_BLACK_EN (1<<19)
107 #define m_DSP_CCIR656_AVG (1<<20)
108 #define m_DSP_YUV_CLIP (1<<21)
109 #define m_DSP_X_MIR_EN (1<<22)
110 #define m_DSP_Y_MIR_EN (1<<23)
112 #define DSP_CTRL1 (0x0014)
113 #define v_DSP_LUT_EN(x) (((x)&1)<<0)
114 #define v_PRE_DITHER_DOWN_EN(x) (((x)&1)<<1)
115 #define v_DITHER_DOWN_EN(x) (((x)&1)<<2)
116 #define v_DITHER_DOWN_MODE(x) (((x)&1)<<3)
117 #define v_DITHER_DOWN_SEL(x) (((x)&1)<<4)
118 #define v_DITHER_UP_EN(x) (((x)&1)<<6)
119 #define v_DSP_LAYER0_SEL(x) (((x)&3)<<8)
120 #define v_DSP_LAYER1_SEL(x) (((x)&3)<<10)
121 #define v_DSP_LAYER2_SEL(x) (((x)&3)<<12)
122 #define v_DSP_LAYER3_SEL(x) (((x)&3)<<14)
123 #define m_DSP_LUT_EN (1<<0)
124 #define m_PRE_DITHER_DOWN_EN (1<<1)
125 #define m_DITHER_DOWN_EN (1<<2)
126 #define m_DITHER_DOWN_MODE (1<<3)
127 #define m_DITHER_DOWN_SEL (1<<4)
128 #define m_DITHER_UP_EN (1<<6)
129 #define m_DSP_LAYER0_SEL (3<<8)
130 #define m_DSP_LAYER1_SEL (3<<10)
131 #define m_DSP_LAYER2_SEL (3<<12)
132 #define m_DSP_LAYER3_SEL (3<<14)
134 #define DSP_BG (0x0018)
135 #define v_DSP_BG_BLUE(x) (((x<<2)&0x3ff)<<0)
136 #define v_DSP_BG_GREEN(x) (((x<<2)&0x3ff)<<10)
137 #define v_DSP_BG_RED(x) (((x<<2)&0x3ff)<<20)
138 #define m_DSP_BG_BLUE (0x3ff<<0)
139 #define m_DSP_BG_GREEN (0x3ff<<10)
140 #define m_DSP_BG_RED (0x3ff<<20)
142 #define MCU_CTRL (0x001c)
143 #define v_MCU_PIX_TOTAL(x) (((x)&0x3f)<<0)
144 #define v_MCU_CS_PST(x) (((x)&0xf)<<6)
145 #define v_MCU_CS_PEND(x) (((x)&0x3f)<<10)
146 #define v_MCU_RW_PST(x) (((x)&0xf)<<16)
147 #define v_MCU_RW_PEND(x) (((x)&0x3f)<<20)
148 #define v_MCU_CLK_SEL(x) (((x)&1)<<26)
149 #define v_MCU_HOLD_MODE(x) (((x)&1)<<27)
150 #define v_MCU_FRAME_ST(x) (((x)&1)<<28)
151 #define v_MCU_RS(x) (((x)&1)<<29)
152 #define v_MCU_BYPASS(x) (((x)&1)<<30)
153 #define v_MCU_TYPE(x) (((x)&1)<<31)
154 #define m_MCU_PIX_TOTAL (0x3f<<0)
155 #define m_MCU_CS_PST (0xf<<6)
156 #define m_MCU_CS_PEND (0x3f<<10)
157 #define m_MCU_RW_PST (0xf<<16)
158 #define m_MCU_RW_PEND (0x3f<<20)
159 #define m_MCU_CLK_SEL (1<<26)
160 #define m_MCU_HOLD_MODE (1<<27)
161 #define m_MCU_FRAME_ST (1<<28)
162 #define m_MCU_RS (1<<29)
163 #define m_MCU_BYPASS (1<<30)
164 #define m_MCU_TYPE ((u32)1<<31)
166 #define INTR_CTRL0 (0x0020)
167 #define v_DSP_HOLD_VALID_INTR_STS(x) (((x)&1)<<0)
168 #define v_FS_INTR_STS(x) (((x)&1)<<1)
169 #define v_LINE_FLAG_INTR_STS(x) (((x)&1)<<2)
170 #define v_BUS_ERROR_INTR_STS(x) (((x)&1)<<3)
171 #define v_DSP_HOLD_VALID_INTR_EN(x) (((x)&1)<<4)
172 #define v_FS_INTR_EN(x) (((x)&1)<<5)
173 #define v_LINE_FLAG_INTR_EN(x) (((x)&1)<<6)
174 #define v_BUS_ERROR_INTR_EN(x) (((x)&1)<<7)
175 #define v_DSP_HOLD_VALID_INTR_CLR(x) (((x)&1)<<8)
176 #define v_FS_INTR_CLR(x) (((x)&1)<<9)
177 #define v_LINE_FLAG_INTR_CLR(x) (((x)&1)<<10)
178 #define v_BUS_ERROR_INTR_CLR(x) (((x)&1)<<11)
179 #define v_DSP_LINE_FLAG_NUM(x) (((x)&0xfff)<<12)
181 #define m_DSP_HOLD_VALID_INTR_STS (1<<0)
182 #define m_FS_INTR_STS (1<<1)
183 #define m_LINE_FLAG_INTR_STS (1<<2)
184 #define m_BUS_ERROR_INTR_STS (1<<3)
185 #define m_DSP_HOLD_VALID_INTR_EN (1<<4)
186 #define m_FS_INTR_EN (1<<5)
187 #define m_LINE_FLAG_INTR_EN (1<<6)
188 #define m_BUS_ERROR_INTR_EN (1<<7)
189 #define m_DSP_HOLD_VALID_INTR_CLR (1<<8)
190 #define m_FS_INTR_CLR (1<<9)
191 #define m_LINE_FLAG_INTR_CLR (1<<10)
192 #define m_BUS_ERROR_INTR_CLR (1<<11)
193 #define m_DSP_LINE_FLAG_NUM (0xfff<<12)
195 #define INTR_CTRL1 (0x0024)
196 #define v_WIN0_EMPTY_INTR_STS(x) (((x)&1)<<0)
197 #define v_WIN1_EMPTY_INTR_STS(x) (((x)&1)<<1)
198 #define v_WIN2_EMPTY_INTR_STS(x) (((x)&1)<<2)
199 #define v_WIN3_EMPTY_INTR_STS(x) (((x)&1)<<3)
200 #define v_HWC_EMPTY_INTR_STS(x) (((x)&1)<<4)
201 #define v_POST_BUF_EMPTY_INTR_STS(x) (((x)&1)<<5)
202 #define v_PWM_GEN_INTR_STS(x) (((x)&1)<<6)
203 #define v_WIN0_EMPTY_INTR_EN(x) (((x)&1)<<8)
204 #define v_WIN1_EMPTY_INTR_EN(x) (((x)&1)<<9)
205 #define v_WIN2_EMPTY_INTR_EN(x) (((x)&1)<<10)
206 #define v_WIN3_EMPTY_INTR_EN(x) (((x)&1)<<11)
207 #define v_HWC_EMPTY_INTR_EN(x) (((x)&1)<<12)
208 #define v_POST_BUF_EMPTY_INTR_EN(x) (((x)&1)<<13)
209 #define v_PWM_GEN_INTR_EN(x) (((x)&1)<<14)
210 #define v_WIN0_EMPTY_INTR_CLR(x) (((x)&1)<<16)
211 #define v_WIN1_EMPTY_INTR_CLR(x) (((x)&1)<<17)
212 #define v_WIN2_EMPTY_INTR_CLR(x) (((x)&1)<<18)
213 #define v_WIN3_EMPTY_INTR_CLR(x) (((x)&1)<<19)
214 #define v_HWC_EMPTY_INTR_CLR(x) (((x)&1)<<20)
215 #define v_POST_BUF_EMPTY_INTR_CLR(x) (((x)&1)<<21)
216 #define v_PWM_GEN_INTR_CLR(x) (((x)&1)<<22)
218 #define m_WIN0_EMPTY_INTR_STS (1<<0)
219 #define m_WIN1_EMPTY_INTR_STS (1<<1)
220 #define m_WIN2_EMPTY_INTR_STS (1<<2)
221 #define m_WIN3_EMPTY_INTR_STS (1<<3)
222 #define m_HWC_EMPTY_INTR_STS (1<<4)
223 #define m_POST_BUF_EMPTY_INTR_STS (1<<5)
224 #define m_PWM_GEN_INTR_STS (1<<6)
225 #define m_WIN0_EMPTY_INTR_EN (1<<8)
226 #define m_WIN1_EMPTY_INTR_EN (1<<9)
227 #define m_WIN2_EMPTY_INTR_EN (1<<10)
228 #define m_WIN3_EMPTY_INTR_EN (1<<11)
229 #define m_HWC_EMPTY_INTR_EN (1<<12)
230 #define m_POST_BUF_EMPTY_INTR_EN (1<<13)
231 #define m_PWM_GEN_INTR_EN (1<<14)
232 #define m_WIN0_EMPTY_INTR_CLR (1<<16)
233 #define m_WIN1_EMPTY_INTR_CLR (1<<17)
234 #define m_WIN2_EMPTY_INTR_CLR (1<<18)
235 #define m_WIN3_EMPTY_INTR_CLR (1<<19)
236 #define m_HWC_EMPTY_INTR_CLR (1<<20)
237 #define m_POST_BUF_EMPTY_INTR_CLR (1<<21)
238 #define m_PWM_GEN_INTR_CLR (1<<22)
241 #define WIN0_CTRL0 (0x0030)
242 #define v_WIN0_EN(x) (((x)&1)<<0)
243 #define v_WIN0_DATA_FMT(x) (((x)&7)<<1)
244 #define v_WIN0_FMT_10(x) (((x)&1)<<4)
245 #define v_WIN0_LB_MODE(x) (((x)&7)<<5)
246 #define v_WIN0_INTERLACE_READ(x) (((x)&1)<<8)
247 #define v_WIN0_NO_OUTSTANDING(x) (((x)&1)<<9)
248 #define v_WIN0_CSC_MODE(x) (((x)&3)<<10)
249 #define v_WIN0_RB_SWAP(x) (((x)&1)<<12)
250 #define v_WIN0_ALPHA_SWAP(x) (((x)&1)<<13)
251 #define v_WIN0_MID_SWAP(x) (((x)&1)<<14)
252 #define v_WIN0_UV_SWAP(x) (((x)&1)<<15)
253 #define v_WIN0_PPAS_ZERO_EN(x) (((x)&1)<<16)
254 #define v_WIN0_YRGB_DEFLICK(x) (((x)&1)<<18)
255 #define v_WIN0_CBR_DEFLICK(x) (((x)&1)<<19)
256 #define v_WIN0_YUV_CLIP(x) (((x)&1)<<20)
258 #define m_WIN0_EN (1<<0)
259 #define m_WIN0_DATA_FMT (7<<1)
260 #define m_WIN0_FMT_10 (1<<4)
261 #define m_WIN0_LB_MODE (7<<5)
262 #define m_WIN0_INTERLACE_READ (1<<8)
263 #define m_WIN0_NO_OUTSTANDING (1<<9)
264 #define m_WIN0_CSC_MODE (3<<10)
265 #define m_WIN0_RB_SWAP (1<<12)
266 #define m_WIN0_ALPHA_SWAP (1<<13)
267 #define m_WIN0_MID_SWAP (1<<14)
268 #define m_WIN0_UV_SWAP (1<<15)
269 #define m_WIN0_PPAS_ZERO_EN (1<<16)
270 #define m_WIN0_YRGB_DEFLICK (1<<18)
271 #define m_WIN0_CBR_DEFLICK (1<<19)
272 #define m_WIN0_YUV_CLIP (1<<20)
274 #define WIN0_CTRL1 (0x0034)
275 #define v_WIN0_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
276 #define v_WIN0_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
277 #define v_WIN0_BIC_COE_SEL(x) (((x)&3)<<2)
278 #define v_WIN0_VSD_YRGB_GT4(x) (((x)&1)<<4)
279 #define v_WIN0_VSD_YRGB_GT2(x) (((x)&1)<<5)
280 #define v_WIN0_VSD_CBR_GT4(x) (((x)&1)<<6)
281 #define v_WIN0_VSD_CBR_GT2(x) (((x)&1)<<7)
282 #define v_WIN0_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
283 #define v_WIN0_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
284 #define v_WIN0_LINE_LOAD_MODE(x) (((x)&1)<<15)
285 #define v_WIN0_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
286 #define v_WIN0_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
287 #define v_WIN0_YRGB_HSD_MODE(x) (((x)&3)<<20)
288 #define v_WIN0_YRGB_VSU_MODE(x) (((x)&1)<<22)
289 #define v_WIN0_YRGB_VSD_MODE(x) (((x)&1)<<23)
290 #define v_WIN0_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
291 #define v_WIN0_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
292 #define v_WIN0_CBR_HSD_MODE(x) (((x)&3)<<28)
293 #define v_WIN0_CBR_VSU_MODE(x) (((x)&1)<<30)
294 #define v_WIN0_CBR_VSD_MODE(x) (((x)&1)<<31)
296 #define m_WIN0_YRGB_AXI_GATHER_EN (1<<0)
297 #define m_WIN0_CBR_AXI_GATHER_EN (1<<1)
298 #define m_WIN0_BIC_COE_SEL (3<<2)
299 #define m_WIN0_VSD_YRGB_GT4 (1<<4)
300 #define m_WIN0_VSD_YRGB_GT2 (1<<5)
301 #define m_WIN0_VSD_CBR_GT4 (1<<6)
302 #define m_WIN0_VSD_CBR_GT2 (1<<7)
303 #define m_WIN0_YRGB_AXI_GATHER_NUM (0xf<<8)
304 #define m_WIN0_CBR_AXI_GATHER_NUM (7<<12)
305 #define m_WIN0_LINE_LOAD_MODE (1<<15)
306 #define m_WIN0_YRGB_HOR_SCL_MODE (3<<16)
307 #define m_WIN0_YRGB_VER_SCL_MODE (3<<18)
308 #define m_WIN0_YRGB_HSD_MODE (3<<20)
309 #define m_WIN0_YRGB_VSU_MODE (1<<22)
310 #define m_WIN0_YRGB_VSD_MODE (1<<23)
311 #define m_WIN0_CBR_HOR_SCL_MODE (3<<24)
312 #define m_WIN0_CBR_VER_SCL_MODE (3<<26)
313 #define m_WIN0_CBR_HSD_MODE (3<<28)
314 #define m_WIN0_CBR_VSU_MODE ((u32)1<<30)
315 #define m_WIN0_CBR_VSD_MODE ((u32)1<<31)
317 #define WIN0_COLOR_KEY (0x0038)
318 #define v_WIN0_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
319 #define v_WIN0_COLOR_KEY_EN(x) (((x)&1)<<31)
320 #define m_WIN0_COLOR_KEY (0x3fffffff<<0)
321 #define m_WIN0_COLOR_KEY_EN ((u32)1<<31)
323 #define WIN0_VIR (0x003c)
324 #define v_WIN0_VIR_STRIDE(x) (((x)&0x3fff)<<0)
325 #define v_WIN0_VIR_STRIDE_UV(x) (((x)&0x3fff)<<16)
326 #define m_WIN0_VIR_STRIDE (0x3fff<<0)
327 #define m_WIN0_VIR_STRIDE_UV (0x3fff<<16)
329 #define WIN0_YRGB_MST (0x0040)
330 #define WIN0_CBR_MST (0x0044)
331 #define WIN0_ACT_INFO (0x0048)
332 #define v_WIN0_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
333 #define v_WIN0_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
334 #define m_WIN0_ACT_WIDTH (0x1fff<<0)
335 #define m_WIN0_ACT_HEIGHT (0x1fff<<16)
337 #define WIN0_DSP_INFO (0x004c)
338 #define v_WIN0_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
339 #define v_WIN0_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
340 #define m_WIN0_DSP_WIDTH (0xfff<<0)
341 #define m_WIN0_DSP_HEIGHT (0xfff<<16)
343 #define WIN0_DSP_ST (0x0050)
344 #define v_WIN0_DSP_XST(x) (((x)&0x1fff)<<0)
345 #define v_WIN0_DSP_YST(x) (((x)&0x1fff)<<16)
346 #define m_WIN0_DSP_XST (0x1fff<<0)
347 #define m_WIN0_DSP_YST (0x1fff<<16)
349 #define WIN0_SCL_FACTOR_YRGB (0x0054)
350 #define v_WIN0_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
351 #define v_WIN0_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
352 #define m_WIN0_HS_FACTOR_YRGB (0xffff<<0)
353 #define m_WIN0_VS_FACTOR_YRGB ((u32)0xffff<<16)
355 #define WIN0_SCL_FACTOR_CBR (0x0058)
356 #define v_WIN0_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
357 #define v_WIN0_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
358 #define m_WIN0_HS_FACTOR_CBR (0xffff<<0)
359 #define m_WIN0_VS_FACTOR_CBR ((u32)0xffff<<16)
361 #define WIN0_SCL_OFFSET (0x005c)
362 #define v_WIN0_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
363 #define v_WIN0_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
364 #define v_WIN0_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
365 #define v_WIN0_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
367 #define m_WIN0_HS_OFFSET_YRGB (0xff<<0)
368 #define m_WIN0_HS_OFFSET_CBR (0xff<<8)
369 #define m_WIN0_VS_OFFSET_YRGB (0xff<<16)
370 #define m_WIN0_VS_OFFSET_CBR ((u32)0xff<<24)
372 #define WIN0_SRC_ALPHA_CTRL (0x0060)
373 #define v_WIN0_SRC_ALPHA_EN(x) (((x)&1)<<0)
374 #define v_WIN0_SRC_COLOR_M0(x) (((x)&1)<<1)
375 #define v_WIN0_SRC_ALPHA_M0(x) (((x)&1)<<2)
376 #define v_WIN0_SRC_BLEND_M0(x) (((x)&3)<<3)
377 #define v_WIN0_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
378 #define v_WIN0_SRC_FACTOR_M0(x) (((x)&7)<<6)
379 #define v_WIN0_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
380 #define v_WIN0_FADING_VALUE(x) (((x)&0xff)<<24)
382 #define m_WIN0_SRC_ALPHA_EN (1<<0)
383 #define m_WIN0_SRC_COLOR_M0 (1<<1)
384 #define m_WIN0_SRC_ALPHA_M0 (1<<2)
385 #define m_WIN0_SRC_BLEND_M0 (3<<3)
386 #define m_WIN0_SRC_ALPHA_CAL_M0 (1<<5)
387 #define m_WIN0_SRC_FACTOR_M0 (7<<6)
388 #define m_WIN0_SRC_GLOBAL_ALPHA (0xff<<16)
389 #define m_WIN0_FADING_VALUE (0xff<<24)
391 #define WIN0_DST_ALPHA_CTRL (0x0064)
392 #define v_WIN0_DST_FACTOR_M0(x) (((x)&7)<<6)
393 #define m_WIN0_DST_FACTOR_M0 (7<<6)
395 #define WIN0_FADING_CTRL (0x0068)
396 #define v_WIN0_FADING_OFFSET_R(x) (((x)&0xff)<<0)
397 #define v_WIN0_FADING_OFFSET_G(x) (((x)&0xff)<<8)
398 #define v_WIN0_FADING_OFFSET_B(x) (((x)&0xff)<<16)
399 #define v_WIN0_FADING_EN(x) (((x)&1)<<24)
401 #define m_WIN0_FADING_OFFSET_R (0xff<<0)
402 #define m_WIN0_FADING_OFFSET_G (0xff<<8)
403 #define m_WIN0_FADING_OFFSET_B (0xff<<16)
404 #define m_WIN0_FADING_EN (1<<24)
407 #define WIN1_CTRL0 (0x0070)
408 #define v_WIN1_EN(x) (((x)&1)<<0)
409 #define v_WIN1_DATA_FMT(x) (((x)&7)<<1)
410 #define v_WIN1_FMT_10(x) (((x)&1)<<4)
411 #define v_WIN1_LB_MODE(x) (((x)&7)<<5)
412 #define v_WIN1_INTERLACE_READ_MODE(x) (((x)&1)<<8)
413 #define v_WIN1_NO_OUTSTANDING(x) (((x)&1)<<9)
414 #define v_WIN1_CSC_MODE(x) (((x)&3)<<10)
415 #define v_WIN1_RB_SWAP(x) (((x)&1)<<12)
416 #define v_WIN1_ALPHA_SWAP(x) (((x)&1)<<13)
417 #define v_WIN1_MID_SWAP(x) (((x)&1)<<14)
418 #define v_WIN1_UV_SWAP(x) (((x)&1)<<15)
419 #define v_WIN1_PPAS_ZERO_EN(x) (((x)&1)<<16)
420 #define v_WIN1_YRGB_DEFLICK(x) (((x)&1)<<18)
421 #define v_WIN1_CBR_DEFLICK(x) (((x)&1)<<19)
422 #define v_WIN1_YUV_CLIP(x) (((x)&1)<<20)
424 #define m_WIN1_EN (1<<0)
425 #define m_WIN1_DATA_FMT (7<<1)
426 #define m_WIN1_FMT_10 (1<<4)
427 #define m_WIN1_LB_MODE (7<<5)
428 #define m_WIN1_INTERLACE_READ_MODE (1<<8)
429 #define m_WIN1_NO_OUTSTANDING (1<<9)
430 #define m_WIN1_CSC_MODE (3<<10)
431 #define m_WIN1_RB_SWAP (1<<12)
432 #define m_WIN1_ALPHA_SWAP (1<<13)
433 #define m_WIN1_MID_SWAP (1<<14)
434 #define m_WIN1_UV_SWAP (1<<15)
435 #define m_WIN1_PPAS_ZERO_EN (1<<16)
436 #define m_WIN1_YRGB_DEFLICK (1<<18)
437 #define m_WIN1_CBR_DEFLICK (1<<19)
438 #define m_WIN1_YUV_CLIP (1<<20)
440 #define WIN1_CTRL1 (0x0074)
441 #define v_WIN1_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
442 #define v_WIN1_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
443 #define v_WIN1_BIC_COE_SEL(x) (((x)&3)<<2)
444 #define v_WIN1_VSD_YRGB_GT4(x) (((x)&1)<<4)
445 #define v_WIN1_VSD_YRGB_GT2(x) (((x)&1)<<5)
446 #define v_WIN1_VSD_CBR_GT4(x) (((x)&1)<<6)
447 #define v_WIN1_VSD_CBR_GT2(x) (((x)&1)<<7)
448 #define v_WIN1_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
449 #define v_WIN1_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
450 #define v_WIN1_LINE_LOAD_MODE(x) (((x)&1)<<15)
451 #define v_WIN1_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
452 #define v_WIN1_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
453 #define v_WIN1_YRGB_HSD_MODE(x) (((x)&3)<<20)
454 #define v_WIN1_YRGB_VSU_MODE(x) (((x)&1)<<22)
455 #define v_WIN1_YRGB_VSD_MODE(x) (((x)&1)<<23)
456 #define v_WIN1_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
457 #define v_WIN1_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
458 #define v_WIN1_CBR_HSD_MODE(x) (((x)&3)<<28)
459 #define v_WIN1_CBR_VSU_MODE(x) (((x)&1)<<30)
460 #define v_WIN1_CBR_VSD_MODE(x) (((x)&1)<<31)
462 #define m_WIN1_YRGB_AXI_GATHER_EN (1<<0)
463 #define m_WIN1_CBR_AXI_GATHER_EN (1<<1)
464 #define m_WIN1_BIC_COE_SEL (3<<2)
465 #define m_WIN1_VSD_YRGB_GT4 (1<<4)
466 #define m_WIN1_VSD_YRGB_GT2 (1<<5)
467 #define m_WIN1_VSD_CBR_GT4 (1<<6)
468 #define m_WIN1_VSD_CBR_GT2 (1<<7)
469 #define m_WIN1_YRGB_AXI_GATHER_NUM (0xf<<8)
470 #define m_WIN1_CBR_AXI_GATHER_NUM (7<<12)
471 #define m_WIN1_LINE_LOAD_MODE (1<<15)
472 #define m_WIN1_YRGB_HOR_SCL_MODE (3<<16)
473 #define m_WIN1_YRGB_VER_SCL_MODE (3<<18)
474 #define m_WIN1_YRGB_HSD_MODE (3<<20)
475 #define m_WIN1_YRGB_VSU_MODE (1<<22)
476 #define m_WIN1_YRGB_VSD_MODE (1<<23)
477 #define m_WIN1_CBR_HOR_SCL_MODE (3<<24)
478 #define m_WIN1_CBR_VER_SCL_MODE (3<<26)
479 #define m_WIN1_CBR_HSD_MODE (3<<28)
480 #define m_WIN1_CBR_VSU_MODE (1<<30)
481 #define m_WIN1_CBR_VSD_MODE ((u32)1<<31)
483 #define WIN1_COLOR_KEY (0x0078)
484 #define v_WIN1_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
485 #define v_WIN1_COLOR_KEY_EN(x) (((x)&1)<<31)
486 #define m_WIN1_COLOR_KEY (0x3fffffff<<0)
487 #define m_WIN1_COLOR_KEY_EN ((u32)1<<31)
489 #define WIN1_VIR (0x007c)
490 #define v_WIN1_VIR_STRIDE(x) (((x)&0x3fff)<<0)
491 #define v_WIN1_VIR_STRIDE_UV(x) (((x)&0x3fff)<<16)
492 #define m_WIN1_VIR_STRIDE (0x3fff<<0)
493 #define m_WIN1_VIR_STRIDE_UV (0x3fff<<16)
495 #define WIN1_YRGB_MST (0x0080)
496 #define WIN1_CBR_MST (0x0084)
497 #define WIN1_ACT_INFO (0x0088)
498 #define v_WIN1_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
499 #define v_WIN1_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
500 #define m_WIN1_ACT_WIDTH (0x1fff<<0)
501 #define m_WIN1_ACT_HEIGHT (0x1fff<<16)
503 #define WIN1_DSP_INFO (0x008c)
504 #define v_WIN1_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
505 #define v_WIN1_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
506 #define m_WIN1_DSP_WIDTH (0xfff<<0)
507 #define m_WIN1_DSP_HEIGHT (0xfff<<16)
509 #define WIN1_DSP_ST (0x0090)
510 #define v_WIN1_DSP_XST(x) (((x)&0x1fff)<<0)
511 #define v_WIN1_DSP_YST(x) (((x)&0x1fff)<<16)
512 #define m_WIN1_DSP_XST (0x1fff<<0)
513 #define m_WIN1_DSP_YST (0x1fff<<16)
515 #define WIN1_SCL_FACTOR_YRGB (0x0094)
516 #define v_WIN1_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
517 #define v_WIN1_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
518 #define m_WIN1_HS_FACTOR_YRGB (0xffff<<0)
519 #define m_WIN1_VS_FACTOR_YRGB ((u32)0xffff<<16)
521 #define WIN1_SCL_FACTOR_CBR (0x0098)
522 #define v_WIN1_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
523 #define v_WIN1_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
524 #define m_WIN1_HS_FACTOR_CBR (0xffff<<0)
525 #define m_WIN1_VS_FACTOR_CBR ((u32)0xffff<<16)
527 #define WIN1_SCL_OFFSET (0x009c)
528 #define v_WIN1_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
529 #define v_WIN1_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
530 #define v_WIN1_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
531 #define v_WIN1_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
533 #define m_WIN1_HS_OFFSET_YRGB (0xff<<0)
534 #define m_WIN1_HS_OFFSET_CBR (0xff<<8)
535 #define m_WIN1_VS_OFFSET_YRGB (0xff<<16)
536 #define m_WIN1_VS_OFFSET_CBR ((u32)0xff<<24)
538 #define WIN1_SRC_ALPHA_CTRL (0x00a0)
539 #define v_WIN1_SRC_ALPHA_EN(x) (((x)&1)<<0)
540 #define v_WIN1_SRC_COLOR_M0(x) (((x)&1)<<1)
541 #define v_WIN1_SRC_ALPHA_M0(x) (((x)&1)<<2)
542 #define v_WIN1_SRC_BLEND_M0(x) (((x)&3)<<3)
543 #define v_WIN1_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
544 #define v_WIN1_SRC_FACTOR_M0(x) (((x)&7)<<6)
545 #define v_WIN1_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
546 #define v_WIN1_FADING_VALUE(x) (((x)&0xff)<<24)
548 #define m_WIN1_SRC_ALPHA_EN (1<<0)
549 #define m_WIN1_SRC_COLOR_M0 (1<<1)
550 #define m_WIN1_SRC_ALPHA_M0 (1<<2)
551 #define m_WIN1_SRC_BLEND_M0 (3<<3)
552 #define m_WIN1_SRC_ALPHA_CAL_M0 (1<<5)
553 #define m_WIN1_SRC_FACTOR_M0 (7<<6)
554 #define m_WIN1_SRC_GLOBAL_ALPHA (0xff<<16)
555 #define m_WIN1_FADING_VALUE (0xff<<24)
557 #define WIN1_DST_ALPHA_CTRL (0x00a4)
558 #define v_WIN1_DST_FACTOR_M0(x) (((x)&7)<<6)
559 #define m_WIN1_DST_FACTOR_M0 (7<<6)
561 #define WIN1_FADING_CTRL (0x00a8)
562 #define v_WIN1_FADING_OFFSET_R(x) (((x)&0xff)<<0)
563 #define v_WIN1_FADING_OFFSET_G(x) (((x)&0xff)<<8)
564 #define v_WIN1_FADING_OFFSET_B(x) (((x)&0xff)<<16)
565 #define v_WIN1_FADING_EN(x) (((x)&1)<<24)
567 #define m_WIN1_FADING_OFFSET_R (0xff<<0)
568 #define m_WIN1_FADING_OFFSET_G (0xff<<8)
569 #define m_WIN1_FADING_OFFSET_B (0xff<<16)
570 #define m_WIN1_FADING_EN (1<<24)
573 #define WIN2_CTRL0 (0x00b0)
574 #define v_WIN2_EN(x) (((x)&1)<<0)
575 #define v_WIN2_DATA_FMT(x) (((x)&7)<<1)
576 #define v_WIN2_MST0_EN(x) (((x)&1)<<4)
577 #define v_WIN2_MST1_EN(x) (((x)&1)<<5)
578 #define v_WIN2_MST2_EN(x) (((x)&1)<<6)
579 #define v_WIN2_MST3_EN(x) (((x)&1)<<7)
580 #define v_WIN2_INTERLACE_READ(x) (((x)&1)<<8)
581 #define v_WIN2_NO_OUTSTANDING(x) (((x)&1)<<9)
582 #define v_WIN2_CSC_MODE(x) (((x)&1)<<10)
583 #define v_WIN2_RB_SWAP(x) (((x)&1)<<12)
584 #define v_WIN2_ALPHA_SWAP(x) (((x)&1)<<13)
585 #define v_WIN2_ENDIAN_MODE(x) (((x)&1)<<14)
586 #define v_WIN2_LUT_EN(x) (((x)&1)<<18)
588 #define m_WIN2_EN (1<<0)
589 #define m_WIN2_DATA_FMT (7<<1)
590 #define m_WIN2_MST0_EN (1<<4)
591 #define m_WIN2_MST1_EN (1<<5)
592 #define m_WIN2_MST2_EN (1<<6)
593 #define m_WIN2_MST3_EN (1<<7)
594 #define m_WIN2_INTERLACE_READ (1<<8)
595 #define m_WIN2_NO_OUTSTANDING (1<<9)
596 #define m_WIN2_CSC_MODE (1<<10)
597 #define m_WIN2_RB_SWAP (1<<12)
598 #define m_WIN2_ALPHA_SWAP (1<<13)
599 #define m_WIN2_ENDIAN_MODE (1<<14)
600 #define m_WIN2_LUT_EN (1<<18)
602 #define WIN2_CTRL1 (0x00b4)
603 #define v_WIN2_AXI_GATHER_EN(x) (((x)&1)<<0)
604 #define v_WIN2_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
605 #define m_WIN2_AXI_GATHER_EN (1<<0)
606 #define m_WIN2_AXI_GATHER_NUM (0xf<<4)
608 #define WIN2_VIR0_1 (0x00b8)
609 #define v_WIN2_VIR_STRIDE0(x) (((x)&0x1fff)<<0)
610 #define v_WIN2_VIR_STRIDE1(x) (((x)&0x1fff)<<16)
611 #define m_WIN2_VIR_STRIDE0 (0x1fff<<0)
612 #define m_WIN2_VIR_STRIDE1 (0x1fff<<16)
614 #define WIN2_VIR2_3 (0x00bc)
615 #define v_WIN2_VIR_STRIDE2(x) (((x)&0x1fff)<<0)
616 #define v_WIN2_VIR_STRIDE3(x) (((x)&0x1fff)<<16)
617 #define m_WIN2_VIR_STRIDE2 (0x1fff<<0)
618 #define m_WIN2_VIR_STRIDE3 (0x1fff<<16)
620 #define WIN2_MST0 (0x00c0)
621 #define WIN2_DSP_INFO0 (0x00c4)
622 #define v_WIN2_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
623 #define v_WIN2_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
624 #define m_WIN2_DSP_WIDTH0 (0xfff<<0)
625 #define m_WIN2_DSP_HEIGHT0 (0xfff<<16)
627 #define WIN2_DSP_ST0 (0x00c8)
628 #define v_WIN2_DSP_XST0(x) (((x)&0x1fff)<<0)
629 #define v_WIN2_DSP_YST0(x) (((x)&0x1fff)<<16)
630 #define m_WIN2_DSP_XST0 (0x1fff<<0)
631 #define m_WIN2_DSP_YST0 (0x1fff<<16)
633 #define WIN2_COLOR_KEY (0x00cc)
634 #define v_WIN2_COLOR_KEY(x) (((x)&0xffffff)<<0)
635 #define v_WIN2_KEY_EN(x) (((x)&1)<<24)
636 #define m_WIN2_COLOR_KEY (0xffffff<<0)
637 #define m_WIN2_KEY_EN ((u32)1<<24)
640 #define WIN2_MST1 (0x00d0)
641 #define WIN2_DSP_INFO1 (0x00d4)
642 #define v_WIN2_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
643 #define v_WIN2_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
645 #define m_WIN2_DSP_WIDTH1 (0xfff<<0)
646 #define m_WIN2_DSP_HEIGHT1 (0xfff<<16)
648 #define WIN2_DSP_ST1 (0x00d8)
649 #define v_WIN2_DSP_XST1(x) (((x)&0x1fff)<<0)
650 #define v_WIN2_DSP_YST1(x) (((x)&0x1fff)<<16)
652 #define m_WIN2_DSP_XST1 (0x1fff<<0)
653 #define m_WIN2_DSP_YST1 (0x1fff<<16)
655 #define WIN2_SRC_ALPHA_CTRL (0x00dc)
656 #define v_WIN2_SRC_ALPHA_EN(x) (((x)&1)<<0)
657 #define v_WIN2_SRC_COLOR_M0(x) (((x)&1)<<1)
658 #define v_WIN2_SRC_ALPHA_M0(x) (((x)&1)<<2)
659 #define v_WIN2_SRC_BLEND_M0(x) (((x)&3)<<3)
660 #define v_WIN2_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
661 #define v_WIN2_SRC_FACTOR_M0(x) (((x)&7)<<6)
662 #define v_WIN2_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
663 #define v_WIN2_FADING_VALUE(x) (((x)&0xff)<<24)
666 #define m_WIN2_SRC_ALPHA_EN (1<<0)
667 #define m_WIN2_SRC_COLOR_M0 (1<<1)
668 #define m_WIN2_SRC_ALPHA_M0 (1<<2)
669 #define m_WIN2_SRC_BLEND_M0 (3<<3)
670 #define m_WIN2_SRC_ALPHA_CAL_M0 (1<<5)
671 #define m_WIN2_SRC_FACTOR_M0 (7<<6)
672 #define m_WIN2_SRC_GLOBAL_ALPHA (0xff<<16)
673 #define m_WIN2_FADING_VALUE (0xff<<24)
675 #define WIN2_MST2 (0x00e0)
676 #define WIN2_DSP_INFO2 (0x00e4)
677 #define v_WIN2_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
678 #define v_WIN2_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
680 #define m_WIN2_DSP_WIDTH2 (0xfff<<0)
681 #define m_WIN2_DSP_HEIGHT2 (0xfff<<16)
684 #define WIN2_DSP_ST2 (0x00e8)
685 #define v_WIN2_DSP_XST2(x) (((x)&0x1fff)<<0)
686 #define v_WIN2_DSP_YST2(x) (((x)&0x1fff)<<16)
687 #define m_WIN2_DSP_XST2 (0x1fff<<0)
688 #define m_WIN2_DSP_YST2 (0x1fff<<16)
690 #define WIN2_DST_ALPHA_CTRL (0x00ec)
691 #define v_WIN2_DST_FACTOR_M0(x) (((x)&7)<<6)
692 #define m_WIN2_DST_FACTOR_M0 (7<<6)
694 #define WIN2_MST3 (0x00f0)
695 #define WIN2_DSP_INFO3 (0x00f4)
696 #define v_WIN2_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
697 #define v_WIN2_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
698 #define m_WIN2_DSP_WIDTH3 (0xfff<<0)
699 #define m_WIN2_DSP_HEIGHT3 (0xfff<<16)
701 #define WIN2_DSP_ST3 (0x00f8)
702 #define v_WIN2_DSP_XST3(x) (((x)&0x1fff)<<0)
703 #define v_WIN2_DSP_YST3(x) (((x)&0x1fff)<<16)
704 #define m_WIN2_DSP_XST3 (0x1fff<<0)
705 #define m_WIN2_DSP_YST3 (0x1fff<<16)
707 #define WIN2_FADING_CTRL (0x00fc)
708 #define v_WIN2_FADING_OFFSET_R(x) (((x)&0xff)<<0)
709 #define v_WIN2_FADING_OFFSET_G(x) (((x)&0xff)<<8)
710 #define v_WIN2_FADING_OFFSET_B(x) (((x)&0xff)<<16)
711 #define v_WIN2_FADING_EN(x) (((x)&1)<<24)
713 #define m_WIN2_FADING_OFFSET_R (0xff<<0)
714 #define m_WIN2_FADING_OFFSET_G (0xff<<8)
715 #define m_WIN2_FADING_OFFSET_B (0xff<<16)
716 #define m_WIN2_FADING_EN (1<<24)
719 #define WIN3_CTRL0 (0x0100)
720 #define v_WIN3_EN(x) (((x)&1)<<0)
721 #define v_WIN3_DATA_FMT(x) (((x)&7)<<1)
722 #define v_WIN3_MST0_EN(x) (((x)&1)<<4)
723 #define v_WIN3_MST1_EN(x) (((x)&1)<<5)
724 #define v_WIN3_MST2_EN(x) (((x)&1)<<6)
725 #define v_WIN3_MST3_EN(x) (((x)&1)<<7)
726 #define v_WIN3_INTERLACE_READ(x) (((x)&1)<<8)
727 #define v_WIN3_NO_OUTSTANDING(x) (((x)&1)<<9)
728 #define v_WIN3_CSC_MODE(x) (((x)&1)<<10)
729 #define v_WIN3_RB_SWAP(x) (((x)&1)<<12)
730 #define v_WIN3_ALPHA_SWAP(x) (((x)&1)<<13)
731 #define v_WIN3_ENDIAN_MODE(x) (((x)&1)<<14)
732 #define v_WIN3_LUT_EN(x) (((x)&1)<<18)
734 #define m_WIN3_EN (1<<0)
735 #define m_WIN3_DATA_FMT (7<<1)
736 #define m_WIN3_MST0_EN (1<<4)
737 #define m_WIN3_MST1_EN (1<<5)
738 #define m_WIN3_MST2_EN (1<<6)
739 #define m_WIN3_MST3_EN (1<<7)
740 #define m_WIN3_INTERLACE_READ (1<<8)
741 #define m_WIN3_NO_OUTSTANDING (1<<9)
742 #define m_WIN3_CSC_MODE (1<<10)
743 #define m_WIN3_RB_SWAP (1<<12)
744 #define m_WIN3_ALPHA_SWAP (1<<13)
745 #define m_WIN3_ENDIAN_MODE (1<<14)
746 #define m_WIN3_LUT_EN (1<<18)
749 #define WIN3_CTRL1 (0x0104)
750 #define v_WIN3_AXI_GATHER_EN(x) (((x)&1)<<0)
751 #define v_WIN3_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
752 #define m_WIN3_AXI_GATHER_EN (1<<0)
753 #define m_WIN3_AXI_GATHER_NUM (0xf<<4)
755 #define WIN3_VIR0_1 (0x0108)
756 #define v_WIN3_VIR_STRIDE0(x) (((x)&0x1fff)<<0)
757 #define v_WIN3_VIR_STRIDE1(x) (((x)&0x1fff)<<16)
758 #define m_WIN3_VIR_STRIDE0 (0x1fff<<0)
759 #define m_WIN3_VIR_STRIDE1 (0x1fff<<16)
761 #define WIN3_VIR2_3 (0x010c)
762 #define v_WIN3_VIR_STRIDE2(x) (((x)&0x1fff)<<0)
763 #define v_WIN3_VIR_STRIDE3(x) (((x)&0x1fff)<<16)
764 #define m_WIN3_VIR_STRIDE2 (0x1fff<<0)
765 #define m_WIN3_VIR_STRIDE3 (0x1fff<<16)
767 #define WIN3_MST0 (0x0110)
768 #define WIN3_DSP_INFO0 (0x0114)
769 #define v_WIN3_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
770 #define v_WIN3_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
771 #define m_WIN3_DSP_WIDTH0 (0xfff<<0)
772 #define m_WIN3_DSP_HEIGHT0 (0xfff<<16)
774 #define WIN3_DSP_ST0 (0x0118)
775 #define v_WIN3_DSP_XST0(x) (((x)&0x1fff)<<0)
776 #define v_WIN3_DSP_YST0(x) (((x)&0x1fff)<<16)
777 #define m_WIN3_DSP_XST0 (0x1fff<<0)
778 #define m_WIN3_DSP_YST0 (0x1fff<<16)
780 #define WIN3_COLOR_KEY (0x011c)
781 #define v_WIN3_COLOR_KEY(x) (((x)&0xffffff)<<0)
782 #define v_WIN3_KEY_EN(x) (((x)&1)<<24)
783 #define m_WIN3_COLOR_KEY (0xffffff<<0)
784 #define m_WIN3_KEY_EN ((u32)1<<24)
786 #define WIN3_MST1 (0x0120)
787 #define WIN3_DSP_INFO1 (0x0124)
788 #define v_WIN3_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
789 #define v_WIN3_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
790 #define m_WIN3_DSP_WIDTH1 (0xfff<<0)
791 #define m_WIN3_DSP_HEIGHT1 (0xfff<<16)
793 #define WIN3_DSP_ST1 (0x0128)
794 #define v_WIN3_DSP_XST1(x) (((x)&0x1fff)<<0)
795 #define v_WIN3_DSP_YST1(x) (((x)&0x1fff)<<16)
796 #define m_WIN3_DSP_XST1 (0x1fff<<0)
797 #define m_WIN3_DSP_YST1 (0x1fff<<16)
799 #define WIN3_SRC_ALPHA_CTRL (0x012c)
800 #define v_WIN3_SRC_ALPHA_EN(x) (((x)&1)<<0)
801 #define v_WIN3_SRC_COLOR_M0(x) (((x)&1)<<1)
802 #define v_WIN3_SRC_ALPHA_M0(x) (((x)&1)<<2)
803 #define v_WIN3_SRC_BLEND_M0(x) (((x)&3)<<3)
804 #define v_WIN3_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
805 #define v_WIN3_SRC_FACTOR_M0(x) (((x)&7)<<6)
806 #define v_WIN3_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
807 #define v_WIN3_FADING_VALUE(x) (((x)&0xff)<<24)
809 #define m_WIN3_SRC_ALPHA_EN (1<<0)
810 #define m_WIN3_SRC_COLOR_M0 (1<<1)
811 #define m_WIN3_SRC_ALPHA_M0 (1<<2)
812 #define m_WIN3_SRC_BLEND_M0 (3<<3)
813 #define m_WIN3_SRC_ALPHA_CAL_M0 (1<<5)
814 #define m_WIN3_SRC_FACTOR_M0 (7<<6)
815 #define m_WIN3_SRC_GLOBAL_ALPHA (0xff<<16)
816 #define m_WIN3_FADING_VALUE (0xff<<24)
818 #define WIN3_MST2 (0x0130)
819 #define WIN3_DSP_INFO2 (0x0134)
820 #define v_WIN3_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
821 #define v_WIN3_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
822 #define m_WIN3_DSP_WIDTH2 (0xfff<<0)
823 #define m_WIN3_DSP_HEIGHT2 (0xfff<<16)
825 #define WIN3_DSP_ST2 (0x0138)
826 #define v_WIN3_DSP_XST2(x) (((x)&0x1fff)<<0)
827 #define v_WIN3_DSP_YST2(x) (((x)&0x1fff)<<16)
828 #define m_WIN3_DSP_XST2 (0x1fff<<0)
829 #define m_WIN3_DSP_YST2 (0x1fff<<16)
831 #define WIN3_DST_ALPHA_CTRL (0x013c)
832 #define v_WIN3_DST_FACTOR_M0(x) (((x)&7)<<6)
833 #define m_WIN3_DST_FACTOR_M0 (7<<6)
836 #define WIN3_MST3 (0x0140)
837 #define WIN3_DSP_INFO3 (0x0144)
838 #define v_WIN3_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
839 #define v_WIN3_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
840 #define m_WIN3_DSP_WIDTH3 (0xfff<<0)
841 #define m_WIN3_DSP_HEIGHT3 (0xfff<<16)
843 #define WIN3_DSP_ST3 (0x0148)
844 #define v_WIN3_DSP_XST3(x) (((x)&0x1fff)<<0)
845 #define v_WIN3_DSP_YST3(x) (((x)&0x1fff)<<16)
846 #define m_WIN3_DSP_XST3 (0x1fff<<0)
847 #define m_WIN3_DSP_YST3 (0x1fff<<16)
849 #define WIN3_FADING_CTRL (0x014c)
850 #define v_WIN3_FADING_OFFSET_R(x) (((x)&0xff)<<0)
851 #define v_WIN3_FADING_OFFSET_G(x) (((x)&0xff)<<8)
852 #define v_WIN3_FADING_OFFSET_B(x) (((x)&0xff)<<16)
853 #define v_WIN3_FADING_EN(x) (((x)&1)<<24)
855 #define m_WIN3_FADING_OFFSET_R (0xff<<0)
856 #define m_WIN3_FADING_OFFSET_G (0xff<<8)
857 #define m_WIN3_FADING_OFFSET_B (0xff<<16)
858 #define m_WIN3_FADING_EN (1<<24)
862 #define HWC_CTRL0 (0x0150)
863 #define v_HWC_EN(x) (((x)&1)<<0)
864 #define v_HWC_DATA_FMT(x) (((x)&7)<<1)
865 #define v_HWC_MODE(x) (((x)&1)<<4)
866 #define v_HWC_SIZE(x) (((x)&3)<<5)
867 #define v_HWC_INTERLACE_READ(x) (((x)&1)<<8)
868 #define v_HWC_NO_OUTSTANDING(x) (((x)&1)<<9)
869 #define v_HWC_CSC_MODE(x) (((x)&1)<<10)
870 #define v_HWC_RB_SWAP(x) (((x)&1)<<12)
871 #define v_HWC_ALPHA_SWAP(x) (((x)&1)<<13)
872 #define v_HWC_ENDIAN_MODE(x) (((x)&1)<<14)
873 #define v_HWC_LUT_EN(x) (((x)&1)<<18)
875 #define m_HWC_EN (1<<0)
876 #define m_HWC_DATA_FMT (7<<1)
877 #define m_HWC_MODE (1<<4)
878 #define m_HWC_SIZE (3<<5)
879 #define m_HWC_INTERLACE_READ (1<<8)
880 #define m_HWC_NO_OUTSTANDING (1<<9)
881 #define m_HWC_CSC_MODE (1<<10)
882 #define m_HWC_RB_SWAP (1<<12)
883 #define m_HWC_ALPHA_SWAP (1<<13)
884 #define m_HWC_ENDIAN_MODE (1<<14)
885 #define m_HWC_LUT_EN (1<<18)
888 #define HWC_CTRL1 (0x0154)
889 #define v_HWC_AXI_GATHER_EN(x) (((x)&1)<<0)
890 #define v_HWC_AXI_GATHER_NUM(x) (((x)&7)<<4)
891 #define m_HWC_AXI_GATHER_EN (1<<0)
892 #define m_HWC_AXI_GATHER_NUM (7<<4)
894 #define HWC_MST (0x0158)
895 #define HWC_DSP_ST (0x015c)
896 #define v_HWC_DSP_XST(x) (((x)&0x1fff)<<0)
897 #define v_HWC_DSP_YST(x) (((x)&0x1fff)<<16)
898 #define m_HWC_DSP_XST (0x1fff<<0)
899 #define m_HWC_DSP_YST (0x1fff<<16)
901 #define HWC_SRC_ALPHA_CTRL (0x0160)
902 #define v_HWC_SRC_ALPHA_EN(x) (((x)&1)<<0)
903 #define v_HWC_SRC_COLOR_M0(x) (((x)&1)<<1)
904 #define v_HWC_SRC_ALPHA_M0(x) (((x)&1)<<2)
905 #define v_HWC_SRC_BLEND_M0(x) (((x)&3)<<3)
906 #define v_HWC_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
907 #define v_HWC_SRC_FACTOR_M0(x) (((x)&7)<<6)
908 #define v_HWC_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
909 #define v_HWC_FADING_VALUE(x) (((x)&0xff)<<24)
911 #define m_HWC_SRC_ALPHA_EN (1<<0)
912 #define m_HWC_SRC_COLOR_M0 (1<<1)
913 #define m_HWC_SRC_ALPHA_M0 (1<<2)
914 #define m_HWC_SRC_BLEND_M0 (3<<3)
915 #define m_HWC_SRC_ALPHA_CAL_M0 (1<<5)
916 #define m_HWC_SRC_FACTOR_M0 (7<<6)
917 #define m_HWC_SRC_GLOBAL_ALPHA (0xff<<16)
918 #define m_HWC_FADING_VALUE (0xff<<24)
920 #define HWC_DST_ALPHA_CTRL (0x0164)
921 #define v_HWC_DST_FACTOR_M0(x) (((x)&7)<<6)
922 #define m_HWC_DST_FACTOR_M0 (7<<6)
925 #define HWC_FADING_CTRL (0x0168)
926 #define v_HWC_FADING_OFFSET_R(x) (((x)&0xff)<<0)
927 #define v_HWC_FADING_OFFSET_G(x) (((x)&0xff)<<8)
928 #define v_HWC_FADING_OFFSET_B(x) (((x)&0xff)<<16)
929 #define v_HWC_FADING_EN(x) (((x)&1)<<24)
931 #define m_HWC_FADING_OFFSET_R (0xff<<0)
932 #define m_HWC_FADING_OFFSET_G (0xff<<8)
933 #define m_HWC_FADING_OFFSET_B (0xff<<16)
934 #define m_HWC_FADING_EN (1<<24)
936 /*post process register*/
937 #define POST_DSP_HACT_INFO (0x0170)
938 #define v_DSP_HACT_END_POST(x) (((x)&0x1fff)<<0)
939 #define v_DSP_HACT_ST_POST(x) (((x)&0x1fff)<<16)
940 #define m_DSP_HACT_END_POST (0x1fff<<0)
941 #define m_DSP_HACT_ST_POST (0x1fff<<16)
943 #define POST_DSP_VACT_INFO (0x0174)
944 #define v_DSP_VACT_END_POST(x) (((x)&0x1fff)<<0)
945 #define v_DSP_VACT_ST_POST(x) (((x)&0x1fff)<<16)
946 #define m_DSP_VACT_END_POST (0x1fff<<0)
947 #define m_DSP_VACT_ST_POST (0x1fff<<16)
949 #define POST_SCL_FACTOR_YRGB (0x0178)
950 #define v_POST_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
951 #define v_POST_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
952 #define m_POST_HS_FACTOR_YRGB (0xffff<<0)
953 #define m_POST_VS_FACTOR_YRGB (0xffff<<16)
955 #define POST_SCL_CTRL (0x0180)
956 #define v_POST_HOR_SD_EN(x) (((x)&1)<<0)
957 #define v_POST_VER_SD_EN(x) (((x)&1)<<1)
959 #define m_POST_HOR_SD_EN (0x1<<0)
960 #define m_POST_VER_SD_EN (0x1<<1)
962 #define POST_DSP_VACT_INFO_F1 (0x0184)
963 #define v_DSP_VACT_END_POST_F1(x) (((x)&0x1fff)<<0)
964 #define v_DSP_VACT_ST_POST_F1(x) (((x)&0x1fff)<<16)
966 #define m_DSP_VACT_END_POST_F1 (0x1fff<<0)
967 #define m_DSP_VACT_ST_POST_F1 (0x1fff<<16)
969 #define DSP_HTOTAL_HS_END (0x0188)
970 #define v_DSP_HS_PW(x) (((x)&0x1fff)<<0)
971 #define v_DSP_HTOTAL(x) (((x)&0x1fff)<<16)
972 #define m_DSP_HS_PW (0x1fff<<0)
973 #define m_DSP_HTOTAL (0x1fff<<16)
975 #define DSP_HACT_ST_END (0x018c)
976 #define v_DSP_HACT_END(x) (((x)&0x1fff)<<0)
977 #define v_DSP_HACT_ST(x) (((x)&0x1fff)<<16)
978 #define m_DSP_HACT_END (0x1fff<<0)
979 #define m_DSP_HACT_ST (0x1fff<<16)
981 #define DSP_VTOTAL_VS_END (0x0190)
982 #define v_DSP_VS_PW(x) (((x)&0x1fff)<<0)
983 #define v_DSP_VTOTAL(x) (((x)&0x1fff)<<16)
984 #define m_DSP_VS_PW (0x1fff<<0)
985 #define m_DSP_VTOTAL (0x1fff<<16)
987 #define DSP_VACT_ST_END (0x0194)
988 #define v_DSP_VACT_END(x) (((x)&0x1fff)<<0)
989 #define v_DSP_VACT_ST(x) (((x)&0x1fff)<<16)
990 #define m_DSP_VACT_END (0x1fff<<0)
991 #define m_DSP_VACT_ST (0x1fff<<16)
993 #define DSP_VS_ST_END_F1 (0x0198)
994 #define v_DSP_VS_END_F1(x) (((x)&0x1fff)<<0)
995 #define v_DSP_VS_ST_F1(x) (((x)&0x1fff)<<16)
996 #define m_DSP_VS_END_F1 (0x1fff<<0)
997 #define m_DSP_VS_ST_F1 (0x1fff<<16)
999 #define DSP_VACT_ST_END_F1 (0x019c)
1000 #define v_DSP_VACT_END_F1(x) (((x)&0x1fff)<<0)
1001 #define v_DSP_VAC_ST_F1(x) (((x)&0x1fff)<<16)
1002 #define m_DSP_VACT_END_F1 (0x1fff<<0)
1003 #define m_DSP_VAC_ST_F1 (0x1fff<<16)
1007 #define PWM_CTRL (0x01a0)
1008 #define v_PWM_EN(x) (((x)&1)<<0)
1009 #define v_PWM_MODE(x) (((x)&3)<<1)
1011 #define v_DUTY_POL(x) (((x)&1)<<3)
1012 #define v_INACTIVE_POL(x) (((x)&1)<<4)
1013 #define v_OUTPUT_MODE(x) (((x)&1)<<5)
1014 #define v_BL_EN(x) (((x)&1)<<8)
1015 #define v_CLK_SEL(x) (((x)&1)<<9)
1016 #define v_PRESCALE(x) (((x)&7)<<12)
1017 #define v_SCALE(x) (((x)&0xff)<<16)
1018 #define v_RPT(x) (((x)&0xff)<<24)
1020 #define m_PWM_EN (1<<0)
1021 #define m_PWM_MODE (3<<1)
1023 #define m_DUTY_POL (1<<3)
1024 #define m_INACTIVE_POL (1<<4)
1025 #define m_OUTPUT_MODE (1<<5)
1026 #define m_BL_EN (1<<8)
1027 #define m_CLK_SEL (1<<9)
1028 #define m_PRESCALE (7<<12)
1029 #define m_SCALE (0xff<<16)
1030 #define m_RPT ((u32)0xff<<24)
1032 #define PWM_PERIOD_HPR (0x01a4)
1033 #define PWM_DUTY_LPR (0x01a8)
1034 #define PWM_CNT (0x01ac)
1037 #define BCSH_COLOR_BAR (0x01b0)
1038 #define v_BCSH_EN(x) (((x)&1)<<0)
1039 #define v_BCSH_COLOR_BAR_Y(x) (((x)&0x3ff)<<2)
1040 #define v_BCSH_COLOR_BAR_U(x) (((x)&0x3ff)<<12)
1041 #define v_BCSH_COLOR_BAR_V(x) (((x)&0x3ff)<<22)
1043 #define m_BCSH_EN (1<<0)
1044 #define m_BCSH_COLOR_BAR_Y (0x3ff<<2)
1045 #define m_BCSH_COLOR_BAR_U (0x3ff<<12)
1046 #define m_BCSH_COLOR_BAR_V ((u32)0x3ff<<22)
1048 #define BCSH_BCS (0x01b4)
1049 #define v_BCSH_BRIGHTNESS(x) (((x)&0xff)<<0)
1050 #define v_BCSH_CONTRAST(x) (((x)&0x1ff)<<8)
1051 #define v_BCSH_SAT_CON(x) (((x)&0x3ff)<<20)
1052 #define v_BCSH_OUT_MODE(x) (((x)&0x3)<<30)
1054 #define m_BCSH_BRIGHTNESS (0xff<<0)
1055 #define m_BCSH_CONTRAST (0x1ff<<8)
1056 #define m_BCSH_SAT_CON (0x3ff<<20)
1057 #define m_BCSH_OUT_MODE ((u32)0x3<<30)
1060 #define BCSH_H (0x01b8)
1061 #define v_BCSH_SIN_HUE(x) (((x)&0x1ff)<<0)
1062 #define v_BCSH_COS_HUE(x) (((x)&0x1ff)<<16)
1064 #define m_BCSH_SIN_HUE (0x1ff<<0)
1065 #define m_BCSH_COS_HUE (0x1ff<<16)
1067 #define BCSH_CTRL (0x01b8)
1068 #define v_BCSH_Y2R_EN(x) (((x)&0x1)<<0)
1069 #define v_BCSH_R2Y_EN(x) (((x)&0x1)<<4)
1070 #define m_BCSH_Y2R_EN (0x1<<0)
1071 #define m_BCSH_R2Y_EN (0x1<<4)
1073 #define CABC_CTRL0 (0x01c0)
1074 #define v_CABC_EN(x) (((x)&1)<<0)
1075 #define v_CABC_CALC_PIXEL_NUM(x) (((x)&0x7fffff)<<1)
1076 #define v_CABC_STAGE_UP(x) (((x)&0xff)<<24)
1077 #define m_CABC_EN (1<<0)
1078 #define m_CABC_CALC_PIXEL_NUM (0x7fffff<<1)
1079 #define m_CABC_STAGE_UP (0xff<<24)
1082 #define CABC_CTRL1 (0x01c4)
1083 #define v_CABC_TOTAL_NUM(x) (((x)&0x7fffff)<<1)
1084 #define v_CABC_STAGE_DOWN(x) (((x)&0xff)<<24)
1085 #define m_CABC_TOTAL_NUM (0x7fffff<<1)
1086 #define m_CABC_STAGE_DOWN (0xff<<24)
1088 #define CABC_GAUSS_LINE0_0 (0x01c8)
1089 #define v_CABC_T_LINE0_0(x) (((x)&0xff)<<0)
1090 #define v_CABC_T_LINE0_1(x) (((x)&0xff)<<8)
1091 #define v_CABC_T_LINE0_2(x) (((x)&0xff)<<16)
1092 #define v_CABC_T_LINE0_3(x) (((x)&0xff)<<24)
1093 #define m_CABC_T_LINE0_0 (0xff<<0)
1094 #define m_CABC_T_LINE0_1 (0xff<<8)
1095 #define m_CABC_T_LINE0_2 (0xff<<16)
1096 #define m_CABC_T_LINE0_3 ((u32)0xff<<24)
1098 #define CABC_GAUSS_LINE0_1 (0x01cc)
1099 #define v_CABC_T_LINE0_4(x) (((x)&0xff)<<0)
1100 #define v_CABC_T_LINE0_5(x) (((x)&0xff)<<8)
1101 #define v_CABC_T_LINE0_6(x) (((x)&0xff)<<16)
1102 #define m_CABC_T_LINE0_4 (0xff<<0)
1103 #define m_CABC_T_LINE0_5 (0xff<<8)
1104 #define m_CABC_T_LINE0_6 (0xff<<16)
1107 #define CABC_GAUSS_LINE1_0 (0x01d0)
1108 #define v_CABC_T_LINE1_0(x) (((x)&0xff)<<0)
1109 #define v_CABC_T_LINE1_1(x) (((x)&0xff)<<8)
1110 #define v_CABC_T_LINE1_2(x) (((x)&0xff)<<16)
1111 #define v_CABC_T_LINE1_3(x) (((x)&0xff)<<24)
1112 #define m_CABC_T_LINE1_0 (0xff<<0)
1113 #define m_CABC_T_LINE1_1 (0xff<<8)
1114 #define m_CABC_T_LINE1_2 (0xff<<16)
1115 #define m_CABC_T_LINE1_3 ((u32)0xff<<24)
1117 #define CABC_GAUSS_LINE1_1 (0x01d4)
1118 #define v_CABC_T_LINE1_4(x) (((x)&0xff)<<0)
1119 #define v_CABC_T_LINE1_5(x) (((x)&0xff)<<8)
1120 #define v_CABC_T_LINE1_6(x) (((x)&0xff)<<16)
1121 #define m_CABC_T_LINE1_4 (0xff<<0)
1122 #define m_CABC_T_LINE1_5 (0xff<<8)
1123 #define m_CABC_T_LINE1_6 (0xff<<16)
1125 #define CABC_GAUSS_LINE2_0 (0x01d8)
1126 #define v_CABC_T_LINE2_0(x) (((x)&0xff)<<0)
1127 #define v_CABC_T_LINE2_1(x) (((x)&0xff)<<8)
1128 #define v_CABC_T_LINE2_2(x) (((x)&0xff)<<16)
1129 #define v_CABC_T_LINE2_3(x) (((x)&0xff)<<24)
1130 #define m_CABC_T_LINE2_0 (0xff<<0)
1131 #define m_CABC_T_LINE2_1 (0xff<<8)
1132 #define m_CABC_T_LINE2_2 (0xff<<16)
1133 #define m_CABC_T_LINE2_3 ((u32)0xff<<24)
1135 #define CABC_GAUSS_LINE2_1 (0x01dc)
1136 #define v_CABC_T_LINE2_4(x) (((x)&0xff)<<0)
1137 #define v_CABC_T_LINE2_5(x) (((x)&0xff)<<8)
1138 #define v_CABC_T_LINE2_6(x) (((x)&0xff)<<16)
1139 #define m_CABC_T_LINE2_4 (0xff<<0)
1140 #define m_CABC_T_LINE2_5 (0xff<<8)
1141 #define m_CABC_T_LINE2_6 (0xff<<16)
1144 #define FRC_LOWER01_0 (0x01e0)
1145 #define v_FRC_LOWER01_FRM0(x) (((x)&0xffff)<<0)
1146 #define v_FRC_LOWER01_FRM1(x) (((x)&0xffff)<<16)
1147 #define m_FRC_LOWER01_FRM0 (0xffff<<0)
1148 #define m_FRC_LOWER01_FRM1 ((u32)0xffff<<16)
1150 #define FRC_LOWER01_1 (0x01e4)
1151 #define v_FRC_LOWER01_FRM2(x) (((x)&0xffff)<<0)
1152 #define v_FRC_LOWER01_FRM3(x) (((x)&0xffff)<<16)
1153 #define m_FRC_LOWER01_FRM2 (0xffff<<0)
1154 #define m_FRC_LOWER01_FRM3 ((u32)0xffff<<16)
1156 #define FRC_LOWER10_0 (0x01e8)
1157 #define v_FRC_LOWER10_FRM0(x) (((x)&0xffff)<<0)
1158 #define v_FRC_LOWER10_FRM1(x) (((x)&0xffff)<<16)
1159 #define m_FRC_LOWER10_FRM0 (0xffff<<0)
1160 #define m_FRC_LOWER10_FRM1 ((u32)0xffff<<16)
1162 #define FRC_LOWER10_1 (0x01ec)
1163 #define v_FRC_LOWER10_FRM2(x) (((x)&0xffff)<<0)
1164 #define v_FRC_LOWER10_FRM3(x) (((x)&0xffff)<<16)
1165 #define m_FRC_LOWER10_FRM2 (0xffff<<0)
1166 #define m_FRC_LOWER10_FRM3 ((u32)0xffff<<16)
1168 #define FRC_LOWER11_0 (0x01f0)
1169 #define v_FRC_LOWER11_FRM0(x) (((x)&0xffff)<<0)
1170 #define v_FRC_LOWER11_FRM1(x) (((x)&0xffff)<<16)
1171 #define m_FRC_LOWER11_FRM0 (0xffff<<0)
1172 #define m_FRC_LOWER11_FRM1 ((u32)0xffff<<16)
1174 #define FRC_LOWER11_1 (0x01f4)
1175 #define v_FRC_LOWER11_FRM2(x) (((x)&0xffff)<<0)
1176 #define v_FRC_LOWER11_FRM3(x) (((x)&0xffff)<<16)
1177 #define m_FRC_LOWER11_FRM2 (0xffff<<0)
1178 #define m_FRC_LOWER11_FRM3 ((u32)0xffff<<16)
1180 #define MMU_DTE_ADDR (0x0300)
1181 #define v_MMU_DTE_ADDR(x) (((x)&0xffffffff)<<0)
1182 #define m_MMU_DTE_ADDR (0xffffffff<<0)
1184 #define MMU_STATUS (0x0304)
1185 #define v_PAGING_ENABLED(x) (((x)&1)<<0)
1186 #define v_PAGE_FAULT_ACTIVE(x) (((x)&1)<<1)
1187 #define v_STAIL_ACTIVE(x) (((x)&1)<<2)
1188 #define v_MMU_IDLE(x) (((x)&1)<<3)
1189 #define v_REPLAY_BUFFER_EMPTY(x) (((x)&1)<<4)
1190 #define v_PAGE_FAULT_IS_WRITE(x) (((x)&1)<<5)
1191 #define v_PAGE_FAULT_BUS_ID(x) (((x)&0x1f)<<6)
1192 #define m_PAGING_ENABLED (1<<0)
1193 #define m_PAGE_FAULT_ACTIVE (1<<1)
1194 #define m_STAIL_ACTIVE (1<<2)
1195 #define m_MMU_IDLE (1<<3)
1196 #define m_REPLAY_BUFFER_EMPTY (1<<4)
1197 #define m_PAGE_FAULT_IS_WRITE (1<<5)
1198 #define m_PAGE_FAULT_BUS_ID (0x1f<<6)
1200 #define MMU_COMMAND (0x0308)
1201 #define v_MMU_CMD(x) (((x)&0x3)<<0)
1202 #define m_MMU_CMD (0x3<<0)
1204 #define MMU_PAGE_FAULT_ADDR (0x030c)
1205 #define v_PAGE_FAULT_ADDR(x) (((x)&0xffffffff)<<0)
1206 #define m_PAGE_FAULT_ADDR (0xffffffff<<0)
1208 #define MMU_ZAP_ONE_LINE (0x0310)
1209 #define v_MMU_ZAP_ONE_LINE(x) (((x)&0xffffffff)<<0)
1210 #define m_MMU_ZAP_ONE_LINE (0xffffffff<<0)
1212 #define MMU_INT_RAWSTAT (0x0314)
1213 #define v_PAGE_FAULT_RAWSTAT(x) (((x)&1)<<0)
1214 #define v_READ_BUS_ERROR_RAWSTAT(x) (((x)&1)<<1)
1215 #define m_PAGE_FAULT_RAWSTAT (1<<0)
1216 #define m_READ_BUS_ERROR_RAWSTAT (1<<1)
1218 #define MMU_INT_CLEAR (0x0318)
1219 #define v_PAGE_FAULT_CLEAR(x) (((x)&1)<<0)
1220 #define v_READ_BUS_ERROR_CLEAR(x) (((x)&1)<<1)
1221 #define m_PAGE_FAULT_CLEAR (1<<0)
1222 #define m_READ_BUS_ERROR_CLEAR (1<<1)
1224 #define MMU_INT_MASK (0x031c)
1225 #define v_PAGE_FAULT_MASK(x) (((x)&1)<<0)
1226 #define v_READ_BUS_ERROR_MASK(x) (((x)&1)<<1)
1227 #define m_PAGE_FAULT_MASK (1<<0)
1228 #define m_READ_BUS_ERROR_MASK (1<<1)
1230 #define MMU_INT_STATUS (0x0320)
1231 #define v_PAGE_FAULT_STATUS(x) (((x)&1)<<0)
1232 #define v_READ_BUS_ERROR_STATUS(x) (((x)&1)<<1)
1233 #define m_PAGE_FAULT_STATUS (1<<0)
1234 #define m_READ_BUS_ERROR_STATUS (1<<1)
1236 #define MMU_AUTO_GATING (0x0324)
1237 #define v_MMU_AUTO_GATING(x) (((x)&1)<<0)
1238 #define m_MMU_AUTO_GATING (1<<0)
1240 #define WIN2_LUT_ADDR (0x0400)
1241 #define WIN3_LUT_ADDR (0x0800)
1242 #define HWC_LUT_ADDR (0x0c00)
1243 #define GAMMA_LUT_ADDR (0x1000)
1244 #define MCU_BYPASS_WPORT (0x2200)
1245 #define MCU_BYPASS_RPORT (0x2300)
1247 #define PWM_MODE_ONE_SHOT (0x0)
1248 #define PWM_MODE_CONTINUOUS (0x1)
1249 #define PWM_MODE_CAPTURE (0x2)
1251 LB_YUV_3840X5 = 0x0,
1252 LB_YUV_2560X8 = 0x1,
1253 LB_RGB_3840X2 = 0x2,
1254 LB_RGB_2560X4 = 0x3,
1255 LB_RGB_1920X5 = 0x4,
1259 enum sacle_up_mode {
1264 enum scale_down_mode {
1265 SCALE_DOWN_BIL = 0x0,
1266 SCALE_DOWN_AVG = 0x1
1269 /*ALPHA BLENDING MODE*/
1270 enum alpha_mode { /* Fs Fd */
1271 AB_USER_DEFINE = 0x0,
1272 AB_CLEAR = 0x1,/* 0 0*/
1273 AB_SRC = 0x2,/* 1 0*/
1274 AB_DST = 0x3,/* 0 1 */
1275 AB_SRC_OVER = 0x4,/* 1 1-As''*/
1276 AB_DST_OVER = 0x5,/* 1-Ad'' 1*/
1284 AB_SRC_OVER_GLOBAL = 0xd
1285 }; /*alpha_blending_mode*/
1287 enum src_alpha_mode {
1290 };/*src_alpha_mode*/
1292 enum global_alpha_mode {
1295 AA_PER_PIX_GLOBAL = 0x2
1296 };/*src_global_alpha_mode*/
1298 enum src_alpha_sel {
1303 enum src_color_mode {
1304 AA_SRC_PRE_MUL = 0x0,
1305 AA_SRC_NO_PRE_MUL = 0x1
1306 };/*src_color_mode*/
1312 AA_SRC_INVERSE = 0x3,
1314 };/*src_factor_mode && dst_factor_mode*/
1318 struct rk_lcdc_driver driver;
1320 struct rk_screen *screen;
1323 void *regsbak; /*back up reg*/
1324 u32 reg_phy_base; /* physical basic address of lcdc register*/
1325 u32 len; /* physical map length of lcdc register*/
1326 spinlock_t reg_lock; /*one time only one process allowed to config the register*/
1328 int __iomem *dsp_lut_addr_base;
1331 int prop; /*used for primary or extended display device*/
1333 bool pwr18; /*if lcdc use 1.8v power supply*/
1334 bool clk_on; /*if aclk or hclk is closed ,acess to register is not allowed*/
1335 u8 atv_layer_cnt; /*active layer counter,when atv_layer_cnt = 0,disable lcdc*/
1340 struct clk *pd; /*lcdc power domain*/
1341 struct clk *hclk; /*lcdc AHP clk*/
1342 struct clk *dclk; /*lcdc dclk*/
1343 struct clk *aclk; /*lcdc share memory frequency*/
1346 u32 standby; /*1:standby,0:wrok*/
1350 struct alpha_config{
1351 enum src_alpha_mode src_alpha_mode; /*win0_src_alpha_m0*/
1352 u32 src_global_alpha_val; /*win0_src_global_alpha*/
1353 enum global_alpha_mode src_global_alpha_mode;/*win0_src_blend_m0*/
1354 enum src_alpha_sel src_alpha_cal_m0; /*win0_src_alpha_cal_m0*/
1355 enum src_color_mode src_color_mode; /*win0_src_color_m0*/
1356 enum factor_mode src_factor_mode; /*win0_src_factor_m0*/
1357 enum factor_mode dst_factor_mode; /*win0_dst_factor_m0*/
1360 struct lcdc_cabc_mode {
1361 u32 pixel_num; /* pixel precent number */
1362 u16 stage_up; /* up stride */
1363 u16 stage_down; /* down stride */
1366 static inline void lcdc_writel(struct lcdc_device *lcdc_dev,u32 offset,u32 v)
1368 u32 *_pv = (u32*)lcdc_dev->regsbak;
1369 _pv += (offset >> 2);
1371 writel_relaxed(v,lcdc_dev->regs+offset);
1374 static inline u32 lcdc_readl(struct lcdc_device *lcdc_dev,u32 offset)
1377 v = readl_relaxed(lcdc_dev->regs+offset);
1381 static inline u32 lcdc_read_bit(struct lcdc_device *lcdc_dev,u32 offset,u32 msk)
1383 u32 *_pv = (u32*)lcdc_dev->regsbak;
1384 u32 _v = readl_relaxed(lcdc_dev->regs+offset);
1385 _pv += (offset >> 2);
1391 static inline void lcdc_set_bit(struct lcdc_device *lcdc_dev,u32 offset,u32 msk)
1393 u32* _pv = (u32*)lcdc_dev->regsbak;
1394 _pv += (offset >> 2);
1396 writel_relaxed(*_pv,lcdc_dev->regs + offset);
1399 static inline void lcdc_clr_bit(struct lcdc_device *lcdc_dev,u32 offset,u32 msk)
1401 u32* _pv = (u32*)lcdc_dev->regsbak;
1402 _pv += (offset >> 2);
1404 writel_relaxed(*_pv,lcdc_dev->regs + offset);
1407 static inline void lcdc_msk_reg(struct lcdc_device *lcdc_dev,u32 offset,u32 msk,u32 v)
1409 u32 *_pv = (u32*)lcdc_dev->regsbak;
1410 _pv += (offset >> 2);
1413 writel_relaxed(*_pv,lcdc_dev->regs+offset);
1416 static inline void lcdc_cfg_done(struct lcdc_device *lcdc_dev)
1418 writel_relaxed(0x01,lcdc_dev->regs+REG_CFG_DONE);
1422 #define CUBIC_PRECISE 0
1423 #define CUBIC_SPLINE 1
1424 #define CUBIC_CATROM 2
1425 #define CUBIC_MITCHELL 3
1427 #define CUBIC_MODE_SELETION CUBIC_PRECISE
1429 /*****************************************************************************************************/
1430 #define SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT 12 /* 4.12*/
1431 #define SCALE_FACTOR_BILI_DN_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT)))
1433 #define SCALE_FACTOR_BILI_UP_FIXPOINT_SHIFT 16 /* 0.16*/
1435 #define SCALE_FACTOR_AVRG_FIXPOINT_SHIFT 16 /*0.16*/
1436 #define SCALE_FACTOR_AVRG_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT)))
1438 #define SCALE_FACTOR_BIC_FIXPOINT_SHIFT 16 /* 0.16*/
1439 #define SCALE_FACTOR_BIC_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_FACTOR_BIC_FIXPOINT_SHIFT)))
1441 #define SCALE_FACTOR_DEFAULT_FIXPOINT_SHIFT 12 /*NONE SCALE,vsd_bil*/
1442 #define SCALE_FACTOR_VSDBIL_FIXPOINT_SHIFT 12 /*VER SCALE DOWN BIL*/
1444 /*****************************************************************************************************/
1446 /*#define GET_SCALE_FACTOR_BILI(src, dst) ((((src) - 1) << SCALE_FACTOR_BILI_FIXPOINT_SHIFT) / ((dst) - 1))*/
1447 /*#define GET_SCALE_FACTOR_BIC(src, dst) ((((src) - 1) << SCALE_FACTOR_BIC_FIXPOINT_SHIFT) / ((dst) - 1))*/
1449 #define GET_SCALE_FACTOR_BILI_DN(src, dst) ((((src)*2 - 3) << (SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT-1)) / ((dst) - 1))
1450 #define GET_SCALE_FACTOR_BILI_UP(src, dst) ((((src)*2 - 3) << (SCALE_FACTOR_BILI_UP_FIXPOINT_SHIFT-1)) / ((dst) - 1))
1451 #define GET_SCALE_FACTOR_BIC(src, dst) ((((src)*2 - 3) << (SCALE_FACTOR_BIC_FIXPOINT_SHIFT-1)) / ((dst) - 1))
1453 /*****************************************************************/
1454 /*NOTE: hardwareΪ½ÚÊ¡¿ªÏú, srcHÏȳéÐеõ½ (srcH+vScaleDnMult-1)/vScaleDnMult; È»ºóËõ·Å*/
1455 #define GET_SCALE_DN_ACT_HEIGHT(srcH, vScaleDnMult) (((srcH)+(vScaleDnMult)-1)/(vScaleDnMult))
1457 /*#define VSKIP_MORE_PRECISE*/
1459 #ifdef VSKIP_MORE_PRECISE
1460 #define MIN_SCALE_FACTOR_AFTER_VSKIP 1.5f
1461 #define GET_SCALE_FACTOR_BILI_DN_VSKIP(srcH, dstH, vScaleDnMult) \
1462 (GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT((srcH), (vScaleDnMult)), (dstH)))
1464 #define MIN_SCALE_FACTOR_AFTER_VSKIP 1
1465 #define GET_SCALE_FACTOR_BILI_DN_VSKIP(srcH, dstH, vScaleDnMult) \
1466 ((GET_SCALE_DN_ACT_HEIGHT((srcH), (vScaleDnMult)) == (dstH))\
1467 ? (GET_SCALE_FACTOR_BILI_DN((srcH), (dstH))/(vScaleDnMult))\
1468 : GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT((srcH), (vScaleDnMult)), (dstH)))
1470 /*****************************************************************/
1473 /*ScaleFactor must >= dst/src, or pixels at end of line may be unused*/
1474 /*ScaleFactor must < dst/(src-1), or dst buffer may overflow*/
1475 /*avrg old code: ((((dst) << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT))/((src) - 1)) hxx_chgsrc*/
1476 /*modified by hpz:*/
1477 #define GET_SCALE_FACTOR_AVRG(src, dst) ((((dst) << (SCALE_FACTOR_AVRG_FIXPOINT_SHIFT+1)))/(2*(src) - 1))
1479 /*****************************************************************************************************/
1480 /*Scale Coordinate Accumulate, x.16*/
1481 #define SCALE_COOR_ACC_FIXPOINT_SHIFT 16
1482 #define SCALE_COOR_ACC_FIXPOINT_ONE (1 << SCALE_COOR_ACC_FIXPOINT_SHIFT)
1483 #define SCALE_COOR_ACC_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_COOR_ACC_FIXPOINT_SHIFT)))
1484 #define SCALE_COOR_ACC_FIXPOINT_REVERT(x) ((((x) >> (SCALE_COOR_ACC_FIXPOINT_SHIFT-1)) + 1) >> 1)
1486 #define SCALE_GET_COOR_ACC_FIXPOINT(scaleFactor, factorFixpointShift) \
1487 ((scaleFactor) << (SCALE_COOR_ACC_FIXPOINT_SHIFT - (factorFixpointShift)))
1490 /*****************************************************************************************************/
1491 /*CoarsePart of Scale Coordinate Accumulate, used for pixel mult-add factor, 0.8*/
1492 #define SCALE_FILTER_FACTOR_FIXPOINT_SHIFT 8
1493 #define SCALE_FILTER_FACTOR_FIXPOINT_ONE (1 << SCALE_FILTER_FACTOR_FIXPOINT_SHIFT)
1494 #define SCALE_FILTER_FACTOR_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_FILTER_FACTOR_FIXPOINT_SHIFT)))
1495 #define SCALE_FILTER_FACTOR_FIXPOINT_REVERT(x) ((((x) >> (SCALE_FILTER_FACTOR_FIXPOINT_SHIFT-1)) + 1) >> 1)
1497 #define SCALE_GET_FILTER_FACTOR_FIXPOINT(coorAccumulate, coorAccFixpointShift) \
1498 (((coorAccumulate)>>((coorAccFixpointShift)-SCALE_FILTER_FACTOR_FIXPOINT_SHIFT))&(SCALE_FILTER_FACTOR_FIXPOINT_ONE-1))
1500 #define SCALE_OFFSET_FIXPOINT_SHIFT 8
1501 #define SCALE_OFFSET_FIXPOINT(x) ((INT32)((x)*(1 << SCALE_OFFSET_FIXPOINT_SHIFT)))
1503 u32 getHardWareVSkipLines(u32 srcH, u32 dstH)
1507 if(srcH >= (u32)(4*dstH*MIN_SCALE_FACTOR_AFTER_VSKIP))
1511 else if(srcH >= (u32)(2*dstH*MIN_SCALE_FACTOR_AFTER_VSKIP))
1520 return vScaleDnMult;