modify RGA driver some case is valid
[firefly-linux-kernel-4.4.55.git] / drivers / video / rockchip / rga / RGA_API.h
1 #ifndef __RGA_API_H__\r
2 #define __RGA_API_H__\r
3 \r
4 #include "rga_reg_info.h"\r
5 #include "rga.h"\r
6 \r
7 #define ENABLE      1\r
8 #define DISABLE     0\r
9 \r
10 #if 0\r
11 int\r
12 RGA_set_src_act_info(\r
13                 msg_t *msg,\r
14                 unsigned int   width,       /* act width  */\r
15                 unsigned int   height,      /* act height */\r
16                 unsigned int   x_off,       /* x_off      */\r
17                 unsigned int   y_off        /* y_off      */\r
18                 );\r
19 \r
20 int\r
21 RGA_set_src_vir_info(\r
22                 msg_t *msg,\r
23                 unsigned int   yrgb_addr,       /* yrgb_addr  */\r
24                 unsigned int   uv_addr,         /* uv_addr    */\r
25                 unsigned int   v_addr,          /* v_addr     */\r
26                 unsigned int   vir_w,           /* vir width  */\r
27                 unsigned int   vir_h,           /* vir height */\r
28                 unsigned char  format,          /* format     */\r
29                 unsigned char  a_swap_en\r
30                 );\r
31 \r
32 int\r
33 RGA_set_dst_act_info(\r
34                 msg_t *msg,\r
35                 unsigned int   width,       /* act width  */\r
36                 unsigned int   height,      /* act height */\r
37                 unsigned int   x_off,       /* x_off      */\r
38                 unsigned int   y_off        /* y_off      */\r
39                 );\r
40 \r
41 int\r
42 RGA_set_dst_vir_info(\r
43                 msg_t *msg,\r
44                 unsigned int   yrgb_addr,   /* yrgb_addr  */\r
45                 unsigned int   uv_addr,     /* uv_addr    */\r
46                 unsigned int   v_addr,      /* v_addr     */\r
47                 unsigned int   vir_w,       /* vir width  */\r
48                 unsigned int   vir_h,       /* vir height */\r
49                 RECT           clip,        /* clip window*/\r
50                 unsigned char  format,      /* format     */\r
51                 unsigned char  a_swap_en );\r
52 \r
53 \r
54 \r
55 int\r
56 RGA_set_rop_mask_info(\r
57     msg_t *msg, \r
58     u32 rop_mask_addr, \r
59     u32 rop_mask_endian_mode);\r
60 \r
61 int \r
62 RGA_set_pat_info(\r
63     msg_t *msg,\r
64     u32 width,\r
65     u32 height,\r
66     u32 x_off,\r
67     u32 y_off,\r
68     u32 pat_format);    \r
69 \r
70 int\r
71 RGA_set_alpha_en_info(\r
72                 msg_t *msg,\r
73                 unsigned int alpha_cal_mode,\r
74                 unsigned int alpha_mode,\r
75                 unsigned int global_a_value,\r
76                 unsigned int PD_en,\r
77                 unsigned int PD_mode\r
78                 );\r
79 \r
80 int\r
81 RGA_set_rop_en_info(\r
82                 msg_t *msg,\r
83                 unsigned int ROP_mode,\r
84                 unsigned int ROP_code,\r
85                 unsigned int color_mode,\r
86                 unsigned int solid_color);\r
87 \r
88 /*\r
89 int\r
90 RGA_set_MMU_info(\r
91                 MSG *msg,\r
92                 unsigned int base_addr,\r
93                 unsigned int src_flush,\r
94                 unsigned int dst_flush,\r
95                 unsigned int cmd_flush,\r
96                 unsigned int page_size\r
97                 );\r
98 */\r
99 \r
100 int\r
101 RGA_set_MMU_info(\r
102                 msg_t *msg,\r
103                 u8  mmu_en,\r
104                 u8  src_flush,\r
105                 u8  dst_flush,\r
106                 u8  cmd_flush,\r
107                 u32 base_addr,\r
108                 u8  page_size);\r
109 \r
110 \r
111 int\r
112 RGA_set_bitblt_mode(\r
113                 msg_t *msg,\r
114                 unsigned char scale_mode,    // 0/near  1/bilnear  2/bicubic  \r
115                 unsigned char rotate_mode,   // 0/copy 1/rotate_scale 2/x_mirror 3/y_mirror \r
116                 unsigned int  angle,         // rotate angle (0~359)    \r
117                 unsigned int  dither_en,     // dither en flag   \r
118                 unsigned int  AA_en,         // AA flag          \r
119                 unsigned int  yuv2rgb_mode\r
120                 );\r
121 \r
122 \r
123 int\r
124 RGA_set_color_palette_mode(\r
125                 msg_t *msg,\r
126                 u8  palette_mode,    /* 1bpp/2bpp/4bpp/8bpp */\r
127                 u8  endian_mode,     /* src endian mode sel */\r
128                 u32 bpp1_0_color,    /* BPP1 = 0 */\r
129                 u32 bpp1_1_color     /* BPP1 = 1 */\r
130                 );\r
131 \r
132 \r
133 \r
134 int\r
135 RGA_set_color_fill_mode(\r
136                 msg_t *msg,\r
137                 CF_GR_COLOR  gr_color,      /* gradient color part*/\r
138                 u8 gr_satur_mode,           /* saturation mode */\r
139                 u8 cf_mode,                 /* patten fill or solid fill */\r
140                 u32 color,                  /* solid color */\r
141                 u16 pat_width,              /* pat_width */\r
142                 u16 pat_height,             /* pat_height */\r
143                 u8 pat_x_off,               /* patten x offset */\r
144                 u8 pat_y_off,               /* patten y offset */\r
145                 u8 aa_en                    /* alpha en */\r
146                 );\r
147 \r
148 \r
149 int\r
150 RGA_set_line_point_drawing_mode(\r
151                 msg_t *msg,\r
152                 POINT sp,                   /* start point */\r
153                 POINT ep,                   /* end   point */\r
154                 unsigned int color,         /* line point drawing color */\r
155                 unsigned int line_width,    /* line width */\r
156                 unsigned char AA_en,        /* AA en */\r
157                 unsigned char last_point_en /* last point en */\r
158                 );\r
159 \r
160 \r
161 \r
162 int\r
163 RGA_set_blur_sharp_filter_mode(\r
164                 msg_t *msg,\r
165                 unsigned char filter_mode,   /* blur/sharpness   */\r
166                 unsigned char filter_type,   /* filter intensity */\r
167                 unsigned char dither_en      /* dither_en flag   */\r
168                 );\r
169 \r
170 int\r
171 RGA_set_pre_scaling_mode(\r
172                 msg_t *msg,\r
173                 unsigned char dither_en\r
174                 );\r
175 \r
176 \r
177 int\r
178 RGA_update_palette_table_mode(\r
179                 msg_t *msg,\r
180                 unsigned int LUT_addr,      /* LUT table addr      */\r
181                 unsigned int palette_mode   /* 1bpp/2bpp/4bpp/8bpp */\r
182                 );\r
183 \r
184 \r
185 int\r
186 RGA_set_update_patten_buff_mode(\r
187                 msg_t *msg,\r
188                 unsigned int pat_addr, /* patten addr    */\r
189                 unsigned int w,        /* patten width   */\r
190                 unsigned int h,        /* patten height  */\r
191                 unsigned int format    /* patten format  */\r
192                 );\r
193 /*\r
194 int\r
195 RGA_set_MMU_info(\r
196                 MSG *msg,\r
197                 unsigned int base_addr,\r
198                 unsigned int src_flush,\r
199                 unsigned int dst_flush,\r
200                 unsigned int cmd_flush,\r
201                 unsigned int page_size\r
202                 );\r
203 */\r
204 \r
205 int\r
206 RGA_set_mmu_info(\r
207                 msg_t *msg,\r
208                 u8  mmu_en,\r
209                 u8  src_flush,\r
210                 u8  dst_flush,\r
211                 u8  cmd_flush,\r
212                 u32 base_addr,\r
213                 u8  page_size);\r
214 \r
215 msg_t * RGA_init_msg(void);\r
216 int RGA_free_msg(msg_t *msg);\r
217 void matrix_cal(msg_t *msg, TILE_INFO *tile);\r
218 unsigned char * RGA_set_reg_info(msg_t *msg, u8 *base);\r
219 void RGA_set_cmd_info(u8 cmd_mode, u32 cmd_addr);\r
220 void RGA_start(void);\r
221 void RGA_soft_reset(void);\r
222 #endif\r
223 \r
224 uint32_t RGA_gen_two_pro(struct rga_req *msg, struct rga_req *msg1);\r
225 \r
226 \r
227 #endif\r