2 //#include <linux/kernel.h>
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3 #include <linux/memory.h>
\r
4 #include "rga_reg_info.h"
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9 /*************************************************************
\r
11 RGA_pixel_width_init
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13 select pixel_width form data format
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18 **************************************************************/
\r
20 RGA_pixel_width_init(unsigned int format)
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22 unsigned char pixel_width;
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29 case RK_FORMAT_RGBA_8888 : pixel_width = 4; break;
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30 case RK_FORMAT_RGBX_8888 : pixel_width = 4; break;
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31 case RK_FORMAT_RGB_888 : pixel_width = 3; break;
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32 case RK_FORMAT_BGRA_8888 : pixel_width = 4; break;
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33 case RK_FORMAT_RGB_565 : pixel_width = 2; break;
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34 case RK_FORMAT_RGBA_5551 : pixel_width = 2; break;
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35 case RK_FORMAT_RGBA_4444 : pixel_width = 2; break;
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36 case RK_FORMAT_BGR_888 : pixel_width = 3; break;
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39 case RK_FORMAT_YCbCr_422_SP : pixel_width = 1; break;
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40 case RK_FORMAT_YCbCr_422_P : pixel_width = 1; break;
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41 case RK_FORMAT_YCbCr_420_SP : pixel_width = 1; break;
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42 case RK_FORMAT_YCbCr_420_P : pixel_width = 1; break;
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43 case RK_FORMAT_YCrCb_422_SP : pixel_width = 1; break;
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44 case RK_FORMAT_YCrCb_422_P : pixel_width = 1; break;
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45 case RK_FORMAT_YCrCb_420_SP : pixel_width = 1; break;
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46 case RK_FORMAT_YCrCb_420_P : pixel_width = 1; break;
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47 //case default : pixel_width = 0; break;
\r
53 /*************************************************************
\r
57 calculate dst act window position / width / height
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58 and set the tile struct
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63 **************************************************************/
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65 dst_ctrl_cal(const struct rga_req *msg, TILE_INFO *tile)
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67 u32 width = msg->dst.act_w;
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68 u32 height = msg->dst.act_h;
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69 s32 xoff = msg->dst.x_offset;
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70 s32 yoff = msg->dst.y_offset;
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72 s32 x0, y0, x1, y1, x2, y2;
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73 s32 x00,y00,x10,y10,x20,y20;
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77 s32 xmax, xmin, ymax, ymin;
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79 s32 sina = msg->sina; /* 16.16 */
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80 s32 cosa = msg->cosa; /* 16.16 */
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82 xmax = xmin = ymax = ymin = 0;
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84 if((msg->rotate_mode == 0)||(msg->rotate_mode == 2)||(msg->rotate_mode == 3))
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90 pos[3] = yoff + height - 1;
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92 pos[4] = xoff + width - 1;
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93 pos[5] = yoff + height - 1;
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95 pos[6] = xoff + width - 1;
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98 xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);
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99 xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);
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101 ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);
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102 ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);
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104 //printk("xmax = %d, xmin = %d, ymin = %d, ymax = %d\n", xmax, xmin, ymin, ymax);
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106 else if(msg->rotate_mode == 1)
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108 if((sina == 0) || (cosa == 0))
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110 if((sina == 0) && (cosa == -65536))
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113 pos[0] = xoff - width + 1;
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114 pos[1] = yoff - height + 1;
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116 pos[2] = xoff - width + 1;
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123 pos[7] = yoff - height + 1;
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125 else if((cosa == 0)&&(sina == 65536))
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128 pos[0] = xoff - height + 1;
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131 pos[2] = xoff - height + 1;
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132 pos[3] = yoff + width - 1;
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135 pos[5] = yoff + width - 1;
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140 else if((cosa == 0)&&(sina == -65536))
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144 pos[1] = yoff - width + 1;
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149 pos[4] = xoff + height - 1;
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152 pos[6] = xoff + height - 1;
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153 pos[7] = yoff - width + 1;
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162 pos[3] = yoff + height - 1;
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164 pos[4] = xoff + width - 1;
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165 pos[5] = yoff + height - 1;
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167 pos[6] = xoff + width - 1;
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171 xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);
\r
172 xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);
\r
174 ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);
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175 ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);
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188 y1 = height + yoff;
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191 y2 = height + yoff;
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196 pos[2] = x00 = (((x0 - xoff)*xx - (y0 - yoff)*xy)>>16) + xoff;
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197 pos[3] = y00 = (((x0 - xoff)*yx + (y0 - yoff)*yy)>>16) + yoff;
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199 pos[4] = x10 = (((x1 - xoff)*xx - (y1 - yoff)*xy)>>16) + xoff;
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200 pos[5] = y10 = (((x1 - xoff)*yx + (y1 - yoff)*yy)>>16) + yoff;
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202 pos[6] = x20 = (((x2 - xoff)*xx - (y2 - yoff)*xy)>>16) + xoff;
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203 pos[7] = y20 = (((x2 - xoff)*yx + (y2 - yoff)*yy)>>16) + yoff;
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205 xmax = MAX(MAX(MAX(x00, xoff), x10), x20) + 2;
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206 xmin = MIN(MIN(MIN(x00, xoff), x10), x20) - 1;
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208 ymax = MAX(MAX(MAX(y00, yoff), y10), y20) + 2;
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209 ymin = MIN(MIN(MIN(y00, yoff), y10), y20) - 1;
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211 xmax = MIN(xmax, msg->clip.xmax);
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212 xmin = MAX(xmin, msg->clip.xmin);
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214 ymax = MIN(ymax, msg->clip.ymax);
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215 ymin = MAX(ymin, msg->clip.ymin);
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217 //printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);
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221 if ((xmax < xmin) || (ymax < ymin)) {
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226 if ((xmin >= msg->dst.vir_w)||(xmax < 0)||(ymin >= msg->dst.vir_h)||(ymax < 0)) {
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227 xmin = xmax = ymin = ymax = 0;
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230 //printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);
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232 tile->dst_ctrl.w = (xmax - xmin);
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233 tile->dst_ctrl.h = (ymax - ymin);
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234 tile->dst_ctrl.x_off = xmin;
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235 tile->dst_ctrl.y_off = ymin;
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237 //printk("tile->dst_ctrl.w = %x, tile->dst_ctrl.h = %x\n", tile->dst_ctrl.w, tile->dst_ctrl.h);
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239 tile->tile_x_num = (xmax - xmin + 1 + 7)>>3;
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240 tile->tile_y_num = (ymax - ymin + 1 + 7)>>3;
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242 tile->dst_x_tmp = xmin - msg->dst.x_offset;
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243 tile->dst_y_tmp = ymin - msg->dst.y_offset;
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246 /*************************************************************
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250 calculate src remap window position / width / height
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251 and set the tile struct
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255 20012-2-2 10:59:25
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256 **************************************************************/
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259 src_tile_info_cal(const struct rga_req *msg, TILE_INFO *tile)
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261 s32 x0, x1, x2, x3, y0, y1, y2, y3;
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263 int64_t xx, xy, yx, yy;
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268 int64_t x_dx, x_dy, y_dx, y_dy;
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269 int64_t x_temp_start, y_temp_start;
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270 int64_t xmax, xmin, ymax, ymin;
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272 int64_t t_xoff, t_yoff;
\r
274 xx = tile->matrix[0]; /* 32.32 */
\r
275 xy = tile->matrix[1]; /* 32.32 */
\r
276 yx = tile->matrix[2]; /* 32.32 */
\r
277 yy = tile->matrix[3]; /* 32.32 */
\r
279 if(msg->rotate_mode == 1)
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281 x0 = tile->dst_x_tmp;
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282 y0 = tile->dst_y_tmp;
\r
293 pos[0] = (x0*xx + y0*yx);
\r
294 pos[1] = (x0*xy + y0*yy);
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296 pos[2] = (x1*xx + y1*yx);
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297 pos[3] = (x1*xy + y1*yy);
\r
299 pos[4] = (x2*xx + y2*yx);
\r
300 pos[5] = (x2*xy + y2*yy);
\r
302 pos[6] = (x3*xx + y3*yx);
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303 pos[7] = (x3*xy + y3*yy);
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313 epos[2] = (x1*xx + y1*yx);
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314 epos[3] = (x1*xy + y1*yy);
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316 epos[4] = (x2*xx + y2*yx);
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317 epos[5] = (x2*xy + y2*yy);
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319 epos[6] = (x3*xx + y3*yx);
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320 epos[7] = (x3*xy + y3*yy);
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322 x_dx = pos[6] - pos[0];
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323 x_dy = pos[7] - pos[1];
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325 y_dx = pos[2] - pos[0];
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326 y_dy = pos[3] - pos[1];
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328 tile->x_dx = (s32)(x_dx >> 22 );
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329 tile->x_dy = (s32)(x_dy >> 22 );
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330 tile->y_dx = (s32)(y_dx >> 22 );
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331 tile->y_dy = (s32)(y_dy >> 22 );
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333 x_temp_start = x0*xx + y0*yx;
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334 y_temp_start = x0*xy + y0*yy;
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336 xmax = (MAX(MAX(MAX(epos[0], epos[2]), epos[4]), epos[6]));
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337 xmin = (MIN(MIN(MIN(epos[0], epos[2]), epos[4]), epos[6]));
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339 ymax = (MAX(MAX(MAX(epos[1], epos[3]), epos[5]), epos[7]));
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340 ymin = (MIN(MIN(MIN(epos[1], epos[3]), epos[5]), epos[7]));
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342 t_xoff = (x_temp_start - xmin)>>18;
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343 t_yoff = (y_temp_start - ymin)>>18;
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345 tile->tile_xoff = (s32)t_xoff;
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346 tile->tile_yoff = (s32)t_yoff;
\r
348 tile->tile_w = (u16)((xmax - xmin)>>21); //.11
\r
349 tile->tile_h = (u16)((ymax - ymin)>>21); //.11
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351 tile->tile_start_x_coor = (s16)(xmin>>29); //.3
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352 tile->tile_start_y_coor = (s16)(ymin>>29); //.3
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354 else if (msg->rotate_mode == 2)
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356 tile->x_dx = (s32)((8*xx)>>22);
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359 tile->y_dy = (s32)((8*yy)>>22);
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361 tile->tile_w = ABS((s32)((7*xx)>>21));
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362 tile->tile_h = ABS((s32)((7*yy)>>21));
\r
364 tile->tile_xoff = ABS((s32)((7*xx)>>18));
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365 tile->tile_yoff = 0;
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367 tile->tile_start_x_coor = (((msg->src.act_w - 1)<<11) - (tile->tile_w))>>8;
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368 tile->tile_start_y_coor = 0;
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370 else if (msg->rotate_mode == 3)
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372 tile->x_dx = (s32)((8*xx)>>22);
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375 tile->y_dy = (s32)((8*yy)>>22);
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377 tile->tile_w = ABS((s32)((7*xx)>>21));
\r
378 tile->tile_h = ABS((s32)((7*yy)>>21));
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380 tile->tile_xoff = 0;
\r
381 tile->tile_yoff = ABS((s32)((7*yy)>>18));
\r
383 tile->tile_start_x_coor = 0;
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384 tile->tile_start_y_coor = (((msg->src.act_h - 1)<<11) - (tile->tile_h))>>8;
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387 if ((msg->scale_mode == 2)||(msg->alpha_rop_flag >> 7))
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389 tile->tile_start_x_coor -= (1<<3);
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390 tile->tile_start_y_coor -= (1<<3);
\r
391 tile->tile_w += (2 << 11);
\r
392 tile->tile_h += (2 << 11);
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393 tile->tile_xoff += (1<<14);
\r
394 tile->tile_yoff += (1<<14);
\r
399 /*************************************************************
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403 fill mode ctrl reg info
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407 20012-2-2 10:59:25
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408 **************************************************************/
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411 RGA_set_mode_ctrl(u8 *base, const struct rga_req *msg)
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413 u32 *bRGA_MODE_CTL;
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416 u8 src_rgb_pack = 0;
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420 u8 src_cbcr_swp = 0;
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422 u8 dst_rgb_pack = 0;
\r
427 bRGA_MODE_CTL = (u32 *)(base + RGA_MODE_CTRL_OFFSET);
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429 reg = ((reg & (~m_RGA_MODE_CTRL_2D_RENDER_MODE)) | (s_RGA_MODE_CTRL_2D_RENDER_MODE(msg->render_mode)));
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433 if (msg->render_mode == color_palette_mode || msg->render_mode == update_palette_table_mode)
\r
435 src_format = 0x10 | (msg->palette_mode & 3);
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439 switch (msg->src.format)
\r
441 case RK_FORMAT_RGBA_8888 : src_format = 0x0; break;
\r
442 case RK_FORMAT_RGBA_4444 : src_format = 0x3; break;
\r
443 case RK_FORMAT_RGBA_5551 : src_format = 0x2; break;
\r
444 case RK_FORMAT_BGRA_8888 : src_format = 0x0; src_rb_swp = 0x1; break;
\r
445 case RK_FORMAT_RGBX_8888 : src_format = 0x0; break;
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446 case RK_FORMAT_RGB_565 : src_format = 0x1; break;
\r
447 case RK_FORMAT_RGB_888 : src_format = 0x0; src_rgb_pack = 1; break;
\r
448 case RK_FORMAT_BGR_888 : src_format = 0x0; src_rgb_pack = 1; src_rb_swp = 1; break;
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450 case RK_FORMAT_YCbCr_422_SP : src_format = 0x4; break;
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451 case RK_FORMAT_YCbCr_422_P : src_format = 0x5; break;
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452 case RK_FORMAT_YCbCr_420_SP : src_format = 0x6; break;
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453 case RK_FORMAT_YCbCr_420_P : src_format = 0x7; break;
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455 case RK_FORMAT_YCrCb_422_SP : src_format = 0x4; src_cbcr_swp = 1; break;
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456 case RK_FORMAT_YCrCb_422_P : src_format = 0x5; src_cbcr_swp = 1; break;
\r
457 case RK_FORMAT_YCrCb_420_SP : src_format = 0x6; src_cbcr_swp = 1; break;
\r
458 case RK_FORMAT_YCrCb_420_P : src_format = 0x7; src_cbcr_swp = 1; break;
\r
462 src_a_swp = msg->src.alpha_swap & 1;
\r
464 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RGB_PACK)) | (s_RGA_MODE_CTRL_SRC_RGB_PACK(src_rgb_pack)));
\r
465 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_FORMAT)) | (s_RGA_MODE_CTRL_SRC_FORMAT(src_format)));
\r
466 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RB_SWAP)) | (s_RGA_MODE_CTRL_SRC_RB_SWAP(src_rb_swp)));
\r
467 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_ALPHA_SWAP)) | (s_RGA_MODE_CTRL_SRC_ALPHA_SWAP(src_a_swp)));
\r
468 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_UV_SWAP_MODE )) | (s_RGA_MODE_CTRL_SRC_UV_SWAP_MODE (src_cbcr_swp)));
\r
471 /* YUV2RGB MODE */
\r
472 reg = ((reg & (~m_RGA_MODE_CTRL_YUV2RGB_CON_MODE)) | (s_RGA_MODE_CTRL_YUV2RGB_CON_MODE(msg->yuv2rgb_mode)));
\r
475 reg = ((reg & (~m_RGA_MODE_CTRL_ROTATE_MODE)) | (s_RGA_MODE_CTRL_ROTATE_MODE(msg->rotate_mode)));
\r
478 reg = ((reg & (~m_RGA_MODE_CTRL_SCALE_MODE)) | (s_RGA_MODE_CTRL_SCALE_MODE(msg->scale_mode)));
\r
480 /* COLOR FILL MODE */
\r
481 reg = ((reg & (~m_RGA_MODE_CTRL_PAT_SEL)) | (s_RGA_MODE_CTRL_PAT_SEL(msg->color_fill_mode)));
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484 if ((msg->render_mode == update_palette_table_mode)||(msg->render_mode == update_patten_buff_mode))
\r
486 dst_format = msg->pat.format;
\r
490 dst_format = (u8)msg->dst.format;
\r
493 /* dst info set */
\r
494 switch (dst_format)
\r
496 case RK_FORMAT_BGRA_8888 : dst_format = 0x0; dst_rb_swp = 0x1; break;
\r
497 case RK_FORMAT_RGBA_4444 : dst_format = 0x3; break;
\r
498 case RK_FORMAT_RGBA_5551 : dst_format = 0x2; break;
\r
499 case RK_FORMAT_RGBA_8888 : dst_format = 0x0; break;
\r
500 case RK_FORMAT_RGB_565 : dst_format = 0x1; break;
\r
501 case RK_FORMAT_RGB_888 : dst_format = 0x0; dst_rgb_pack = 0x1; break;
\r
502 case RK_FORMAT_BGR_888 : dst_format = 0x0; dst_rgb_pack = 0x1; dst_rb_swp = 1; break;
\r
503 case RK_FORMAT_RGBX_8888 : dst_format = 0x0; break;
\r
506 dst_a_swp = msg->dst.alpha_swap & 1;
\r
508 reg = ((reg & (~m_RGA_MODE_CTRL_DST_FORMAT)) | (s_RGA_MODE_CTRL_DST_FORMAT(dst_format)));
\r
509 reg = ((reg & (~m_RGA_MODE_CTRL_DST_RGB_PACK)) | (s_RGA_MODE_CTRL_DST_RGB_PACK(dst_rgb_pack)));
\r
510 reg = ((reg & (~m_RGA_MODE_CTRL_DST_RB_SWAP)) | (s_RGA_MODE_CTRL_DST_RB_SWAP(dst_rb_swp)));
\r
511 reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_SWAP)) | (s_RGA_MODE_CTRL_DST_ALPHA_SWAP(dst_a_swp)));
\r
512 reg = ((reg & (~m_RGA_MODE_CTRL_LUT_ENDIAN_MODE)) | (s_RGA_MODE_CTRL_LUT_ENDIAN_MODE(msg->endian_mode & 1)));
\r
513 reg = ((reg & (~m_RGA_MODE_CTRL_SRC_TRANS_MODE)) | (s_RGA_MODE_CTRL_SRC_TRANS_MODE(msg->src_trans_mode)));
\r
514 reg = ((reg & (~m_RGA_MODE_CTRL_ZERO_MODE_ENABLE)) | (s_RGA_MODE_CTRL_ZERO_MODE_ENABLE(msg->alpha_rop_mode >> 4)));
\r
515 reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_ENABLE)) | (s_RGA_MODE_CTRL_DST_ALPHA_ENABLE(msg->alpha_rop_mode >> 5)));
\r
517 *bRGA_MODE_CTL = reg;
\r
523 /*************************************************************
\r
527 fill src relate reg info
\r
531 20012-2-2 10:59:25
\r
532 **************************************************************/
\r
535 RGA_set_src(u8 *base, const struct rga_req *msg)
\r
537 u32 *bRGA_SRC_VIR_INFO;
\r
538 u32 *bRGA_SRC_ACT_INFO;
\r
539 u32 *bRGA_SRC_Y_MST;
\r
540 u32 *bRGA_SRC_CB_MST;
\r
541 u32 *bRGA_SRC_CR_MST;
\r
543 s16 x_off, y_off, stride;
\r
544 s16 uv_x_off, uv_y_off, uv_stride;
\r
547 uv_x_off = uv_y_off = uv_stride = 0;
\r
549 bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
\r
550 bRGA_SRC_CB_MST = (u32 *)(base + RGA_SRC_CB_MST_OFFSET);
\r
551 bRGA_SRC_CR_MST = (u32 *)(base + RGA_SRC_CR_MST_OFFSET);
\r
552 bRGA_SRC_VIR_INFO = (u32 *)(base + RGA_SRC_VIR_INFO_OFFSET);
\r
553 bRGA_SRC_ACT_INFO = (u32 *)(base + RGA_SRC_ACT_INFO_OFFSET);
\r
555 x_off = msg->src.x_offset;
\r
556 y_off = msg->src.y_offset;
\r
558 pixel_width = RGA_pixel_width_init(msg->src.format);
\r
560 stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);
\r
562 switch(msg->src.format)
\r
564 case RK_FORMAT_YCbCr_422_SP :
\r
565 uv_stride = stride;
\r
569 case RK_FORMAT_YCbCr_422_P :
\r
570 uv_stride = stride >> 1;
\r
571 uv_x_off = x_off >> 1;
\r
574 case RK_FORMAT_YCbCr_420_SP :
\r
575 uv_stride = stride;
\r
577 uv_y_off = y_off >> 1;
\r
579 case RK_FORMAT_YCbCr_420_P :
\r
580 uv_stride = stride >> 1;
\r
581 uv_x_off = x_off >> 1;
\r
582 uv_y_off = y_off >> 1;
\r
584 case RK_FORMAT_YCrCb_422_SP :
\r
585 uv_stride = stride;
\r
589 case RK_FORMAT_YCrCb_422_P :
\r
590 uv_stride = stride >> 1;
\r
591 uv_x_off = x_off >> 1;
\r
594 case RK_FORMAT_YCrCb_420_SP :
\r
595 uv_stride = stride;
\r
597 uv_y_off = y_off >> 1;
\r
599 case RK_FORMAT_YCrCb_420_P :
\r
600 uv_stride = stride >> 1;
\r
601 uv_x_off = x_off >> 1;
\r
602 uv_y_off = y_off >> 1;
\r
607 /* src addr set */
\r
608 *bRGA_SRC_Y_MST = msg->src.yrgb_addr + (y_off * stride) + (x_off * pixel_width);
\r
609 *bRGA_SRC_CB_MST = msg->src.uv_addr + uv_y_off * uv_stride + uv_x_off;
\r
610 *bRGA_SRC_CR_MST = msg->src.v_addr + uv_y_off * uv_stride + uv_x_off;
\r
612 if((msg->alpha_rop_flag >> 1) & 1)
\r
613 *bRGA_SRC_CB_MST = (u32)msg->rop_mask_addr;
\r
615 if (msg->render_mode == color_palette_mode)
\r
619 shift = 3 - (msg->palette_mode & 3);
\r
620 sw = msg->src.vir_w;
\r
622 byte_num = sw >> shift;
\r
623 stride = (byte_num + 3) & (~3);
\r
626 /* src act window / vir window set */
\r
627 *bRGA_SRC_VIR_INFO = ((stride >> 2) | (msg->src.vir_h)<<16);
\r
628 *bRGA_SRC_ACT_INFO = ((msg->src.act_w-1) | (msg->src.act_h-1)<<16);
\r
632 /*************************************************************
\r
636 fill dst relate reg info
\r
640 20012-2-2 10:59:25
\r
641 **************************************************************/
\r
643 s32 RGA_set_dst(u8 *base, const struct rga_req *msg)
\r
646 u32 *bRGA_DST_VIR_INFO;
\r
647 u32 *bRGA_DST_CTR_INFO;
\r
648 u32 *bRGA_PRESCL_CB_MST;
\r
649 u32 *bRGA_PRESCL_CR_MST;
\r
653 s16 x_off = msg->dst.x_offset;
\r
654 s16 y_off = msg->dst.y_offset;
\r
655 u16 stride, rop_mask_stride;
\r
657 bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);
\r
658 bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);
\r
659 bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);
\r
660 bRGA_PRESCL_CB_MST = (u32 *)(base + RGA_PRESCL_CB_MST_OFFSET);
\r
661 bRGA_PRESCL_CR_MST = (u32 *)(base + RGA_PRESCL_CR_MST_OFFSET);
\r
663 pw = RGA_pixel_width_init(msg->dst.format);
\r
665 stride = (msg->dst.vir_w * pw + 3) & (~3);
\r
667 *bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (y_off * stride) + (x_off * pw);
\r
669 if (msg->render_mode == pre_scaling_mode)
\r
671 switch(msg->dst.format)
\r
673 case RK_FORMAT_YCbCr_422_SP :
\r
674 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);
\r
676 case RK_FORMAT_YCbCr_422_P :
\r
677 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);
\r
678 *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);
\r
680 case RK_FORMAT_YCbCr_420_SP :
\r
681 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);
\r
683 case RK_FORMAT_YCbCr_420_P :
\r
684 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
\r
685 *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
\r
687 case RK_FORMAT_YCrCb_422_SP :
\r
688 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);
\r
690 case RK_FORMAT_YCrCb_422_P :
\r
691 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);
\r
692 *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);
\r
694 case RK_FORMAT_YCrCb_420_SP :
\r
695 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);
\r
697 case RK_FORMAT_YCrCb_420_P :
\r
698 *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
\r
699 *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);
\r
704 rop_mask_stride = (((msg->src.vir_w + 7)>>3) + 3) & (~3);//not dst_vir.w,hxx,2011.7.21
\r
706 reg = (stride >> 2) & 0xffff;
\r
707 reg = reg | ((rop_mask_stride>>2) << 16);
\r
709 if (msg->render_mode == line_point_drawing_mode)
\r
712 reg = reg | (msg->dst.vir_h << 16);
\r
715 *bRGA_DST_VIR_INFO = reg;
\r
716 *bRGA_DST_CTR_INFO = (msg->dst.act_w - 1) | ((msg->dst.act_h - 1) << 16);
\r
722 /*************************************************************
\r
726 fill alpha rop some relate reg bit
\r
730 20012-2-2 10:59:25
\r
731 **************************************************************/
\r
733 RGA_set_alpha_rop(u8 *base, const struct rga_req *msg)
\r
735 u32 *bRGA_ALPHA_CON;
\r
736 u32 *bRGA_ROP_CON0;
\r
737 u32 *bRGA_ROP_CON1;
\r
739 u32 rop_con0, rop_con1;
\r
741 u8 rop_mode = (msg->alpha_rop_mode) & 3;
\r
742 u8 alpha_mode = msg->alpha_rop_mode & 3;
\r
744 rop_con0 = rop_con1 = 0;
\r
746 bRGA_ALPHA_CON = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
\r
748 reg = ((reg & (~m_RGA_ALPHA_CON_ENABLE) )| (s_RGA_ALPHA_CON_ENABLE(msg->alpha_rop_flag & 1)));
\r
749 reg = ((reg & (~m_RGA_ALPHA_CON_A_OR_R_SEL)) | (s_RGA_ALPHA_CON_A_OR_R_SEL((msg->alpha_rop_flag >> 1) & 1)));
\r
750 reg = ((reg & (~m_RGA_ALPHA_CON_ALPHA_MODE)) | (s_RGA_ALPHA_CON_ALPHA_MODE(alpha_mode)));
\r
751 reg = ((reg & (~m_RGA_ALPHA_CON_PD_MODE)) | (s_RGA_ALPHA_CON_PD_MODE(msg->PD_mode)));
\r
752 reg = ((reg & (~m_RGA_ALPHA_CON_SET_CONSTANT_VALUE)) | (s_RGA_ALPHA_CON_SET_CONSTANT_VALUE(msg->alpha_global_value)));
\r
753 reg = ((reg & (~m_RGA_ALPHA_CON_PD_M_SEL)) | (s_RGA_ALPHA_CON_PD_M_SEL(msg->alpha_rop_flag >> 3)));
\r
754 reg = ((reg & (~m_RGA_ALPHA_CON_FADING_ENABLE)) | (s_RGA_ALPHA_CON_FADING_ENABLE(msg->alpha_rop_flag >> 2)));
\r
755 reg = ((reg & (~m_RGA_ALPHA_CON_ROP_MODE_SEL)) | (s_RGA_ALPHA_CON_ROP_MODE_SEL(rop_mode)));
\r
756 reg = ((reg & (~m_RGA_ALPHA_CON_CAL_MODE_SEL)) | (s_RGA_ALPHA_CON_CAL_MODE_SEL(msg->alpha_rop_flag >> 4)));
\r
757 reg = ((reg & (~m_RGA_ALPHA_CON_DITHER_ENABLE)) | (s_RGA_ALPHA_CON_DITHER_ENABLE(msg->alpha_rop_flag >> 5)));
\r
758 reg = ((reg & (~m_RGA_ALPHA_CON_GRADIENT_CAL_MODE)) | (s_RGA_ALPHA_CON_GRADIENT_CAL_MODE(msg->alpha_rop_flag >> 6)));
\r
759 reg = ((reg & (~m_RGA_ALPHA_CON_AA_SEL)) | (s_RGA_ALPHA_CON_AA_SEL(msg->alpha_rop_flag >> 7)));
\r
761 *bRGA_ALPHA_CON = reg;
\r
763 if(rop_mode == 0) {
\r
764 rop_con0 = ROP3_code[(msg->rop_code & 0xff)];
\r
766 else if(rop_mode == 1) {
\r
767 rop_con0 = ROP3_code[(msg->rop_code & 0xff)];
\r
769 else if(rop_mode == 2) {
\r
770 rop_con0 = ROP3_code[(msg->rop_code & 0xff)];
\r
771 rop_con1 = ROP3_code[(msg->rop_code & 0xff00)>>8];
\r
774 bRGA_ROP_CON0 = (u32 *)(base + RGA_ROP_CON0_OFFSET);
\r
775 bRGA_ROP_CON1 = (u32 *)(base + RGA_ROP_CON1_OFFSET);
\r
777 *bRGA_ROP_CON0 = (u32)rop_con0;
\r
778 *bRGA_ROP_CON1 = (u32)rop_con1;
\r
782 /*************************************************************
\r
786 fill color some relate reg bit
\r
791 20012-2-2 10:59:25
\r
792 **************************************************************/
\r
795 RGA_set_color(u8 *base, const struct rga_req *msg)
\r
797 u32 *bRGA_SRC_TR_COLOR0;
\r
798 u32 *bRGA_SRC_TR_COLOR1;
\r
799 u32 *bRGA_SRC_BG_COLOR;
\r
800 u32 *bRGA_SRC_FG_COLOR;
\r
803 bRGA_SRC_BG_COLOR = (u32 *)(base + RGA_SRC_BG_COLOR_OFFSET);
\r
804 bRGA_SRC_FG_COLOR = (u32 *)(base + RGA_SRC_FG_COLOR_OFFSET);
\r
806 *bRGA_SRC_BG_COLOR = msg->bg_color; /* 1bpp 0 */
\r
807 *bRGA_SRC_FG_COLOR = msg->fg_color; /* 1bpp 1 */
\r
809 bRGA_SRC_TR_COLOR0 = (u32 *)(base + RGA_SRC_TR_COLOR0_OFFSET);
\r
810 bRGA_SRC_TR_COLOR1 = (u32 *)(base + RGA_SRC_TR_COLOR1_OFFSET);
\r
812 *bRGA_SRC_TR_COLOR0 = msg->color_key_min;
\r
813 *bRGA_SRC_TR_COLOR1 = msg->color_key_max;
\r
817 /*************************************************************
\r
821 fill fading some relate reg bit
\r
825 20012-2-2 10:59:25
\r
826 **************************************************************/
\r
829 RGA_set_fading(u8 *base, const struct rga_req *msg)
\r
831 u32 *bRGA_FADING_CON;
\r
835 bRGA_FADING_CON = (u32 *)(base + RGA_FADING_CON_OFFSET);
\r
841 reg = (r<<8) | (g<<16) | (b<<24) | reg;
\r
843 *bRGA_FADING_CON = reg;
\r
849 /*************************************************************
\r
853 fill patten some relate reg bit
\r
857 20012-2-2 10:59:25
\r
858 **************************************************************/
\r
861 RGA_set_pat(u8 *base, const struct rga_req *msg)
\r
864 u32 *bRGA_PAT_START_POINT;
\r
867 bRGA_PAT_START_POINT = (u32 *)(base + RGA_PAT_START_POINT_OFFSET);
\r
869 bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
\r
871 *bRGA_PAT_START_POINT = (msg->pat.act_w * msg->pat.y_offset) + msg->pat.x_offset;
\r
873 reg = (msg->pat.act_w - 1) | ((msg->pat.act_h - 1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);
\r
874 *bRGA_PAT_CON = reg;
\r
882 /*************************************************************
\r
884 RGA_set_bitblt_reg_info
\r
886 fill bitblt mode relate ren info
\r
890 20012-2-2 10:59:25
\r
891 **************************************************************/
\r
894 RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
\r
896 u32 *bRGA_SRC_Y_MST;
\r
897 u32 *bRGA_SRC_CB_MST;
\r
898 u32 *bRGA_SRC_CR_MST;
\r
899 u32 *bRGA_SRC_X_PARA;
\r
900 u32 *bRGA_SRC_Y_PARA;
\r
901 u32 *bRGA_SRC_TILE_XINFO;
\r
902 u32 *bRGA_SRC_TILE_YINFO;
\r
903 u32 *bRGA_SRC_TILE_H_INCR;
\r
904 u32 *bRGA_SRC_TILE_V_INCR;
\r
905 u32 *bRGA_SRC_TILE_OFFSETX;
\r
906 u32 *bRGA_SRC_TILE_OFFSETY;
\r
909 u32 *bRGA_DST_CTR_INFO;
\r
911 s32 m0, m1, m2, m3;
\r
913 //s32 x_dx, x_dy, y_dx, y_dy;
\r
914 s32 xmin, xmax, ymin, ymax;
\r
916 u32 y_addr, u_addr, v_addr;
\r
917 u32 pixel_width, stride;
\r
919 u_addr = v_addr = 0;
\r
923 bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
\r
924 bRGA_SRC_CB_MST = (u32 *)(base + RGA_SRC_CB_MST_OFFSET);
\r
925 bRGA_SRC_CR_MST = (u32 *)(base + RGA_SRC_CR_MST_OFFSET);
\r
927 bRGA_SRC_X_PARA = (u32 *)(base + RGA_SRC_X_PARA_OFFSET);
\r
928 bRGA_SRC_Y_PARA = (u32 *)(base + RGA_SRC_Y_PARA_OFFSET);
\r
930 bRGA_SRC_TILE_XINFO = (u32 *)(base + RGA_SRC_TILE_XINFO_OFFSET);
\r
931 bRGA_SRC_TILE_YINFO = (u32 *)(base + RGA_SRC_TILE_YINFO_OFFSET);
\r
932 bRGA_SRC_TILE_H_INCR = (u32 *)(base + RGA_SRC_TILE_H_INCR_OFFSET);
\r
933 bRGA_SRC_TILE_V_INCR = (u32 *)(base + RGA_SRC_TILE_V_INCR_OFFSET);
\r
934 bRGA_SRC_TILE_OFFSETX = (u32 *)(base + RGA_SRC_TILE_OFFSETX_OFFSET);
\r
935 bRGA_SRC_TILE_OFFSETY = (u32 *)(base + RGA_SRC_TILE_OFFSETY_OFFSET);
\r
937 bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);
\r
938 bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);
\r
940 /* Matrix reg fill */
\r
941 m0 = (s32)(tile->matrix[0] >> 18);
\r
942 m1 = (s32)(tile->matrix[1] >> 18);
\r
943 m2 = (s32)(tile->matrix[2] >> 18);
\r
944 m3 = (s32)(tile->matrix[3] >> 18);
\r
946 *bRGA_SRC_X_PARA = (m0 & 0xffff) | (m2 << 16);
\r
947 *bRGA_SRC_Y_PARA = (m1 & 0xffff) | (m3 << 16);
\r
949 /* src tile information setting */
\r
950 if(msg->rotate_mode != 0)//add by hxx,2011.7.12,for rtl0707,when line scanning ,do not calc src tile info
\r
952 *bRGA_SRC_TILE_XINFO = (tile->tile_start_x_coor & 0xffff) | (tile->tile_w << 16);
\r
953 *bRGA_SRC_TILE_YINFO = (tile->tile_start_y_coor & 0xffff) | (tile->tile_h << 16);
\r
955 *bRGA_SRC_TILE_H_INCR = ((tile->x_dx) & 0xffff) | ((tile->x_dy) << 16);
\r
956 *bRGA_SRC_TILE_V_INCR = ((tile->y_dx) & 0xffff) | ((tile->y_dy) << 16);
\r
958 *bRGA_SRC_TILE_OFFSETX = tile->tile_xoff;
\r
959 *bRGA_SRC_TILE_OFFSETY = tile->tile_yoff;
\r
962 pixel_width = RGA_pixel_width_init(msg->src.format);
\r
964 stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);
\r
966 if ((msg->rotate_mode == 1)||(msg->rotate_mode == 2)||(msg->rotate_mode == 3))
\r
968 pos[0] = tile->tile_start_x_coor<<8;
\r
969 pos[1] = tile->tile_start_y_coor<<8;
\r
972 pos[3] = pos[1] + tile->tile_h;
\r
974 pos[4] = pos[0] + tile->tile_w;
\r
975 pos[5] = pos[1] + tile->tile_h;
\r
977 pos[6] = pos[0] + tile->tile_w;
\r
992 xmax = (MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]) + 1);
\r
993 xmin = (MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]));
\r
995 ymax = (MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]) + 1);
\r
996 ymin = (MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]));
\r
998 xp = xmin + msg->src.x_offset;
\r
999 yp = ymin + msg->src.y_offset;
\r
1001 if (!((xmax < 0)||(xmin > msg->src.act_w - 1)||(ymax < 0)||(ymin > msg->src.act_h - 1)))
\r
1003 xp = CLIP(xp, msg->src.x_offset, msg->src.x_offset + msg->src.act_w - 1);
\r
1004 yp = CLIP(yp, msg->src.y_offset, msg->src.y_offset + msg->src.act_h - 1);
\r
1007 switch(msg->src.format)
\r
1009 case RK_FORMAT_YCbCr_420_P :
\r
1010 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1011 u_addr = msg->src.uv_addr + (yp>>1)*(stride>>1) + (xp>>1);
\r
1012 v_addr = msg->src.v_addr + (yp>>1)*(stride>>1) + (xp>>1);
\r
1014 case RK_FORMAT_YCbCr_420_SP :
\r
1015 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1016 u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);
\r
1018 case RK_FORMAT_YCbCr_422_P :
\r
1019 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1020 u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);
\r
1021 v_addr = msg->src.v_addr + (yp)*(stride>>1) + (xp>>1);
\r
1023 case RK_FORMAT_YCbCr_422_SP:
\r
1024 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1025 u_addr = msg->src.uv_addr + yp*stride + ((xp>>1)<<1);
\r
1027 case RK_FORMAT_YCrCb_420_P :
\r
1028 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1029 u_addr = msg->src.uv_addr + (yp>>1)*(stride>>1) + (xp>>1);
\r
1030 v_addr = msg->src.v_addr + (yp>>1)*(stride>>1) + (xp>>1);
\r
1032 case RK_FORMAT_YCrCb_420_SP :
\r
1033 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1034 u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);
\r
1036 case RK_FORMAT_YCrCb_422_P :
\r
1037 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1038 u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);
\r
1039 v_addr = msg->src.v_addr + (yp)*(stride>>1) + (xp>>1);
\r
1041 case RK_FORMAT_YCrCb_422_SP:
\r
1042 y_addr = msg->src.yrgb_addr + yp*stride + xp;
\r
1043 u_addr = msg->src.uv_addr + yp*stride + ((xp>>1)<<1);
\r
1046 y_addr = msg->src.yrgb_addr + yp*stride + xp*pixel_width;
\r
1050 *bRGA_SRC_Y_MST = y_addr;
\r
1051 *bRGA_SRC_CB_MST = u_addr;
\r
1052 *bRGA_SRC_CR_MST = v_addr;
\r
1056 pixel_width = RGA_pixel_width_init(msg->dst.format);
\r
1057 stride = (msg->dst.vir_w * pixel_width + 3) & (~3);
\r
1058 *bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (tile->dst_ctrl.y_off * stride) + (tile->dst_ctrl.x_off * pixel_width);
\r
1059 *bRGA_DST_CTR_INFO = (tile->dst_ctrl.w) | ((tile->dst_ctrl.h) << 16);
\r
1065 /*************************************************************
\r
1067 RGA_set_color_palette_reg_info
\r
1069 fill color palette process some relate reg bit
\r
1073 20012-2-2 10:59:25
\r
1074 **************************************************************/
\r
1077 RGA_set_color_palette_reg_info(u8 *base, const struct rga_req *msg)
\r
1079 u32 *bRGA_SRC_Y_MST;
\r
1086 x_off = msg->src.x_offset;
\r
1087 y_off = msg->src.y_offset;
\r
1089 sw = msg->src.vir_w;
\r
1090 shift = 3 - (msg->palette_mode & 3);
\r
1091 byte_num = sw >> shift;
\r
1092 src_stride = (byte_num + 3) & (~3);
\r
1094 p = msg->src.yrgb_addr;
\r
1095 p = p + (x_off>>shift) + y_off*src_stride;
\r
1097 bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);
\r
1098 *bRGA_SRC_Y_MST = (u32)p;
\r
1102 /*************************************************************
\r
1104 RGA_set_color_fill_reg_info
\r
1106 fill color fill process some relate reg bit
\r
1110 20012-2-2 10:59:25
\r
1111 **************************************************************/
\r
1113 RGA_set_color_fill_reg_info(u8 *base, const struct rga_req *msg)
\r
1116 u32 *bRGA_CP_GR_A;
\r
1117 u32 *bRGA_CP_GR_B;
\r
1118 u32 *bRGA_CP_GR_G;
\r
1119 u32 *bRGA_CP_GR_R;
\r
1121 u32 *bRGA_PAT_CON;
\r
1123 bRGA_CP_GR_A = (u32 *)(base + RGA_CP_GR_A_OFFSET);
\r
1124 bRGA_CP_GR_B = (u32 *)(base + RGA_CP_GR_B_OFFSET);
\r
1125 bRGA_CP_GR_G = (u32 *)(base + RGA_CP_GR_G_OFFSET);
\r
1126 bRGA_CP_GR_R = (u32 *)(base + RGA_CP_GR_R_OFFSET);
\r
1128 bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
\r
1130 *bRGA_CP_GR_A = (msg->gr_color.gr_x_a & 0xffff) | (msg->gr_color.gr_y_a << 16);
\r
1131 *bRGA_CP_GR_B = (msg->gr_color.gr_x_b & 0xffff) | (msg->gr_color.gr_y_b << 16);
\r
1132 *bRGA_CP_GR_G = (msg->gr_color.gr_x_g & 0xffff) | (msg->gr_color.gr_y_g << 16);
\r
1133 *bRGA_CP_GR_R = (msg->gr_color.gr_x_r & 0xffff) | (msg->gr_color.gr_y_r << 16);
\r
1135 *bRGA_PAT_CON = (msg->pat.vir_w-1) | ((msg->pat.vir_h-1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);
\r
1140 /*************************************************************
\r
1142 RGA_set_line_drawing_reg_info
\r
1144 fill line drawing process some relate reg bit
\r
1148 20012-2-2 10:59:25
\r
1149 **************************************************************/
\r
1151 s32 RGA_set_line_drawing_reg_info(u8 *base, const struct rga_req *msg)
\r
1153 u32 *bRGA_LINE_DRAW;
\r
1154 u32 *bRGA_DST_VIR_INFO;
\r
1155 u32 *bRGA_LINE_DRAW_XY_INFO;
\r
1156 u32 *bRGA_LINE_DRAW_WIDTH;
\r
1157 u32 *bRGA_LINE_DRAWING_COLOR;
\r
1158 u32 *bRGA_LINE_DRAWING_MST;
\r
1162 s16 x_width, y_width;
\r
1163 u16 abs_x, abs_y, delta;
\r
1167 u8 line_dir, dir_major, dir_semi_major;
\r
1170 bRGA_LINE_DRAW = (u32 *)(base + RGA_LINE_DRAW_OFFSET);
\r
1171 bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);
\r
1172 bRGA_LINE_DRAW_XY_INFO = (u32 *)(base + RGA_LINE_DRAW_XY_INFO_OFFSET);
\r
1173 bRGA_LINE_DRAW_WIDTH = (u32 *)(base + RGA_LINE_DRAWING_WIDTH_OFFSET);
\r
1174 bRGA_LINE_DRAWING_COLOR = (u32 *)(base + RGA_LINE_DRAWING_COLOR_OFFSET);
\r
1175 bRGA_LINE_DRAWING_MST = (u32 *)(base + RGA_LINE_DRAWING_MST_OFFSET);
\r
1177 pw = RGA_pixel_width_init(msg->dst.format);
\r
1179 stride = (msg->dst.vir_w * pw + 3) & (~3);
\r
1181 start_addr = msg->dst.yrgb_addr
\r
1182 + (msg->line_draw_info.start_point.y * stride)
\r
1183 + (msg->line_draw_info.start_point.x * pw);
\r
1185 x_width = msg->line_draw_info.start_point.x - msg->line_draw_info.end_point.x;
\r
1186 y_width = msg->line_draw_info.start_point.y - msg->line_draw_info.end_point.y;
\r
1188 abs_x = abs(x_width);
\r
1189 abs_y = abs(y_width);
\r
1191 if (abs_x >= abs_y)
\r
1194 dir_semi_major = 1;
\r
1196 dir_semi_major = 0;
\r
1203 if((abs_x == 0)||(abs_y == 0))
\r
1206 delta = (abs_y<<12)/abs_x;
\r
1211 major_width = abs_x;
\r
1217 dir_semi_major = 1;
\r
1219 dir_semi_major = 0;
\r
1226 delta = (abs_x<<12)/abs_y;
\r
1227 major_width = abs_y;
\r
1231 reg = (reg & (~m_RGA_LINE_DRAW_MAJOR_WIDTH)) | (s_RGA_LINE_DRAW_MAJOR_WIDTH(major_width));
\r
1232 reg = (reg & (~m_RGA_LINE_DRAW_LINE_DIRECTION)) | (s_RGA_LINE_DRAW_LINE_DIRECTION(line_dir));
\r
1233 reg = (reg & (~m_RGA_LINE_DRAW_LINE_WIDTH)) | (s_RGA_LINE_DRAW_LINE_WIDTH(msg->line_draw_info.line_width - 1));
\r
1234 reg = (reg & (~m_RGA_LINE_DRAW_INCR_VALUE)) | (s_RGA_LINE_DRAW_INCR_VALUE(delta));
\r
1235 reg = (reg & (~m_RGA_LINE_DRAW_DIR_SEMI_MAJOR)) | (s_RGA_LINE_DRAW_DIR_SEMI_MAJOR(dir_semi_major));
\r
1236 reg = (reg & (~m_RGA_LINE_DRAW_DIR_MAJOR)) | (s_RGA_LINE_DRAW_DIR_MAJOR(dir_major));
\r
1237 reg = (reg & (~m_RGA_LINE_DRAW_LAST_POINT)) | (s_RGA_LINE_DRAW_LAST_POINT(msg->line_draw_info.flag >> 1));
\r
1238 reg = (reg & (~m_RGA_LINE_DRAW_ANTI_ALISING)) | (s_RGA_LINE_DRAW_ANTI_ALISING(msg->line_draw_info.flag));
\r
1240 *bRGA_LINE_DRAW = reg;
\r
1242 reg = (msg->line_draw_info.start_point.x & 0xfff) | ((msg->line_draw_info.start_point.y & 0xfff) << 16);
\r
1243 *bRGA_LINE_DRAW_XY_INFO = reg;
\r
1245 *bRGA_LINE_DRAW_WIDTH = msg->dst.vir_w;
\r
1247 *bRGA_LINE_DRAWING_COLOR = msg->line_draw_info.color;
\r
1249 *bRGA_LINE_DRAWING_MST = (u32)start_addr;
\r
1257 RGA_set_filter_reg_info(u8 *base, const struct rga_req *msg)
\r
1259 u32 *bRGA_BLUR_SHARP_INFO;
\r
1262 bRGA_BLUR_SHARP_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
\r
1264 reg = *bRGA_BLUR_SHARP_INFO;
\r
1266 reg = ((reg & (~m_RGA_BLUR_SHARP_FILTER_TYPE)) | (s_RGA_BLUR_SHARP_FILTER_TYPE(msg->bsfilter_flag & 3)));
\r
1267 reg = ((reg & (~m_RGA_BLUR_SHARP_FILTER_MODE)) | (s_RGA_BLUR_SHARP_FILTER_MODE(msg->bsfilter_flag >>2)));
\r
1269 *bRGA_BLUR_SHARP_INFO = reg;
\r
1277 RGA_set_pre_scale_reg_info(u8 *base, const struct rga_req *msg)
\r
1279 u32 *bRGA_PRE_SCALE_INFO;
\r
1283 u32 ps_yuv_flag = 0;
\r
1284 u32 src_width, src_height;
\r
1285 u32 dst_width, dst_height;
\r
1287 src_width = msg->src.act_w;
\r
1288 src_height = msg->src.act_h;
\r
1290 dst_width = msg->dst.act_w;
\r
1291 dst_height = msg->dst.act_h;
\r
1293 printk("src_act_w = %.8x, src_act_h =%.8x dst_act_w = %.8x, dst_act_h = %.8x\n",
\r
1294 msg->src.act_w, msg->src.act_h, msg->dst.act_w, msg->dst.act_h);
\r
1296 h_ratio = (src_width <<16) / dst_width;
\r
1297 v_ratio = (src_height<<16) / dst_height;
\r
1299 if (h_ratio <= (1<<16))
\r
1301 else if (h_ratio <= (2<<16))
\r
1303 else if (h_ratio <= (4<<16))
\r
1305 else if (h_ratio <= (8<<16))
\r
1308 if (v_ratio <= (1<<16))
\r
1310 else if (v_ratio <= (2<<16))
\r
1312 else if (v_ratio <= (4<<16))
\r
1314 else if (v_ratio <= (8<<16))
\r
1317 if(msg->src.format == msg->dst.format)
\r
1322 bRGA_PRE_SCALE_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);
\r
1324 reg = *bRGA_PRE_SCALE_INFO;
\r
1325 reg = ((reg & (~m_RGA_PRE_SCALE_HOR_RATIO)) | (s_RGA_PRE_SCALE_HOR_RATIO((u8)h_ratio)));
\r
1326 reg = ((reg & (~m_RGA_PRE_SCALE_VER_RATIO)) | (s_RGA_PRE_SCALE_VER_RATIO((u8)v_ratio)));
\r
1327 reg = ((reg & (~m_RGA_PRE_SCALE_OUTPUT_FORMAT)) | (s_RGA_PRE_SCALE_OUTPUT_FORMAT(ps_yuv_flag)));
\r
1329 *bRGA_PRE_SCALE_INFO = reg;
\r
1338 RGA_set_update_palette_table_reg_info(u8 *base, const struct rga_req *msg)
\r
1340 u32 *bRGA_LUT_MST;
\r
1342 if (!msg->LUT_addr) {
\r
1346 bRGA_LUT_MST = (u32 *)(base + RGA_LUT_MST_OFFSET);
\r
1348 *bRGA_LUT_MST = (u32)msg->LUT_addr;
\r
1357 RGA_set_update_patten_buff_reg_info(u8 *base, const struct rga_req *msg)
\r
1359 u32 *bRGA_PAT_MST;
\r
1360 u32 *bRGA_PAT_CON;
\r
1361 u32 *bRGA_PAT_START_POINT;
\r
1363 rga_img_info_t *pat;
\r
1365 pat = (rga_img_info_t *)&msg->pat;
\r
1367 bRGA_PAT_START_POINT = (u32 *)(base + RGA_PAT_START_POINT_OFFSET);
\r
1368 bRGA_PAT_MST = (u32 *)(base + RGA_PAT_MST_OFFSET);
\r
1369 bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);
\r
1371 if ( !pat->yrgb_addr ) {
\r
1374 *bRGA_PAT_MST = (u32)pat->yrgb_addr;
\r
1376 if ((pat->vir_w > 256)||(pat->x_offset > 256)||(pat->y_offset > 256)) {
\r
1379 *bRGA_PAT_START_POINT = (pat->vir_w * pat->y_offset) + pat->x_offset;
\r
1381 reg = (pat->vir_w-1) | ((pat->vir_h-1) << 8) | (pat->x_offset << 16) | (pat->y_offset << 24);
\r
1382 *bRGA_PAT_CON = reg;
\r
1388 /*************************************************************
\r
1390 RGA_set_mmu_ctrl_reg_info
\r
1392 fill mmu relate some reg info
\r
1396 20012-2-2 10:59:25
\r
1397 **************************************************************/
\r
1400 RGA_set_mmu_ctrl_reg_info(u8 *base, const struct rga_req *msg)
\r
1402 u32 *RGA_MMU_TLB, *RGA_MMU_CTRL_ADDR;
\r
1404 u8 TLB_size, mmu_enable, src_flag, dst_flag, CMD_flag;
\r
1407 mmu_addr = (u32)msg->mmu_info.base_addr;
\r
1408 TLB_size = (msg->mmu_info.mmu_flag >> 4) & 0x3;
\r
1409 mmu_enable = msg->mmu_info.mmu_flag & 0x1;
\r
1411 src_flag = (msg->mmu_info.mmu_flag >> 1) & 0x1;
\r
1412 dst_flag = (msg->mmu_info.mmu_flag >> 2) & 0x1;
\r
1413 CMD_flag = (msg->mmu_info.mmu_flag >> 3) & 0x1;
\r
1415 RGA_MMU_TLB = (u32 *)(base + RGA_MMU_TLB_OFFSET);
\r
1416 RGA_MMU_CTRL_ADDR = (u32 *)(base + RGA_FADING_CON_OFFSET);
\r
1418 reg = ((reg & (~m_RGA_MMU_CTRL_TLB_ADDR)) | s_RGA_MMU_CTRL_TLB_ADDR(mmu_addr));
\r
1419 *RGA_MMU_TLB = reg;
\r
1421 reg = *RGA_MMU_CTRL_ADDR;
\r
1422 reg = ((reg & (~m_RGA_MMU_CTRL_PAGE_TABLE_SIZE)) | s_RGA_MMU_CTRL_PAGE_TABLE_SIZE(TLB_size));
\r
1423 reg = ((reg & (~m_RGA_MMU_CTRL_MMU_ENABLE)) | s_RGA_MMU_CTRL_MMU_ENABLE(mmu_enable));
\r
1424 reg = ((reg & (~m_RGA_MMU_CTRL_SRC_FLUSH)) | s_RGA_MMU_CTRL_SRC_FLUSH(src_flag));
\r
1425 reg = ((reg & (~m_RGA_MMU_CTRL_DST_FLUSH)) | s_RGA_MMU_CTRL_DST_FLUSH(dst_flag));
\r
1426 reg = ((reg & (~m_RGA_MMU_CTRL_CMD_CHAN_FLUSH)) | s_RGA_MMU_CTRL_CMD_CHAN_FLUSH(CMD_flag));
\r
1427 *RGA_MMU_CTRL_ADDR = reg;
\r
1434 /*************************************************************
\r
1438 Generate RGA command reg list from rga_req struct.
\r
1442 20012-2-2 10:59:25
\r
1443 **************************************************************/
\r
1445 RGA_gen_reg_info(const struct rga_req *msg, unsigned char *base)
\r
1449 memset(base, 0x0, 28*4);
\r
1450 RGA_set_mode_ctrl(base, msg);
\r
1452 switch(msg->render_mode)
\r
1454 case bitblt_mode :
\r
1455 RGA_set_alpha_rop(base, msg);
\r
1456 RGA_set_src(base, msg);
\r
1457 RGA_set_dst(base, msg);
\r
1458 RGA_set_color(base, msg);
\r
1459 RGA_set_fading(base, msg);
\r
1460 RGA_set_pat(base, msg);
\r
1461 matrix_cal(msg, &tile);
\r
1462 dst_ctrl_cal(msg, &tile);
\r
1463 src_tile_info_cal(msg, &tile);
\r
1464 RGA_set_bitblt_reg_info(base, msg, &tile);
\r
1466 case color_palette_mode :
\r
1467 RGA_set_src(base, msg);
\r
1468 RGA_set_dst(base, msg);
\r
1469 RGA_set_color(base, msg);
\r
1470 RGA_set_color_palette_reg_info(base, msg);
\r
1472 case color_fill_mode :
\r
1473 RGA_set_dst(base, msg);
\r
1474 RGA_set_color(base, msg);
\r
1475 RGA_set_pat(base, msg);
\r
1476 RGA_set_color_fill_reg_info(base, msg);
\r
1478 case line_point_drawing_mode :
\r
1479 RGA_set_alpha_rop(base, msg);
\r
1480 RGA_set_dst(base, msg);
\r
1481 RGA_set_color(base, msg);
\r
1482 RGA_set_line_drawing_reg_info(base, msg);
\r
1484 case blur_sharp_filter_mode :
\r
1485 RGA_set_src(base, msg);
\r
1486 RGA_set_dst(base, msg);
\r
1487 RGA_set_filter_reg_info(base, msg);
\r
1489 case pre_scaling_mode :
\r
1490 RGA_set_src(base, msg);
\r
1491 RGA_set_dst(base, msg);
\r
1492 RGA_set_pre_scale_reg_info(base, msg);
\r
1494 case update_palette_table_mode :
\r
1495 if (RGA_set_update_palette_table_reg_info(base, msg)) {
\r
1499 case update_patten_buff_mode:
\r
1500 if (RGA_set_update_patten_buff_reg_info(base, msg)){
\r
1507 RGA_set_mmu_ctrl_reg_info(base, msg);
\r